From patchwork Mon Jun 19 09:29:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694270 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0DAFEB64D9 for ; Mon, 19 Jun 2023 09:30:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231439AbjFSJag (ORCPT ); Mon, 19 Jun 2023 05:30:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56016 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231761AbjFSJaD (ORCPT ); Mon, 19 Jun 2023 05:30:03 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 420201994 for ; Mon, 19 Jun 2023 02:29:26 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166965; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0deo1sCqZPvcxv3hWzdd9xwp6LIJeBhlyjLpaHqVONQ=; b=puZUwAQOeKIPFWjmaxX0Dyjmx09NkHpu/J5x5sDz7sqYIl7IavuXzdYNO8oTJPrWEjw3OJ EcN+SleXhMY3i7XnLtr8+isZEAsh+PXv7iyeJjw9KasD19CAqvv9h+z7Een/eBcUSkI4zb g+kL16HJG0hjic3VT8YKMT4vsmgkrc+HYUW4AVFrZGC0ORhgjnn1zzeRaBcN0qglOv0Ct0 G3quE4/RrVwdaJQN0ssnpiheqTdVUPtxOYIKiVHTNyL5Dx7f73oSVCy8S/7akefHriGwWp WftNpEOmsezYHcF+3RQcrHBbBqswy1RtBUTmp3tlFOMBeI578M2up0r0DtVT3Q== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id B91B41BF210; Mon, 19 Jun 2023 09:29:23 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Rob Herring Subject: [PATCH v3 02/17] dt-bindings: mtd: Create a file for raw NAND chip properties Date: Mon, 19 Jun 2023 11:29:01 +0200 Message-Id: <20230619092916.3028470-3-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org In an effort to constrain as much as we can the existing binding, we want to add "unevaluatedProperties: false" in all the NAND chip descriptions part of NAND controller bindings. But in order to do that properly, we also need to reference a file which contains all the "allowed" properties. Right now this file is nand-chip.yaml but in practice raw NAND controllers may use additional properties in their NAND chip children node. These properties are listed under nand-controller.yaml, which makes the "unevaluatedProperties" checks fail while the description are valid. We need to move these NAND chip related properties into another file, because we do not want to pollute nand-chip.yaml which is also referenced by eg. SPI-NAND devices. Let's create a raw-nand-chip.yaml file to reference all the properties a raw NAND chip description can contain. The chain of inheritance becomes: nand-controller.yaml <- raw-nand-chip.yaml raw-nand-chip.yaml <- nand-chip.yaml spi-nand.yaml <- nand-chip.yaml Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- .../bindings/mtd/nand-controller.yaml | 85 +-------------- .../bindings/mtd/raw-nand-chip.yaml | 102 ++++++++++++++++++ 2 files changed, 104 insertions(+), 83 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index f70a32d2d9d4..83a4fe4cc29d 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -16,16 +16,6 @@ description: | children nodes of the NAND controller. This representation should be enforced even for simple controllers supporting only one chip. - The ECC strength and ECC step size properties define the user - desires in terms of correction capability of a controller. Together, - they request the ECC engine to correct {strength} bit errors per - {size} bytes. - - The interpretation of these parameters is implementation-defined, so - not all implementations must support all possible - combinations. However, implementations are encouraged to further - specify the value(s) they support. - properties: $nodename: pattern: "^nand-controller(@.*)?" @@ -51,79 +41,8 @@ properties: patternProperties: "^nand@[a-f0-9]$": - $ref: nand-chip.yaml# - - properties: - reg: - description: - Contains the chip-select IDs. - - nand-ecc-placement: - description: - Location of the ECC bytes. This location is unknown by default - but can be explicitly set to "oob", if all ECC bytes are - known to be stored in the OOB area, or "interleaved" if ECC - bytes will be interleaved with regular data in the main area. - $ref: /schemas/types.yaml#/definitions/string - enum: [ oob, interleaved ] - - nand-bus-width: - description: - Bus width to the NAND chip - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [8, 16] - default: 8 - - nand-on-flash-bbt: - description: - With this property, the OS will search the device for a Bad - Block Table (BBT). If not found, it will create one, reserve - a few blocks at the end of the device to store it and update - it as the device ages. Otherwise, the out-of-band area of a - few pages of all the blocks will be scanned at boot time to - find Bad Block Markers (BBM). These markers will help to - build a volatile BBT in RAM. - $ref: /schemas/types.yaml#/definitions/flag - - nand-ecc-maximize: - description: - Whether or not the ECC strength should be maximized. The - maximum ECC strength is both controller and chip - dependent. The ECC engine has to select the ECC config - providing the best strength and taking the OOB area size - constraint into account. This is particularly useful when - only the in-band area is used by the upper layers, and you - want to make your NAND as reliable as possible. - $ref: /schemas/types.yaml#/definitions/flag - - nand-is-boot-medium: - description: - Whether or not the NAND chip is a boot medium. Drivers might - use this information to select ECC algorithms supported by - the boot ROM or similar restrictions. - $ref: /schemas/types.yaml#/definitions/flag - - nand-rb: - description: - Contains the native Ready/Busy IDs. - $ref: /schemas/types.yaml#/definitions/uint32-array - - rb-gpios: - description: - Contains one or more GPIO descriptor (the numper of descriptor - depends on the number of R/B pins exposed by the flash) for the - Ready/Busy pins. Active state refers to the NAND ready state and - should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted. - - wp-gpios: - description: - Contains one GPIO descriptor for the Write Protect pin. - Active state refers to the NAND Write Protect state and should be - set to GPIOD_ACTIVE_LOW unless the signal is inverted. - maxItems: 1 - - required: - - reg + type: object + $ref: raw-nand-chip.yaml# required: - "#address-cells" diff --git a/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml new file mode 100644 index 000000000000..2caa6a9a73d3 --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/raw-nand-chip.yaml @@ -0,0 +1,102 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/raw-nand-chip.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Raw NAND Chip Common Properties + +maintainers: + - Miquel Raynal + +allOf: + - $ref: nand-chip.yaml# + +description: | + The ECC strength and ECC step size properties define the user + desires in terms of correction capability of a controller. Together, + they request the ECC engine to correct {strength} bit errors per + {size} bytes for a particular raw NAND chip. + + The interpretation of these parameters is implementation-defined, so + not all implementations must support all possible + combinations. However, implementations are encouraged to further + specify the value(s) they support. + +properties: + $nodename: + pattern: "^nand@[a-f0-9]$" + + reg: + description: + Contains the chip-select IDs. + + nand-ecc-placement: + description: + Location of the ECC bytes. This location is unknown by default + but can be explicitly set to "oob", if all ECC bytes are + known to be stored in the OOB area, or "interleaved" if ECC + bytes will be interleaved with regular data in the main area. + $ref: /schemas/types.yaml#/definitions/string + enum: [ oob, interleaved ] + + nand-bus-width: + description: + Bus width to the NAND chip + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [8, 16] + default: 8 + + nand-on-flash-bbt: + description: + With this property, the OS will search the device for a Bad + Block Table (BBT). If not found, it will create one, reserve + a few blocks at the end of the device to store it and update + it as the device ages. Otherwise, the out-of-band area of a + few pages of all the blocks will be scanned at boot time to + find Bad Block Markers (BBM). These markers will help to + build a volatile BBT in RAM. + $ref: /schemas/types.yaml#/definitions/flag + + nand-ecc-maximize: + description: + Whether or not the ECC strength should be maximized. The + maximum ECC strength is both controller and chip + dependent. The ECC engine has to select the ECC config + providing the best strength and taking the OOB area size + constraint into account. This is particularly useful when + only the in-band area is used by the upper layers, and you + want to make your NAND as reliable as possible. + $ref: /schemas/types.yaml#/definitions/flag + + nand-is-boot-medium: + description: + Whether or not the NAND chip is a boot medium. Drivers might + use this information to select ECC algorithms supported by + the boot ROM or similar restrictions. + $ref: /schemas/types.yaml#/definitions/flag + + nand-rb: + description: + Contains the native Ready/Busy IDs. + $ref: /schemas/types.yaml#/definitions/uint32-array + + rb-gpios: + description: + Contains one or more GPIO descriptor (the numper of descriptor + depends on the number of R/B pins exposed by the flash) for the + Ready/Busy pins. Active state refers to the NAND ready state and + should be set to GPIOD_ACTIVE_HIGH unless the signal is inverted. + + wp-gpios: + description: + Contains one GPIO descriptor for the Write Protect pin. + Active state refers to the NAND Write Protect state and should be + set to GPIOD_ACTIVE_LOW unless the signal is inverted. + maxItems: 1 + +required: + - reg + +# This is a generic file other binding inherit from and extend +additionalProperties: true From patchwork Mon Jun 19 09:29:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694268 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26082EB64D9 for ; Mon, 19 Jun 2023 09:31:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231470AbjFSJa6 (ORCPT ); Mon, 19 Jun 2023 05:30:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231785AbjFSJaI (ORCPT ); Mon, 19 Jun 2023 05:30:08 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BA928B0 for ; Mon, 19 Jun 2023 02:29:30 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166969; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QFNn7R3CCLELog5sCLD8kgMqopmVWyHvy7AjleYx/tM=; b=QpznXL/FJ88qPbjryvLymATBxEG0I4hZwAPb5p7zFyvJ0BpnLKcX+NUA9h5ucAqaz1Mxui 8sgRATFZ7t8krSU/ZLzuo9tTT9BUQOX2PxMtcRDJlzWloLwygxFoULtC8eZbVk+oSCr5QU Xv2kPbjnsk4NTW6B/AqO03cSeXMncQuxd2LRz7sqGbZA4FW6hGKEYcx1DPCCTUFnDjkyAV csFN/kINKf41uicg1bkr7vGAM+l9q9k8Oq+JYXjSox0l7CiqVZ5NoCDzJ17l9UNcJSbw4I aGHjh8ug4IYhAmah9qsBSbnHjs2EmLRuLmW/TZ4RjyUk97yDEFR0rg8nbst9LQ== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 092A31BF213; Mon, 19 Jun 2023 09:29:27 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski Subject: [PATCH v3 05/17] dt-bindings: mtd: qcom: Fix a property position Date: Mon, 19 Jun 2023 11:29:04 +0200 Message-Id: <20230619092916.3028470-6-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org qcom,boot-partitions is a NAND chip property, not a NAND controller property. Move the description of the property into the NAND chip section and just enable the property in the if/else block. Fixes: 5278cc93a97f ("dt-bindings: mtd: qcom_nandc: document qcom,boot-partitions binding") Cc: Manivannan Sadhasivam Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring Reviewed-by: Krzysztof Kozlowski --- .../devicetree/bindings/mtd/qcom,nandc.yaml | 41 +++++++++++-------- 1 file changed, 25 insertions(+), 16 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml index 00c991ffa6c4..3d77922dfaef 100644 --- a/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml +++ b/Documentation/devicetree/bindings/mtd/qcom,nandc.yaml @@ -45,6 +45,22 @@ patternProperties: enum: - 512 + qcom,boot-partitions: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: offset + - description: size + description: + Boot partition use a different layout where the 4 bytes of spare + data are not protected by ECC. Use this to declare these special + partitions by defining first the offset and then the size. + + It's in the form of + and should be declared in ascending order. + + Refer to the ipq8064 example on how to use this special binding. + allOf: - $ref: nand-controller.yaml# @@ -107,22 +123,15 @@ allOf: - qcom,ipq806x-nand then: - properties: - qcom,boot-partitions: - $ref: /schemas/types.yaml#/definitions/uint32-matrix - items: - items: - - description: offset - - description: size - description: - Boot partition use a different layout where the 4 bytes of spare - data are not protected by ECC. Use this to declare these special - partitions by defining first the offset and then the size. - - It's in the form of - and should be declared in ascending order. - - Refer to the ipq8064 example on how to use this special binding. + patternProperties: + "^nand@[a-f0-9]$": + properties: + qcom,boot-partitions: true + else: + patternProperties: + "^nand@[a-f0-9]$": + properties: + qcom,boot-partitions: false required: - compatible From patchwork Mon Jun 19 09:29:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694269 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06E92EB64D9 for ; Mon, 19 Jun 2023 09:30:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230299AbjFSJav (ORCPT ); Mon, 19 Jun 2023 05:30:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56116 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231794AbjFSJaJ (ORCPT ); Mon, 19 Jun 2023 05:30:09 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A6BE12F for ; Mon, 19 Jun 2023 02:29:33 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166972; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=gQ5Zj4T+YQmeGzYu7MbhJ3MeD+33xm3HfrseEs9tbYY=; b=PCOuQPoySwQ2Zl4YfeeVMMx/rf7a803XG5ovWw+MqKZ5FmPKVcV1j4+F/VRUA4w2oln2L2 3WCxyf1J9rDZBC1prw0nXL5bjY9b+VYEiGCgqXzKIvtzEsNaZMV+Av96mNK2kIhw2e2Pbl yhA0WxHN7i+jubYt+EYvQ4VyZ9i7mhpaNSdrZ8XRF9bWjErrkX8HeV9q3ImJj7X7EHC6zW LNX08n71L4isY9htLlrB1tjSQ95KPvTIkyn2OHmzaoO6pVKwHWCrzwfXyfQsoX++Buv7MH yriJRHpadSso96OhLJ4Ngi1dbr8qjCXOA7hVHYOt+viqnCdDsNMXljH0V1S4Hg== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 198941BF216; Mon, 19 Jun 2023 09:29:31 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Paul Cercueil , Rob Herring Subject: [PATCH v3 07/17] dt-bindings: mtd: ingenic: Prevent NAND chip unevaluated properties Date: Mon, 19 Jun 2023 11:29:06 +0200 Message-Id: <20230619092916.3028470-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org List all the possible properties in the NAND chip as per the example and set unevaluatedProperties to false in the NAND chip section. Cc: Paul Cercueil Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/mtd/ingenic,nand.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml index a7bdb5d3675c..b9312ebefeb9 100644 --- a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml @@ -39,7 +39,9 @@ properties: patternProperties: "^nand@[a-f0-9]$": type: object + $ref: raw-nand-chip.yaml properties: + rb-gpios: description: GPIO specifier for the busy pin. maxItems: 1 @@ -48,6 +50,8 @@ patternProperties: description: GPIO specifier for the write-protect pin. maxItems: 1 + unevaluatedProperties: false + required: - compatible - reg From patchwork Mon Jun 19 09:29:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694267 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 08D76EB64D9 for ; Mon, 19 Jun 2023 09:31:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229519AbjFSJbD (ORCPT ); Mon, 19 Jun 2023 05:31:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54936 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231803AbjFSJaL (ORCPT ); Mon, 19 Jun 2023 05:30:11 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::228]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 31C181A4 for ; Mon, 19 Jun 2023 02:29:35 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166973; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ysOz0mZvazI92RKhh4J+2eW3anNjKtOdPFA10AGw6cA=; b=bBF+XbkXK8wcfl0xDnT09GzHhyYuO9FsYkMCQEuRQM5uOrLutG7UTpHvW08rOLx66xW/8p HKU7sHanxB8/Gmr8UTc0XAsakKOzx22xD51x2rOH6k9cWGwfwmDugMH1p2ZTp4yDdK5opm 5mIoKV48FhuB5k7n5QJtYb5Zk4gJvdrI1738RED4g+XlySI7pdOXPP7iPmBoOgt3FT66OD qqstmcNc2NfHjdBoHZARY2XY8uBudS5A2GwrwmAx16GYSyK1mjjLyeCEKxjZEp8GaIezSh LPw8N98HPSp2LmCEvmmJTI4ZXdnolMDSyX5ooB1gkynugPCmv6gVKugfSeU+3A== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 620621BF218; Mon, 19 Jun 2023 09:29:32 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Maxime Ripard , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Rob Herring Subject: [PATCH v3 08/17] dt-bindings: mtd: sunxi: Prevent NAND chip unevaluated properties Date: Mon, 19 Jun 2023 11:29:07 +0200 Message-Id: <20230619092916.3028470-9-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org nand-ecc-mode is a generic property which may apply to any raw NAND chip, it does not need to be listed in each controller description. Instead, let's reference the raw NAND chip description file which contains the property. The description contained "additionalProperties: false" which is wrong as other properties such as partitions might very well be added in the final .dts, and anyway needs to be converted into "unexpectedProperties: false" to fit the property change new requirements. Cc: Maxime Ripard Cc: Chen-Yu Tsai Cc: Jernej Skrabec Cc: Samuel Holland Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- .../devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml index 9a88870cd865..054b6b8bf9b9 100644 --- a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml @@ -49,13 +49,12 @@ properties: patternProperties: "^nand@[a-f0-9]$": type: object + $ref: raw-nand-chip.yaml properties: reg: minimum: 0 maximum: 7 - nand-ecc-mode: true - nand-ecc-algo: const: bch @@ -75,7 +74,7 @@ patternProperties: minimum: 0 maximum: 1 - additionalProperties: false + unevaluatedProperties: false required: - compatible From patchwork Mon Jun 19 09:29:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694266 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 71371EB64DA for ; Mon, 19 Jun 2023 09:31:11 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229513AbjFSJbK (ORCPT ); Mon, 19 Jun 2023 05:31:10 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56220 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231838AbjFSJaP (ORCPT ); Mon, 19 Jun 2023 05:30:15 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::228]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E222E1BC7 for ; Mon, 19 Jun 2023 02:29:39 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166978; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=RFmCslVFz2CsswADyIjnNQmF72pKXiw6o6n+ThVMj7A=; b=Xmn+KDShpLYN5LuORmG5+hp+80pxOYwTikAP/2in2yKo4E3FU5zBhN3q3/E2zy5EpAjL6C iZLXftq+/uIXEVOzkaUGuGR0331MbV+15dk1B3foaceUJzlJ0arHh7NIPwQ2ecAIk/1kg9 bH6/HkhjUflEWkwRI9VuW+AYoYuw+BszHYFv5Qphu10j7uRTGToh03I46HWXWpn2brF1nP Enw2TqSW8FDSlW6s9lWDU//xVxbATo3eeGcxox495i7tk/PQKJzJb8zXoAHtxJOTOVDUig FOaJ7waX1O3s2gUkdCPWHcxsBlTCdm1dhGwPkdiTQiIhdXfLAWcEYWHt5dpMxw== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id C566B1BF204; Mon, 19 Jun 2023 09:29:36 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Masahiro Yamada , Rob Herring Subject: [PATCH v3 11/17] dt-bindings: mtd: denali: Prevent NAND chip unevaluated properties Date: Mon, 19 Jun 2023 11:29:10 +0200 Message-Id: <20230619092916.3028470-12-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Ensure all raw NAND chip properties are valid by referencing the relevant schema and set unevaluatedProperties to false in the NAND chip section to avoid spurious additions of random properties. Doing this in one location also saves us from dupplicating the description of the NAND chip object. Cc: Masahiro Yamada Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/mtd/denali,nand.yaml | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/denali,nand.yaml b/Documentation/devicetree/bindings/mtd/denali,nand.yaml index 0be83ad42970..81f95538d415 100644 --- a/Documentation/devicetree/bindings/mtd/denali,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/denali,nand.yaml @@ -63,6 +63,12 @@ properties: minItems: 1 maxItems: 2 +patternProperties: + "^nand@[a-f0-9]$": + type: object + $ref: raw-nand-chip.yaml + unevaluatedProperties: false + allOf: - $ref: nand-controller.yaml @@ -74,7 +80,6 @@ allOf: then: patternProperties: "^nand@[a-f0-9]$": - type: object properties: nand-ecc-strength: enum: @@ -92,7 +97,6 @@ allOf: then: patternProperties: "^nand@[a-f0-9]$": - type: object properties: nand-ecc-strength: enum: @@ -111,7 +115,6 @@ allOf: then: patternProperties: "^nand@[a-f0-9]$": - type: object properties: nand-ecc-strength: enum: From patchwork Mon Jun 19 09:29:11 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694265 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79D0FEB64D9 for ; Mon, 19 Jun 2023 09:31:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230388AbjFSJbY (ORCPT ); Mon, 19 Jun 2023 05:31:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55786 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231846AbjFSJaQ (ORCPT ); Mon, 19 Jun 2023 05:30:16 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::228]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2EFF0E68 for ; Mon, 19 Jun 2023 02:29:40 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166979; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=z2qOks+/r0ydif/5pXo0Sbt0HpZgDwWYY+rCMjw4hQI=; b=KsBcigDMXmfEje+8lP3IbHv3Q9ci9QREjhEyXevx/Ngzf+K8QtB8oG3HLtMjqAvfN41fO5 AF8Ea/tNS9vDh7tW5dWh3CWm4+ZHPlPx1LEQbaiIZOavb2syUbsB0OogFoSpKnZPXiTclC ww78h2hZ13N9iHxVm1zX8Eg0B/FWYk3/hD0ForVdBMO3cfuVeHu8hNqtkB6d19Hd4hmFUE E4yhsR5VQeI20k8oKKAQHWGU8M2BRW57clSR8Hjx9iqTSWqPv3Z1I5TcMFnIg+d4TIb+gG B1tnIWwSbhpBv9hnVqqJlL94rVUtOGF10+tVq8fb5y8OqK2oi4nMc4b/pXYlMg== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 41F121BF20B; Mon, 19 Jun 2023 09:29:38 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Vadivel Murugan , Rob Herring Subject: [PATCH v3 12/17] dt-bindings: mtd: intel: Prevent NAND chip unevaluated properties Date: Mon, 19 Jun 2023 11:29:11 +0200 Message-Id: <20230619092916.3028470-13-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org nand-ecc-mode is a generic property which may apply to any raw NAND chip, it does not need to be listed in each controller description. Instead, let's reference the raw NAND chip description file which contains the property. The description contained "additionalProperties: false" which is wrong as other properties such as partitions might very well be added in the final .dts, and anyway needs to be converted into "unexpectedProperties: false" to fit the property change new requirements. Cc: Vadivel Murugan Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml b/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml index cc3def758e00..07bc7e3efd3a 100644 --- a/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml +++ b/Documentation/devicetree/bindings/mtd/intel,lgm-ebunand.yaml @@ -42,17 +42,16 @@ properties: patternProperties: "^nand@[a-f0-9]$": type: object + $ref: raw-nand-chip.yaml properties: reg: minimum: 0 maximum: 1 - nand-ecc-mode: true - nand-ecc-algo: const: hw - additionalProperties: false + unevaluatedProperties: false required: - compatible From patchwork Mon Jun 19 09:29:13 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694264 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 447E9EB64D9 for ; Mon, 19 Jun 2023 09:32:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231638AbjFSJcR (ORCPT ); Mon, 19 Jun 2023 05:32:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231905AbjFSJa3 (ORCPT ); Mon, 19 Jun 2023 05:30:29 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [217.70.183.201]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 42F381BD9 for ; Mon, 19 Jun 2023 02:29:45 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166983; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=cL+Fg1Qce9Oz6gSCncCbxOyVxxd178F0p37IQn0cMX8=; b=ivBjWF0uBkDjUlhv7hBCeVOVLgc3AkAOJbHwzrFnXlW9ZubEOicT3YIx5Dd1d687EwmhXy z4LfO2Yu3mvBFlqEuGX3SI/L8gBj824645E/RAMW5573Cyd4yfuJYNY2vt5WkUsl4j9xWR Y/u62es6rTR1HXRtGEiBDmNfDJjYedG3P2zUrSOQx1e5hJr0Rqo05Z7ioiTYXaYCT1dv9d P/aFhDxloWIVGzpHYhuqqWPf6QVGnI5/farql/ZatQ5DIR1ZSr8sUsZ3elUkuWS0zkT812 +3sJjwHDsJ2KAxkEp4w0DMsi75cfdf7ZjIPevUVOJ0w2f0bk9Es2tJOBag8j+g== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id 00BA21BF221; Mon, 19 Jun 2023 09:29:41 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Maxime Coquelin , Alexandre Torgue , Christophe Kerello , Rob Herring Subject: [PATCH v3 14/17] dt-bindings: mtd: stm32: Prevent NAND chip unevaluated properties Date: Mon, 19 Jun 2023 11:29:13 +0200 Message-Id: <20230619092916.3028470-15-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org List all the possible properties in the NAND chip as per the example and set unevaluatedProperties to false in the NAND chip section. Cc: Maxime Coquelin Cc: Alexandre Torgue Cc: Christophe Kerello Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml index 986e85ccebc7..e72cb5bacaf0 100644 --- a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml @@ -37,6 +37,7 @@ properties: patternProperties: "^nand@[a-f0-9]$": type: object + $ref: raw-nand-chip.yaml properties: nand-ecc-step-size: const: 512 @@ -44,6 +45,8 @@ patternProperties: nand-ecc-strength: enum: [1, 4, 8] + unevaluatedProperties: false + allOf: - $ref: nand-controller.yaml# From patchwork Mon Jun 19 09:29:16 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 694263 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C7B1EB64D9 for ; Mon, 19 Jun 2023 09:32:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231535AbjFSJcZ (ORCPT ); Mon, 19 Jun 2023 05:32:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55798 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231526AbjFSJa7 (ORCPT ); Mon, 19 Jun 2023 05:30:59 -0400 Received: from relay8-d.mail.gandi.net (relay8-d.mail.gandi.net [IPv6:2001:4b98:dc4:8::228]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7931A19A4 for ; Mon, 19 Jun 2023 02:29:55 -0700 (PDT) X-GND-Sasl: miquel.raynal@bootlin.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1687166987; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=iglQIY4QvWya2y1OlkXSdtLQxq0KUlMVd8OaSiGAwgI=; b=Cyc4/xAarToYnL+5GuQNZWro1T9IPeINoNzIYg2H6Uycbpk12XL4c1DVgMwzJxJYUDqZs0 bwgnvgu9l/8UqAwLlzG+Xk3+Jrd7DQIJSosu05JLnN8RVk90zvPlM6T6Hc2NxSn6FtgOsZ qEEGztxlLB/d7r9pVvzUnerw5K19qEY7iCZIWnBu00q+qhOB4tjzrtQiXfLaRSs4s4vKh/ g8hyfFXB77PPZ1IxoQ9uAviDpPJQw8+kUzeTj4qPO3U6pb7tApyZDpG2TSejwCDpXoAD1d Xf7Qo6mbxwEO5v//G6cs0VVnf9wFzRha9spzYtz79fjYUgYQ/915I4mkhvV7rQ== X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com X-GND-Sasl: miquel.raynal@bootlin.com Received: by mail.gandi.net (Postfix) with ESMTPSA id C447E1BF203; Mon, 19 Jun 2023 09:29:46 +0000 (UTC) From: Miquel Raynal To: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org Cc: Richard Weinberger , Vignesh Raghavendra , Tudor Ambarus , Pratyush Yadav , Michael Walle , , Chris Packham , Thomas Petazzoni , Miquel Raynal , Rob Herring Subject: [PATCH v3 17/17] dt-bindings: mtd: ti,am654: Prevent unevaluated properties Date: Mon, 19 Jun 2023 11:29:16 +0200 Message-Id: <20230619092916.3028470-18-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230619092916.3028470-1-miquel.raynal@bootlin.com> References: <20230619092916.3028470-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Reference mtd-physmap.yaml which contains all the relevant properties for this device. Add "unevaluatedProperties: false" to avoid any spurious addition of random properties. Cc: Vignesh Raghavendra Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml b/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml index 4774c92e7fc4..df4fdc02456d 100644 --- a/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml +++ b/Documentation/devicetree/bindings/mtd/ti,am654-hbmc.yaml @@ -30,6 +30,8 @@ properties: patternProperties: "^flash@[0-1],[0-9a-f]+$": type: object + $ref: mtd-physmap.yaml + unevaluatedProperties: false required: - compatible