From patchwork Sun Jul 2 17:50:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 698531 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29F13C001DF for ; Sun, 2 Jul 2023 17:50:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229754AbjGBRuw (ORCPT ); Sun, 2 Jul 2023 13:50:52 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43180 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229884AbjGBRuv (ORCPT ); Sun, 2 Jul 2023 13:50:51 -0400 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EDA1EE5C for ; Sun, 2 Jul 2023 10:50:49 -0700 (PDT) Received: by mail-lf1-x136.google.com with SMTP id 2adb3069b0e04-4fbb281eec6so343424e87.1 for ; Sun, 02 Jul 2023 10:50:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688320248; x=1690912248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=njCJmlbSIeB3iLgzCjXAUGSkcFcm0Wzmp2XKu6LQ3g4=; b=ssG7/m80HLcUtzN1Tp8sf8cWXOe8MEJXLIi4oxSezPkJSudJCvDjF/iosLzHuIpJjh Mnyh+TxoYYdGlxwWrKErzgisnI/UMEo3BaZdq+qjL/Z60/voNmMirPCr6atuWj8I5kye fgKs/+SK8eTchJAXlyQp4x985BuSAb4jfS8v0pxbvT5hnmorTGHOCT86elBvIOmloi/W dXS5fDdITV6ExL3/k2LwgJuqu6dGfTPri5EYb+M+s5rR14Fu5dF+7sOPZptI4Ch7xtYI 3An7LkVTxHd2tvG/5BRhFzCCKReqxuIYbu4llyrl7tnNa0mdlg7r8g5l6sV1x6yD5GNW hbRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688320248; x=1690912248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=njCJmlbSIeB3iLgzCjXAUGSkcFcm0Wzmp2XKu6LQ3g4=; b=hZNySMQYbPXgXLFmlqKtDBl52s5Z2EquX68hSXlg6xHYGVI6TmE4MBDxWun0VG9Ywn QHfEl0+2C0yXwimichDMZdhy5jj/Jhbqcyi9Dzc8nBQrNxo2KZR5aTUIW7R5VRj2wEIK zd+FYslScl4XQ7VZRE2639Y01ZH2TOwjXb1n8SLPdDHyi7z33vZJFVW6SJQPIwKEGRaw n1yIhxC7tr1uWOGgbScjzznVi21kZG7aWNENWD/l9/8f+C9ODe1fJZEgr2Cfc89VNspS bmgz/gbUBjWR7QbMlS/dCbBcSzS6zI+wmZvvL894ClZjJwbBNarbAsbOuMJdu482G1OP FNsg== X-Gm-Message-State: ABy/qLZ/1iarwWzH/cLLpYhMrdDrVOI7dZIxf1G3vQh0doGTxMLw4Puc 81+s3miRC8HiU4YB7KabxbFitg== X-Google-Smtp-Source: APBJJlFId1IOZctJQ1PTPLk4Ird+SgEb9UvsJMTQSH7UqV6if0h47PhvKg0F4NMxVXrij5LPMbKCiw== X-Received: by 2002:a05:6512:34c8:b0:4fb:85ad:b6e2 with SMTP id w8-20020a05651234c800b004fb85adb6e2mr5110913lfr.50.1688320248082; Sun, 02 Jul 2023 10:50:48 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id d1-20020ac24c81000000b004fb759964a9sm3354130lfl.168.2023.07.02.10.50.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jul 2023 10:50:47 -0700 (PDT) From: Dmitry Baryshkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Michael Turquette , "Rafael J. Wysocki" , Georgi Djakov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Christian Marangi , Stephan Gerhold Subject: [RFC PATCH 2/8] cpufreq: qcom-nvmem: enable core voltage scaling for MSM8960 Date: Sun, 2 Jul 2023 20:50:39 +0300 Message-Id: <20230702175045.122041-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> References: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Reuse APQ8064 config for MSM8960 to enable core voltage scaling. Signed-off-by: Dmitry Baryshkov --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index 422fd8ca8a00..113f35668048 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -410,7 +410,7 @@ static const struct of_device_id qcom_cpufreq_match_list[] __initconst = { { .compatible = "qcom,ipq8064", .data = &match_data_krait }, { .compatible = "qcom,apq8064", .data = &match_data_apq8064 }, { .compatible = "qcom,msm8974", .data = &match_data_krait }, - { .compatible = "qcom,msm8960", .data = &match_data_krait }, + { .compatible = "qcom,msm8960", .data = &match_data_apq8064 }, {}, }; MODULE_DEVICE_TABLE(of, qcom_cpufreq_match_list); From patchwork Sun Jul 2 17:50:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 698530 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5C597C04A6A for ; Sun, 2 Jul 2023 17:50:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229707AbjGBRux (ORCPT ); Sun, 2 Jul 2023 13:50:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43254 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229516AbjGBRuw (ORCPT ); Sun, 2 Jul 2023 13:50:52 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B603FE61 for ; Sun, 2 Jul 2023 10:50:50 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id 2adb3069b0e04-4f954d7309fso4579434e87.1 for ; Sun, 02 Jul 2023 10:50:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688320248; x=1690912248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+ZQJLTJ2EerMHDwduBzrfbgK2+3NvX2yJnYFO5QKR6Q=; b=vuJpzPvDaaQ4/kTwvTX9dc+8JsfFGjeeXY8ZoivSFxssTE1UbBtpfm6Jo6ymucoAmr HJI30T+Bz9s7sBkObYaJqPvVH8nKmf5RK8eCeZXmo2jCLv38F9uqvOd+xlN6ksHB19Sx rSHwUoiOb5WrJgDU4HScXPbM0FySfoRhxLkxX+kRmDLBqFqEbU9ePFS12m4oBqOoPP+X 03ZDN+u9/GQia+jipO2dlUVdEVvf181HOTroiQfPLk1/I5jhysaYI25YlaiyTuk3+jH2 pLV2ILxYKT+jiBnFSGOMm9JI9As5gHEwtsXFyvjmDFHzL9WghXRuatkq+fqNt0BXwUvy pWLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688320248; x=1690912248; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+ZQJLTJ2EerMHDwduBzrfbgK2+3NvX2yJnYFO5QKR6Q=; b=FNgHxPTwxGZgIO/Qw4KWbXDgRNOphYJqAWq+Di1ivi3Ul+zvUQTc0usV2V3XE4+gC2 gfArHSnIzj7723YPPm8GWNHB2WXD3ThQOMMFY8r5HOKVOa9eR7cveNhIG02tHYmFqOdv FCoGx/JK+ghz8lR911OfWlaAFxkrXzd2JL4r6TnP0o/NL7Dnj/TohUu/LNju9prfsKcS CKunEa6ImUWTGSFPnTPQSMFynKTLKZrmCOEf4vBo5Mfhdpf8zxCMIJQ+GKgprsOIul9p L/Y72za2c/Q7JuppgE1LJdK7/2R5TaS9U7k7FTnnrPgFKJd4JJI1gZSaITkZkaMdmrfb GEOw== X-Gm-Message-State: AC+VfDwkDNqFV+UshzQ3cDdOqhN5hW+ZUiuafdzdpLdZ23/bRgug/KWE v532eoP7zOPUeSBKcgLdChGz6w== X-Google-Smtp-Source: ACHHUZ5QbzPu6/c+3YUBe1rdRQkXCw7v4E1AUk5y64Ec/hIjjtRQw3XTnxSap3+9Q60pKdC9JB24FQ== X-Received: by 2002:a05:6512:2352:b0:4f4:b10f:d521 with SMTP id p18-20020a056512235200b004f4b10fd521mr4038332lfu.13.1688320248805; Sun, 02 Jul 2023 10:50:48 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id d1-20020ac24c81000000b004fb759964a9sm3354130lfl.168.2023.07.02.10.50.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jul 2023 10:50:48 -0700 (PDT) From: Dmitry Baryshkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Michael Turquette , "Rafael J. Wysocki" , Georgi Djakov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Christian Marangi , Stephan Gerhold Subject: [RFC PATCH 3/8] cpufreq: qcom-nvmem: provide vmin constraint for early Kraits Date: Sun, 2 Jul 2023 20:50:40 +0300 Message-Id: <20230702175045.122041-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> References: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Early Krait CPUs required that core voltage was not below 1.15 V. Implement this requirement by adding separate config_regulators callback. Signed-off-by: Dmitry Baryshkov --- drivers/cpufreq/qcom-cpufreq-nvmem.c | 67 +++++++++++++++++++++++++++- 1 file changed, 66 insertions(+), 1 deletion(-) diff --git a/drivers/cpufreq/qcom-cpufreq-nvmem.c b/drivers/cpufreq/qcom-cpufreq-nvmem.c index 113f35668048..9312c8ab62a8 100644 --- a/drivers/cpufreq/qcom-cpufreq-nvmem.c +++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c @@ -30,6 +30,8 @@ #include #include +#include + #include struct qcom_cpufreq_drv; @@ -257,6 +259,66 @@ static const struct qcom_cpufreq_match_data match_data_apq8064 = { .regulator_names = apq8064_regulator_names, }; +static const int krait_needs_vmin(void) +{ + switch (read_cpuid_id()) { + case 0x511F04D0: /* KR28M2A20 */ + case 0x511F04D1: /* KR28M2A21 */ + case 0x510F06F0: /* KR28M4A10 */ + return 1; + default: + return 0; + }; +} + +#define KRAIT_VMIN 1150000 +#define KRAIT_VMIN_MAX (KRAIT_VMIN + 25000) +static int krait_config_regulator_vmin(struct device *dev, + struct dev_pm_opp *old_opp, struct dev_pm_opp *new_opp, + struct regulator **regulators, unsigned int count) +{ + struct regulator *reg = regulators[0]; + struct dev_pm_opp_supply supply; + int ret; + + /* This function only supports single regulator per device */ + if (WARN_ON(count > 1)) { + dev_err(dev, "multiple regulators are not supported\n"); + return -EINVAL; + } + + if (IS_ERR(reg)) { + dev_dbg(dev, "%s: regulator not available: %ld\n", __func__, + PTR_ERR(reg)); + return 0; + } + + ret = dev_pm_opp_get_supplies(new_opp, &supply); + if (WARN_ON(ret)) + return ret; + + if (supply.u_volt_min < KRAIT_VMIN) { + supply.u_volt_min = KRAIT_VMIN; + supply.u_volt = KRAIT_VMIN; + supply.u_volt_max = KRAIT_VMIN_MAX; + } + + dev_dbg(dev, "%s: voltages (mV): %lu %lu %lu\n", __func__, + supply.u_volt_min, supply.u_volt, supply.u_volt_max); + + ret = regulator_set_voltage_triplet(reg, + supply.u_volt_min, + supply.u_volt, + supply.u_volt_max); + if (ret) + dev_err(dev, "%s: failed to set voltage (%lu %lu %lu mV): %d\n", + __func__, supply.u_volt_min, supply.u_volt, + supply.u_volt_max, ret); + + return ret; +} + + static int qcom_cpufreq_probe(struct platform_device *pdev) { struct qcom_cpufreq_drv *drv; @@ -344,8 +406,11 @@ static int qcom_cpufreq_probe(struct platform_device *pdev) config.virt_devs = NULL; } - if (drv->data->regulator_names) + if (drv->data->regulator_names) { config.regulator_names = drv->data->regulator_names; + if (krait_needs_vmin()) + config.config_regulators = krait_config_regulator_vmin; + } if (config.supported_hw || config.genpd_names || From patchwork Sun Jul 2 17:50:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 698529 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9E886EB64DD for ; Sun, 2 Jul 2023 17:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229863AbjGBRu6 (ORCPT ); Sun, 2 Jul 2023 13:50:58 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43448 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229783AbjGBRu5 (ORCPT ); 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Sun, 02 Jul 2023 10:50:50 -0700 (PDT) From: Dmitry Baryshkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Michael Turquette , "Rafael J. Wysocki" , Georgi Djakov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Christian Marangi , Stephan Gerhold Subject: [RFC PATCH 6/8] ARM: dts: qcom: msm8960: add Krait clock controller Date: Sun, 2 Jul 2023 20:50:43 +0300 Message-Id: <20230702175045.122041-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> References: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add device node for the clock controller for the CPU cores and L2 clocks. It will be further used by the L2 and by the CPUfreq nodes. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index ba82b6ab899e..65065276c885 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -81,6 +81,24 @@ sleep_clk: sleep_clk { }; }; + kraitcc: clock-controller { + compatible = "qcom,krait-cc-v1"; + clocks = <&gcc PLL9>, /* hfpll0 */ + <&gcc PLL10>, /* hfpll1 */ + <&gcc PLL12>, /* hfpll_l2 */ + <&acc0>, + <&acc1>, + <&l2cc>; + clock-names = "hfpll0", + "hfpll1", + "hfpll_l2", + "acpu0_aux", + "acpu1_aux", + "acpu_l2_aux"; + #clock-cells = <1>; + #interconnect-cells = <1>; + }; + /* Temporary fixed regulator */ vsdcc_fixed: vsdcc-regulator { compatible = "regulator-fixed"; From patchwork Sun Jul 2 17:50:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 698528 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CC65DC00528 for ; Sun, 2 Jul 2023 17:51:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229783AbjGBRvB (ORCPT ); Sun, 2 Jul 2023 13:51:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229822AbjGBRvA (ORCPT ); Sun, 2 Jul 2023 13:51:00 -0400 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 764CAE75 for ; Sun, 2 Jul 2023 10:50:55 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-4fb8574a3a1so5666979e87.1 for ; Sun, 02 Jul 2023 10:50:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1688320253; x=1690912253; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Z9c4FVrk3TOMJ6j16d6O+t5YuZj+ItNzqA8EFXL3KU4=; b=uh/4XzzKE/5XsID7kTOyWIoP8u1qc25TdfJ1rK4qsszQRHy+DxrxsmDfwLOMErmjRq gSySLRp5OWRprSPjR2f/oO9pfbobBmSSksyxsbTSKinSzaBG+CA0kYFd+qQ1KXO5Sovk Ek6IG0MTF2MfrkwYfClkyJ1Ckeqn4dz+pdPY+6ZWGazEqXzO800gV4H/uvrGV3IDHzQL LdwTHpkvWqtrq+Jk/8lojU1fy0Rlo5LIFUuY+T6aOHK96/0ya++94GHZn1niyW5uW+WP LMHs5+ROzW4Ifd1D67DNFm1nIne2QutqYqAE8Jx0/er7pXwyWNrxyfDgdk2ZEa4d8g1l exyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1688320253; x=1690912253; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Z9c4FVrk3TOMJ6j16d6O+t5YuZj+ItNzqA8EFXL3KU4=; b=Sn1IzsQ7pUeikaGThuYGJOvuwfIA7ppfPks7X9556/GAdsf2X4i7pc5VcRnLEi94Vn 887+7PzQeZ7sBAy9EnLezkTNEasbmcC0HMX7hQ4x8SbtfVI+B15mjnrtTs02p5IooiXR S3br1+O9kVNYNNyysD1QWi/ai9bpCu+1OR18XFU7IoDM1xEE4iMqQvqBRC3mSAYFSXRn MWgm8D17AvsKlQXyCjtEz5zM/uNA62bchKfnWY7wPR7K8vW08lilR7xkI3OgERUY4HnC 0EX69fDxpHDlRTiWwbNr90cAtdlbqIAinLWGOBLJNIwvunxcdtUSqFPePN0zKC77wdkN 7xqg== X-Gm-Message-State: ABy/qLYxQ6TiretNLLMkH2nayUbfOpGUnLMCU5FbjBNpMGg2WZGivCVk msKVYXLUBKwuo57iYm9pMPiwqQ== X-Google-Smtp-Source: APBJJlEKHOsXd+51Th8sPvpetw4Vg+Hi18xf34lCm3nDuN/IKTHt3zqx6wMRvqWjRFR/i+EAMcowTA== X-Received: by 2002:a05:6512:33c9:b0:4fb:5dd5:715c with SMTP id d9-20020a05651233c900b004fb5dd5715cmr7025921lfg.4.1688320252843; Sun, 02 Jul 2023 10:50:52 -0700 (PDT) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id d1-20020ac24c81000000b004fb759964a9sm3354130lfl.168.2023.07.02.10.50.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 02 Jul 2023 10:50:52 -0700 (PDT) From: Dmitry Baryshkov To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andy Gross , Bjorn Andersson , Konrad Dybcio , Ilia Lin , Viresh Kumar , Nishanth Menon , Stephen Boyd , Michael Turquette , "Rafael J. Wysocki" , Georgi Djakov Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, Christian Marangi , Stephan Gerhold Subject: [RFC PATCH 8/8] ARM: dts: qcom: apq8064: add simple CPUFreq support Date: Sun, 2 Jul 2023 20:50:45 +0300 Message-Id: <20230702175045.122041-9-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> References: <20230702175045.122041-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Declare CPU frequency-scaling properties. Each CPU has its own clock, how all CPUs have the same OPP table. Voltage scaling is not (yet) enabled with this patch. It will be enabled later. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 147 +++++++++++++++++++++++ 1 file changed, 147 insertions(+) diff --git a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi index 48b3962dd4fb..995ea32f8d66 100644 --- a/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi +++ b/arch/arm/boot/dts/qcom/qcom-msm8960.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { #address-cells = <1>; @@ -29,6 +30,13 @@ cpu@0 { next-level-cache = <&L2>; qcom,acc = <&acc0>; qcom,saw = <&saw0>; + clocks = <&kraitcc KRAIT_CPU_0>; + clock-names = "cpu"; + clock-latency = <100000>; + vdd-core-supply = <&saw0_vreg>; + interconnects = <&L2 MASTER_KRAIT_L2 &L2 SLAVE_KRAIT_L2>; + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; cpu@1 { @@ -39,6 +47,13 @@ cpu@1 { next-level-cache = <&L2>; qcom,acc = <&acc1>; qcom,saw = <&saw1>; + clocks = <&kraitcc KRAIT_CPU_0>; + clock-names = "cpu"; + clock-latency = <100000>; + vdd-core-supply = <&saw1_vreg>; + interconnects = <&L2 MASTER_KRAIT_L2 &L2 SLAVE_KRAIT_L2>; + operating-points-v2 = <&cpu_opp_table>; + #cooling-cells = <2>; }; L2: l2-cache { @@ -169,6 +184,127 @@ opp-1350000000 { }; }; + cpu_opp_table: opp-table-cpu { + compatible = "operating-points-v2-krait-cpu"; + nvmem-cells = <&speedbin_efuse>; + + /* + * Voltage thresholds are + */ + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-peak-kBps = <384000>; + opp-microvolt-speed0-pvs0 = <950000 950000 950000>; + opp-microvolt-speed0-pvs1 = <925000 900000 950000>; + opp-microvolt-speed0-pvs3 = <875000 850000 900000>; + opp-supported-hw = <0x1>; + /* + * higher latency as it requires switching between + * clock sources + */ + clock-latency-ns = <244144>; + }; + + opp-486000000 { + opp-hz = /bits/ 64 <486000000>; + opp-peak-kBps = <702000>; + opp-microvolt-speed0-pvs0 = <975000 975000 975000>; + opp-microvolt-speed0-pvs1 = <950000 925000 975000>; + opp-microvolt-speed0-pvs3 = <900000 875000 925000>; + opp-supported-hw = <0x1>; + }; + + opp-594000000 { + opp-hz = /bits/ 64 <594000000>; + opp-peak-kBps = <702000>; + opp-microvolt-speed0-pvs0 = <1000000 1000000 1000000>; + opp-microvolt-speed0-pvs1 = <975000 950000 1000000>; + opp-microvolt-speed0-pvs3 = <925000 900000 950000>; + opp-supported-hw = <0x1>; + }; + + opp-702000000 { + opp-hz = /bits/ 64 <702000000>; + opp-peak-kBps = <702000>; + opp-microvolt-speed0-pvs0 = <1025000 1025000 1025000>; + opp-microvolt-speed0-pvs1 = <1000000 975000 1025000>; + opp-microvolt-speed0-pvs3 = <950000 925000 975000>; + opp-supported-hw = <0x1>; + }; + + opp-810000000 { + opp-hz = /bits/ 64 <810000000>; + opp-peak-kBps = <702000>; + opp-microvolt-speed0-pvs0 = <1075000 1075000 1075000>; + opp-microvolt-speed0-pvs1 = <1050000 1025000 1075000>; + opp-microvolt-speed0-pvs3 = <1000000 975000 1025000>; + opp-supported-hw = <0x1>; + }; + + opp-918000000 { + opp-hz = /bits/ 64 <918000000>; + opp-peak-kBps = <702000>; + opp-microvolt-speed0-pvs0 = <1100000 1100000 1100000>; + opp-microvolt-speed0-pvs1 = <1075000 1050000 1100000>; + opp-microvolt-speed0-pvs3 = <1025000 1000000 1050000>; + opp-supported-hw = <0x1>; + }; + + opp-1026000000 { + opp-hz = /bits/ 64 <1026000000>; + opp-peak-kBps = <702000>; + opp-microvolt-speed0-pvs0 = <1125000 1125000 1125000>; + opp-microvolt-speed0-pvs1 = <1100000 1075000 1125000>; + opp-microvolt-speed0-pvs3 = <1050000 1025000 1075000>; + opp-supported-hw = <0x1>; + }; + + opp-1134000000 { + opp-hz = /bits/ 64 <1134000000>; + opp-peak-kBps = <1350000>; + opp-microvolt-speed0-pvs0 = <1175000 1175000 1175000>; + opp-microvolt-speed0-pvs1 = <1150000 1125000 1175000>; + opp-microvolt-speed0-pvs3 = <1100000 1075000 1125000>; + opp-supported-hw = <0x1>; + }; + + opp-1242000000 { + opp-hz = /bits/ 64 <1242000000>; + opp-peak-kBps = <1350000>; + opp-microvolt-speed0-pvs0 = <1200000 1200000 1200000>; + opp-microvolt-speed0-pvs1 = <1175000 1150000 1200000>; + opp-microvolt-speed0-pvs3 = <1125000 1100000 1150000>; + opp-supported-hw = <0x1>; + }; + + opp-1350000000 { + opp-hz = /bits/ 64 <1350000000>; + opp-peak-kBps = <1350000>; + opp-microvolt-speed0-pvs0 = <1225000 1225000 1225000>; + opp-microvolt-speed0-pvs1 = <1200000 1175000 1225000>; + opp-microvolt-speed0-pvs3 = <1150000 1125000 1175000>; + opp-supported-hw = <0x1>; + }; + + opp-1458000000 { + opp-hz = /bits/ 64 <1458000000>; + opp-peak-kBps = <1350000>; + opp-microvolt-speed0-pvs0 = <1237500 1237500 1237500>; + opp-microvolt-speed0-pvs1 = <1212500 1187500 1237500>; + opp-microvolt-speed0-pvs3 = <1162500 1137500 1187500>; + opp-supported-hw = <0x1>; + }; + + opp-1512000000 { + opp-hz = /bits/ 64 <1512000000>; + opp-peak-kBps = <1350000>; + opp-microvolt-speed0-pvs0 = <1250000 1250000 1250000>; + opp-microvolt-speed0-pvs1 = <1225000 1200000 1250000>; + opp-microvolt-speed0-pvs3 = <1175000 1150000 1200000>; + opp-supported-hw = <0x1>; + }; + }; + memory { device_type = "memory"; reg = <0x0 0x0>; @@ -266,6 +402,17 @@ msmgpio: pinctrl@800000 { reg = <0x800000 0x4000>; }; + qfprom: qfprom@700000 { + compatible = "qcom,msm8960-qfprom", "qcom,qfprom"; + reg = <0x00700000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + speedbin_efuse: speedbin@c0 { + reg = <0x0c0 0x4>; + }; + }; + gcc: clock-controller@900000 { compatible = "qcom,gcc-msm8960"; #clock-cells = <1>;