From patchwork Tue Jun 25 00:28:29 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 167668 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp4853445ilk; Mon, 24 Jun 2019 17:28:41 -0700 (PDT) X-Google-Smtp-Source: APXvYqzMg43kXXmo4cRzBCiq9novT2EzLdWtLrQ07CNgiUxckfQ5IHIEWX+x1D5g960OpGyX5faz X-Received: by 2002:a63:4c0b:: with SMTP id z11mr19271280pga.440.1561422521637; Mon, 24 Jun 2019 17:28:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561422521; cv=none; d=google.com; s=arc-20160816; b=Vt5lTKQJIbiQ2gengUtu4rwRYOSAqe+Mvrn2z1nj1Xi4HKfe1ZtcCJM8uOfOTY7yYM /CUyfw9yJJ7aEjs2ZjJGGQTO32AJUMI631VBolBJt5ZjM4RqJ9yfDmfQVuVlG2SUea+H wb/xXVsoSwFvttK7Z14814AK/wzzgsHe3JCwFTCYKv9WVUaPhHoCS8ez3W+wbwKKPWEa njN2p9VqpvhT7V1cJ98mdI8PHOqObZUyFuOR+6Ij3E7+xDGc4H0Xa3nBCU4a2u8SOxI1 TOekLbjuL39IENnmuM5BM9Gg000DVT5c69THZeBjMh+0LmpnW2Cy51Ukk6R5k0keIJg1 Cscg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=i/7iir/mkSW+hVIvjStjlkwQiRLeXHaD1y3RSyAgAvY=; b=GftBSEyCpRZsuNpO/MHFf2p/rrCuEhTaMkYu7gYI5bRM7gsMRXf5cyqRuzD8L1Mu9S n3pMqsUnKgZxcVA+1Vn3sJ2oAOZdsI62Jj8LACsGT/WW3u1GqSWNKPshCiGXcARjbw4V zvkVnbS708avLAUTyxpLNYTXXZDbNWTgoZ/H1l9HUGhj1nMjxIn23FUtEfxikv9chx+m ZaGpKf6zHHE3yXnPSyuH/aRI8WX1NGJsfaN9mR4NtNMT2xohfRLrfEHkdXxwyJ6wVvDO eDUMnbS5XMdCfkwujRc/Sd3ZoPp4MOmPfkQikM4n1Z8WHW6jEzf2Lgwego++iSPoVMXi T/0Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h5si2314573pgq.420.2019.06.24.17.28.40; Mon, 24 Jun 2019 17:28:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727174AbfFYA2k (ORCPT + 8 others); Mon, 24 Jun 2019 20:28:40 -0400 Received: from mx2.suse.de ([195.135.220.15]:50534 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726395AbfFYA2k (ORCPT ); Mon, 24 Jun 2019 20:28:40 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 45525ADD5; Tue, 25 Jun 2019 00:28:38 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-csky@vger.kernel.org Cc: linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , Guo Ren , devicetree@vger.kernel.org Subject: [PATCH] csky: dts: Add NationalChip GX6605S Date: Tue, 25 Jun 2019 02:28:29 +0200 Message-Id: <20190625002829.17409-1-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Device Trees for NationalChip GX6605S SoC (based on CK610 CPU) and its dev board. GxLoader expects as filename gx6605s.dtb, so keep that. The bootargs are prepared to boot from USB and to output to serial. Compatibles for the SoC and board are left out for now. Signed-off-by: Andreas Färber --- arch/csky/boot/dts/gx6605s.dts | 104 ++++++++++++++++++++++++++++++++++++++++ arch/csky/boot/dts/gx6605s.dtsi | 82 +++++++++++++++++++++++++++++++ 2 files changed, 186 insertions(+) create mode 100644 arch/csky/boot/dts/gx6605s.dts create mode 100644 arch/csky/boot/dts/gx6605s.dtsi -- 2.16.4 diff --git a/arch/csky/boot/dts/gx6605s.dts b/arch/csky/boot/dts/gx6605s.dts new file mode 100644 index 000000000000..f7511024ec6f --- /dev/null +++ b/arch/csky/boot/dts/gx6605s.dts @@ -0,0 +1,104 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */ +/* + * GX6605S dev board + * + * Copyright (c) 2019 Andreas Färber + */ + +/dts-v1/; + +#include + +#include "gx6605s.dtsi" + +/ { + model = "Nationalchip GX6605S"; + + aliases { + serial0 = &uart; + }; + + chosen { + bootargs = "console=ttyS0,115200n8 root=/dev/sda2 rw rootwait"; + stdout-path = "serial0:115200n8"; + }; + + memory@10000000 { + device_type = "memory"; + reg = <0x10000000 0x04000000>; + }; + + dummy_apb_clk: dummy-apb-clk { + compatible = "fixed-clock"; + clock-frequency = <24000000>; /* guesstimate */ + #clock-cells = <0>; + }; + + buttons { + compatible = "gpio-keys-polled"; + poll-interval = <100>; + autorepeat; + + button5 { + label = "button5"; + linux,code = <103>; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + + button6 { + label = "button6"; + linux,code = <106>; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + + button7 { + label = "button7"; + linux,code = <28>; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + }; + + button8 { + label = "button8"; + linux,code = <105>; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + + button9 { + label = "button9"; + linux,code = <108>; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led0 { + label = "led10"; + gpios = <&gpio 10 GPIO_ACTIVE_LOW>; + linux,default-trigger = "heartbeat"; + }; + + led1 { + label = "led11"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + linux,default-trigger = "timer"; + }; + + led2 { + label = "led12"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + + led3 { + label = "led13"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "default-on"; + }; + }; +}; + +&timer0 { + clocks = <&dummy_apb_clk>; +}; diff --git a/arch/csky/boot/dts/gx6605s.dtsi b/arch/csky/boot/dts/gx6605s.dtsi new file mode 100644 index 000000000000..956af5674add --- /dev/null +++ b/arch/csky/boot/dts/gx6605s.dtsi @@ -0,0 +1,82 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause */ +/* + * NationalChip GX6605S SoC + * + * Copyright (c) 2019 Andreas Färber + */ + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "csky,ck610"; + reg = <0>; + }; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + timer0: timer@20a000 { + compatible = "csky,gx6605s-timer"; + reg = <0x0020a000 0x400>; + clocks = <&dummy_apb_clk>; + interrupts = <10>; + }; + + gpio: gpio@305000 { + compatible = "wd,mbl-gpio"; + reg-names = "dirout", "dat", "set", "clr"; + reg = <0x00305000 0x4>, + <0x00305004 0x4>, + <0x00305008 0x4>, + <0x0030500c 0x4>; + gpio-controller; + #gpio-cells = <2>; + }; + + uart: serial@403000 { + compatible = "ns16550a"; + reg = <0x00403000 0x400>; + interrupts = <15>; + clock-frequency = <29491200>; + reg-shift = <2>; + reg-io-width = <1>; + }; + + intc: interrupt-controller@500000 { + compatible = "csky,gx6605s-intc"; + reg = <0x00500000 0x400>; + interrupt-controller; + #interrupt-cells = <1>; + }; + + ehci_hcd: usb@900000 { + compatible = "generic-ehci"; + reg = <0x00900000 0x400>; + interrupts = <59>; + }; + + ohci_hcd0: usb@a00000 { + compatible = "generic-ohci"; + reg = <0x00a00000 0x400>; + interrupts = <58>; + }; + + ohci_hcd1: usb@b00000 { + compatible = "generic-ohci"; + reg = <0x00b00000 0x400>; + interrupts = <57>; + }; + }; +};