From patchwork Tue Jun 25 10:53:46 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 167699 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5391608ilk; Tue, 25 Jun 2019 03:53:52 -0700 (PDT) X-Google-Smtp-Source: APXvYqwk806w6xfL2ZeyBht5Nsu45pqvKLEtkO5/qEwyKh1zVyWL+umBcPLUDEM+uOt0I9F1CtER X-Received: by 2002:a63:fb11:: with SMTP id o17mr794414pgh.284.1561460032269; Tue, 25 Jun 2019 03:53:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561460032; cv=none; d=google.com; s=arc-20160816; b=atv40I3w9TNYDpq+xtM3Tf4BCwzUQbqKsL+ULrtBddqt7c2iF20SfgsjaP+NOSIVy7 /Dd97gzs0YtnLz1hASRgam+bpDfSPTdUxy3XzHcXSPFO5kGXLoNB6MbqcvXggIbCQ6L/ aHZ/8vH33ewBKG30siXeF0s73PvShK/6KQ/7no/+NNCyKTaFumB7EiFzUOr5W+jM3CrH lWsZW4Dc+tQa46t5QcLp2QpWIKA3KO8DxLhEErSq+U31ICjESRHB1CAKMDuPzPbylobg PcxDNrctE86WLElCsDuTqXwLyWzVphl3yLjI/2U7yoy3S1Cq382bUEiJiEEZPpYrBtXD LJmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=M0f0W7WStv6RQJrFpojftu42py7SwzycQLlXcXJvd8c=; b=Il9d5iU/rMJgCEuuMdpjVAh/NC6j0OEwEZn9CSFuYDMutUeombpPagkQcqndXTbWA2 iRQqbkCo43W++To9Mkt1wPdHOe71nVNH+kxT2t6xa8GSf5ich1aenU1siqvIBfKvQePt qfQT4zIIrp4R4TGF4avQWxbe31ZcYRHZJcekqLPGMBATyIvHYHnv7zzSuy2G2D06mzfz NNJ5Chc/V5gcIWs+Or/1rv6VYF0J8pCmeFCzz/WuU8T/AF+J41F7HKjTLR51/JV/pZHq pF9DbmBEaPMQ+9rRucpKBDGJGJre5qGoy/ziISnPyf0JFRHmYQepuLFBqFcc1C2Z5gwD HShA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sXNZIHgh; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p13si89247plo.33.2019.06.25.03.53.52; Tue, 25 Jun 2019 03:53:52 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=sXNZIHgh; spf=pass (google.com: best guess record for domain of linux-gpio-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729879AbfFYKxv (ORCPT + 5 others); Tue, 25 Jun 2019 06:53:51 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:45367 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728078AbfFYKxv (ORCPT ); Tue, 25 Jun 2019 06:53:51 -0400 Received: by mail-lj1-f195.google.com with SMTP id m23so15731266lje.12 for ; Tue, 25 Jun 2019 03:53:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=M0f0W7WStv6RQJrFpojftu42py7SwzycQLlXcXJvd8c=; b=sXNZIHghQR3Qy/KlxcpuhirLamlyJZboiC/HAYATBR3OlOR4ssHFttBatwHyj/qc8l tWl/UK75PnCP7Sus6XuTUxnUyBSC/KxG5v0/ebBUDIrFWJ6ETwmmz5YK2BX7Aiwz1LjZ ECz49Y395qYTDYSIujkHqYBOKT6li0u3nLmWBojgAk9OtUz2SMI4V8JcmgmgMRCB1bv2 qHDf0I25icSciWBXXGNda8yKVvOZDJBasluUrlofwzli8B/x+uUbjAKhWWBOep2fq6qo nEz1URgWg2BJGAEJtWdgPC1pThimIuIubi6TTAF9XGCUzspdA+YIq/lq2YLadwVrpUqY cSzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=M0f0W7WStv6RQJrFpojftu42py7SwzycQLlXcXJvd8c=; b=uRwJrwhIeJyHAtXlL38xm/tV/zOyIW4TqsGDoC2cW+lbbgcBnQ3X/lyr28hYjuFZze eiScxM0hcgyH9Tt9IpYAs0cXY2AwW/W8YmNesGhnwDDA7xr0bZj8w5e10N0h8UE0uUz8 /c7GS7QqnF4JfvvMR2eXapA58QG9Wi4hpEpvF95CeUYB5+B+nM5st7ERwKIagZHrLdyO 2e0jWrAU9lE7QCbmdytAoi9b1w6PkpxrvpuRRP90R7XnT+SA/WtnV4Y0tBPm4VyPJjeA 8QX5hfZ6urek29R1AmI13c0lGN5YhFgNGaA9XqXzlRsYP1cc8DSuscWls+NgsRTJGhEW +wtg== X-Gm-Message-State: APjAAAWBCMWocE8lC2nDDJSf9KUqicMVK9/X1iLCltfG6yuyNxvDcJa1 hNsVod7+w+nN2FO559ypwoVgr27PjTQ= X-Received: by 2002:a2e:8741:: with SMTP id q1mr56072912ljj.144.1561460029243; Tue, 25 Jun 2019 03:53:49 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id m4sm2197925ljc.56.2019.06.25.03.53.48 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Tue, 25 Jun 2019 03:53:48 -0700 (PDT) From: Linus Walleij To: linux-gpio@vger.kernel.org Cc: Bartosz Golaszewski , Linus Walleij , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Thierry Reding Subject: [PATCH] gpio: siox: Pass irqchip when adding gpiochip Date: Tue, 25 Jun 2019 12:53:46 +0200 Message-Id: <20190625105346.3267-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org We need to convert all old gpio irqchips to pass the irqchip setup along when adding the gpio_chip. For chained irqchips this is a pretty straight-forward conversion. The siox GPIO driver passes a IRQ_TYPE_EDGE_RISING as default IRQ trigger type which seems wrong, as consumers should explicitly set this up, so set IRQ_TYPE_NONE instead. Also gpiochip_remove() was called on the errorpath if gpiochip_add() failed: this is wrong, if the chip failed to add it is not there so it should not be removed. Cc: Uwe Kleine-König Cc: Thierry Reding Signed-off-by: Linus Walleij --- drivers/gpio/gpio-siox.c | 17 +++++++---------- 1 file changed, 7 insertions(+), 10 deletions(-) -- 2.20.1 diff --git a/drivers/gpio/gpio-siox.c b/drivers/gpio/gpio-siox.c index fb4e318ab028..e5c85dc932e8 100644 --- a/drivers/gpio/gpio-siox.c +++ b/drivers/gpio/gpio-siox.c @@ -211,6 +211,7 @@ static int gpio_siox_get_direction(struct gpio_chip *chip, unsigned int offset) static int gpio_siox_probe(struct siox_device *sdevice) { struct gpio_siox_ddata *ddata; + struct gpio_irq_chip *girq; int ret; ddata = devm_kzalloc(&sdevice->dev, sizeof(*ddata), GFP_KERNEL); @@ -239,20 +240,16 @@ static int gpio_siox_probe(struct siox_device *sdevice) ddata->ichip.irq_unmask = gpio_siox_irq_unmask; ddata->ichip.irq_set_type = gpio_siox_irq_set_type; + girq = &ddata->gchip.irq; + girq->chip = &ddata->ichip; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; + ret = gpiochip_add(&ddata->gchip); if (ret) { dev_err(&sdevice->dev, "Failed to register gpio chip (%d)\n", ret); - goto err_gpiochip; - } - - ret = gpiochip_irqchip_add(&ddata->gchip, &ddata->ichip, - 0, handle_level_irq, IRQ_TYPE_EDGE_RISING); - if (ret) { - dev_err(&sdevice->dev, - "Failed to register irq chip (%d)\n", ret); -err_gpiochip: - gpiochip_remove(&ddata->gchip); + return ret; } return ret;