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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:43 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 04/14] dt-bindings: mailbox: qcom: Add clock-name optional property Date: Tue, 25 Jun 2019 18:47:23 +0200 Message-Id: <20190625164733.11091-5-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When the APCS clock is registered (platform dependent), it retrieves its parent names from hardcoded values in the driver. The following commit allows the DT node to provide such clock names to the platform data based clock driver therefore avoiding having to explicitly embed those names in the clock driver source code. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Rob Herring --- .../mailbox/qcom,apcs-kpss-global.txt | 24 ++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) -- 2.21.0 Reviewed-by: Bjorn Andersson diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt index 1232fc9fc709..b69310322b09 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt @@ -18,10 +18,11 @@ platforms. Usage: required Value type: Definition: must specify the base address and size of the global block + - clocks: - Usage: required if #clocks-cells property is present - Value type: - Definition: phandle to the input PLL, which feeds the APCS mux/divider + Usage: required if #clock-names property is present + Value type: + Definition: phandles to the two parent clocks of the clock driver. - #mbox-cells: Usage: required @@ -33,6 +34,12 @@ platforms. Value type: Definition: as described in clock.txt, must be 0 +- clock-names: + Usage: required if the platform data based clock driver needs to + retrieve the parent clock names from device tree. + This will requires two mandatory clocks to be defined. + Value type: + Definition: must be "aux" and "pll" = EXAMPLE The following example describes the APCS HMSS found in MSM8996 and part of the @@ -65,3 +72,14 @@ Below is another example of the APCS binding on MSM8916 platforms: clocks = <&a53pll>; #clock-cells = <0>; }; + +Below is another example of the APCS binding on QCS404 platforms: + + apcs_glb: mailbox@b011000 { + compatible = "qcom,qcs404-apcs-apps-global", "syscon"; + reg = <0x0b011000 0x1000>; + #mbox-cells = <1>; + clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>; + clock-names = "aux", "pll"; + #clock-cells = <0>; + }; From patchwork Tue Jun 25 16:47:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 167738 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5779416ilk; Tue, 25 Jun 2019 09:47:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqwwJXlC0X1igDnyqM08bszrhXDvy0sZxZKDxvC3ytQ7DzNaTru0fCx5aVYCo013+ObOB0f+ X-Received: by 2002:a63:de50:: with SMTP id y16mr23477978pgi.431.1561481271752; Tue, 25 Jun 2019 09:47:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561481271; cv=none; d=google.com; s=arc-20160816; b=G9xeH+MVudyHbJUqdiMR5fS50KK0Yq1Pxq7UWI1EmXCMiNsDXxiQV7GdOdfamaB/gf ZKk1peIVX/nBTRIB+cbDZqJlfu4Vw0LGHueIvi0mckQDIgym/2g2Kry5w9FYdDyLmU9w qExQxlcbCu6D0E2115GWQNpPH+ZPQgx1ko/7FA+NKuFGr1Yj+znnxgwafzgO5hahbhbE jYA0LlnrmZoc0KggER21tP2D6vXrnrBSTNQFnwDwHBTXKZaoQGBHYRPXFD5OEEZLhOwi DPBKBzxyaCOE6ys8LkCCs08K8aRCRiOaGVdOXY74tcBpRQZ6hL8WY40gpLdfIlWIUqXq moMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7eEjWytHo14d2wy5W+tNOY0jTfYkPmqHS9SlIMebT7c=; b=e9ZZzfSzhbnBl3hg8OCSTQufzGpmrjJ3nPo4WHX1dZJCtbmB9iGBDM41u624BX3vd+ ZNp99RLA26BL6RdTP/0bGjS/zpqARKvgLVLZhltDWTBqj6gMF8bwlHC1znIyavyJbtJG 9JfwHZ/CWKN5EXelm957xS9bnpWB50mIgopYtTEWiTubRYnri2Xu9oXKYS+LeajW0J5t N0Nk+B6ulSfhcN3TwtOGV6N1pgv12qigkSXLyY/oavxLf/OCHT6RMQQhMHzvQLVo2dm8 VwpUqmARI7q7MNg79pQZB37NIoRoxuKDsFVWYTBwrAX7RC3jFlBDVBbjJfYgYeDw/hcd nx7w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IxyUGn+U; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:47 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 06/14] clk: qcom: hfpll: get parent clock names from DT Date: Tue, 25 Jun 2019 18:47:25 +0200 Message-Id: <20190625164733.11091-7-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Allow accessing the parent clock name required for the driver operation using the device tree node. This permits extending the driver to other platforms without having to modify its source code. For backwards compatibility leave the previous value as default. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- drivers/clk/qcom/hfpll.c | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.21.0 Reviewed-by: Bjorn Andersson diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index a6de7101430c..87b7f46d27e0 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -52,6 +52,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev) void __iomem *base; struct regmap *regmap; struct clk_hfpll *h; + struct clk *pclk; struct clk_init_data init = { .parent_names = (const char *[]){ "xo" }, .num_parents = 1, @@ -75,6 +76,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev) 0, &init.name)) return -ENODEV; + /* get parent clock from device tree (optional) */ + pclk = devm_clk_get(dev, "xo"); + if (!IS_ERR(pclk)) + init.parent_names = (const char *[]){ __clk_get_name(pclk) }; + else if (PTR_ERR(pclk) == -EPROBE_DEFER) + return -EPROBE_DEFER; + h->d = &hdata; h->clkr.hw.init = &init; spin_lock_init(&h->lock); From patchwork Tue Jun 25 16:47:26 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 167739 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5779433ilk; Tue, 25 Jun 2019 09:47:53 -0700 (PDT) X-Google-Smtp-Source: APXvYqy2d8Hi7Yj0aHv2y8ClS2Xtkq2rKxI5u2wfibCaApVjtTYVEzh/TDpir1/Xd+1C5ktb0CK+ X-Received: by 2002:a63:c60b:: with SMTP id w11mr18833940pgg.356.1561481273571; Tue, 25 Jun 2019 09:47:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561481273; cv=none; d=google.com; s=arc-20160816; b=fgTZUjpsrmEui+3u4/luCZ+72oufBmjwLqQgH5Ekm4kfFsbVhg6nTqICG+8XexJR2Q xoLqfP44dB3ny1QzAPIFpmu2KZXz0+SDBPzNZbmGqi6E1Y/gOZRrbq5zNLOhVjRpRiCi dV7xQSP5OgAEhucBoHgTICv8YkmcJOcShtPXWyBRou4TD5MNvba0bqAHECqDY51mhRU1 1xgASJO9QdgZpwQTGE+2a89Voyob5PyNAxyGE0RI60xm/b9rOy5NoTj7WRi1VlNMGKRt ag05trdrN7X718RCLPFecw4Zq8DpQGOQ33AXrORO5F5nOwX0DFq0ohMSSoe5iThms/L5 umBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Hb0DqlkBsrvPKyzItQugKJEv/KIpj1AeWcG12Ck6UPE=; b=P4efsFhil2AeDd1ME7ghkNMK2ySflozAyX3806D8h/WxMdE7WJ8UQSv4DnEC3z4Coq FigrllHuT31unmDplARrzM/GxviPzICZULdbHScjP8hMRGbqic98/KSWXesXDJ2Cajl3 p73Knu0omJQ/TPTThVThcyltNU28E8BVychbEmZ1BFBi/0w6R9o9SzysbIJE1TUTWon9 BjxejZMZ0x+2dxOCpO1b48sTANFXsaPmt6Wfwz2tLXmEdhwpCcKSMqyiSuqyBLAQDxL2 TkIlo6KrbGvGPF+1vR5jtfUEVcHy/HADRCOftuChCInE5vkJxt001WNmrkynDyYfRpbd KdXg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iVQI7uw+; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:49 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 07/14] clk: qcom: hfpll: register as clock provider Date: Tue, 25 Jun 2019 18:47:26 +0200 Message-Id: <20190625164733.11091-8-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Make the output of the high frequency pll a clock provider. On the QCS404 this PLL controls cpu frequency scaling. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Acked-by: Stephen Boyd --- drivers/clk/qcom/hfpll.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index 87b7f46d27e0..0ffed0d41c50 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -53,6 +53,7 @@ static int qcom_hfpll_probe(struct platform_device *pdev) struct regmap *regmap; struct clk_hfpll *h; struct clk *pclk; + int ret; struct clk_init_data init = { .parent_names = (const char *[]){ "xo" }, .num_parents = 1, @@ -87,7 +88,14 @@ static int qcom_hfpll_probe(struct platform_device *pdev) h->clkr.hw.init = &init; spin_lock_init(&h->lock); - return devm_clk_register_regmap(&pdev->dev, &h->clkr); + ret = devm_clk_register_regmap(dev, &h->clkr); + if (ret) { + dev_err(dev, "failed to register regmap clock: %d\n", ret); + return ret; + } + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, + &h->clkr.hw); } static struct platform_driver qcom_hfpll_driver = { From patchwork Tue Jun 25 16:47:27 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 167746 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5780099ilk; Tue, 25 Jun 2019 09:48:31 -0700 (PDT) X-Google-Smtp-Source: APXvYqx4nHugmhF5Apq0wqh4ftNXOuOCbWttenE/ofIPj/b+2jwjSiZiwLFbkKPeCq4ONmpM7BSL X-Received: by 2002:a63:ec13:: with SMTP id j19mr19875553pgh.174.1561481311666; Tue, 25 Jun 2019 09:48:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561481311; cv=none; d=google.com; s=arc-20160816; b=tMJosP5/JaQ5uWBZfX1jQ6itXzrm5vq5gfKG6QGOXl5SD2BSxKqD2xeCCdjsUU3oJa 4zWlvKFDaAsUmCyPxJRVAIw7liqLvoiBjiTX5ZN8WUJ4I/4MM+GGfGIYnvRUCLR1Ut61 pgm2NyN17K/GjYruhflHEDkzqbZ8NfHWx6IwPkL5LLSghl4NRRlwNZshU5DVwwElsjzG zlJ9Q259ppAqzk0tZ9RqriKXrfy6Uq2kIIrx73rU7WvOSjTbLf8ilz7oKHfBmerStIo/ TF7ASFXhl8NL0WV30g9DKicZ0PneTSZWEOQ7JIhlfE0flwhu06v9z6vwX6QPkqdu/bg9 qlzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Vx/+X3vW6hJ0UUO6xl7D37Dkvgf50ba92tNd21qhLhY=; b=nfDRkMyt+eJNVse//PajqRhsqpcY/qxrlPer8MxP+aPdljcM4rwySOz6yctvL8o1mc 94yANakn7aC2EbdwfPGJBingoNJmVVjMyfwyZIQDWEQlw7CB7mzJ3+n8CIG0riiJRZxr 6IjDlq2JhO+RTrjT+gg8ah9Ss9myBAjhs/xCMbRZ+hwbcynImr5KWlYvD3suQQ9nzzvu BeCHvX692NeJdtrHIUWb3s9kEfjgvFrEWnOieYCvMemVGz7zhssKu1MyPoV20KZ+PlFo qbb3OQx//cDdb/BT1X6eriSSamQLBIjcY8PDB+NMUxZ2bATFWv3MUP6B2meWHtNrkIR+ paAA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KZCNsdmN; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:50 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 08/14] clk: qcom: hfpll: CLK_IGNORE_UNUSED Date: Tue, 25 Jun 2019 18:47:27 +0200 Message-Id: <20190625164733.11091-9-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When COMMON_CLK_DISABLED_UNUSED is set, in an effort to save power and to keep the software model of the clock in line with reality, the framework transverses the clock tree and disables those clocks that were enabled by the firmware but have not been enabled by any device driver. If CPUFREQ is enabled, early during the system boot, it might attempt to change the CPU frequency ("set_rate"). If the HFPLL is selected as a provider, it will then change the rate for this clock. As boot continues, clk_disable_unused_subtree will run. Since it wont find a valid counter (enable_count) for a clock that is actually enabled it will attempt to disable it which will cause the CPU to stop. Notice that in this driver, calls to check whether the clock is enabled are routed via the is_enabled callback which queries the hardware. The following commit, rather than marking the clock critical and forcing the clock to be always enabled, addresses the above scenario making sure the clock is not disabled but it continues to rely on the firmware to enable the clock. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- drivers/clk/qcom/hfpll.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.21.0 Reviewed-by: Bjorn Andersson diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c index 0ffed0d41c50..d5fd27938e7b 100644 --- a/drivers/clk/qcom/hfpll.c +++ b/drivers/clk/qcom/hfpll.c @@ -58,6 +58,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev) .parent_names = (const char *[]){ "xo" }, .num_parents = 1, .ops = &clk_ops_hfpll, + /* + * rather than marking the clock critical and forcing the clock + * to be always enabled, we make sure that the clock is not + * disabled: the firmware remains responsible of enabling this + * clock (for more info check the commit log) + */ + .flags = CLK_IGNORE_UNUSED, }; h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); From patchwork Tue Jun 25 16:47:31 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 167743 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5779592ilk; Tue, 25 Jun 2019 09:48:01 -0700 (PDT) X-Google-Smtp-Source: APXvYqwyfPiHv5nWoXnY9bCzDSjQtIw6rRuRB9Q8lXbT513TaduhVNruYAZGuRuy/Uj6CvXVjM+6 X-Received: by 2002:a63:2355:: with SMTP id u21mr38882106pgm.205.1561481281411; Tue, 25 Jun 2019 09:48:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561481281; cv=none; d=google.com; s=arc-20160816; b=z+1onUDn35dEWoDPwmfOFpsXDb0R1+LURc36HNVlyh3P+UMOJoh5Rth4tldVkgNGlI mBeQ8kPPppa8hAbH/kGTOH+HsHg/g4wEsaoRNeJqShUXdQxy8247fBipI3PSkExK1Pfr 3HtJLVrIZWm3Wf4g0NF2B2gsdAGW1Td74gPZwXRd3P8IKs1/QHr3yLZKDDYY+MbPren9 CA7nXvPzF4Nb23nsUIPkGZe2WYPiecQV/y8lcK1LO9bt9dnnpAcQqaitHHdPlJKTqZGs JO4RZOfA17RJp9JOqjq6Rzr89wH5AobSlUOMpWdt6XIXe/7wmR0l8bpshjTrBYdHQ8xG I7GQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YWv+ENYtDt9ayygv5AeNhTcINipts+nB0V2FRLcgbPQ=; b=AxH+RU+tauOuzRL1p704W4tXQutxwRQUzZP7VCsD/zUTGjGbdGuFPtfMzG0iGH/iVN MGluh5cTN76Tk519Q5BcXzC0DvLpH/rSCbJm91TrVpMH9aAIO6X8x+h8/Yp9AA++T0AO JQaMgc3LSDvyxRsisechcgCW9blSaiP+H2Nu4n3HYIHB46FvOYSYBbP+dYr1zRfNP9my IMDsC3UPGEAFmUm3dUHlDZqvY4m9mexn4kLx2RzQk4ay/aqf0+zIEI8CZP2iEcjdDKYO POU+2Y12q5h0km/slakZ+PYkVpnHdcOgIKa9aSgpKJQIW4bSQTkVWVD0a8xjIMCv7U8U 4qQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Dxdi6ZD3; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.56 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:57 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 12/14] arm64: dts: qcom: qcs404: Add the clocks for APCS mux/divider Date: Tue, 25 Jun 2019 18:47:31 +0200 Message-Id: <20190625164733.11091-13-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Specify the clocks that feed the APCS mux/divider instead of using default hardcoded values in the source code. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.21.0 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 94471aa31979..9569686dbc41 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -850,6 +850,9 @@ compatible = "qcom,qcs404-apcs-apps-global", "syscon"; reg = <0x0b011000 0x1000>; #mbox-cells = <1>; + clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>; + clock-names = "aux", "pll"; + #clock-cells = <0>; }; apcs_hfpll: clock-controller@b016000 { From patchwork Tue Jun 25 16:47:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 167744 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5779669ilk; Tue, 25 Jun 2019 09:48:04 -0700 (PDT) X-Google-Smtp-Source: APXvYqwAilskj2H3M1x1w4b5sf1zG9V8Bh43aBtwTw8E01ENM/IY/8DePbzybpHIHyek5RlQiRio X-Received: by 2002:a63:8dc2:: with SMTP id z185mr28045547pgd.287.1561481284621; Tue, 25 Jun 2019 09:48:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561481284; cv=none; d=google.com; s=arc-20160816; b=p/h2qEIOY3H6d/PbuSHmMP9pNRMZq7YU7pUJ5ctgPE8ZKuBMyyw2fFGmR3mtuf/mQN COquge0HAuxZORi3L/+DMBlPhS9u+Sc3jWGOcDG+BKUkpTczfFuSzMyU5Zvunr6h50Q7 bjVpm/cUpM2MyZdVlE+/7d/KUAKgOsdAQI8IcC3f0AX51JU098sLQhK68ECXw5fHGdNA ZjXp1cn/SbHAhwDn8iRp/0v5c1zxKd/yr1PwtZYP2t4kK8rmaKg+d6FJEqXuJBIpsmKb FX6yqvXot8q8QFzllWibuRcxIC1aroHOWBGhYgvI1U7Rwub5EnfXMo2SusNwc2PAnsIr jnZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=cM212LJlReM22Z/bSs47ZKND7c0iwlH/sYLmqGtvNPI=; b=Qw4fmXbaI0ocAW38uTvojXkN5dkQMFehR3hqB7eRqCVSporjUQJiZOSBnMtgxMQXoG 5N6KzrPye9NqrDjXvX18j876x7BisBYpPDBW3QpZIC0QyaB8IITtXIZXr8jzsBGHm6t6 vLDsGfoXjFcM3s0powSIRHrKNr4/TFxvkDhdQXemjMtGFTveuz2HMWgPk6RzyxXfY1hb kvDhyTtaCSQo/sXWu9TfMoykeYtvSF4FjEhqvX/8IQm4j9rGytkBuqElvQnKwkvoDltv 4X8tQkYwO4+H1wdUGeh/UW5dZxl8XlZUT8Yyb8LkNXSnxbTilhm1ZLKV5OotGaHY+Eb2 VAUQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=y1JwsIjl; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:59 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 13/14] arm64: dts: qcom: qcs404: Add DVFS support Date: Tue, 25 Jun 2019 18:47:32 +0200 Message-Id: <20190625164733.11091-14-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Support dynamic voltage and frequency scaling on qcs404. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.21.0 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 9569686dbc41..4b4ce0b5df76 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -34,6 +34,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; CPU1: cpu@101 { @@ -43,6 +46,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; CPU2: cpu@102 { @@ -52,6 +58,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; CPU3: cpu@103 { @@ -61,6 +70,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; L2_0: l2-cache { From patchwork Tue Jun 25 16:47:33 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 167745 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp5779676ilk; Tue, 25 Jun 2019 09:48:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqybJqAkH441w/WkCvs9kL2SZKEFCLHTYaEdqzOLIHLvDRLFKN0n/aDh1U+/aJmIUkumxwNr X-Received: by 2002:a17:902:9896:: with SMTP id s22mr25546976plp.4.1561481284986; Tue, 25 Jun 2019 09:48:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1561481284; cv=none; d=google.com; s=arc-20160816; b=QjDLqSZFLkj6y2+oy5uRG0lXLjXJpOVhXzC6/D7Uh0tqiQ3+Qhq8cw5IZ+YGaO102K YHigMHchc/j+V/q3TrB9ngwNjTzb31D/B7YCspYqRmYwp+mePtZ3riT7TVt7Tqx3ahB9 pqRxmzDaiV+0jVw2KoXyb4xvHoKNI5KjeSwJrmps1WbJroxlwKtCLWUQp4GA+em64KEj e0Q7bu2mVeGxe+eP0BOwNgA0SBcQVM87cPiZsb2lsTlYE392u4IlCNwpo0z6J2JTxWeX W7S5jpe38xcLZYomJ6ZIJ+qVbY3BvVwzPsXSxJ753wDaENbMQ3q4Zm11+QcgJTX+BNtm Nqxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=pcbl8ChfwpCVGld5/sK0LNsZGkcTLX971dUfy4ZOQ3A=; b=cQdXDFeTH8SXLAhIZcbWXnptfWKoszwL1LzLpvC9ex0cyvaALgiNLVi1IhBQ3sjNdW 2L26VX+dz0fc7NKG8fhgPgLaeghWnnDEVqRzEnQuqeT3bBSYxtys0QIICjMeN/F1lX4+ P46e2iO06lsp5myJsuXlgnDLT2awHwFCN/oyXmMla96X7/lqZ7UZaPGZy3+/zM3NQ0CO swubVsKTY2b6JMhlXgwNG362CIkGlBuSjHh3FVmhuLioHG0KG2M7C0jTLf+8EpAjdzwZ YI6by8gC5YFwWi7fM3Pq7v8+tOryDJ6HKkhXoYQvWtWkOkFjnrJRoXyuJNgcT07aW+UL YveQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MhhfRXFC; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:48:00 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 14/14] arm64: defconfig: Enable HFPLL Date: Tue, 25 Jun 2019 18:47:33 +0200 Message-Id: <20190625164733.11091-15-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The high frequency pll is required on compatible Qualcomm SoCs to support the CPU frequency scaling feature. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) -- 2.21.0 diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index fbbc065415d4..7cc4ad24dfe5 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -671,6 +671,7 @@ CONFIG_MSM_MMCC_8996=y CONFIG_MSM_GCC_8998=y CONFIG_QCS_GCC_404=y CONFIG_SDM_GCC_845=y +CONFIG_QCOM_HFPLL=y CONFIG_HWSPINLOCK=y CONFIG_HWSPINLOCK_QCOM=y CONFIG_ARM_MHU=y