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Wed, 12 Jul 2023 21:18:15 +0000 From: Frank Li To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Li Yang , Pierre Gondois , Chester Lin , Zhou Peng , devicetree@vger.kernel.org (open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS), linux-arm-kernel@lists.infradead.org (moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Cc: imx@lists.linux.dev Subject: [PATCH 1/3] arm64: dts: imx8qm: add cpu frequency table Date: Wed, 12 Jul 2023 17:17:52 -0400 Message-Id: <20230712211755.1538847-1-Frank.Li@nxp.com> X-Mailer: git-send-email 2.34.1 X-ClientProxiedBy: BYAPR05CA0042.namprd05.prod.outlook.com (2603:10b6:a03:74::19) To AM6PR04MB4838.eurprd04.prod.outlook.com (2603:10a6:20b:4::16) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AM6PR04MB4838:EE_|PAXPR04MB9187:EE_ X-MS-Office365-Filtering-Correlation-Id: 9920463c-8d02-4b3e-b2a0-08db831d8129 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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Signed-off-by: Frank Li Reviewed-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8qm.dtsi | 72 +++++++++++++++++++++++ 1 file changed, 72 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 9fff867709f0..24508b84804b 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -62,6 +62,7 @@ A53_0: cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x0>; + clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; i-cache-size = <0x8000>; i-cache-line-size = <64>; @@ -70,12 +71,14 @@ A53_0: cpu@0 { d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; }; A53_1: cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x1>; + clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; i-cache-size = <0x8000>; i-cache-line-size = <64>; @@ -84,12 +87,14 @@ A53_1: cpu@1 { d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; }; A53_2: cpu@2 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x2>; + clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; i-cache-size = <0x8000>; i-cache-line-size = <64>; @@ -98,12 +103,14 @@ A53_2: cpu@2 { d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; }; A53_3: cpu@3 { device_type = "cpu"; compatible = "arm,cortex-a53"; reg = <0x0 0x3>; + clocks = <&clk IMX_SC_R_A53 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; i-cache-size = <0x8000>; i-cache-line-size = <64>; @@ -112,12 +119,14 @@ A53_3: cpu@3 { d-cache-line-size = <64>; d-cache-sets = <128>; next-level-cache = <&A53_L2>; + operating-points-v2 = <&a53_opp_table>; }; A72_0: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x0 0x100>; + clocks = <&clk IMX_SC_R_A72 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; i-cache-size = <0xC000>; i-cache-line-size = <64>; @@ -126,14 +135,17 @@ A72_0: cpu@100 { d-cache-line-size = <64>; d-cache-sets = <256>; next-level-cache = <&A72_L2>; + operating-points-v2 = <&a72_opp_table>; }; A72_1: cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a72"; reg = <0x0 0x101>; + clocks = <&clk IMX_SC_R_A72 IMX_SC_PM_CLK_CPU>; enable-method = "psci"; next-level-cache = <&A72_L2>; + operating-points-v2 = <&a72_opp_table>; }; A53_L2: l2-cache0 { @@ -155,6 +167,66 @@ A72_L2: l2-cache1 { }; }; + a53_opp_table: a53-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <900000>; + clock-latency-ns = <150000>; + }; + + opp-896000000 { + opp-hz = /bits/ 64 <896000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <150000>; + }; + + opp-1104000000 { + opp-hz = /bits/ 64 <1104000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <150000>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <150000>; + opp-suspend; + }; + }; + + a72_opp_table: a72-opp-table { + compatible = "operating-points-v2"; + opp-shared; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <150000>; + }; + + opp-1056000000 { + opp-hz = /bits/ 64 <1056000000>; + opp-microvolt = <1000000>; + clock-latency-ns = <150000>; + }; + + opp-1296000000 { + opp-hz = /bits/ 64 <1296000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <150000>; + }; + + opp-1596000000 { + opp-hz = /bits/ 64 <1596000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <150000>; + opp-suspend; + }; + }; + gic: interrupt-controller@51a00000 { compatible = "arm,gic-v3"; reg = <0x0 0x51a00000 0 0x10000>, /* GIC Dist */ From patchwork Wed Jul 12 21:17:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 702428 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85FA6C001B0 for ; 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Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm.dtsi | 135 ++++++++++++++++++++++ 1 file changed, 135 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm.dtsi b/arch/arm64/boot/dts/freescale/imx8qm.dtsi index 24508b84804b..30520186de83 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { interrupt-parent = <&gic>; @@ -72,6 +73,7 @@ A53_0: cpu@0 { d-cache-sets = <128>; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + #cooling-cells = <2>; }; A53_1: cpu@1 { @@ -88,6 +90,7 @@ A53_1: cpu@1 { d-cache-sets = <128>; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + #cooling-cells = <2>; }; A53_2: cpu@2 { @@ -104,6 +107,7 @@ A53_2: cpu@2 { d-cache-sets = <128>; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + #cooling-cells = <2>; }; A53_3: cpu@3 { @@ -120,6 +124,7 @@ A53_3: cpu@3 { d-cache-sets = <128>; next-level-cache = <&A53_L2>; operating-points-v2 = <&a53_opp_table>; + #cooling-cells = <2>; }; A72_0: cpu@100 { @@ -136,6 +141,7 @@ A72_0: cpu@100 { d-cache-sets = <256>; next-level-cache = <&A72_L2>; operating-points-v2 = <&a72_opp_table>; + #cooling-cells = <2>; }; A72_1: cpu@101 { @@ -146,6 +152,7 @@ A72_1: cpu@101 { enable-method = "psci"; next-level-cache = <&A72_L2>; operating-points-v2 = <&a72_opp_table>; + #cooling-cells = <2>; }; A53_L2: l2-cache0 { @@ -284,6 +291,134 @@ iomuxc: pinctrl { rtc: rtc { compatible = "fsl,imx8qxp-sc-rtc"; }; + + tsens: thermal-sensor { + compatible = "fsl,imx-sc-thermal"; + #thermal-sensor-cells = <1>; + }; + }; + + thermal-zones { + + cpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_A53>; + + trips { + cpu_alert0: trip0 { + temperature = <107000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit0: trip1 { + temperature = <127000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert0>; + cooling-device = + <&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A53_3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + cpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_A72>; + + trips { + cpu_alert1: trip0 { + temperature = <107000>; + hysteresis = <2000>; + type = "passive"; + }; + + cpu_crit1: trip1 { + temperature = <127000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + + cooling-maps { + map0 { + trip = <&cpu_alert1>; + cooling-device = + <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, + <&A72_1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; + + gpu-thermal0 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_GPU_0_PID0>; + + trips { + gpu_alert0: trip0 { + temperature = <107000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu_crit0: trip1 { + temperature = <127000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + gpu-thermal1 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_GPU_1_PID0>; + + trips { + gpu_alert1: trip0 { + temperature = <107000>; + hysteresis = <2000>; + type = "passive"; + }; + + gpu_crit1: trip1 { + temperature = <127000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; + + drc-thermal0 { + polling-delay-passive = <250>; + polling-delay = <2000>; + thermal-sensors = <&tsens IMX_SC_R_DRC_0>; + + trips { + drc_alert0: trip0 { + temperature = <107000>; + hysteresis = <2000>; + type = "passive"; + }; + + drc_crit0: trip1 { + temperature = <127000>; + hysteresis = <2000>; + type = "critical"; + }; + }; + }; }; /* sorted in register address */ From patchwork Wed Jul 12 21:17:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Li X-Patchwork-Id: 701975 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DEEC3C001DE for ; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: rT7VPMAWRKoC5SBWGGP2bnqVSEF2GYD3BHy8v/wTiAyv2UbUvtzH9BZirBYuHgI+UOaqcd85wWWgNAhwqFv3DFAXVX/M6zqs9BCiGJcgb1WYyf0F9IwZ653YJ2is8dVw979MLGP5g49RYbuIBjMErF6RwiGJ0/Hg9+Dl8PDYTfb8ve0tQC3KV5+LKfzyRjUF62GKIuXT9D6i3kvtAg5hQAPzhRQ7+Fpti8ew1nVKrFkS2jy7/0HFYBYkfio6f/9gIIhPPR9R0o1zhQNXhi+8NxJkNUGIl4pDQEe0VAp/zxAZQDBehDzEySTLn5v00EdtFZB8d3vD4rrgymGr4Vogsk7er4AgCfJ/hTr2jW1GSyBjWVSu77tYFTsC+H/OAukfVnhr3gm5iLXa+PToMIz8kMmbs3dpWbZPMCA93B4eqPrGhomPOprYSeFRqUtTEYROIEF6M+JjFkchydl8jDWYM1ZsxWbwVZbGL+34IBaTSjYJLNcXaUpPzEkMlkg/3uFBDAFW6LhPNS85w05qCHXmwXwZ6wkS90IKY1ICamN0/jgeu6sVpXS2MsRLV7TSUOQu1dGUDHwYoU5Dj741WAHhKBqgkMtoDDpy62jtvNXRVcXdiLSBD9hxC3+YgKjMTohSLCiwlO9uyfzfeKYGkTJuQTFnYuiAoeM2JRKlFXhghis50hl3xRwrHzcgfnxsxajudDqJw8pMR0tE7yVrBEntinaWjmF7NMrrka0qWjiPDm2NsQUIn3MZ9LBT1dyH1Pwk1lgE/JbMlu0Q/3DDq2zg1Bpak8/u0sZLuZZZz975yXlcbGTSSb00o7B7bt77bXML+U7jVtzVkJ45mRLbPXrTJ+Ne1xZCI+cdflKQBR8gMol5hi0AEzhNossLTtTBfQTUoL3amX2L3mDo2n9BjOLalrE95bspoAtmh1+C061nTJA4CDIPfjFB7utteb9TH2FhT562Au1hO3clf3cAYE0LMRa50pbS3nLzj9cPTpeEVAQJUNV1mR1568j4Dv3uVqVo0iYzusu/dEZoZXF38y9DRczV2ipMxTJ39XgBek5hMIBZ9S8NeR+Io33MhS6PwLpgJCffds7S0BSxdfF0qFUiBndzHP9GVJKq/ediF+hgGPx/F2gNRSAO64cQgsdFZ4K7OLOBj1IpmylaH80JCk/2vICYHX5hzlGsmunNKLtjIAh+ZPXJ9PIle8uiqM2PTzxxRhN4myg/SloATCNaQzdZvqxftFLJOWt3a6iJXzGD0JIpEhp0rq1JNs8Ca+GjevvdQ5iZCRB8mXX1Ft6mvTvzwLPWI8uGh+9HOf+rgmWGahF0HGIs/Kr5EqcuhOFXJit+5lG0Ownn9G2gSkYe54BkZwxTIuHVdYauoiUanRaULHFjVwD6f4gaRD+HLXfoJlWRqTJC33W2zOMFdXciS9dZXf07ijQR7llHRAeXSYBBKhz+R3lPHuE8G3gstBB2HLrSvtxT3XKbi0gGOvduv3kCOn/nJn2+ANYN+u6S6OZeoUBwI0ZTr6kCGioGEvLbj6TvqmY78TABe0a3zI8ety3+jKTPMJbnanRnvbV8LxxdBoCVfoDx0o+uUyLE/yQjMjP8 X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f43e87d9-a101-4480-a6be-08db831d86aa X-MS-Exchange-CrossTenant-AuthSource: AM6PR04MB4838.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jul 2023 21:18:24.4268 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ChH3i5o3oUp1rAqzx8Bo6gAGZ4DhQBPC6J//4CQd9f3fBa3WbmQHVoXQczfE/dmLDdgSRXdbeBugPlNn/ROmYA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB9187 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The A72 nodes have been deleted in this DTB. Removes the corresponding thermal zone to ensure a successful build. Signed-off-by: Frank Li --- arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts index 607cd6b4e972..b0116b219c7b 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts @@ -22,6 +22,10 @@ cpus { /delete-node/ cpu@101; }; + thermal-zones { + /delete-node/ cpu-thermal1; + }; + memory@80000000 { device_type = "memory"; reg = <0x00000000 0x80000000 0 0x40000000>;