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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z126sm2767638wmb.32.2019.07.03.05.07.53 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 03 Jul 2019 05:07:54 -0700 (PDT) From: Jerome Brunet To: Mark Brown , Liam Girdwood , Kevin Hilman Cc: Jerome Brunet , alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org Subject: [PATCH 1/2] ASoC: meson: axg-tdm-formatter: add reset to the bindings documentation Date: Wed, 3 Jul 2019 14:07:48 +0200 Message-Id: <20190703120749.32341-2-jbrunet@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190703120749.32341-1-jbrunet@baylibre.com> References: <20190703120749.32341-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add an optional reset property to the tdm formatter bindings. The dedicated reset line is present on some SoC families, such as the g12a. Signed-off-by: Jerome Brunet --- .../bindings/sound/amlogic,axg-tdm-formatters.txt | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 2.21.0 diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt index 3b94a715a0b9..8835a43edfbb 100644 --- a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt +++ b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt @@ -15,11 +15,15 @@ Required properties: * "lrclk" : sample clock * "lrclk_sel": sample clock input multiplexer -Example of TDMOUT_A on the A113 SoC: +Optional property: +- resets: phandle to the dedicated reset line of the tdm formatter. + +Example of TDMOUT_A on the S905X2 SoC: tdmout_a: audio-controller@500 { compatible = "amlogic,axg-tdmout"; reg = <0x0 0x500 0x0 0x40>; + resets = <&clkc_audio AUD_RESET_TDMOUT_A>; clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>, <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>, <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>, From patchwork Wed Jul 3 12:07:49 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 168411 Delivered-To: patch@linaro.org Received: by 2002:a92:4782:0:0:0:0:0 with SMTP id e2csp807202ilk; Wed, 3 Jul 2019 05:08:05 -0700 (PDT) X-Google-Smtp-Source: APXvYqy9L4UhSGIrDBxCRbN+MOPOtiCV5qfgZQTg8TArEO2xRmsPJ1L+BU1Q2WOllTR9RnjUgAqF X-Received: by 2002:a17:902:2a6b:: with SMTP id i98mr39661851plb.75.1562155685321; Wed, 03 Jul 2019 05:08:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1562155685; cv=none; d=google.com; s=arc-20160816; b=euErURZacIOwMbFldvL6uP5RPBIGZAdjjjCcUpJHYv37kbMHzw0bpDfw43QS/UrirG jCGe9ZsXTaaE++7HV1TTpj1tH1QykXPoHV5jPNcxFc8mBJ1c9+oI+GhLxN1/6ImgdV8n sVl+KSQb79kFv1D/8eGPXUss0XWmsDV5A4QFVLJWOAszln06Wna0Q35kvYpNZHQuo8QF B+OQ9rB6Gf5j5E8wmGdiSu0XOBUxNWUPpWmtJ+AYKAcCO+YR7I8jaE5zj5WZqIhFSLe0 rg374DjpLcqBnYdvc08AVL5QBG39B9C482/5zQvfp/SZT6PMDjI/DMzQtMriv1iVgH95 cNiQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=m6jmfxNF0bKXTHuQ9MiaMGLVqO2khGBwkEkz0kXerFA=; b=sQ3AB9HzpAJU8NR3hH0RX7TGqwpyYlPyKajFUNJyO25WN3ijgep4CiiNwDsq6YKwha xFV1ZimLXrYF4lr8d/vMWiV2W7eP6jnOyqusSCINP1ZDhZvY1NMG7zX+yNaIMmPcjnLo uiz+zjPD3kDmYfvor1RchROhi9e3LDJx8xaiZRwkTED1F26t1PXuGi1myINqbJWQESHB tXojczKQTyobGCzazJIOkS7D7AkzqMmTNUPexDwTJD8WMx6cuvm3ZW3KHVCrV+DSe0Ti MlXqKGLZCOqqlr28UBqG23VSnhrZNzNkbkw7d12gyHnWAz/NRadLVp90RLQ3TGiFFM8w Ye8Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=JrcDlvvT; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[90.63.244.31]) by smtp.googlemail.com with ESMTPSA id z126sm2767638wmb.32.2019.07.03.05.07.54 (version=TLS1_3 cipher=AEAD-AES256-GCM-SHA384 bits=256/256); Wed, 03 Jul 2019 05:07:55 -0700 (PDT) From: Jerome Brunet To: Mark Brown , Liam Girdwood , Kevin Hilman Cc: Jerome Brunet , alsa-devel@alsa-project.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-amlogic@lists.infradead.org Subject: [PATCH 2/2] ASoC: meson: axg-tdm-formatter: add reset Date: Wed, 3 Jul 2019 14:07:49 +0200 Message-Id: <20190703120749.32341-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190703120749.32341-1-jbrunet@baylibre.com> References: <20190703120749.32341-1-jbrunet@baylibre.com> MIME-Version: 1.0 X-Patchwork-Bot: notify Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add the optional reset line handling which is present on the new SoC families, such as the g12a. Triggering this reset is not critical but it helps solve a channel shift issue on the g12a. Signed-off-by: Jerome Brunet --- sound/soc/meson/axg-tdm-formatter.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) -- 2.21.0 diff --git a/sound/soc/meson/axg-tdm-formatter.c b/sound/soc/meson/axg-tdm-formatter.c index 0c6cce5c5773..2e498201139f 100644 --- a/sound/soc/meson/axg-tdm-formatter.c +++ b/sound/soc/meson/axg-tdm-formatter.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include "axg-tdm-formatter.h" @@ -20,6 +21,7 @@ struct axg_tdm_formatter { struct clk *lrclk; struct clk *sclk_sel; struct clk *lrclk_sel; + struct reset_control *reset; bool enabled; struct regmap *map; }; @@ -75,6 +77,24 @@ static int axg_tdm_formatter_enable(struct axg_tdm_formatter *formatter) if (formatter->enabled) return 0; + /* + * On the g12a (and possibly other SoCs), when a stream using + * multiple lanes is restarted, it will sometimes not start + * from the first lane, but randomly from another used one. + * The result is an unexpected and random channel shift. + * + * The hypothesis is that an HW counter is not properly reset + * and the formatter simply starts on the lane it stopped + * before. Unfortunately, there does not seems to be a way to + * reset this through the registers of the block. + * + * However, the g12a has indenpendent reset lines for each audio + * devices. Using this reset before each start solves the issue. + */ + ret = reset_control_reset(formatter->reset); + if (ret) + return ret; + /* * If sclk is inverted, invert it back and provide the inversion * required by the formatter @@ -306,6 +326,15 @@ int axg_tdm_formatter_probe(struct platform_device *pdev) return ret; } + /* Formatter dedicated reset line */ + formatter->reset = reset_control_get_optional_exclusive(dev, NULL); + if (IS_ERR(formatter->reset)) { + ret = PTR_ERR(formatter->reset); + if (ret != -EPROBE_DEFER) + dev_err(dev, "failed to get reset: %d\n", ret); + return ret; + } + return devm_snd_soc_register_component(dev, drv->component_drv, NULL, 0); }