From patchwork Mon Sep 4 11:58:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 720039 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E64CACA0FFA for ; Mon, 4 Sep 2023 11:58:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352867AbjIDL6m (ORCPT ); Mon, 4 Sep 2023 07:58:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39772 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352877AbjIDL6k (ORCPT ); Mon, 4 Sep 2023 07:58:40 -0400 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AF849CC6 for ; Mon, 4 Sep 2023 04:58:34 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qd8Dk-0003r2-RT; Mon, 04 Sep 2023 13:58:20 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1qd8Dk-003s43-5M; Mon, 04 Sep 2023 13:58:20 +0200 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1qd8Dj-005pOo-GB; Mon, 04 Sep 2023 13:58:19 +0200 From: Sascha Hauer To: linux-rockchip@lists.infradead.org Cc: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, kernel@pengutronix.de, Quentin Schulz , Michael Riesch , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer Subject: [PATCH 1/3] pinctrl: rockchip: add support for io-domain dependency Date: Mon, 4 Sep 2023 13:58:14 +0200 Message-Id: <20230904115816.1237684-2-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230904115816.1237684-1-s.hauer@pengutronix.de> References: <20230904115816.1237684-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-gpio@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org On some Rockchip SoCs, some SoC pins are split in what are called IO domains. An IO domain is supplied power externally, by regulators from a PMIC for example. This external power supply is then used by the IO domain as "supply" for the IO pins if they are outputs. Each IO domain can configure which voltage the IO pins will be operating on (1.8V or 3.3V). There already exists an IO domain driver for Rockchip SoCs[1]. This driver allows to explicit the relationship between the external power supplies and IO domains[2]. This makes sure the regulators are enabled by the Linux kernel so the IO domains are supplied with power and correctly configured as per the supplied voltage. This driver is a regulator consumer and does not offer any other interface for device dependency. However, IO pins belonging to an IO domain need to have this IO domain configured correctly before they are being used otherwise they do not operate correctly. We currently do not have any knowledge about which pin is on which IO domain, so we assume that all pins are on some IO domain and defer probing of the pin consumers until the IO domain driver has been probed. Some pins however are needed to access the regulators driving an IO domain. Deferring probe for them as well would introduce a cyclic dependency. To break out of this dependency a pin group can be supplied a rockchip,io-domain-boot-on property. Probe won't be deferred for pin groups with this property. rockchip,io-domain-boot-on should be added to all pin groups needed to access the PMIC driving the IO domains. [1] drivers/soc/rockchip/io-domain.c [2] Documentation/devicetree/bindings/power/rockchip-io-domain.yaml Signed-off-by: Sascha Hauer --- drivers/pinctrl/pinctrl-rockchip.c | 64 ++++++++++++++++++++++++++++++ drivers/pinctrl/pinctrl-rockchip.h | 3 ++ 2 files changed, 67 insertions(+) diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c index 0276b52f37168..663bd9d6840a5 100644 --- a/drivers/pinctrl/pinctrl-rockchip.c +++ b/drivers/pinctrl/pinctrl-rockchip.c @@ -24,6 +24,8 @@ #include #include #include +#include +#include #include #include #include @@ -2678,6 +2680,43 @@ static int rockchip_pmx_get_groups(struct pinctrl_dev *pctldev, return 0; } +static int rockchip_pmx_check_io_domain(struct rockchip_pinctrl *info, unsigned group) +{ + struct platform_device *pdev; + int i; + + if (!info->io_domains) + return 0; + + if (info->groups[group].io_domain_skip) + return 0; + + for (i = 0; i < info->num_io_domains; i++) { + if (!info->io_domains[i]) + continue; + + pdev = of_find_device_by_node(info->io_domains[i]); + if (!pdev) { + dev_err(info->dev, "couldn't find IO domain device\n"); + return -ENODEV; + } + + if (!platform_get_drvdata(pdev)) { + dev_err(info->dev, "IO domain device is not probed yet, deferring...(%s)", + info->groups[group].name); + return -EPROBE_DEFER; + } + + of_node_put(info->io_domains[i]); + info->io_domains[i] = NULL; + } + + devm_kfree(info->dev, info->io_domains); + info->io_domains = NULL; + + return 0; +} + static int rockchip_pmx_set(struct pinctrl_dev *pctldev, unsigned selector, unsigned group) { @@ -2691,6 +2730,10 @@ static int rockchip_pmx_set(struct pinctrl_dev *pctldev, unsigned selector, dev_dbg(dev, "enable function %s group %s\n", info->functions[selector].name, info->groups[group].name); + ret = rockchip_pmx_check_io_domain(info, group); + if (ret) + return ret; + /* * for each pin in the pin group selected, program the corresponding * pin function number in the config register. @@ -3019,6 +3062,8 @@ static int rockchip_pinctrl_parse_groups(struct device_node *np, if (!size || size % 4) return dev_err_probe(dev, -EINVAL, "wrong pins number or pins and configs should be by 4\n"); + grp->io_domain_skip = of_property_read_bool(np, "rockchip,io-domain-boot-on"); + grp->npins = size / 4; grp->pins = devm_kcalloc(dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); @@ -3417,6 +3462,22 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev) return PTR_ERR(info->regmap_pmu); } + info->num_io_domains = of_property_count_u32_elems(np, "rockchip,io-domains"); + if (info->num_io_domains) { + int i; + + info->io_domains = devm_kmalloc_array(dev, info->num_io_domains, + sizeof(*info->io_domains), GFP_KERNEL); + if (!info->io_domains) + return -ENOMEM; + + for (i = 0; i < info->num_io_domains; i++) { + info->io_domains[i] = of_parse_phandle(np, "rockchip,io-domains", 0); + if (!info->io_domains[i]) + return -EINVAL; + } + } + ret = rockchip_pinctrl_register(pdev, info); if (ret) return ret; @@ -3439,6 +3500,9 @@ static int rockchip_pinctrl_remove(struct platform_device *pdev) of_platform_depopulate(&pdev->dev); + for (i = 0; i < info->num_io_domains; i++) + of_node_put(info->io_domains[i]); + for (i = 0; i < info->ctrl->nr_banks; i++) { bank = &info->ctrl->pin_banks[i]; diff --git a/drivers/pinctrl/pinctrl-rockchip.h b/drivers/pinctrl/pinctrl-rockchip.h index 4759f336941ef..d2ac79b0a7bc4 100644 --- a/drivers/pinctrl/pinctrl-rockchip.h +++ b/drivers/pinctrl/pinctrl-rockchip.h @@ -435,6 +435,7 @@ struct rockchip_pin_group { unsigned int npins; unsigned int *pins; struct rockchip_pin_config *data; + bool io_domain_skip; }; /** @@ -462,6 +463,8 @@ struct rockchip_pinctrl { unsigned int ngroups; struct rockchip_pmx_func *functions; unsigned int nfunctions; + struct device_node **io_domains; + int num_io_domains; }; #endif From patchwork Mon Sep 4 11:58:15 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sascha Hauer X-Patchwork-Id: 720040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7D6E7CA0FF3 for ; Mon, 4 Sep 2023 11:58:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1351464AbjIDL6l (ORCPT ); Mon, 4 Sep 2023 07:58:41 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39742 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1352869AbjIDL6g (ORCPT ); Mon, 4 Sep 2023 07:58:36 -0400 Received: from metis.whiteo.stw.pengutronix.de (metis.whiteo.stw.pengutronix.de [IPv6:2a0a:edc0:2:b01:1d::104]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A6284195 for ; Mon, 4 Sep 2023 04:58:33 -0700 (PDT) Received: from drehscheibe.grey.stw.pengutronix.de ([2a0a:edc0:0:c01:1d::a2]) by metis.whiteo.stw.pengutronix.de with esmtps (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1qd8Dl-0003r4-2P; Mon, 04 Sep 2023 13:58:21 +0200 Received: from [2a0a:edc0:0:1101:1d::28] (helo=dude02.red.stw.pengutronix.de) by drehscheibe.grey.stw.pengutronix.de with esmtp (Exim 4.94.2) (envelope-from ) id 1qd8Dk-003s49-Jh; Mon, 04 Sep 2023 13:58:20 +0200 Received: from sha by dude02.red.stw.pengutronix.de with local (Exim 4.94.2) (envelope-from ) id 1qd8Dj-005pOr-HB; Mon, 04 Sep 2023 13:58:19 +0200 From: Sascha Hauer To: linux-rockchip@lists.infradead.org Cc: Heiko Stuebner , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, kernel@pengutronix.de, Quentin Schulz , Michael Riesch , Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sascha Hauer Subject: [PATCH 2/3] dt-bindings: pinctrl: rockchip: Add io domain properties Date: Mon, 4 Sep 2023 13:58:15 +0200 Message-Id: <20230904115816.1237684-3-s.hauer@pengutronix.de> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230904115816.1237684-1-s.hauer@pengutronix.de> References: <20230904115816.1237684-1-s.hauer@pengutronix.de> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 2a0a:edc0:0:c01:1d::a2 X-SA-Exim-Mail-From: sha@pengutronix.de X-SA-Exim-Scanned: No (on metis.whiteo.stw.pengutronix.de); SAEximRunCond expanded to false X-PTX-Original-Recipient: linux-gpio@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add rockchip,io-domains property to the Rockchip pinctrl driver. This list of phandles points to the IO domain device(s) the pins of the pinctrl driver are supplied from. Also a rockchip,io-domain-boot-on property is added to pin groups which can be used for pin groups which themselves are needed to access the regulators an IO domain is driven from. Signed-off-by: Sascha Hauer --- .../bindings/pinctrl/rockchip,pinctrl.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml index 10c335efe619e..92075419d29cf 100644 --- a/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/rockchip,pinctrl.yaml @@ -62,6 +62,11 @@ properties: Required for at least rk3188 and rk3288. On the rk3368 this should point to the PMUGRF syscon. + rockchip,io-domains: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandles to io domains + "#address-cells": enum: [1, 2] @@ -137,7 +142,13 @@ additionalProperties: - description: The phandle of a node contains the generic pinconfig options to use as described in pinctrl-bindings.txt. - + rockchip,io-domain-boot-on: + type: boolean + description: + If true assume that the io domain needed for this pin group has been + configured correctly by the bootloader. This is needed to break cyclic + dependencies introduced when a io domain needs a regulator that can be + accessed through pins configured here. examples: - | #include