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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id x5-20020a1709065ac500b00993664a9987sm6574017ejs.103.2023.09.18.09.03.02 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 01/22] target/i386: Only realize existing APIC device Date: Mon, 18 Sep 2023 18:02:34 +0200 Message-ID: <20230918160257.30127-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=philmd@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org APIC state is created under a certain condition, use the same condition to realize it. Having a NULL APIC state is a bug: use assert(). Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu-sysemu.c | 9 +++------ target/i386/cpu.c | 8 +++++--- 2 files changed, 8 insertions(+), 9 deletions(-) diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 2375e48178..6a164d3769 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -272,9 +272,7 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp) APICCommonState *apic; APICCommonClass *apic_class = apic_get_class(errp); - if (!apic_class) { - return; - } + assert(apic_class); cpu->apic_state = DEVICE(object_new_with_class(OBJECT_CLASS(apic_class))); object_property_add_child(OBJECT(cpu), "lapic", @@ -293,9 +291,8 @@ void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) APICCommonState *apic; static bool apic_mmio_map_once; - if (cpu->apic_state == NULL) { - return; - } + assert(cpu->apic_state); + qdev_realize(DEVICE(cpu->apic_state), NULL, errp); /* Map APIC MMIO area */ diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b2a20365e1..a23d4795e0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7448,9 +7448,11 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } #ifndef CONFIG_USER_ONLY - x86_cpu_apic_realize(cpu, &local_err); - if (local_err != NULL) { - goto out; + if (cpu->env.features[FEAT_1_EDX] & CPUID_APIC || ms->smp.cpus > 1) { + x86_cpu_apic_realize(cpu, &local_err); + if (local_err != NULL) { + goto out; + } } #endif /* !CONFIG_USER_ONLY */ cpu_reset(cs); From patchwork Mon Sep 18 16:02:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724164 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774445wro; Mon, 18 Sep 2023 09:06:55 -0700 (PDT) X-Google-Smtp-Source: AGHT+IET9uZaSjFox7s2Mqm8X/8isZ+rNS6oMYXeNKkiNoQWXyAePO5TR+DMLpjWNlcRAzbPsmUk X-Received: by 2002:a0c:b216:0:b0:64f:4041:3d67 with SMTP id x22-20020a0cb216000000b0064f40413d67mr8795825qvd.15.1695053215049; Mon, 18 Sep 2023 09:06:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053215; cv=none; d=google.com; s=arc-20160816; b=CAf8IUwTsnfRQjmUei06Z4vVNe9Xb1UtVLI284w6bBO42GjGWFettUajIZ+Uf1moSv 2FzGSb3y1WysFzrtp4TiQlejRLnltk1yruHE1hpgP4n/eBCywD9GgsyYlZf0v5b+SGha 403aTjTlOtNKTx7iUGRF1rHk3Zqa55uI85Daeb51OrE3o+M2ptH2RXwTMS9gBVfKP3z/ 5Z9OAOquXwWLcqKnXUni7HTXNQZHEu4VjGOICUyeBFfPgoWf7u0NBFb8LYc1iGia/Lf6 APYyaD/7DFy7Zuz9WIe9CAt4qbTWZ0XRdxg2Odiy3ANEd+MO2TvFpuYd8Ol0df1mui93 p6tQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=lJh8A0itxnh0qEmv9jrQE8icd48ukduXjwQKR8H2Trw=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=P/jds0f+6dw9zuOftDk1EKDZK6Swaew0lGd05HaygUfl+1brJQd0LODaxBKcNrBeyK GgaKtDBdhrigImi3FbpyH/haSaC8RSXZLRBGGOsNO2JCIqRikDL/fPRoQkE5a/P9XEQ1 MqNRvTXrozFMSCXL7pzY06oagUhigvgW5L+ba5C/SFj+kaVdTWRKjqYOyM5jnpTDhO+I a3Z/owMIAxz6h8ppIVjV51bjWYFP1f/EodLJ5mzSrcSqQcv8oYEJFcebbOtRDC9cZWi2 oe6CbQ6ziSdEQG8N5ce3CSFyfKVoMIC8HdAWZeu685CAIXOqUhe3eFDL5C5OwCceEc/s nCRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=jrhQ3Gbn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id y16-20020a170906559000b0099b7276235esm6699286ejp.93.2023.09.18.09.03.08 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 02/22] hw/intc/apic: Pass CPU using QOM link property Date: Mon, 18 Sep 2023 18:02:35 +0200 Message-ID: <20230918160257.30127-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62b; envelope-from=philmd@linaro.org; helo=mail-ej1-x62b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QOM objects shouldn't access each other internals fields except using the QOM API. Declare the 'cpu' and 'base-addr' properties, set them using object_property_set_link() and qdev_prop_set_uint32() respectively. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Igor Mammedov --- hw/intc/apic_common.c | 2 ++ target/i386/cpu-sysemu.c | 11 ++++++----- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c index 68ad30e2f5..e28f7402ab 100644 --- a/hw/intc/apic_common.c +++ b/hw/intc/apic_common.c @@ -394,6 +394,8 @@ static Property apic_properties_common[] = { true), DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instance_id, false), + DEFINE_PROP_LINK("cpu", APICCommonState, cpu, TYPE_X86_CPU, X86CPU *), + DEFINE_PROP_UINT32("base-addr", APICCommonState, apicbase, 0), DEFINE_PROP_END_OF_LIST(), }; diff --git a/target/i386/cpu-sysemu.c b/target/i386/cpu-sysemu.c index 6a164d3769..6edfb7e2af 100644 --- a/target/i386/cpu-sysemu.c +++ b/target/i386/cpu-sysemu.c @@ -269,7 +269,6 @@ APICCommonClass *apic_get_class(Error **errp) void x86_cpu_apic_create(X86CPU *cpu, Error **errp) { - APICCommonState *apic; APICCommonClass *apic_class = apic_get_class(errp); assert(apic_class); @@ -279,11 +278,13 @@ void x86_cpu_apic_create(X86CPU *cpu, Error **errp) OBJECT(cpu->apic_state)); object_unref(OBJECT(cpu->apic_state)); + if (!object_property_set_link(OBJECT(cpu->apic_state), "cpu", + OBJECT(cpu), errp)) { + return; + } qdev_prop_set_uint32(cpu->apic_state, "id", cpu->apic_id); - /* TODO: convert to link<> */ - apic = APIC_COMMON(cpu->apic_state); - apic->cpu = cpu; - apic->apicbase = APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE; + qdev_prop_set_uint32(cpu->apic_state, "base-addr", + APIC_DEFAULT_ADDRESS | MSR_IA32_APICBASE_ENABLE); } void x86_cpu_apic_realize(X86CPU *cpu, Error **errp) From patchwork Mon Sep 18 16:02:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724155 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1772514wro; Mon, 18 Sep 2023 09:04:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IG5stuoZQ7A9ZPHcSeK0soElyDl8OszUkh6+nc98wrr7BlfS1gSQD2eEqj4WbZw0xUQmIIP X-Received: by 2002:a05:6358:5e01:b0:135:4003:7851 with SMTP id q1-20020a0563585e0100b0013540037851mr9845469rwn.19.1695053046623; Mon, 18 Sep 2023 09:04:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053046; cv=none; d=google.com; s=arc-20160816; b=lefbM6/jpWEsGVDjhqafOxha9Xxi+SBYPpbdmxMgS+5Gu7SGBuRci0A2RG4gv81ByX LODUxCNVWHSZQGwrse7v3euiXbT1YFF/ts4bAQWrBD5f2xDtA17tS6GgVTQRQgirGPft Qr1nWaTFv1aI5m3DWxYF0HMJxYNbNrP/06w59NLMAHilDvtGWlXG8xT1ylfLXROzOdwd fgIDQG7MagK6Rz7RWZjeYc0GFLnNQ6TCMF/Np81FGa122dwNhQTrIgYYR5N0nqG2KJ92 9MAV9gOao70tPthawyxHAOGPGkwUEsKshgmMWMLomeKS9bKYihBUKxg/JlsZSpPvhJDA JzQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MazgQXWzZA8uxNgPyG3XxGvrbp91MALAwpKlSsIULzk=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=n8NvafksrgMKEyFMnIzK353z4kG5/Le+BbDGKISvhbds56KMRLMfOGZ/cbu9DnwtRe wOf1WGdVGEtaSubHvlSvchsUWGkG6JL3VXeEsjJStyT7WiurEqPQwOXn9tdFlrcOweb5 avWgeRCxxLlcd4ZruJ09ufmIAPkZSsnkRJz7yKYZj4Mec+nDZF59DNZuTQVxZdvRsiov HDe9bjm5/e4ZDnsVLPIoIzUvwfFwG1DhyVRFKn9aZb4NMERIxM3XueZ/jzVKPyPkPW1G U0AkF43paSjxgGXA/Th8I5EEKA+oKRw8F4dwD8/ZwEv9NIvK8VXBwT2o28c/QJC6jlrn YHEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AWcgkPnx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id r11-20020a170906350b00b009934b1eb577sm6608438eja.77.2023.09.18.09.03.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 03/22] target/i386/kvm: Correct comment in kvm_cpu_realize() Date: Mon, 18 Sep 2023 18:02:36 +0200 Message-ID: <20230918160257.30127-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Igor Mammedov --- target/i386/kvm/kvm-cpu.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 7237378a7d..1fe62ce176 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -37,6 +37,7 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * -> cpu_exec_realizefn(): * -> accel_cpu_realizefn() * kvm_cpu_realizefn() -> host_cpu_realizefn() + * -> cpu_common_realizefn() * -> check/update ucode_rev, phys_bits, mwait */ if (cpu->max_features) { From patchwork Mon Sep 18 16:02:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724154 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1772362wro; Mon, 18 Sep 2023 09:03:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHSrv+umTutAFKecXyR4KSB4DtD9BEjJA2vpJhMdHf868IDFdqY/J5j8AuRQebtfsi3YAOk X-Received: by 2002:a05:6358:63a2:b0:142:d71b:59ce with SMTP id k34-20020a05635863a200b00142d71b59cemr10536946rwh.26.1695053036462; Mon, 18 Sep 2023 09:03:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053036; cv=none; d=google.com; s=arc-20160816; b=qPfryK6lQPR3Gp9GV7HjB0xS3bsNqDgHrwNnZKwTbqQUavgN0YCoEFS/vrbInIeUER WLWR61ltGQbKPM3r2MTkF56FlPzf2tPJuQ0RgpqFV2zU+w8DhWeM4U9XJrjPNB4LoGl1 a7FfHN3lAQWU/iPtqGYTQ5/kN+RnyQSk/u3UMMlArT2SX/eJX7wV4mWmU98M/Av+6hOV hwHA6l9HwxTuY0xY9NMm8EpDmmmQA9Z4/7pCqABitMi9N2gNylOBU/QKrJL1t07QOITI sbZiBoGvneCAZm8s/za03Nf1inovTgte8m8KCb6O3aK1zFpDV1WT5qTPHz4OFlRNAW1X O12w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=IHtTfQAIBirG1HCAZXzmunPPBo4zEHxiDOOzxMZ7AZo=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=lQEoiYeS71pia0jDQxSMhZaiYGxb5VCH/z82rLwYToI5lj3uhI+/806d17HkxSphoH I/sIO9epz59fgM9geQVFE/lS6idtywv8FoJsyS+7l2U78giKE222iGb15B9dU9OnAfuf myqna/516RhSAkn5hK00Pm3tXxPrTCZfJsyd7zPf7+8kDzf+6Zr1MSlK/t2WoMEiwDdJ JDqmEgSh4xdlcmx2TiZLuZbXynkhj2cyiwcz+h0EgdezB7EKF3f9qNjURLVG60EQKqEK WGfgbC3BxHTV0dSqOZYXzKWaVJsCt4ns9fHyYMcgmbpT8Ap7WY+qsvFgTezkItNhPJbY mEGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kmxdN70O; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id e7-20020a1709067e0700b0099bd0b5a2bcsm6658963ejr.101.2023.09.18.09.03.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [RFC PATCH 04/22] exec/cpu: Never call cpu_reset() before cpu_realize() Date: Mon, 18 Sep 2023 18:02:37 +0200 Message-ID: <20230918160257.30127-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::229; envelope-from=philmd@linaro.org; helo=mail-lj1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QDev instance is expected to be in an unknown state until full object realization. Thus we shouldn't call DeviceReset() on an unrealized instance. Move the cpu_reset() call from *before* the parent realize() handler (effectively cpu_common_realizefn) to *after* it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- RFC: I haven't audited all the call sites, but plan to do it, amending the result to this patch description. This used to be a problem on some targets, but as of today's master this series pass make check-{qtest,avocado}. --- target/arm/cpu.c | 2 +- target/avr/cpu.c | 2 +- target/cris/cpu.c | 2 +- target/hexagon/cpu.c | 3 +-- target/i386/cpu.c | 2 +- target/loongarch/cpu.c | 2 +- target/m68k/cpu.c | 2 +- target/mips/cpu.c | 2 +- target/nios2/cpu.c | 2 +- target/openrisc/cpu.c | 2 +- target/riscv/cpu.c | 2 +- target/rx/cpu.c | 2 +- target/s390x/cpu.c | 2 +- target/sh4/cpu.c | 2 +- target/tricore/cpu.c | 2 +- 15 files changed, 15 insertions(+), 16 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index b9e09a702d..6aca036b85 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2278,9 +2278,9 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } qemu_init_vcpu(cs); - cpu_reset(cs); acc->parent_realize(dev, errp); + cpu_reset(cs); } static ObjectClass *arm_cpu_class_by_name(const char *cpu_model) diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 8f741f258c..84d353f30e 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -120,9 +120,9 @@ static void avr_cpu_realizefn(DeviceState *dev, Error **errp) return; } qemu_init_vcpu(cs); - cpu_reset(cs); mcc->parent_realize(dev, errp); + cpu_reset(cs); } static void avr_cpu_set_int(void *opaque, int irq, int level) diff --git a/target/cris/cpu.c b/target/cris/cpu.c index a6a93c2359..079872a5cc 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -152,10 +152,10 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp) return; } - cpu_reset(cs); qemu_init_vcpu(cs); ccc->parent_realize(dev, errp); + cpu_reset(cs); } #ifndef CONFIG_USER_ONLY diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index f155936289..7edc32701f 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -346,9 +346,8 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp) "hexagon-hvx.xml", 0); qemu_init_vcpu(cs); - cpu_reset(cs); - mcc->parent_realize(dev, errp); + cpu_reset(cs); } static void hexagon_cpu_init(Object *obj) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index a23d4795e0..7faaa6915f 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7455,9 +7455,9 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) } } #endif /* !CONFIG_USER_ONLY */ - cpu_reset(cs); xcc->parent_realize(dev, &local_err); + cpu_reset(cs); out: if (local_err != NULL) { diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 65f9320e34..8029e70e76 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -565,10 +565,10 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) loongarch_cpu_register_gdb_regs_for_features(cs); - cpu_reset(cs); qemu_init_vcpu(cs); lacc->parent_realize(dev, errp); + cpu_reset(cs); } #ifndef CONFIG_USER_ONLY diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 70d58471dc..2bc0a62f0e 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -321,10 +321,10 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) m68k_cpu_init_gdb(cpu); - cpu_reset(cs); qemu_init_vcpu(cs); mcc->parent_realize(dev, errp); + cpu_reset(cs); } static void m68k_cpu_initfn(Object *obj) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 63da1948fd..8d6f633f72 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -492,10 +492,10 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) fpu_init(env, env->cpu_model); mvp_init(env); - cpu_reset(cs); qemu_init_vcpu(cs); mcc->parent_realize(dev, errp); + cpu_reset(cs); } static void mips_cpu_initfn(Object *obj) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index bc5cbf81c2..876a6dcad2 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -217,12 +217,12 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) realize_cr_status(cs); qemu_init_vcpu(cs); - cpu_reset(cs); /* We have reserved storage for cpuid; might as well use it. */ cpu->env.ctrl[CR_CPUID] = cs->cpu_index; ncc->parent_realize(dev, errp); + cpu_reset(cs); } #ifndef CONFIG_USER_ONLY diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 61d748cfdc..cd25f1e9d5 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -142,9 +142,9 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) } qemu_init_vcpu(cs); - cpu_reset(cs); occ->parent_realize(dev, errp); + cpu_reset(cs); } static void openrisc_cpu_initfn(Object *obj) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index f227c7664e..7566757346 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1532,9 +1532,9 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) #endif qemu_init_vcpu(cs); - cpu_reset(cs); mcc->parent_realize(dev, errp); + cpu_reset(cs); } #ifndef CONFIG_USER_ONLY diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 157e57da0f..c9c8443cbd 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -138,9 +138,9 @@ static void rx_cpu_realize(DeviceState *dev, Error **errp) } qemu_init_vcpu(cs); - cpu_reset(cs); rcc->parent_realize(dev, errp); + cpu_reset(cs); } static void rx_cpu_set_irq(void *opaque, int no, int request) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index df167493c3..0f0b11fd73 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -254,6 +254,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) s390_cpu_gdb_init(cs); qemu_init_vcpu(cs); + scc->parent_realize(dev, &err); /* * KVM requires the initial CPU reset ioctl to be executed on the target * CPU thread. CPU hotplug under single-threaded TCG will not work with @@ -266,7 +267,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) cpu_reset(cs); } - scc->parent_realize(dev, &err); out: error_propagate(errp, err); } diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 61769ffdfa..656d71f74a 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -228,10 +228,10 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp) return; } - cpu_reset(cs); qemu_init_vcpu(cs); scc->parent_realize(dev, errp); + cpu_reset(cs); } static void superh_cpu_initfn(Object *obj) diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 133a9ac70e..a3610aecca 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -118,10 +118,10 @@ static void tricore_cpu_realizefn(DeviceState *dev, Error **errp) if (tricore_has_feature(env, TRICORE_FEATURE_131)) { set_feature(env, TRICORE_FEATURE_13); } - cpu_reset(cs); qemu_init_vcpu(cs); tcc->parent_realize(dev, errp); + cpu_reset(cs); } From patchwork Mon Sep 18 16:02:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724157 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1773202wro; Mon, 18 Sep 2023 09:04:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEKzMbIr3smYa7UsQpgkmY4Jx8vcu6z3fxl5YGHCTSkKE5i8B1QB9R4hSQRs4nfMjBLDjxD X-Received: by 2002:a05:622a:1f0a:b0:417:b55d:dfa0 with SMTP id ca10-20020a05622a1f0a00b00417b55ddfa0mr4642738qtb.0.1695053099634; Mon, 18 Sep 2023 09:04:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053099; cv=none; d=google.com; s=arc-20160816; b=SU4P/NfrFc29JgxUE3Vwq13xvhSB0w3/qbGvaOJXZFD6otqb2qG6ytWxdmFT2Hyb2x GmAqxb2dEDmxRhwoczrLzQgnSUObbU4VQ31vkG3KScNzqqZbj8NM0slK1+IZr2tEdDyk f6rTYrMgJj9h4eQknsBQ1AeCtqgWtqckcl27QFxnV18/hyzfVYqtTdLnKn1tAR4q3Gla wGD92jLWHtxrRym+Y2T2LgPXsuRFB8pntKo1bgm5xO2MpZ4sj5JGtfazWisTGOn5in47 JMbXlnQJpHI/wn0+X7UEcYZyZGCTlxmzZSksAtetEu1Hv92N59wb63JmTzNbykelzheS YZ4w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Rh71yvz4DZJTCq6SFL6CUf5QPqPF3br4cLaD1F+Juuo=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=K2DpyGaRtq1mH+k/OOHNqSeUn3paEJyqrqhJ9c/SqT0Yi/FOyRs42M0KcPMANOS0RP fRyx7iM8cByQq4zNk8qGVF2TTqOrs0KEt91qULZv7QwAOVpUQhkJ+gat6p0fwf13GgKo Dbswifkdvv6E5xqC6DcfqbCy/FZl8XVmPv6CAWcr0FhSZeT1BOp5OYcjabyTnSwMUtUM 68P0+pTe/zZKW2kvbYT+x0GVSTf5YBsRuxBhjyaCgsB3UFxpbkNINYuFf5VhmrRhXoGB PKCj86DwjPVdw3rg5cw2+u7Q+oDIa39gZAzlgrpXj82QUg5eieS0SDebzr4VpmDHO+Mi h+5w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qngJwTV2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id n8-20020a170906378800b0099cd008c1a4sm6609045ejc.136.2023.09.18.09.03.24 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:25 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 05/22] exec/cpu: Call qemu_init_vcpu() once in cpu_common_realize() Date: Mon, 18 Sep 2023 18:02:38 +0200 Message-ID: <20230918160257.30127-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=philmd@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org qemu_init_vcpu() is called in each ${target}_cpu_realize() before the call to parent_realize(), which is cpu_common_realizefn(). Call it once there. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/core/cpu-common.c | 3 +++ target/alpha/cpu.c | 2 -- target/arm/cpu.c | 2 -- target/avr/cpu.c | 1 - target/cris/cpu.c | 2 -- target/hexagon/cpu.c | 1 - target/hppa/cpu.c | 1 - target/i386/cpu.c | 4 +--- target/loongarch/cpu.c | 2 -- target/m68k/cpu.c | 2 -- target/microblaze/cpu.c | 2 -- target/mips/cpu.c | 2 -- target/nios2/cpu.c | 1 - target/openrisc/cpu.c | 2 -- target/ppc/cpu_init.c | 1 - target/riscv/cpu.c | 2 -- target/rx/cpu.c | 2 -- target/s390x/cpu.c | 1 - target/sh4/cpu.c | 2 -- target/sparc/cpu.c | 2 -- target/tricore/cpu.c | 1 - target/xtensa/cpu.c | 2 -- 22 files changed, 4 insertions(+), 36 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index ced66c2b34..a3b8de7054 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -204,6 +204,9 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) } } + /* Create CPU address space and vCPU thread */ + qemu_init_vcpu(cpu); + if (dev->hotplugged) { cpu_synchronize_post_init(cpu); cpu_resume(cpu); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 270ae787b1..eb78318bb8 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -82,8 +82,6 @@ static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - acc->parent_realize(dev, errp); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 6aca036b85..fc3772025c 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2277,8 +2277,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } } - qemu_init_vcpu(cs); - acc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 84d353f30e..d3460b3960 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -119,7 +119,6 @@ static void avr_cpu_realizefn(DeviceState *dev, Error **errp) error_propagate(errp, local_err); return; } - qemu_init_vcpu(cs); mcc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 079872a5cc..671693a362 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -152,8 +152,6 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - ccc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 7edc32701f..5b9bb3fe83 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -345,7 +345,6 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp) NUM_VREGS + NUM_QREGS, "hexagon-hvx.xml", 0); - qemu_init_vcpu(cs); mcc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 11022f9c99..49082bd2ba 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -131,7 +131,6 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); acc->parent_realize(dev, errp); #ifndef CONFIG_USER_ONLY diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 7faaa6915f..cb41d30aab 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7425,15 +7425,13 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) mce_init(cpu); - qemu_init_vcpu(cs); - /* * Most Intel and certain AMD CPUs support hyperthreading. Even though QEMU * fixes this issue by adjusting CPUID_0000_0001_EBX and CPUID_8000_0008_ECX * based on inputs (sockets,cores,threads), it is still better to give * users a warning. * - * NOTE: the following code has to follow qemu_init_vcpu(). Otherwise + * NOTE: the following code has to follow cpu_common_realize(). Otherwise * cs->nr_threads hasn't be populated yet and the checking is incorrect. */ if (IS_AMD_CPU(env) && diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index 8029e70e76..dc0ac39833 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -565,8 +565,6 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) loongarch_cpu_register_gdb_regs_for_features(cs); - qemu_init_vcpu(cs); - lacc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 2bc0a62f0e..3da316bc30 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -321,8 +321,6 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) m68k_cpu_init_gdb(cpu); - qemu_init_vcpu(cs); - mcc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 03c2c4db1f..1f19a6e07d 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -221,8 +221,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - version = cpu->cfg.version ? cpu->cfg.version : DEFAULT_CPU_VERSION; for (i = 0; mb_cpu_lookup[i].name && version; i++) { if (strcmp(mb_cpu_lookup[i].name, version) == 0) { diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 8d6f633f72..0aea69aaf9 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -492,8 +492,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) fpu_init(env, env->cpu_model); mvp_init(env); - qemu_init_vcpu(cs); - mcc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 876a6dcad2..7a92fc5f2c 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -216,7 +216,6 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) } realize_cr_status(cs); - qemu_init_vcpu(cs); /* We have reserved storage for cpuid; might as well use it. */ cpu->env.ctrl[CR_CPUID] = cs->cpu_index; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index cd25f1e9d5..e4ec95ca7f 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -141,8 +141,6 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - occ->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 7ab5ee92d9..e2c06c1f32 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6833,7 +6833,6 @@ static void ppc_cpu_realize(DeviceState *dev, Error **errp) init_ppc_proc(cpu); ppc_gdb_init(cs, pcc); - qemu_init_vcpu(cs); pcc->parent_realize(dev, errp); diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 7566757346..4f7ae55359 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1531,8 +1531,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) } #endif - qemu_init_vcpu(cs); - mcc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/rx/cpu.c b/target/rx/cpu.c index c9c8443cbd..089df61790 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -137,8 +137,6 @@ static void rx_cpu_realize(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - rcc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 0f0b11fd73..416ac6c4e0 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -252,7 +252,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) qemu_register_reset(s390_cpu_machine_reset_cb, S390_CPU(dev)); #endif s390_cpu_gdb_init(cs); - qemu_init_vcpu(cs); scc->parent_realize(dev, &err); /* diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 656d71f74a..e6690daf9a 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -228,8 +228,6 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - scc->parent_realize(dev, errp); cpu_reset(cs); } diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 130ab8f578..2fdc95eda9 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -782,8 +782,6 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) return; } - qemu_init_vcpu(cs); - scc->parent_realize(dev, errp); } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index a3610aecca..0142cf556d 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -118,7 +118,6 @@ static void tricore_cpu_realizefn(DeviceState *dev, Error **errp) if (tricore_has_feature(env, TRICORE_FEATURE_131)) { set_feature(env, TRICORE_FEATURE_13); } - qemu_init_vcpu(cs); tcc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index acaf8c905f..300d19d45c 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -174,8 +174,6 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs; - qemu_init_vcpu(cs); - xcc->parent_realize(dev, errp); } From patchwork Mon Sep 18 16:02:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724162 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774123wro; Mon, 18 Sep 2023 09:06:22 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEujyCMPVE8MuzF8ignnZYXf74CMWqVIbFwouKFoMIZo4sMPEBSRPEg22B0WPmxNsRveLaE X-Received: by 2002:a05:620a:28c1:b0:773:a770:bd9d with SMTP id l1-20020a05620a28c100b00773a770bd9dmr11562205qkp.16.1695053182120; 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id o15-20020a1709061d4f00b0099cf840527csm6708419ejh.153.2023.09.18.09.03.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:30 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 06/22] exec/cpu: Call cpu_remove_sync() once in cpu_common_unrealize() Date: Mon, 18 Sep 2023 18:02:39 +0200 Message-ID: <20230918160257.30127-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org While create_vcpu_thread() creates a vCPU thread, its counterpart is cpu_remove_sync(), which join and destroy the thread. create_vcpu_thread() is called in qemu_init_vcpu(), itself called in cpu_common_realizefn(). Since we don't have qemu_deinit_vcpu() helper (we probably don't need any), simply destroy the thread in cpu_common_unrealizefn(). Note: only the PPC and X86 targets were calling cpu_remove_sync(), meaning all other targets were leaking the thread when the vCPU was unrealized (mostly when vCPU are hot-unplugged). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/core/cpu-common.c | 3 +++ target/i386/cpu.c | 1 - target/ppc/cpu_init.c | 2 -- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index a3b8de7054..e5841c59df 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -221,6 +221,9 @@ static void cpu_common_unrealizefn(DeviceState *dev) /* NOTE: latest generic point before the cpu is fully unrealized */ cpu_exec_unrealizefn(cpu); + + /* Destroy vCPU thread */ + cpu_remove_sync(cpu); } static void cpu_common_initfn(Object *obj) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index cb41d30aab..d79797d963 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7470,7 +7470,6 @@ static void x86_cpu_unrealizefn(DeviceState *dev) X86CPUClass *xcc = X86_CPU_GET_CLASS(dev); #ifndef CONFIG_USER_ONLY - cpu_remove_sync(CPU(dev)); qemu_unregister_reset(x86_cpu_machine_reset_cb, dev); #endif diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index e2c06c1f32..24d4e8fa7e 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6853,8 +6853,6 @@ static void ppc_cpu_unrealize(DeviceState *dev) pcc->parent_unrealize(dev); - cpu_remove_sync(CPU(cpu)); - destroy_ppc_opcodes(cpu); } From patchwork Mon Sep 18 16:02:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724168 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774805wro; Mon, 18 Sep 2023 09:07:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEMFPfc2IumnqryYsm7Z9GU9/tPTSXUqSO/ZcmGjYRTgZCsXgXKg86TgOkhkPErmtakkXyZ X-Received: by 2002:a05:620a:2ac4:b0:772:63e5:5ab8 with SMTP id bn4-20020a05620a2ac400b0077263e55ab8mr8975146qkb.3.1695053246145; Mon, 18 Sep 2023 09:07:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053246; cv=none; d=google.com; s=arc-20160816; b=VdEr0bQ0lGkJbwbBG9Y3MEyHrypwCLte9okR4o5jsOuDzL9DOATQ9NceFb1pWN2F3l emWTvKK6K4ovDt4KQMkNY72DQRmADb9CEWW/j9o9hZMBFw53Sw2sBgjTLzoELggWKS5S BWyQ6F8i7KK/uXM+kGgGvWyUaGXd+gJUyHLxM2IYUNme0GV6HsNKEdQuT7S2Qr2pQIIp 8924O/UggxVk5MghQn653dtdXLU+VB1JOA1W9RE+97IUiwQ25UQYLwX6wWgIX89NmTiF NH0unleeDOXR7pjXjO80nmiysqSUekb9G0XldAsYJankjWW24+tzUuSlTkbfu82WRRBI M7dg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kTBjPJZgBk13UdBUXwIisPTyIoW0XcuNCZty165NaD0=; fh=9HVYub9IUdGxYx1Tdl+8JO5e/0dtoki6g0y7v7HxI1I=; b=YXCsk8c7cXaF9LJJ/bTBVAagah68JIdglprErp5VBnJPE8fBMaqmNOMnBBxO+kGJyi lx30yJk+DIGWuqSUfOCIsN14nQD3WwCpPUPT+2xx/dIinUF15s9BLu8IcYHm3MBlFQFh ia/bc0etLyF8B2zRftpqdnr1fRU7148jVCMqjBsuKvOuAF7aKRZLve2RTVdJzrkQU4Hr AKkYla+Xr99zZgJ7SUPQQYmDr/yktAOHfVlDh/ZRYYBp/6tRL5iPCCWzRIfY3FGiowMz ARLl8jWIi3Q6V3chnSVpB49TlzzRhg3kPEqOnz/PMWqmZ15o+kd6khD194KQXBv5KrBC h2UA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QFuhLp+w; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id eh16-20020a0564020f9000b005256aaa6e7asm1688491edb.78.2023.09.18.09.03.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt , xianglai li , "Salil Mehta" , Igor Mammedov , Ani Sinha , Bibo Mao Subject: [PATCH 07/22] exec/cpu: Introduce the CPU address space destruction function Date: Mon, 18 Sep 2023 18:02:40 +0200 Message-ID: <20230918160257.30127-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::536; envelope-from=philmd@linaro.org; helo=mail-ed1-x536.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: xianglai li Introduce new function to destroy CPU address space resources for cpu hot-(un)plug. Co-authored-by: "Salil Mehta" Cc: "Salil Mehta" Cc: Xiaojuan Yang Cc: Song Gao Cc: "Michael S. Tsirkin" Cc: Igor Mammedov Cc: Ani Sinha Cc: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Cc: Marcel Apfelbaum Cc: "Philippe Mathieu-Daudé" Cc: Yanan Wang Cc: "Daniel P. Berrangé" Cc: Peter Xu Cc: David Hildenbrand Cc: Bibo Mao Signed-off-by: xianglai li Message-ID: <3a4fc2a3df4b767c3c296a7da3bc15ca9c251316.1694433326.git.lixianglai@loongson.cn> --- include/exec/cpu-common.h | 8 ++++++++ include/hw/core/cpu.h | 1 + softmmu/physmem.c | 24 ++++++++++++++++++++++++ 3 files changed, 33 insertions(+) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 41788c0bdd..eb56a228a2 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -120,6 +120,14 @@ size_t qemu_ram_pagesize_largest(void); */ void cpu_address_space_init(CPUState *cpu, int asidx, const char *prefix, MemoryRegion *mr); +/** + * cpu_address_space_destroy: + * @cpu: CPU for which address space needs to be destroyed + * @asidx: integer index of this address space + * + * Note that with KVM only one address space is supported. + */ +void cpu_address_space_destroy(CPUState *cpu, int asidx); void cpu_physical_memory_rw(hwaddr addr, void *buf, hwaddr len, bool is_write); diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 92a4234439..c90cf3a162 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -366,6 +366,7 @@ struct CPUState { QSIMPLEQ_HEAD(, qemu_work_item) work_list; CPUAddressSpace *cpu_ases; + int cpu_ases_ref_count; int num_ases; AddressSpace *as; MemoryRegion *memory; diff --git a/softmmu/physmem.c b/softmmu/physmem.c index 18277ddd67..c75e3e8042 100644 --- a/softmmu/physmem.c +++ b/softmmu/physmem.c @@ -761,6 +761,7 @@ void cpu_address_space_init(CPUState *cpu, int asidx, if (!cpu->cpu_ases) { cpu->cpu_ases = g_new0(CPUAddressSpace, cpu->num_ases); + cpu->cpu_ases_ref_count = cpu->num_ases; } newas = &cpu->cpu_ases[asidx]; @@ -774,6 +775,29 @@ void cpu_address_space_init(CPUState *cpu, int asidx, } } +void cpu_address_space_destroy(CPUState *cpu, int asidx) +{ + CPUAddressSpace *cpuas; + + assert(asidx < cpu->num_ases); + assert(asidx == 0 || !kvm_enabled()); + assert(cpu->cpu_ases); + + cpuas = &cpu->cpu_ases[asidx]; + if (tcg_enabled()) { + memory_listener_unregister(&cpuas->tcg_as_listener); + } + + address_space_destroy(cpuas->as); + + cpu->cpu_ases_ref_count--; + if (cpu->cpu_ases_ref_count == 0) { + g_free(cpu->cpu_ases); + cpu->cpu_ases = NULL; + } + +} + AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx) { /* Return the AddressSpace corresponding to the specified index */ From patchwork Mon Sep 18 16:02:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724156 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1772754wro; Mon, 18 Sep 2023 09:04:28 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHYsKOzXNlzEWdoevaY0f7oosJVAYkT1ThT9kL6DZ+c2Skds6dC2OY1U7yPQkBalvMv9XOl X-Received: by 2002:a0c:cdc2:0:b0:64c:8b79:5b24 with SMTP id a2-20020a0ccdc2000000b0064c8b795b24mr8918515qvn.35.1695053067699; Mon, 18 Sep 2023 09:04:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053067; cv=none; d=google.com; s=arc-20160816; b=oh3SUMvN4KTzgJJks4wh5lsVQHeq3LK1Nz/KaGTdUgGXRqZ93sKmIDcQeRphOrtVpz gppNOwBPo9EK0ya3AgDfHPDZ9eifNMKGKp6C41ljL3mGexZhyr7Y5MjWmmxXK31l+M2P h7zTP1Ih+18ZxdDgciw4PsXRTZ7AnWb1r83tEnrsynNmICBm5rQO5x/e7kn1bZ3erDuo Ps2L/+1N1RW6LbYHgrrEikXeH+bj30/0gMhsGH90xbADf8HiGYte0GK2uhvQQ/sAD+Jb 0RXnTTvky5PRGm9A6z4dBoqOeFi59O5/yTQvh84jjS3qetu/SoxLJaiTBCPBr713+P90 leOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=fSCS2zUfZAE6ogrinmDPrOXdED/BfB+BaLaX0u0zcLg=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=t3mrAhx2WM1tbCWN7n0XpWt7uqVvd2bW5UIcvgwnz0Ih+Yy9dWW7G93LbrLRWdUUSI hGmd8VMR6rkGLG/aan8QLFZ/K9kcd8eqjNVtz4kTUy/wZB5n02lj+bPmRlVuhq64hC5M jYLf37O7n+vdLqWEapITqEwgNY2GuwECWEhBzCRVK7ISAVF5VWpP/dgxtTY3acMeUf46 EKHFe/0FsW+MZy4wpB+DDOzEtEe4rViXlLaphm0TkWKwRSlblA9HKA59MMyIi44ghfHj dy7bt4S+r6u4FwkgnL3thXmyqKC7+aJOePt1wA1cUJltIzrob47MHjKPt7ky2s1JZuWr uIjQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=I1pJwwFX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id ck9-20020a0564021c0900b005231e3d89efsm2684962edb.31.2023.09.18.09.03.39 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:40 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 08/22] exec/cpu: RFC Destroy vCPU address spaces in cpu_common_unrealize() Date: Mon, 18 Sep 2023 18:02:41 +0200 Message-ID: <20230918160257.30127-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62d; envelope-from=philmd@linaro.org; helo=mail-ej1-x62d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We create at least one vCPU address space by default in qemu_init_vcpu(), itself called in cpu_common_realizefn(). Since we don't have qemu_deinit_vcpu() helper (we probably don't need any), simply destroy all the address spaces in cpu_common_unrealizefn(), *after* the thread is destroyed. Note: all targets were leaking the vCPU address spaces upon vCPU unrealize (like hot-unplugged actions). Signed-off-by: Philippe Mathieu-Daudé --- hw/core/cpu-common.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index e5841c59df..35c0cc4dad 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -224,6 +224,11 @@ static void cpu_common_unrealizefn(DeviceState *dev) /* Destroy vCPU thread */ cpu_remove_sync(cpu); + + /* Destroy CPU address space */ + for (unsigned idx = 0; idx < cpu->num_ases; idx++) { + cpu_address_space_destroy(cpu, idx); + } } static void cpu_common_initfn(Object *obj) From patchwork Mon Sep 18 16:02:42 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724161 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1773635wro; Mon, 18 Sep 2023 09:05:38 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEnrLieXGv0x48+Gl9i0tFjtgT68G+iSVZP8No6VO1o0Q0ntbH6B6fLBt+7AJFoOmvL8dt2 X-Received: by 2002:a05:620a:254e:b0:76c:8d5f:5954 with SMTP id s14-20020a05620a254e00b0076c8d5f5954mr11151850qko.70.1695053137729; Mon, 18 Sep 2023 09:05:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053137; cv=none; d=google.com; s=arc-20160816; b=eEAqg5M5tcOTgnG+xImKJxUpX9istNb6Hd7/mzF/GbK7u9DHtWKbwp9pn8MCfTAwPC C0bGwZYWZj4WpRkyq0rfmGr5MDCLyknFj8YVxQ3gYBoRMdG42EYQ8N8kYk2LSrkicQBE 0I7GQw6SiMWPoW1lsV5FM+s+/vBLiEvmd2p524DwjOpGYMXp32BjaF3vRz6T2JK6zLKA uAe1obeg9Zll8ylxa0R4/59HEH1zSLs4iUydH4VdhPJLaXYShqPwdOcVK7hEFQC4dJvp X7+TrUBlYDx3GlYUP8jQO2YB2q4HGs0w+qhEy/bLzXhRvpjaEVuvwvBqAMYw39jcq8R7 YrZA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hSVRQGIJEmce1VSEx8yaDe0o7AipRr5BDfgLzGOyz48=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=0/Nv1Uqtsz6YwytZxwv5T+N5/9h44nkb8pDhyL1W2/yScp9gHpFTOj3lYGqULpT/K3 6E3hUjoL3gRrbJVwMXMq1gLcsj97onF6U7e5542+ItpIVp4yeEMZ8CXttcRVytElyTFE Bc03LxhpSFKMt98Z0j5g186W3yESMrx60XHn6P7gouGFS+nC9WYK/491R4J6mZLhaH4P Z6yA2ONJ3B8HW6osoVWlvdTbn19Qv0KDx45LRdbI+nleb2Sb5rykcEE13pLm9o2kIUwj aPwUuAsE2Rwm3tMA2pDB4cDOzvQP/4sistdtt/mfiyg2inIo4renAJ3wKFLbBqI7AKYT shDA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=q5JpHh6j; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id g5-20020a170906394500b0099bc038eb2bsm6614676eje.58.2023.09.18.09.03.44 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:45 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 09/22] target/arm: Create timers *after* accelerator vCPU is realized Date: Mon, 18 Sep 2023 18:02:42 +0200 Message-ID: <20230918160257.30127-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Architecture specific hardware doesn't have a particular dependency on the accelerator vCPU (created with cpu_exec_realizefn), and can be initialized *after* the vCPU is realized. Doing so allows further generic API simplification (in few commits). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/cpu.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index fc3772025c..46d3f70d63 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1748,7 +1748,15 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) return; } } +#endif + cpu_exec_realizefn(cs, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } + +#ifndef CONFIG_USER_ONLY { uint64_t scale; @@ -1776,12 +1784,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } #endif - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - arm_cpu_finalize_features(cpu, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); From patchwork Mon Sep 18 16:02:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724160 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1773580wro; Mon, 18 Sep 2023 09:05:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGHet3EKkAVWX3NKryVxNQnim2WJ9QlYAX8SAZfLCMqG8lSKdqXPmMkMucY/ZyJMBybx05Z X-Received: by 2002:a0c:aacb:0:b0:63f:7c62:63dd with SMTP id g11-20020a0caacb000000b0063f7c6263ddmr7062460qvb.46.1695053133482; Mon, 18 Sep 2023 09:05:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053133; cv=none; d=google.com; s=arc-20160816; b=d1fQu3/siHwSG/1sLAaAp1TAqupJ77bUQCKCBV7+kmqLKTu/EdR+XADucpCE781PcL E7Rg8nMniEO8GJE5+YR+J5fqNMyBLPMiN+Muu6yqrW9vgStz4ONMevo5wXNfMlDfr3Oh BfYllFAJnUTSxqt7At/FZlyK+X4z5sa3Qv3G6UOxUgPoDi9aV8/GM74XfQmxIjxnM+y2 WAtUUQh52z2rL5dN/odJqwWLJBiesopMZMC6Whf6rL6dqKVks166+ELkPzsNUZT86wrS RAN/8freEN48wlQCU2APN1foxQoGMNNK0cwY/RhnKAMpQ494SSWMvNrPAnyFfnmyJ38s 7vrQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=dCQpcHiGYl2b5PMw9sHU7Xzs4il9aZ3go8echWC+OUY=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=gZF9IGd/AxW72q/GBecBAIt9kd1+JbggmAsMF5gytGHlusr7Po9qnE/KpXLEnYS8Bt SomYV5wm6jH17FAvjZTXc97vqAHW7BfcDbau//nowL6A53G3tnjqXk/hJYfRlgo2rMxY oweWaATUh8KUdYMpePt2uswziQvGQZ2ITPnHZFbPjFH5W+U8qGrCvGqp8LVt3Dt1dJpf LnSQEuIeAWa0Tik7IsIWsbHxlJz7ismxhHIrtgzq+j69K4YqDqECzFqmery37ooXDHf7 AEcJ80F6wM8TW3gbl90W1adg2y23T5RbS95m1047eYXU8AFE4m6al9VYWwZqkANZTjSP dKeA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FQYTnb2i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id n3-20020a50cc43000000b0053132e5ea61sm913803edi.30.2023.09.18.09.03.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:51 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 10/22] target/hppa: Create timer *after* accelerator vCPU is realized Date: Mon, 18 Sep 2023 18:02:43 +0200 Message-ID: <20230918160257.30127-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Architecture specific hardware doesn't have a particular dependency on the accelerator vCPU (created with cpu_exec_realizefn), and can be initialized *after* the vCPU is realized. Doing so allows further generic API simplification (in few commits). Signed-off-by: Philippe Mathieu-Daudé --- target/hppa/cpu.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 49082bd2ba..b0d106b6c7 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -131,8 +131,6 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) return; } - acc->parent_realize(dev, errp); - #ifndef CONFIG_USER_ONLY { HPPACPU *cpu = HPPA_CPU(cs); @@ -140,6 +138,8 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) hppa_cpu_alarm_timer, cpu); } #endif + + acc->parent_realize(dev, errp); } static void hppa_cpu_initfn(Object *obj) From patchwork Mon Sep 18 16:02:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724163 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774419wro; Mon, 18 Sep 2023 09:06:53 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEHTo8MF65xJrOYIaSFGIAMJqA2J5qusIKnnafvKNDVnFSHKmWDZTpPt3T9qvVURZaUSTpt X-Received: by 2002:a05:6102:1344:b0:44e:9113:ac58 with SMTP id j4-20020a056102134400b0044e9113ac58mr4842979vsl.6.1695053212823; Mon, 18 Sep 2023 09:06:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053212; cv=none; d=google.com; s=arc-20160816; b=R/jmEbcAFzouFth6JOu1OILaKfp7/dzjStQCJ8e8slOqmtYOF1QH/1F4i+4FAO3Hb3 L8H4l8Z7muvW3Bud9l7BWo//SSMcgsu3g3Zgs074XKW17XPKrEBpfl+jF6WA50BTl+0T FCOun4sstDINSMnCQCuDDZeH/VywR0MV9h0U/nfECJRo38lEeKn5ECTSfhbHnCLpXN90 su0Yp4PGEJLgqdBkLD7Ty5jNIM8ymR8LO6bk7DqYqfslnNq4yIW/EBedZVfw7ZEi1qRk 82V2w1o4VQlisPQF83JCGGlqzRXtStcvuRdvfTv6iyE3gDP9Qs813zLGdxE9oYwDzjMO M2Jg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=I+18fO8c7Dk0qCgNhOL8JkONKbHnDNHi1cgc68a1fr4=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=ITpC5cS+MKiTllsioMa2i8cDANPICkOZtlY6MrXT+/+VLwDFQUfLSGN6y24Z9jqeCJ sx11ZvoXlzeZhcgy7kmCIyrPRdD0CJZCL1BMcjWvKL4ynx4OWeZ+/oLxl5CkHCbqQV6l ahKUWzl2mfHcSuXhq0lDpoN65dBNAOkcdsuQzY0zZ83nPVBqmHqAWybINT6CUdrT7RY1 F4OkwexHz3ew3d7O0PV3gGOuZB04U6M4VQNuK6YRdLYlCswBWwwqgY8UUZfPDAJvrBiP 9SFAaJCfVIQbjcR5Z4cSPAHjrI3hChle5MBbKNZdV67joWwMhIac6WqQKVljaZOKwUae EfWg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UsYJ+7hp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id qt11-20020a170906eceb00b009a19fa8d2e9sm6481188ejb.206.2023.09.18.09.03.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:03:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 11/22] target/nios2: Create IRQs *after* accelerator vCPU is realized Date: Mon, 18 Sep 2023 18:02:44 +0200 Message-ID: <20230918160257.30127-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=philmd@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Architecture specific hardware doesn't have a particular dependency on the accelerator vCPU (created with cpu_exec_realizefn), and can be initialized *after* the vCPU is realized. Doing so allows further generic API simplification (in few commits). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/nios2/cpu.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index 7a92fc5f2c..f500ca7ba2 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -201,14 +201,6 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(dev); Error *local_err = NULL; -#ifndef CONFIG_USER_ONLY - if (cpu->eic_present) { - qdev_init_gpio_in_named(DEVICE(cpu), eic_set_irq, "EIC", 1); - } else { - qdev_init_gpio_in_named(DEVICE(cpu), iic_set_irq, "IRQ", 32); - } -#endif - cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -220,6 +212,14 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) /* We have reserved storage for cpuid; might as well use it. */ cpu->env.ctrl[CR_CPUID] = cs->cpu_index; +#ifndef CONFIG_USER_ONLY + if (cpu->eic_present) { + qdev_init_gpio_in_named(DEVICE(cpu), eic_set_irq, "EIC", 1); + } else { + qdev_init_gpio_in_named(DEVICE(cpu), iic_set_irq, "IRQ", 32); + } +#endif + ncc->parent_realize(dev, errp); cpu_reset(cs); } From patchwork Mon Sep 18 16:02:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724165 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774507wro; Mon, 18 Sep 2023 09:06:59 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGQFfbFXEMx+MYTukN3RUfmeOK0ZPsVAQY+P0GUkUIVIbPThkqiTTzAl+z5hYP3rZT+pjRs X-Received: by 2002:a0c:cc0a:0:b0:656:79a:ddb2 with SMTP id r10-20020a0ccc0a000000b00656079addb2mr7666719qvk.42.1695053219341; Mon, 18 Sep 2023 09:06:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053219; cv=none; d=google.com; s=arc-20160816; b=rtVSyi7GSHvDP8mPlMLimru0MmDZTOc9cpGf5TjggRugg1+t6QgMU03WBZqZMjKwtQ VhIfHun0g6rhG+cJ83q/lX7c6nAZa1fUc56jUECEi3gVRj+uHYO6bFnUw3+5kmjipZ55 chCiCH6WKep4g9Sct+j1btmeo31R1SmD3MSpe4Xf3/8acEUQu2MgxOKXnYdvtDBdUPpp SwWMF50DnAL1zScyH3mI+6HEa4OGLB3vUbSL+y5tvrnMo+Os9bfaXZ0ICr5He3HXN8WZ A8ViaziLhOicD+s/zeGdGNAcfxF2tvGujnMfWY8Ci2XtXWw43UIG09USt5TYVZx6WrSE 0lpw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DBZjR8eqTRO2FcjHJbn6UW72+cRDsZ12eh5J24aMJRM=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=L4M/GJ6vlJVakt99NoQvj8pdwfdP+miO0t5Y8sh96W3cbntEw6tw+AQaZ+GP6jNFoI rf31AAEciOHGVXO9se5CJNbpZOSkEwzSu2FL83xuKOnzyhRj7VQtCc3a9Y9zxbD0aB7x 5Qe6mQvi8JunnBh5+1x7SkOPnQXh6qxs2SgUhploNSmE7j3JGIdY5ucu3V9z2mBuYOwJ /071ZmbgUjtTnr+dT0oGUieBADEf07ppilZBholWg4U8kD2Mv/OJ9U8arLVfpeGDi8il v6ALwP452w84XKEFfnoo+n36ztw0GslGUXBsjWMigQPEsnXEgeC8UQT5lwBMt8EblS3C LRKg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ULAfeQ4y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id z15-20020a170906240f00b0099bd1ce18fesm6723198eja.10.2023.09.18.09.04.01 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:02 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 12/22] target/mips: Create clock *after* accelerator vCPU is realized Date: Mon, 18 Sep 2023 18:02:45 +0200 Message-ID: <20230918160257.30127-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::532; envelope-from=philmd@linaro.org; helo=mail-ed1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Architecture specific hardware doesn't have a particular dependency on the accelerator vCPU (created with cpu_exec_realizefn), and can be initialized *after* the vCPU is realized. Doing so allows further generic API simplification (in few commits). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/mips/cpu.c | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 0aea69aaf9..7c81e6c356 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -464,20 +464,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); Error *local_err = NULL; - if (!clock_get(cpu->clock)) { -#ifndef CONFIG_USER_ONLY - if (!qtest_enabled()) { - g_autofree char *cpu_freq_str = freq_to_str(CPU_FREQ_HZ_DEFAULT); - - warn_report("CPU input clock is not connected to any output clock, " - "using default frequency of %s.", cpu_freq_str); - } -#endif - /* Initialize the frequency in case the clock remains unconnected. */ - clock_set_hz(cpu->clock, CPU_FREQ_HZ_DEFAULT); - } - mips_cp0_period_set(cpu); - cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -492,6 +478,20 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) fpu_init(env, env->cpu_model); mvp_init(env); + if (!clock_get(cpu->clock)) { +#ifndef CONFIG_USER_ONLY + if (!qtest_enabled()) { + g_autofree char *cpu_freq_str = freq_to_str(CPU_FREQ_HZ_DEFAULT); + + warn_report("CPU input clock is not connected to any output clock, " + "using default frequency of %s.", cpu_freq_str); + } +#endif + /* Initialize the frequency in case the clock remains unconnected. */ + clock_set_hz(cpu->clock, CPU_FREQ_HZ_DEFAULT); + } + mips_cp0_period_set(cpu); + mcc->parent_realize(dev, errp); cpu_reset(cs); } From patchwork Mon Sep 18 16:02:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724173 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1777210wro; Mon, 18 Sep 2023 09:11:20 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHpvK/Sids6CCd/6CZj/gKYpS5OweKioiAQM564mCgK1G/BE5k4NkxGFF91YANJ6v5lX0Yy X-Received: by 2002:a05:6808:182:b0:3a3:6e43:e681 with SMTP id w2-20020a056808018200b003a36e43e681mr10473728oic.58.1695053479852; Mon, 18 Sep 2023 09:11:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053479; cv=none; d=google.com; s=arc-20160816; b=s90WvSDfd8HpFG0oeum1pnDy1xq1s1cY8O+ghIN/5FDBNIswUUbeIubcHyPYO1zFeF opSiUHKlZ9BRRmAJ1u2JDzzg/ydtZBy8NTsWp1wViQk3ocn8Q+3LmZPeJWiUCEAETy6V e0W8WrlmqmIYpr/b0s7aiN2pilc5gCggNlyZmwE2HsH+9wAkwERZ4h3GROI0yHJJRGyV F7YZrD9s4G6xAd2J+HmlcPBYfj8zFKkW2MMc42e661hWvKXerAMkHlazQEH3c9YM+wlu 3w+++GkkNSygZgC8IhdBvqXjLPuzlGzjzYw1DdIyBhRkrMngIQ8JmME6AAxkB7bmzisc ZqPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=YpBrxdgyPGajszRQj4tnQ2gfsy466T4SLwv71ztnz3k=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=uYrGpdxAkTSQf5sogC6XBAJ1PLkAq8C3WrZ6CuB9RbrMl+BVhfo9eo2OMY3V0L3f+h A069+wadIlN1E1gJCtxVifFZbNWzw6UFknA5DgyeWLalCjny7wqKoDdxfWl97Fu1xMt/ BIVjAKiAkwRi68Tef33u/mOINaUXnG7LkM9b6JWUw90bIzvP+TOOkVcr4j1JSGvd4+Wc xyC9h9YmjDd5BUgVz6hU9WWZ1YCHAGea9ibyUQaYXCax+XflpesqU8TTpegThCpTV3N1 IRHJ2DO7/mJLB/1k/UKBQ0b4fZCyD3ZNWUNtWqBL79HraFuKI2dVwkwvaNi7Ox8MDIjs 7Iuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Gr++Q9e3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id n4-20020a170906088400b009928b4e3b9fsm6613541eje.114.2023.09.18.09.04.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:07 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 13/22] target/xtensa: Create IRQs *after* accelerator vCPU is realized Date: Mon, 18 Sep 2023 18:02:46 +0200 Message-ID: <20230918160257.30127-14-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philmd@linaro.org; helo=mail-ed1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Architecture specific hardware doesn't have a particular dependency on the accelerator vCPU (created with cpu_exec_realizefn), and can be initialized *after* the vCPU is realized. Doing so allows further generic API simplification (in few commits). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/xtensa/cpu.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 300d19d45c..bbfd2d42a8 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -162,10 +162,6 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev); Error *local_err = NULL; -#ifndef CONFIG_USER_ONLY - xtensa_irq_init(&XTENSA_CPU(dev)->env); -#endif - cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -174,6 +170,10 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs; +#ifndef CONFIG_USER_ONLY + xtensa_irq_init(&XTENSA_CPU(dev)->env); +#endif + xcc->parent_realize(dev, errp); } From patchwork Mon Sep 18 16:02:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724167 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774627wro; Mon, 18 Sep 2023 09:07:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFh1YAutIuznu4Jj54kTEj3TpFK3ZyAqPtpUuaepdIi2K2Or76f5uvqNbvkvuA8hQGYpTeb X-Received: by 2002:a0c:c20e:0:b0:649:cbd0:8124 with SMTP id l14-20020a0cc20e000000b00649cbd08124mr8543123qvh.36.1695053230719; Mon, 18 Sep 2023 09:07:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053230; cv=none; d=google.com; s=arc-20160816; b=kocVNckGtdQGOJJ9/ul1/Utmk/1oBQfCRuOxbuu2ptzx3NqSgCivrwO4eCIcynRMo6 ZLBJARa+yVnuXf/JXsTwG5OfQGEJa1dwhLC63o7Zfo90wKeT0dUaYciVZ72usfxGf8Bu DstO7nhlrw50hPR+EnSetCeQevmWfmOb2iv42tQAg7Y25s/bL4SVGRi7bqnqNdFBYAj9 sDz8LcjUF6AW1qLb7GtoHTX5RZlPbE8hrl5f9jWnbFlt5z7nS6vWTVgbuBrHx9Fi/mID tkVDZOyQ7WyY7ilCsC04tUb9w75D6DnQFbq7cE6axp8sPdH15VXaIplr0tt4yQ8T52SE /7hg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wbLvVhCdjkLoKVSI3XlIe8h3b/C8JwK6Lt4fUZyBeQw=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=Hpiei233RaIpFMh/sLj6UKaItxqe/5qJmeRpQh6MMg6jRuJjGwL4SZDVEPoCWd6kgo p4dwqbfSuLA82TkoTOmrEkIhx6t7aa3MALJpQAYcrxkD6hGe+vbStbND3wO/WDYKLU9S 3BYtv4Lbkb/LrvBpNfbTaAnj7LXL+Q+4/Zwitdz1rNxOBuNAkFJ+Hr/2of/Qf9fF68Qm M3tu34AMqGfAW9/lYAs7eHEsN0hTxKYqqFGrSH40LUQf7drK9iNOBxdMmMYc28y1TuRa BnCUxCBwh7+pDxmHQ02oh1e9R1Mmxupu9IYvWDAhM0KSzGTXAH93vsmtxHNKWtKpXUdS kZWQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=V0iqI4zg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id n26-20020a170906119a00b00997cce73cc7sm6586020eja.29.2023.09.18.09.04.11 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 14/22] target/sparc: Init CPU environment *after* accelerator vCPU is realized Date: Mon, 18 Sep 2023 18:02:47 +0200 Message-ID: <20230918160257.30127-15-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org These fields from the environment don't affect how accelerators create their vCPU thread. We can safely reorder them *after* the cpu_exec_realizefn() call. Doing so allows further generic API simplification (in the next commit). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/sparc/cpu.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 2fdc95eda9..88157fcd33 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -756,6 +756,12 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) SPARCCPU *cpu = SPARC_CPU(dev); CPUSPARCState *env = &cpu->env; + cpu_exec_realizefn(cs, &local_err); + if (local_err != NULL) { + error_propagate(errp, local_err); + return; + } + #if defined(CONFIG_USER_ONLY) if ((env->def.features & CPU_FEATURE_FLOAT)) { env->def.features |= CPU_FEATURE_FLOAT128; @@ -776,12 +782,6 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) env->version |= env->def.nwindows - 1; #endif - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - scc->parent_realize(dev, errp); } From patchwork Mon Sep 18 16:02:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724171 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1776781wro; Mon, 18 Sep 2023 09:10:39 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGeRrHkR+WjAAHiFBKZCr3MwElNAzTmwc4jUY3z/jautrKM7G+8hpPMkX0Rh3XnhYp20Ax+ X-Received: by 2002:a0c:9701:0:b0:656:51b9:990e with SMTP id k1-20020a0c9701000000b0065651b9990emr5358408qvd.57.1695053438935; Mon, 18 Sep 2023 09:10:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053438; cv=none; d=google.com; s=arc-20160816; b=XR5WtOJo47gpiJ/QTXXwiaTGsJBXYADqkaj8zFfYmIkFOxeytx1KKkICDD02qbzpkT 0rxDNplOwhEyPgStRhEQgOYQ+7Kc3o8EQJS0jxdjb/wVpIEzKwxos16t5NEQT9kiAMLT zDGP59C6HZjg3CYgAcRat4mMdvAB4dGRLBNusYyz0yUo1s1bbloriVqFKQsitjFRgYod wqrY2nydIAHL4W4EFKZeRzSU1LJgblIrI5cOP8/Jmux6DA3BIYpTRsfJi94xShbb3Z53 NqjYewsyJefYe06soKuwXeR73kGvk4IYg/Qzlw7LvdQCxPkYDRhcbZ9wtQkGkMa7NPQg usng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NjaIM1Qc6nHbnxZLIT5jjyB717NwyoCy1EteOD4KAlE=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=Lr/ya5jqrCpF9hH80cl7l8Di1MddwOKrVZojoqjUgPJacvHriOvMT3ph0IpNgj02WM dWd8ZWgR8Qu7UM7CgrdkDt2XqipUj3h6Cd2SW7pKJvCdJpqAnrJTB8QS3zdptGnfSuXx cSS2dA6rGpC5Mk78mr87Mumrf6M67o0BKg2+0LDK06F24MrOJIdilR/iHhqA1g7SV5fW 94G2d8fDEoHLPA+8V032h3DtnftqiVAGelhsPVbG8N2C7jkf7HSF+bmxJ3+B2ZwNmVCi XooTj+RUn62OAP8mmvqxasgNmrQHqrjjn+j6iVdHcVIMNI/p/xWuVLVVKZUx12GptiOk UNGQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=t0llDNmN; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id f13-20020a170906390d00b00982a92a849asm6628019eje.91.2023.09.18.09.04.17 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:18 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 15/22] exec/cpu: Introduce CPUClass::verify_accel_features() Date: Mon, 18 Sep 2023 18:02:48 +0200 Message-ID: <20230918160257.30127-16-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philmd@linaro.org; helo=mail-ej1-x633.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Some CPUs need to check the requested features are compatible with the requested accelerator. This has to be done *before* the accelerator realizes a vCPU. Introduce the verify_accel_features() handler and call it just before accel_cpu_realizefn(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 4 ++++ cpu.c | 5 +++++ 2 files changed, 9 insertions(+) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index c90cf3a162..1e940f6bb5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -103,6 +103,9 @@ struct SysemuCPUOps; * @class_by_name: Callback to map -cpu command line model name to an * instantiatable CPU type. * @parse_features: Callback to parse command line arguments. + * @verify_accel_features: Callback to verify if all requested CPU are + * compatible with the requested accelerator. Called before the + * accelerator realize a vCPU. * @reset_dump_flags: #CPUDumpFlags to use for reset logging. * @has_work: Callback for checking if there is work to do. * @memory_rw_debug: Callback for GDB memory access. @@ -183,6 +186,7 @@ struct CPUClass { * class data that depends on the accelerator, see accel/accel-common.c. */ void (*init_accel_cpu)(struct AccelCPUClass *accel_cpu, CPUClass *cc); + bool (*verify_accel_features)(CPUState *cs, Error **errp); /* * Keep non-pointer data at the end to minimize holes. diff --git a/cpu.c b/cpu.c index 0769b0b153..84b03c09ac 100644 --- a/cpu.c +++ b/cpu.c @@ -136,6 +136,11 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) /* cache the cpu class for the hotpath */ cpu->cc = CPU_GET_CLASS(cpu); + if (cpu->cc->verify_accel_features + && !cpu->cc->verify_accel_features(cpu, errp)) { + return false; + } + if (!accel_cpu_realizefn(cpu, errp)) { return; } From patchwork Mon Sep 18 16:02:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724174 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1777259wro; Mon, 18 Sep 2023 09:11:25 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGooT2BgWZ4zyQvveh13Dgs3f7+Ihize9KC+9cNu1b0QkL7XUEhe9BQkqOZpaJjHm7YDrBo X-Received: by 2002:a54:4512:0:b0:3a7:1b28:4bc9 with SMTP id l18-20020a544512000000b003a71b284bc9mr8493273oil.54.1695053484795; Mon, 18 Sep 2023 09:11:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053484; cv=none; d=google.com; s=arc-20160816; b=cH3nFxol0cGQrrM6UDcWobzwTF3gnYY54hHsJuaGbdKagjbRKzyITEPU4EHDr6PlPe eBZKy3CGvO/gYCz46w9iwZ+Ckkm6QTiH/A15uvJ/nEmQUtA1BVdreaDHSjPg2AEHVhb2 PvOS2pwzFMSM5zcFXu0OoB9l7uMOcRBf2NE7C8gtyrmuTu5ehO8YN7pVkLluQ9YnfFfA qBpI5ICOHF7E9GScM7Z1aXH006r08doW9RbPStR4iJy49PmM/T9tJRMOCgkQunMCpjoD M3nwQqBZwMM5xjKRrEXQac63OCPE5d97OSFLd5igPIVjJKy3a3wbZrEiuROyvitnp4SJ Tkhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=s5SThQE8VrEigaiBVVD1aPn+S9Eqq7fLgyN+q+7eopw=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=0bkXH5Hwmm3FMdX5z9ACWHQfzK9FMpPbKIw9a3foRf+hBBirWgks6lpTr7O///TxyR h0R3ePCXkNrapWKKtG720PyYS/QE5gc58WNeASAXdJQ5QrNOuS1gMZRYwb2SbUZJY6+N 0OpNfsh4Efqmnz52FzGzgtxFN0bfbRsspxf+081o9oCa3JVJ4DhRxO2ufQ2SZpSCAuje kD+Vpw1jhNvZCxX7sCYS/RvpXyIAWS4K+UqQ5I4uYcOLVEs7yNatyG/yX3N4XDzK4ek9 d17RAF9orDZ6ssSUwlPnk/vY2l85AtuIx0MZeFk0Ir+nnp75u8asVKJnAQLVaRANCWL6 tUxg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iN3Zjls1; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id c26-20020a170906341a00b00993470682e5sm6646928ejb.32.2023.09.18.09.04.22 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:23 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 16/22] target/arm: Extract verify_accel_features() from cpu_realize() Date: Mon, 18 Sep 2023 18:02:49 +0200 Message-ID: <20230918160257.30127-17-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62c; envelope-from=philmd@linaro.org; helo=mail-ej1-x62c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When looking at the arm_cpu_realizefn() method, most of the code run before the cpu_exec_realizefn() call checks whether the requested CPU features are compatible with the requested accelerator. Extract this code to a dedicated handler matching our recently added CPUClass::verify_accel_features() handler. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/cpu.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 46d3f70d63..a551383fd3 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1675,19 +1675,10 @@ void arm_cpu_finalize_features(ARMCPU *cpu, Error **errp) } } -static void arm_cpu_realizefn(DeviceState *dev, Error **errp) +static bool arm_cpu_verify_accel_features(CPUState *cs, Error **errp) { - CPUState *cs = CPU(dev); - ARMCPU *cpu = ARM_CPU(dev); - ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev); + ARMCPU *cpu = ARM_CPU(cs); CPUARMState *env = &cpu->env; - int pagebits; - Error *local_err = NULL; - - /* Use pc-relative instructions in system-mode */ -#ifndef CONFIG_USER_ONLY - cs->tcg_cflags |= CF_PCREL; -#endif /* If we needed to query the host kernel for the CPU features * then it's possible that might have failed in the initfn, but @@ -1699,10 +1690,13 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } else { error_setg(errp, "Failed to retrieve host CPU features"); } - return; + return false; } #ifndef CONFIG_USER_ONLY + /* Use pc-relative instructions in system-mode */ + cs->tcg_cflags |= CF_PCREL; + /* The NVIC and M-profile CPU are two halves of a single piece of * hardware; trying to use one without the other is a command line * error and will result in segfaults if not caught here. @@ -1710,12 +1704,12 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) if (arm_feature(env, ARM_FEATURE_M)) { if (!env->nvic) { error_setg(errp, "This board cannot be used with Cortex-M CPUs"); - return; + return false; } } else { if (env->nvic) { error_setg(errp, "This board can only be used with Cortex-M CPUs"); - return; + return false; } } @@ -1733,23 +1727,35 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) error_setg(errp, "Cannot enable %s when using an M-profile guest CPU", current_accel_name()); - return; + return false; } if (cpu->has_el3) { error_setg(errp, "Cannot enable %s when guest CPU has EL3 enabled", current_accel_name()); - return; + return false; } if (cpu->tag_memory) { error_setg(errp, "Cannot enable %s when guest CPUs has MTE enabled", current_accel_name()); - return; + return false; } } #endif + return true; +} + +static void arm_cpu_realizefn(DeviceState *dev, Error **errp) +{ + CPUState *cs = CPU(dev); + ARMCPU *cpu = ARM_CPU(dev); + ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev); + CPUARMState *env = &cpu->env; + int pagebits; + Error *local_err = NULL; + cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -2383,6 +2389,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) &acc->parent_phases); cc->class_by_name = arm_cpu_class_by_name; + cc->verify_accel_features = arm_cpu_verify_accel_features; cc->has_work = arm_cpu_has_work; cc->dump_state = arm_cpu_dump_state; cc->set_pc = arm_cpu_set_pc; From patchwork Mon Sep 18 16:02:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724166 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1774612wro; 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id ec31-20020a0564020d5f00b00530a9488623sm4149603edb.46.2023.09.18.09.04.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 17/22] target/i386: Extract verify_accel_features() from cpu_realize() Date: Mon, 18 Sep 2023 18:02:50 +0200 Message-ID: <20230918160257.30127-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::133; envelope-from=philmd@linaro.org; helo=mail-lf1-x133.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When looking at the x86_cpu_realizefn() method, most of the code run before the cpu_exec_realizefn() call checks whether the requested CPU features are compatible with the requested accelerator. Extract this code to a dedicated handler matching our recently added CPUClass::verify_accel_features() handler. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.c | 62 +++++++++++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 26 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d79797d963..2884733397 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7208,26 +7208,19 @@ static void x86_cpu_hyperv_realize(X86CPU *cpu) cpu->hyperv_limits[2] = 0; } -static void x86_cpu_realizefn(DeviceState *dev, Error **errp) +/* + * note: the call to the framework needs to happen after feature expansion, + * but before the checks/modifications to ucode_rev, mwait, phys_bits. + * These may be set by the accel-specific code, + * and the results are subsequently checked / assumed in x86_cpu_realizefn(). + */ +static bool x86_cpu_verify_accel_features(CPUState *cs, Error **errp) { - CPUState *cs = CPU(dev); - X86CPU *cpu = X86_CPU(dev); - X86CPUClass *xcc = X86_CPU_GET_CLASS(dev); + X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; Error *local_err = NULL; - static bool ht_warned; unsigned requested_lbr_fmt; - /* Use pc-relative instructions in system-mode */ -#ifndef CONFIG_USER_ONLY - cs->tcg_cflags |= CF_PCREL; -#endif - - if (cpu->apic_id == UNASSIGNED_APIC_ID) { - error_setg(errp, "apic-id property was not initialized properly"); - return; - } - /* * Process Hyper-V enlightenments. * Note: this currently has to happen before the expansion of CPU features. @@ -7236,7 +7229,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) x86_cpu_expand_features(cpu, &local_err); if (local_err) { - goto out; + return false; } /* @@ -7246,7 +7239,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) if (cpu->lbr_fmt != ~PERF_CAP_LBR_FMT) { if ((cpu->lbr_fmt & PERF_CAP_LBR_FMT) != cpu->lbr_fmt) { error_setg(errp, "invalid lbr-fmt"); - return; + return false; } env->features[FEAT_PERF_CAPABILITIES] &= ~PERF_CAP_LBR_FMT; env->features[FEAT_PERF_CAPABILITIES] |= cpu->lbr_fmt; @@ -7265,13 +7258,13 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) if (!cpu->enable_pmu) { error_setg(errp, "vPMU: LBR is unsupported without pmu=on"); - return; + return false; } if (requested_lbr_fmt != host_lbr_fmt) { error_setg(errp, "vPMU: the lbr-fmt value (0x%x) does not match " "the host value (0x%x).", requested_lbr_fmt, host_lbr_fmt); - return; + return false; } } @@ -7282,7 +7275,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) accel_uses_host_cpuid() ? "Host doesn't support requested features" : "TCG doesn't support requested features"); - goto out; + return false; } /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on @@ -7296,12 +7289,28 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) x86_cpu_set_sgxlepubkeyhash(env); - /* - * note: the call to the framework needs to happen after feature expansion, - * but before the checks/modifications to ucode_rev, mwait, phys_bits. - * These may be set by the accel-specific code, - * and the results are subsequently checked / assumed in this function. - */ + return true; +} + +static void x86_cpu_realizefn(DeviceState *dev, Error **errp) +{ + CPUState *cs = CPU(dev); + X86CPU *cpu = X86_CPU(dev); + X86CPUClass *xcc = X86_CPU_GET_CLASS(dev); + CPUX86State *env = &cpu->env; + Error *local_err = NULL; + static bool ht_warned; + + /* Use pc-relative instructions in system-mode */ +#ifndef CONFIG_USER_ONLY + cs->tcg_cflags |= CF_PCREL; +#endif + + if (cpu->apic_id == UNASSIGNED_APIC_ID) { + error_setg(errp, "apic-id property was not initialized properly"); + return; + } + cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -7950,6 +7959,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; + cc->verify_accel_features = x86_cpu_verify_accel_features; cc->has_work = x86_cpu_has_work; cc->dump_state = x86_cpu_dump_state; cc->set_pc = x86_cpu_set_pc; From patchwork Mon Sep 18 16:02:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724158 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1773314wro; Mon, 18 Sep 2023 09:05:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGpW664kctEnpN1EeqdmZG/8yIPbRRlOKXD1OwetBIt83RkjmGEkHGdore9P+NNEvcpyKRz X-Received: by 2002:a0c:f246:0:b0:656:396f:b294 with SMTP id z6-20020a0cf246000000b00656396fb294mr7867604qvl.21.1695053107846; Mon, 18 Sep 2023 09:05:07 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053107; cv=none; d=google.com; s=arc-20160816; b=bhacP8Aq9V58ywPa9Js1mvg8hFkprPYjbNHRtxn7zp6r9xnC7JegSRyLkmXQmZDkOZ Re9wyw4DJAPN7+MbdLVM32iO87CPU9ywMGcxibtczSErpPlFd5m31gdxqE8AmMbaYlzi FqThGzSVqYrs/K00psa9lHnt+SGwTG7qDh+JD4QWEXW2huQvMHhw1bvk/N+7Ovwk4kEQ dnOvru9iv+sOSe076Zr84jl/0meTmNqPLNi0skJMyE/FFioJNcTL4P1kbBDRULPMl91P 1XDnaDNcBWJW+jCD+8AC6Js/tT5u0AVgNpMSS0dXXuOa3mDyGNRbSLxUOivuMtP40c1f s3qQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=CLYCBr4NSqb4Srk/T+P7jn9AmbCAT10Txre246ezJ94=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=uCBwpSRGZR3gco22USDXePFPV4WXG2UdAz9nvkrsRvhsBx/wo+XimO2ywtDIX0WS9r 6qa/jmZT5XlPlmoh/SmoEuhSPd8KL6GQf9xceOhNNSRe6frAxvmJZebXy6aI89AW/urv uppr5Oi7SpiQNOB/RYZKKJv8tisuDCZY0U7JuRAr8gszk9YzbKQVkYR0LH1ZKFRUZzIg TJdQGVLVEQ4KnxdllUpIm2uZVREXG3NR0nqXBmFwsjUzVijwk+ZVrGigQWkOuRwkfr1g bKpK+F3h3jnRxfKn8fFcc5HL72+jVMKi+G8e5s/EIsIAta1/kpx9v6qxES1bz9+VNEwN JiMA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Zi3uk1jy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id f10-20020a170906560a00b0099d0c0bb92bsm6569110ejq.80.2023.09.18.09.04.33 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:34 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 18/22] target/s390x: Call s390_cpu_realize_sysemu from s390_realize_cpu_model Date: Mon, 18 Sep 2023 18:02:51 +0200 Message-ID: <20230918160257.30127-19-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22d; envelope-from=philmd@linaro.org; helo=mail-lj1-x22d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org s390_cpu_realize_sysemu() runs some checks for the TCG accelerator, previous to creating the vCPU. s390_realize_cpu_model() also does run some checks for KVM. Move the sysemu call to s390_realize_cpu_model(). Having a single call before cpu_exec_realizefn() will allow us to factor a verify_accel_features() handler out in a pair of commits. Directly pass a S390CPU* to s390_cpu_realize_sysemu() to simplify. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/s390x-internal.h | 2 +- target/s390x/cpu-sysemu.c | 3 +-- target/s390x/cpu.c | 6 ------ target/s390x/cpu_models.c | 4 ++++ 4 files changed, 6 insertions(+), 9 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 825252d728..781ac08458 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -241,7 +241,7 @@ uint32_t calc_cc(CPUS390XState *env, uint32_t cc_op, uint64_t src, uint64_t dst, unsigned int s390_cpu_halt(S390CPU *cpu); void s390_cpu_unhalt(S390CPU *cpu); void s390_cpu_init_sysemu(Object *obj); -bool s390_cpu_realize_sysemu(DeviceState *dev, Error **errp); +bool s390_cpu_realize_sysemu(S390CPU *cpu, Error **errp); void s390_cpu_finalize(Object *obj); void s390_cpu_class_init_sysemu(CPUClass *cc); void s390_cpu_machine_reset_cb(void *opaque); diff --git a/target/s390x/cpu-sysemu.c b/target/s390x/cpu-sysemu.c index 8112561e5e..5178736c46 100644 --- a/target/s390x/cpu-sysemu.c +++ b/target/s390x/cpu-sysemu.c @@ -122,9 +122,8 @@ void s390_cpu_init_sysemu(Object *obj) s390_cpu_set_state(S390_CPU_STATE_STOPPED, cpu); } -bool s390_cpu_realize_sysemu(DeviceState *dev, Error **errp) +bool s390_cpu_realize_sysemu(S390CPU *cpu, Error **errp) { - S390CPU *cpu = S390_CPU(dev); MachineState *ms = MACHINE(qdev_get_machine()); unsigned int max_cpus = ms->smp.max_cpus; diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 416ac6c4e0..7257d4bc19 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -237,12 +237,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) goto out; } -#if !defined(CONFIG_USER_ONLY) - if (!s390_cpu_realize_sysemu(dev, &err)) { - goto out; - } -#endif - cpu_exec_realizefn(cs, &err); if (err != NULL) { goto out; diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 98f14c09c2..f030be0d55 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -612,6 +612,10 @@ void s390_realize_cpu_model(CPUState *cs, Error **errp) cpu->env.cpuid = deposit64(cpu->env.cpuid, CPU_PHYS_ADDR_SHIFT, CPU_PHYS_ADDR_BITS, cpu->env.core_id); } + + if (!s390_cpu_realize_sysemu(cpu, &err)) { + return; + } #endif } From patchwork Mon Sep 18 16:02:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724159 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1773329wro; Mon, 18 Sep 2023 09:05:09 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGIAcWznnpXHvzniRekT7Uyccp5uHDt5ks5is4TSp57FuLBcEH+eREQNc4wvE215RgeJ/vv X-Received: by 2002:a05:6214:716:b0:64f:4e7a:bc4d with SMTP id c22-20020a056214071600b0064f4e7abc4dmr8760779qvz.43.1695053108964; Mon, 18 Sep 2023 09:05:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053108; cv=none; d=google.com; s=arc-20160816; b=MH+FjhiFrAZj9rHrsHuvTe7qelL2o10/UgfVtekqykObHyaZnq5JTJwZSiJns+pAAV 09WE234DEFkB5QrXicmJfwZo0pbkZLzX5S/AypbMVZf3LRdnwoWKeI9M0GQ0p1pAvin7 VBgS8IPvyRpro9hNz5lrWPwkYmD8qRQihBejyf3resn1QUWJk0Oxanmh0vYQB5LkVSSn 16R3qEdm7cv8C8fyjW5iz4BOEkC8F04v5vbnmn0y8vs2843UeF2WBkr0ADoX+MaAi88T cIskMPnXmAsm1mRoLvVyiUr1ljjeoHkhRVIk3kqxFW2oWm1ezmyCalZk+oQRBViS5qPm 0JHg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ikcGGGCIJyFk0iGLkDvtO0LMxTWmhw6kUdLFh+619DA=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=iU2WA4NYBxP2ojMFixht++NkAGH/Z98X8i3xICIxfCVPXXpMo5C0Uu1qb9r9v7YYXp IRV3yiwnBhwhDbq8uVF3v8zEptxgcvrEGWLwsHfuvkuSNdbOzZsSLoUglVLAi/1aGM1h dwuIT6zeo+QNBQpca5KELidNdCTM3tDkHAeZZg1DOwGXwC73XMSMgTRIQi3aOVSfeIYJ VMNLnPBaVfrzHVrtQY42TElNw7kdM3SpU4IlgxUR88Ad41tvd4h+AxYJECzcqA+2eUvh P/wQiAoEiUo94VQCutjuuMxBj4p81wxXMSrA9+4pzxY1vAQxSXlNTALYh44hpb6j3bH9 uEnQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=mv3ja5W3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id v24-20020a1709060b5800b0098951bb4dc3sm6599465ejg.184.2023.09.18.09.04.38 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:39 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 19/22] target/s390x: Have s390_realize_cpu_model() return a boolean Date: Mon, 18 Sep 2023 18:02:52 +0200 Message-ID: <20230918160257.30127-20-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::232; envelope-from=philmd@linaro.org; helo=mail-lj1-x232.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have s390_realize_cpu_model() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/s390x-internal.h | 2 +- target/s390x/cpu.c | 3 +-- target/s390x/cpu_models.c | 12 +++++++----- 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/target/s390x/s390x-internal.h b/target/s390x/s390x-internal.h index 781ac08458..67f21f53a9 100644 --- a/target/s390x/s390x-internal.h +++ b/target/s390x/s390x-internal.h @@ -260,7 +260,7 @@ static inline void s390_cpu_unhalt(S390CPU *cpu) /* cpu_models.c */ void s390_cpu_model_class_register_props(ObjectClass *oc); -void s390_realize_cpu_model(CPUState *cs, Error **errp); +bool s390_realize_cpu_model(CPUState *cs, Error **errp); S390CPUModel *get_max_cpu_model(Error **errp); void apply_cpu_model(const S390CPUModel *model, Error **errp); ObjectClass *s390_cpu_class_by_name(const char *name); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 7257d4bc19..1a44a6d2b2 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -232,8 +232,7 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) Error *err = NULL; /* the model has to be realized before qemu_init_vcpu() due to kvm */ - s390_realize_cpu_model(cs, &err); - if (err) { + if (!s390_realize_cpu_model(cs, &err)) { goto out; } diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index f030be0d55..0605073dc3 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -567,7 +567,7 @@ S390CPUModel *get_max_cpu_model(Error **errp) return &max_model; } -void s390_realize_cpu_model(CPUState *cs, Error **errp) +bool s390_realize_cpu_model(CPUState *cs, Error **errp) { Error *err = NULL; S390CPUClass *xcc = S390_CPU_GET_CLASS(cs); @@ -576,19 +576,19 @@ void s390_realize_cpu_model(CPUState *cs, Error **errp) if (xcc->kvm_required && !kvm_enabled()) { error_setg(errp, "CPU definition requires KVM"); - return; + return false; } if (!cpu->model) { /* no host model support -> perform compatibility stuff */ apply_cpu_model(NULL, errp); - return; + return false; } max_model = get_max_cpu_model(errp); if (!max_model) { error_prepend(errp, "CPU models are not available: "); - return; + return false; } /* copy over properties that can vary */ @@ -601,7 +601,7 @@ void s390_realize_cpu_model(CPUState *cs, Error **errp) check_compatibility(max_model, cpu->model, &err); if (err) { error_propagate(errp, err); - return; + return false; } apply_cpu_model(cpu->model, errp); @@ -617,6 +617,8 @@ void s390_realize_cpu_model(CPUState *cs, Error **errp) return; } #endif + + return true; } static void get_feature(Object *obj, Visitor *v, const char *name, From patchwork Mon Sep 18 16:02:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724169 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1775002wro; Mon, 18 Sep 2023 09:07:46 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEN/8N81nAXoysmCLHrqX2Iazv0YYlicbtU09nhNV9BHnE07DBXUgI+qA201kS6nmg00Fan X-Received: by 2002:a05:622a:1a86:b0:412:14a8:24c8 with SMTP id s6-20020a05622a1a8600b0041214a824c8mr12238283qtc.8.1695053266596; Mon, 18 Sep 2023 09:07:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053266; cv=none; d=google.com; s=arc-20160816; b=HIyeVBy8BFwjBV09JUNzAh+hEQSUt8vWbZlHE6Ad25TCsuChzvB3jicXucH32ziXJt WPZZM/lXurYaLSYtIPT8W3KR6TCjTY/LMzcqBZdx8m6HznmOaZHLO/KLf6RbUh/4fcDs vLJFxfBLh1USGxxncLrlLY0/iBK8ZyLHZBn8PaDk9fZUNJE+JsUZnlI085dgQ65RLFQe WGT1546MEndHafWWV7aDragq4tnFosyJjUo7pM1lPIOsusvQoACsGeAS0JggWg967Qlb vlSlQQUdJJuEbBzRq4W7jtKceRGBPRbg7IyWqArBReareuTaoIuuf0rM4YBttc9Xs+4q o3ZQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=y7slh/pNTWelLfh1FzXsOutH1+zxCT/FLHdOf8nTB6I=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=MoDZINbvnNIAq8Bzy4fARjbE+4HoQCBjb5TZbpK0OIFYI9GFgqo0tytscld9ncwWEs 9jiJKFmUExMdB9yqExxi8GillXyy/gIpDLTKqgUt6vKn+fi0B468rKXJd2z1sAeKEGlF 6rVV93c3Fh7bn4DacoROkQMXrCunZ0mja8ncV1Ln+9kwrkA8/J50DBR6znOpgzRzo8YC 85M2KriGq2hl20RO5J8AM7EL73fhyEticX6I2a4Onm6BCUnS5VQVUndMFcxgYppQxS/z fgsy3IaWxKaCBtRvc9xKPt5apKRCLdGCYvLJyHWGog9fl3u76Rjm233FlzotmocBXP0i NV2A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kIaVVI4i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id lt10-20020a170906fa8a00b009737b8d47b6sm6568567ejb.203.2023.09.18.09.04.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 20/22] target/s390x: Use s390_realize_cpu_model() as verify_accel_features() Date: Mon, 18 Sep 2023 18:02:53 +0200 Message-ID: <20230918160257.30127-21-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52f; envelope-from=philmd@linaro.org; helo=mail-ed1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org s390_realize_cpu_model() checks if CPU model and definitions are compatible with the KVM / TCG accelerators, before realizing the vCPU. Use it directly as CPUClass::verify_accel_features() handler (called from cpu_exec_realizefn()). Signed-off-by: Philippe Mathieu-Daudé --- target/s390x/cpu.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 1a44a6d2b2..983dbfe563 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -231,11 +231,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) S390CPUClass *scc = S390_CPU_GET_CLASS(dev); Error *err = NULL; - /* the model has to be realized before qemu_init_vcpu() due to kvm */ - if (!s390_realize_cpu_model(cs, &err)) { - goto out; - } - cpu_exec_realizefn(cs, &err); if (err != NULL) { goto out; @@ -329,6 +324,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data) scc->reset = s390_cpu_reset; cc->class_by_name = s390_cpu_class_by_name, + cc->verify_accel_features = s390_realize_cpu_model; cc->has_work = s390_cpu_has_work; cc->dump_state = s390_cpu_dump_state; cc->query_cpu_fast = s390_query_cpu_fast; From patchwork Mon Sep 18 16:02:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724170 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1775766wro; Mon, 18 Sep 2023 09:09:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEcXR5hecAozoSuiP1bEJpGLuRaN3s2jZ+lqkLOJLpmJUe5TwN7pwAz5EWvHHEMFixlFhsR X-Received: by 2002:a05:622a:1816:b0:410:443:221a with SMTP id t22-20020a05622a181600b004100443221amr11201314qtc.1.1695053343303; Mon, 18 Sep 2023 09:09:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053343; cv=none; d=google.com; s=arc-20160816; b=I+i3zxkCouwIE70TjlImn7D4AUXMCICn/dCWjh6oi0frPVhg17LwxRTv3MOBxaTHrt Dft17sSpDrTI3E7ST5QyOSQCFTM9hq72HxtltlDy17j8+rV2fWwkWXZwyn1Bm7o1TT9s rtQjun+i5FuYyt1ZWQCZayyEsXmn50xKJFYk5GQUez2Rol4Nlr/YBE7KwtHCWoQHOaEF rqNSv/XqF3ySGbaFbZNso7WNzGa/yViOXe5ZU3liGvC8w9ZMzVQS2AwlAyG3yufMARfx Ib6AkkiBHYzeacZ7bV92RhSNoUt5KypjpbCPb3o72octWd3Su33bezGd1Zj3KkROvHwj 3N8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=GMzTvk0FEO6I+ReA5ceoXcLeA6ER1WjzLpFKcs1vmU4=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=ein6tH7yNieqLgyFlKPt8LPrF6KAC9hRD1oF972nunquyfDA1MfMEV5XxNJZeDImb/ SRbciecKYkVCMF7p0UPAZVaBsZH+MvQScdqyCr1diSu6KrW7X9GRvn3BKDlca7rkpDr+ jzTTtiQ2cn6NIMg/1QhgB9eL0tJsM5q/SHou4R8aJTSgo5jYuyVlrx5+nUbm9uuOmC3L AQ/XS8GarUzbaciLxKNtzsjUOaA1LSRSYZ7aIf1JzK/1GADjzJH3QUdBJUyXTOS6/RcM +0SHGsFK90QJ5qAcI9lbF/jUxrz/43geHwKGxr4bKVkXXz3oYI0m+ePSoV125uwZezdk DbwQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q28rRDoY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id i8-20020a0564020f0800b005309eb7544fsm4528407eda.45.2023.09.18.09.04.48 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 21/22] exec/cpu: Have cpu_exec_realize() return a boolean Date: Mon, 18 Sep 2023 18:02:54 +0200 Message-ID: <20230918160257.30127-22-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12c; envelope-from=philmd@linaro.org; helo=mail-lf1-x12c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Following the example documented since commit e3fe3988d7 ("error: Document Error API usage rules"), have cpu_exec_realizefn() return a boolean indicating whether an error is set or not. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/hw/core/cpu.h | 2 +- cpu.c | 6 ++++-- 2 files changed, 5 insertions(+), 3 deletions(-) diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 1e940f6bb5..3dc6968428 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -1014,7 +1014,7 @@ G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...) /* $(top_srcdir)/cpu.c */ void cpu_class_init_props(DeviceClass *dc); void cpu_exec_initfn(CPUState *cpu); -void cpu_exec_realizefn(CPUState *cpu, Error **errp); +bool cpu_exec_realizefn(CPUState *cpu, Error **errp); void cpu_exec_unrealizefn(CPUState *cpu); /** diff --git a/cpu.c b/cpu.c index 84b03c09ac..96ae440b81 100644 --- a/cpu.c +++ b/cpu.c @@ -131,7 +131,7 @@ const VMStateDescription vmstate_cpu_common = { }; #endif -void cpu_exec_realizefn(CPUState *cpu, Error **errp) +bool cpu_exec_realizefn(CPUState *cpu, Error **errp) { /* cache the cpu class for the hotpath */ cpu->cc = CPU_GET_CLASS(cpu); @@ -142,7 +142,7 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) } if (!accel_cpu_realizefn(cpu, errp)) { - return; + return false; } /* NB: errp parameter is unused currently */ @@ -169,6 +169,8 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu); } #endif /* CONFIG_USER_ONLY */ + + return true; } void cpu_exec_unrealizefn(CPUState *cpu) From patchwork Mon Sep 18 16:02:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 724172 Delivered-To: patch@linaro.org Received: by 2002:adf:f0d1:0:b0:31d:da82:a3b4 with SMTP id x17csp1776780wro; Mon, 18 Sep 2023 09:10:39 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFa0nBIDA40sf5yJ9SLn5cmeY1HwB4W39wQRVz5O2ZS1l3irHjD10VUsGq/jtJJ1A++s+Nz X-Received: by 2002:ac8:7c85:0:b0:417:abda:a045 with SMTP id y5-20020ac87c85000000b00417abdaa045mr3905080qtv.66.1695053438785; Mon, 18 Sep 2023 09:10:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1695053438; cv=none; d=google.com; s=arc-20160816; b=BoA2Q2FrLM2IetzSsyHNBc/Hp/mGX+dVPTDfpKCL7yjTXnvVvZ50UdOKTfv0zpw5Kj f15JpHeAiZDngqNSJErrr3VmXFNxJNwNN87x+2ZLVcw94V/2OjXr9efk4wqQQaW3/d4L 4V/PMSb5eMi0cAbdGZpnjNk1ddUsNWo9UEE1UshYkbPLbcQgFx7Vz7LWkOopVH0Cq7wq K4W4cWgxCxB051hPBXJrts+I4GzMg2KLXtnAIx8KDmdpL/dGM8e6El2EkBC9F9yYZWQ8 5GOaN0q2+C7Ah2Dhu/cYf6ydemWBJZo4CCCTwJKOYi87RLV0DUjoptA45IyOIXfOe0Zk PN1g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TI3/KBb/+3Te5uOTKkyhQWXS4VS0D1UFt2aGwQADGyc=; fh=AIYNAcrfQPdTp+tiOBYg2bCy2NfWRbXD73JV9SLWbpM=; b=rze7Ulik8jDtXr5EBQINCONMRy6JbFtZ5phxFzmkD2hLQSpLs49SoMgKeJ84tSqiRq jDMBkn6hd/aRxsV9RX65xQqfakuTt7J1d8IG8KMt8W+298zPjlKSvlkOC+hYGtBVfN/p BMLzP4PBCQ6/AAkFtFQfo/VadJuGrX+hVE3Zd4T0xppXpQfMTrRfrH+hKxmSj4ON4t33 lP8x1duACusFAYBXVU+nagVN6IOfXzp2YcWExOCE8baScCzAuZ1aOUSqBOVfzFWmco6T m3y9JzTLGkUq/9Y/fFDyxskahmRN+q62U/FWyLRdftm6iaGK81M5lHnO4C0WPFlB2Dil w72g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pHX95i3n; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id fd14-20020a056402388e00b005307e75d24dsm5026981edb.17.2023.09.18.09.04.55 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:56 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 22/22] exec/cpu: Call cpu_exec_realizefn() once in cpu_common_realize() Date: Mon, 18 Sep 2023 18:02:55 +0200 Message-ID: <20230918160257.30127-23-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::130; envelope-from=philmd@linaro.org; helo=mail-lf1-x130.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org cpu_exec_realizefn() is called in each ${target}_cpu_realize(), before calling their parent_realize(), which is simply cpu_common_realizefn(). Directly call it there instead. Signed-off-by: Philippe Mathieu-Daudé --- hw/core/cpu-common.c | 4 ++++ target/alpha/cpu.c | 8 -------- target/arm/cpu.c | 6 ------ target/avr/cpu.c | 7 ------- target/cris/cpu.c | 7 ------- target/hexagon/cpu.c | 7 ------- target/hppa/cpu.c | 15 ++------------- target/i386/cpu.c | 6 ------ target/i386/kvm/kvm-cpu.c | 4 ++-- target/loongarch/cpu.c | 7 ------- target/m68k/cpu.c | 7 ------- target/microblaze/cpu.c | 7 ------- target/mips/cpu.c | 7 ------- target/nios2/cpu.c | 7 ------- target/openrisc/cpu.c | 7 ------- target/ppc/cpu_init.c | 5 ----- target/riscv/cpu.c | 6 ------ target/rx/cpu.c | 7 ------- target/s390x/cpu.c | 5 ----- target/sh4/cpu.c | 7 ------- target/sparc/cpu.c | 8 -------- target/tricore/cpu.c | 7 ------- target/xtensa/cpu.c | 7 ------- 23 files changed, 8 insertions(+), 150 deletions(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index 35c0cc4dad..8901c482a0 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -204,6 +204,10 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp) } } + if (!cpu_exec_realizefn(cpu, errp)) { + return; + } + /* Create CPU address space and vCPU thread */ qemu_init_vcpu(cpu); diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index eb78318bb8..85834c4d61 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -72,15 +72,7 @@ static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) { - CPUState *cs = CPU(dev); AlphaCPUClass *acc = ALPHA_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } acc->parent_realize(dev, errp); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a551383fd3..d8eaa186cd 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1756,12 +1756,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) int pagebits; Error *local_err = NULL; - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - #ifndef CONFIG_USER_ONLY { uint64_t scale; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index d3460b3960..e512ad46d3 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -112,13 +112,6 @@ static void avr_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); AVRCPUClass *mcc = AVR_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } mcc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 671693a362..9fb69ecda4 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -144,13 +144,6 @@ static void cris_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } ccc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 5b9bb3fe83..17785e2921 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -332,13 +332,6 @@ static void hexagon_cpu_realize(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); HexagonCPUClass *mcc = HEXAGON_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } gdb_register_coprocessor(cs, hexagon_hvx_gdb_read_register, hexagon_hvx_gdb_write_register, diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index b0d106b6c7..a87028b275 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -121,22 +121,11 @@ void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr, static void hppa_cpu_realizefn(DeviceState *dev, Error **errp) { - CPUState *cs = CPU(dev); HPPACPUClass *acc = HPPA_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } #ifndef CONFIG_USER_ONLY - { - HPPACPU *cpu = HPPA_CPU(cs); - cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, - hppa_cpu_alarm_timer, cpu); - } + cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, + hppa_cpu_alarm_timer, HPPA_CPU(dev)); #endif acc->parent_realize(dev, errp); diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 2884733397..c170e2976b 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7311,12 +7311,6 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) return; } - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - if (xcc->host_cpuid_required && !accel_uses_host_cpuid()) { g_autofree char *name = x86_cpu_class_get_model_name(xcc); error_setg(&local_err, "CPU model '%s' requires KVM or HVF", name); diff --git a/target/i386/kvm/kvm-cpu.c b/target/i386/kvm/kvm-cpu.c index 1fe62ce176..0f52649779 100644 --- a/target/i386/kvm/kvm-cpu.c +++ b/target/i386/kvm/kvm-cpu.c @@ -34,10 +34,10 @@ static bool kvm_cpu_realizefn(CPUState *cs, Error **errp) * * x86_cpu_realize(): * -> x86_cpu_expand_features() - * -> cpu_exec_realizefn(): + * -> cpu_common_realizefn() + * -> cpu_exec_realizefn(): * -> accel_cpu_realizefn() * kvm_cpu_realizefn() -> host_cpu_realizefn() - * -> cpu_common_realizefn() * -> check/update ucode_rev, phys_bits, mwait */ if (cpu->max_features) { diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index dc0ac39833..d61dcaebca 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -555,13 +555,6 @@ static void loongarch_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); LoongArchCPUClass *lacc = LOONGARCH_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } loongarch_cpu_register_gdb_regs_for_features(cs); diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 3da316bc30..c6740e0e78 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -309,16 +309,9 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error **errp) CPUState *cs = CPU(dev); M68kCPU *cpu = M68K_CPU(dev); M68kCPUClass *mcc = M68K_CPU_GET_CLASS(dev); - Error *local_err = NULL; register_m68k_insns(&cpu->env); - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - m68k_cpu_init_gdb(cpu); mcc->parent_realize(dev, errp); diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 1f19a6e07d..5194911ad4 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -207,13 +207,6 @@ static void mb_cpu_realizefn(DeviceState *dev, Error **errp) uint8_t version_code = 0; const char *version; int i = 0; - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } if (cpu->cfg.addr_size < 32 || cpu->cfg.addr_size > 64) { error_setg(errp, "addr-size %d is out of range (32 - 64)", diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 7c81e6c356..4f15dcea44 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -462,13 +462,6 @@ static void mips_cpu_realizefn(DeviceState *dev, Error **errp) MIPSCPU *cpu = MIPS_CPU(dev); CPUMIPSState *env = &cpu->env; MIPSCPUClass *mcc = MIPS_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } env->exception_base = (int32_t)0xBFC00000; diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index f500ca7ba2..fc753bb1be 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -199,13 +199,6 @@ static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) CPUState *cs = CPU(dev); Nios2CPU *cpu = NIOS2_CPU(cs); Nios2CPUClass *ncc = NIOS2_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } realize_cr_status(cs); diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index e4ec95ca7f..438146c681 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -133,13 +133,6 @@ static void openrisc_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); OpenRISCCPUClass *occ = OPENRISC_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } occ->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c index 24d4e8fa7e..99087ee57c 100644 --- a/target/ppc/cpu_init.c +++ b/target/ppc/cpu_init.c @@ -6809,11 +6809,6 @@ static void ppc_cpu_realize(DeviceState *dev, Error **errp) PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); Error *local_err = NULL; - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } if (cpu->vcpu_id == UNASSIGNED_CPU_INDEX) { cpu->vcpu_id = cs->cpu_index; } diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 4f7ae55359..62be6d88fc 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -1503,12 +1503,6 @@ static void riscv_cpu_realize(DeviceState *dev, Error **errp) RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(dev); Error *local_err = NULL; - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - if (tcg_enabled()) { riscv_cpu_realize_tcg(dev, &local_err); if (local_err != NULL) { diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 089df61790..db951ff988 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -129,13 +129,6 @@ static void rx_cpu_realize(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); RXCPUClass *rcc = RX_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } rcc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 983dbfe563..e305928651 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -231,11 +231,6 @@ static void s390_cpu_realizefn(DeviceState *dev, Error **errp) S390CPUClass *scc = S390_CPU_GET_CLASS(dev); Error *err = NULL; - cpu_exec_realizefn(cs, &err); - if (err != NULL) { - goto out; - } - #if !defined(CONFIG_USER_ONLY) qemu_register_reset(s390_cpu_machine_reset_cb, S390_CPU(dev)); #endif diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index e6690daf9a..a3fc034ea5 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -220,13 +220,6 @@ static void superh_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); SuperHCPUClass *scc = SUPERH_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } scc->parent_realize(dev, errp); cpu_reset(cs); diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 88157fcd33..f0b2187f3b 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -750,18 +750,10 @@ static ObjectClass *sparc_cpu_class_by_name(const char *cpu_model) static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) { - CPUState *cs = CPU(dev); SPARCCPUClass *scc = SPARC_CPU_GET_CLASS(dev); - Error *local_err = NULL; SPARCCPU *cpu = SPARC_CPU(dev); CPUSPARCState *env = &cpu->env; - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } - #if defined(CONFIG_USER_ONLY) if ((env->def.features & CPU_FEATURE_FLOAT)) { env->def.features |= CPU_FEATURE_FLOAT128; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 0142cf556d..5319a6841e 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -95,13 +95,6 @@ static void tricore_cpu_realizefn(DeviceState *dev, Error **errp) TriCoreCPU *cpu = TRICORE_CPU(dev); TriCoreCPUClass *tcc = TRICORE_CPU_GET_CLASS(dev); CPUTriCoreState *env = &cpu->env; - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } /* Some features automatically imply others */ if (tricore_has_feature(env, TRICORE_FEATURE_162)) { diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index bbfd2d42a8..c7bdd0980a 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -160,13 +160,6 @@ static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); XtensaCPUClass *xcc = XTENSA_CPU_GET_CLASS(dev); - Error *local_err = NULL; - - cpu_exec_realizefn(cs, &local_err); - if (local_err != NULL) { - error_propagate(errp, local_err); - return; - } cs->gdb_num_regs = xcc->config->gdb_regmap.num_regs;