From patchwork Mon Sep 25 18:17:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726171 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2FF32224CB for ; Mon, 25 Sep 2023 18:17:47 +0000 (UTC) Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 30DC3112 for ; Mon, 25 Sep 2023 11:17:46 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-50444e756deso7501460e87.0 for ; Mon, 25 Sep 2023 11:17:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1695665864; x=1696270664; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; 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Mon, 25 Sep 2023 11:17:44 -0700 (PDT) Received: from [127.0.1.1] ([93.5.22.158]) by smtp.googlemail.com with ESMTPSA id j26-20020a170906831a00b00997d7aa59fasm6793962ejx.14.2023.09.25.11.17.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Sep 2023 11:17:43 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 25 Sep 2023 20:17:35 +0200 Subject: [PATCH v6 1/7] arm64: dts: mediatek: add mmsys support for mt8365 SoC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v6-1-24453c8625b3@baylibre.com> References: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> In-Reply-To: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1263; i=amergnat@baylibre.com; h=from:subject:message-id; bh=3xFs1OXjad0XvE1yvI1YsSmmgVc5j01QOJdhl+XL6SI=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlEc7FZEar/ON4sXpZXeINtiOHvT/onNcfUSIdLTxU fqzezeuJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZRHOxQAKCRArRkmdfjHURU3wD/ 0XoPzDUgXjVNvenXE5P7hb9zlHSrFtmlDaKfEWNHzM47z9dKN+JRhCkBjWJmZCTf74kIJkgiOTpHUC VGnL9yPp3fTnTlLIh0xYC7Dt0f1vuEWcFDu9WVH8hWGZGDK8jAXi9TYI6nu259zx7Ay7pV4OqK4jQh j6K+NnkTuwKB4qy5SGbSDgwLAbsNUx8n6rHCEaJulCr0EGgCLDAXVoQqLL9/ZnfgRMJ0zUvI81rSnN PCtvlu2BGrC0i9AMAShgw6JRsVfAUl6awqnJEp+hwQqBFoHQGRH604SSBHX1odm9YULfV0zV+Oc3iF xFHqEAWpSMwPjJ/8+EdG+pvEBBeSfy9DhY8fBj4YK5756jmsq4KWdaHPNpWCHdfzTnnfMzv1apcj7k wHEoXB7A5NVuRZsCYk2FQUpevCVyLdUsJQc9xomaQqvsl/BArj2nzul0CvlaLySnkaRRkVRyffBLvs munBn8Ui7EX+uMKnOX2ItFVQNeNBMqr1XyLYyxKYZyhOX5Qas4V/L2qtEmj4XBxm8G+ES6YipHNj9T /YyeYIy9IQ8lKh5LqAqHpGve4b8pBvLwv+OFqm6rFYmKiUIOhJqYBJxfUMdDhrrYc9UfE1CjWofOCP C8eiGlfEqsOmO1QpZZrxfxwCoMfDoPxnn77o86u0D4JD7qvNsWXe+gKaxjhg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Multimedia subsystem (MMsys) contains multimedia controller, Multimedia Data Path v2.0 (MDP 2.0) and Display (DISP). The multimedia controller includes bus fabric control, Smart Memory Interface (SMI) control, memory access second-level arbiter, and multimedia configuration. It plays the key role in handling different handshakings between infra subsystem, video subsystem, image subsystem and G3D subsystem. For more detail, ask Mediatek for the MT8365 IoT application processor functional specification. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index 413496c92069..bcabc2b89a94 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -603,6 +603,12 @@ u2port1: usb-phy@1000 { #phy-cells = <1>; }; }; + + mmsys: syscon@14000000 { + compatible = "mediatek,mt8365-mmsys", "syscon"; + reg = <0 0x14000000 0 0x1000>; + #clock-cells = <1>; + }; }; timer { From patchwork Mon Sep 25 18:17:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726573 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43911107B8 for ; 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Mon, 25 Sep 2023 11:17:45 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 25 Sep 2023 20:17:36 +0200 Subject: [PATCH v6 2/7] arm64: dts: mediatek: add camsys support for mt8365 SoC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v6-2-24453c8625b3@baylibre.com> References: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> In-Reply-To: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1126; i=amergnat@baylibre.com; h=from:subject:message-id; bh=Lk6qSks1FWZtF7N0V2O1kU7gpoVtoT/NLAYxbDBGin0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlEc7FC2MRtrQZWUwmVtFlhUOQbXLAvvGEUpOZLh/U 6M5lCGiJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZRHOxQAKCRArRkmdfjHURdCZD/ 9ufYH/c6b4zcV+X9wOd10BpsBn386LElzmNxHU7oHBraV7lvrDcSEPAnobUSFN8FMlXXl+74YOgV9g TIFRuEFIjHJSnR8p3bLlObNC4WYAhQbNk1wSrGT+AuY8AXPq9a88xBoWBlipOGYocbrlrK6yfsAHsV D9XftEKtH72m2MHxP+zPcIMlRCcOVemuwX74sWCIA/K4QgHVFpxrGYgcBbBreMbObA/SsVmV7y0BnD 8uz0hm0ImK6jFjvQAU28ks1ewKZc79K2DfWBPHU7r7v7K4G/cQ2yTqOoM+yaY3BgWVeywtbVPVi3Ke 6lnoudCNW/D1BxtLWCQgZJyz438o6+Gz7RVc7o6rzam3pa5bMTprZ+ir1/giQjqcO58e2fQtmxd9/b D+gRtfikktXS2tQ5mC+MDo5JpINx4UUvxv8VSVj/pjbbsyyHdonKv/X/T1GApJVWy5LRq39DqwJ06Q z9argNbzVuBLUUkoOKLvqNgd/iN3CXzrvWznOluPH1ptwFgmY4wdvYG0Rm7cfI3PLXH9inRUIGWrH+ ArnbifQa9yXLWoKo5xvNLqUoRzvf/LS2ysO7gswHvVpYSmnL4LxccZbZIJh9Ox8muDT30E4d8vTZ8i lUxBc4LxYlZrCYa07VgApwqM7xnun3a8JvSJF3w8qutpafLy1+Dn+GvoNKBg== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Camera System (CamSys) incorporates an enhanced feature based image signal processor to connect a variety of image sensor components. This processor consists of timing generated unit (TG), lens/sensor compensation unit and image process unit. For more detail, ask Mediatek for the MT8365 IoT application processor functional specification. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index bcabc2b89a94..f9cddce5bd9d 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -609,6 +609,12 @@ mmsys: syscon@14000000 { reg = <0 0x14000000 0 0x1000>; #clock-cells = <1>; }; + + camsys: syscon@15000000 { + compatible = "mediatek,mt8365-imgsys", "syscon"; + reg = <0 0x15000000 0 0x1000>; + #clock-cells = <1>; + }; }; timer { From patchwork Mon Sep 25 18:17:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726170 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C812224CB for ; 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Mon, 25 Sep 2023 11:17:46 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 25 Sep 2023 20:17:37 +0200 Subject: [PATCH v6 3/7] arm64: dts: mediatek: add apu support for mt8365 SoC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v6-3-24453c8625b3@baylibre.com> References: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> In-Reply-To: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1173; i=amergnat@baylibre.com; h=from:subject:message-id; bh=CPSRatML/h/herC8Ies/GAwzWIDM+NFutvJF7JB3RkQ=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlEc7F95BVIXjRxwsMjDXaJ93Z9uiEPOMTZe4Dv8av uxZJVnWJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZRHOxQAKCRArRkmdfjHURRh9D/ 4l2SKbqEelg7PLcaIrgtjVSeftxwmzStEOiWfil8pu5QyA8ZcyePOpBRkI039ECNClYWt4CuTUFVYd m+SJf+1Yy43dxPOtWgTqL52++b5ZZW3fYRCNqUKNlMaeFlK1XQqWme9Hciopf+RHXTLU6/21aW2Yzf A/sFVGtT6CXRmfr6M1UzlcILF8xsseJUn0tK8mfM1+zfn04fkVLGx3F/fMJWKbMXteEG4pch1wZY0F /9ZYfgs7PB70sbZ7s09yiSP1eiBJC7VLAJtWCdi6b4Lbfq2t6O4ZtZsxmP2v0Qh+UYbjIVVmZ+2Uip zybgELeq/bSX0FPIeOOjCJzCSyFBXkulrL56ozabF6NFnUXFTLM3N2VIN55VeUucvn7BV73GvpnYaU 4d4FHLwB92g4+OgwqhhsTIAmNHBDrYsxkO4+qDTBkh3my9ZS9MypgNxfWX9iLKMzIcc7SltQ3nyLnH Ojq8KdoqHRrCU+fcgMb4rnfQLEojHERf4n5AOctZSxBu6rEZ9wq4cwVYQEI2PFWvp+i8zxXhNhYs7j gEvqT9+tBWux1BJIuttIKPKY9j+xPjWWhKeHGj7c4UXUrxSwZ8uwahk/L1hAa1Mu9NJg/t5QPPOWXW tWUnwyIthZWdUE4pl9QsIsmKfWlfzhZg6r4/WQGCjNaQLcWL48W1y+3NToiA== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net AI Processor Unit System (APUSYS) is a highly efficient computing unit system which is most suitable for AI/CV algorithms. It includes one programmable AI processor (Cadence VP6) for both AI and CV algorithms, and an eDMA engine for data movement between external DRAM and VP6 internal memory. For more detail, ask Mediatek for the MT8365 IoT application processor functional specification. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index f9cddce5bd9d..c3ad7cbc89ab 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -615,6 +615,12 @@ camsys: syscon@15000000 { reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + + apu: syscon@19020000 { + compatible = "mediatek,mt8365-apu", "syscon"; + reg = <0 0x19020000 0 0x1000>; + #clock-cells = <1>; + }; }; timer { From patchwork Mon Sep 25 18:17:38 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726572 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CA352224CB for ; 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Mon, 25 Sep 2023 11:17:48 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 25 Sep 2023 20:17:38 +0200 Subject: [PATCH v6 4/7] arm64: dts: mediatek: add power domain support for mt8365 SoC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v6-4-24453c8625b3@baylibre.com> References: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> In-Reply-To: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4724; i=amergnat@baylibre.com; h=from:subject:message-id; bh=gs34qYbpVZeuz1fNLXc7xbInSDTbehayNY8q/g3uDQE=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlEc7FTl0niKBNPCGJeVVRHlwIKP3BNxOpKFNI/WZ3 aOVdKlaJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZRHOxQAKCRArRkmdfjHURdtSEA CatxECkwOq3wcsJTPGcFEU7RSbi/wBwvLt7VskfT0wIhq1yCI+pjsjzrz9oNGZipCxfnMHNlFBgdyZ WOOHDr/BpKDfM1yF/seseJVXGCX0x1xT7G85YWFG/LIlkNVHXCYa/UryKUbXPF22L51DC9gAA0R5qD 2w7PMEfH4THcTCu6515DnrKwohESLR/qzv0cLyDleR0/Ro4TxgO8nZXk2QggcZxNphC5FVK8C0OqBY oC6fyvk5/SevsuAjkxuP2RSw9WkolLHdMFFFEKKwdo8Xq0dl1yF/jjB4pcTaB6bINLf9Kcrvx6uoL4 YO/1RbmWQ0sXmQNt5cHwF5OSxiYGFP6p398uo/RpSzSzr0AJRMS6jg45iIMNVuYhWqHE8LiWA08KtJ +7nWiLl8pFpOcW4AbK8w+mVN/SNSAYU5nFxq34y/NPpgCwSD5oJgBknXodsXkYfJ/uP/iYcsZQAsRE QBYzKJu9L7Z5hHyogwLGDi/qy3SkE+8+oaXZfxTnQoLySs9SwYTjjxDw+rNDsBLaCtTcu5447y44my JVCuvhGX6Zv0xBK1jzB50JOMDyHCi1O4622FblOwHQpyVSW1LgqKlraU4rTQmUxFQEzBpjKd5u01Au wMfOrTbGpDQKp7BjsIOt4WDTAqI6KVA8c7faZwV3i+alLzaGBd7oG3pvXKdQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The following power domain are added to the SoC dts: - MM (MultiMedia) - CONN (Connectivity) - MFG (MFlexGraphics) - Audio - Cam (Camera) - DSP (Digital Signal Processor) - Vdec (Video decoder) - Venc (Video encoder) - APU (AI Processor Unit) Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 110 +++++++++++++++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c3ad7cbc89ab..c2f88d153dee 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -9,6 +9,7 @@ #include #include #include +#include / { compatible = "mediatek,mt8365"; @@ -298,6 +299,115 @@ syscfg_pctl: syscfg-pctl@10005000 { reg = <0 0x10005000 0 0x1000>; }; + scpsys: syscon@10006000 { + compatible = "mediatek,mt8365-syscfg", "syscon", "simple-mfd"; + reg = <0 0x10006000 0 0x1000>; + #power-domain-cells = <1>; + + /* System Power Manager */ + spm: power-controller { + compatible = "mediatek,mt8365-power-controller"; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + + /* power domains of the SoC */ + power-domain@MT8365_POWER_DOMAIN_MM { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "mm", "mm-0", "mm-1", + "mm-2", "mm-3"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + mediatek,infracfg-nao = <&infracfg_nao>; + #address-cells = <1>; + #size-cells = <0>; + + power-domain@MT8365_POWER_DOMAIN_CAM { + reg = ; + clocks = <&camsys CLK_CAM_LARB2>, + <&camsys CLK_CAM_SENIF>, + <&camsys CLK_CAMSV0>, + <&camsys CLK_CAMSV1>, + <&camsys CLK_CAM_FDVT>, + <&camsys CLK_CAM_WPE>; + clock-names = "cam-0", "cam-1", + "cam-2", "cam-3", + "cam-4", "cam-5"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_VDEC { + reg = ; + #power-domain-cells = <0>; + }; + + power-domain@MT8365_POWER_DOMAIN_VENC { + reg = ; + #power-domain-cells = <0>; + }; + + power-domain@MT8365_POWER_DOMAIN_APU { + reg = ; + clocks = <&infracfg CLK_IFR_APU_AXI>, + <&apu CLK_APU_IPU_CK>, + <&apu CLK_APU_AXI>, + <&apu CLK_APU_JTAG>, + <&apu CLK_APU_IF_CK>, + <&apu CLK_APU_EDMA>, + <&apu CLK_APU_AHB>; + clock-names = "apu", "apu-0", + "apu-1", "apu-2", + "apu-3", "apu-4", + "apu-5"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + }; + + power-domain@MT8365_POWER_DOMAIN_CONN { + reg = ; + clocks = <&topckgen CLK_TOP_CONN_32K>, + <&topckgen CLK_TOP_CONN_26M>; + clock-names = "conn", "conn1"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_MFG { + reg = ; + clocks = <&topckgen CLK_TOP_MFG_SEL>; + clock-names = "mfg"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_AUDIO { + reg = ; + clocks = <&topckgen CLK_TOP_AUD_INTBUS_SEL>, + <&infracfg CLK_IFR_AUDIO>, + <&infracfg CLK_IFR_AUD_26M_BK>; + clock-names = "audio", "audio1", "audio2"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + + power-domain@MT8365_POWER_DOMAIN_DSP { + reg = ; + clocks = <&topckgen CLK_TOP_DSP_SEL>, + <&topckgen CLK_TOP_DSP_26M>; + clock-names = "dsp", "dsp1"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + }; + }; + watchdog: watchdog@10007000 { compatible = "mediatek,mt8365-wdt", "mediatek,mt6589-wdt"; reg = <0 0x10007000 0 0x100>; From patchwork Mon Sep 25 18:17:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726169 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B0F72224CE for ; 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Mon, 25 Sep 2023 11:17:49 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 25 Sep 2023 20:17:39 +0200 Subject: [PATCH v6 5/7] arm64: dts: mediatek: add smi support for mt8365 SoC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v6-5-24453c8625b3@baylibre.com> References: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> In-Reply-To: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2121; i=amergnat@baylibre.com; h=from:subject:message-id; bh=lJi09wmfuA1CnXJrdr2+qCC0CVBcfrZwevdWJeNOAo0=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlEc7FEVSjGHrSkrW+FZLtcEUWl13xhTtayX8+9r0L ox5XimCJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZRHOxQAKCRArRkmdfjHURcE8D/ oCX9XceWnTnvrl8BWagMD6eSAJw12HSntAuLDm5Mh4VSePapKwF+YtdBSdye+NW04rD5+/R3/enaIm Fcodp4SWwIRHPzYhW4tVswoWBaoHN/vsHx42s8kZYC8d8vovCzkrG9M6jyaXsmXulUG6kpICd8ZV8b iv3XNNkzYw7jtWd5rOQHQknQ6W+J2FsI4vChmN+isiK0+JRRiSEjBkWwaT8Va0wQOwA85zmw3SgMxB A+nwnbP1my2HKYWCOcnDGnG5UkeS+CMFyYTkxYvXTuD2lgCXKWvIjNiUY7G3wUv7l0UHyBG1wjO0s6 3pKmyuY3J16fXGUy3dtwGmqRSSm50PzW7oZefu2MLyDmJu1wcFLBznBTcH5N8uJ3e8TT0kbCopo8ct rlMJbNoASMEXnAb1hk5pYcwjf5IY/pUyoS5pPRHXCgTR1DhP8ql3SsQbRnWBviwpaAom4v5udwxkdM wqiKSCioTRQ42bnWW9PZDEkC5oSaZHTFJoEBRECB6P46X9AGTLCcWiAPMuE9974XuKjfCswCU9t4YH np1bFl2UH/zE1LYbUXT/tto4ebmeDDarhHF4sgDCg16io2CeSpKWfIVDDOf9fGe2Se3DRGwR31d+fX dOwIvZ9DcptgXFDE2IUyT0YwwUIKd7908/O7vSoI6hnUX3aRMgp3tbPrDZiw== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Smart Multimedia Interface (SMI) local arbiter does the arbitration for memory requests from multi-media engines. Add SMI in the MT8365 DTS will allow to add local ARBiter (LARB), use by IOMMU. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c2f88d153dee..a03b8c0da68b 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -340,16 +340,19 @@ power-domain@MT8365_POWER_DOMAIN_CAM { "cam-4", "cam-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VDEC { reg = ; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_VENC { reg = ; #power-domain-cells = <0>; + mediatek,smi = <&smi_common>; }; power-domain@MT8365_POWER_DOMAIN_APU { @@ -367,6 +370,7 @@ power-domain@MT8365_POWER_DOMAIN_APU { "apu-5"; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; + mediatek,smi = <&smi_common>; }; }; @@ -720,6 +724,17 @@ mmsys: syscon@14000000 { #clock-cells = <1>; }; + smi_common: smi@14002000 { + compatible = "mediatek,mt8365-smi-common"; + reg = <0 0x14002000 0 0x1000>; + clocks = <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMMON>, + <&mmsys CLK_MM_MM_SMI_COMM0>, + <&mmsys CLK_MM_MM_SMI_COMM1>; + clock-names = "apb", "smi", "gals0", "gals1"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; From patchwork Mon Sep 25 18:17:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726571 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3421D224D9 for ; Mon, 25 Sep 2023 18:17:55 +0000 (UTC) Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 63CCB192 for ; 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Mon, 25 Sep 2023 11:17:51 -0700 (PDT) From: Alexandre Mergnat Date: Mon, 25 Sep 2023 20:17:40 +0200 Subject: [PATCH v6 6/7] arm64: dts: mediatek: add larb support for mt8365 SoC Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20230207-iommu-support-v6-6-24453c8625b3@baylibre.com> References: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> In-Reply-To: <20230207-iommu-support-v6-0-24453c8625b3@baylibre.com> To: Yong Wu , Krzysztof Kozlowski , Rob Herring , Matthias Brugger , AngeloGioacchino Del Regno , Krzysztof Kozlowski , Conor Dooley Cc: linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexandre Mergnat X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2919; i=amergnat@baylibre.com; h=from:subject:message-id; bh=YQ4gFuFLZ3ZXhHJoLIMLvf6JGXdHrmuwZeJIyfaEitM=; b=owEBbQKS/ZANAwAKAStGSZ1+MdRFAcsmYgBlEc7F7qzSRjVHw3D4953FjAQpy02IRt7Bxz4Q11WU pRp6gGWJAjMEAAEKAB0WIQQjG17X8+qqcA5g/osrRkmdfjHURQUCZRHOxQAKCRArRkmdfjHURZFND/ 97j8hIibvje8nqBVb8pJ/n5gAklskcO6X2r5QqLlaedqjf2PH4qAbaVmPrbU01rF2zOIq3Y+T0SZcm 7VLM4w4H1flT9mr1D7na3MJ7VPtV8XbzvppZJ3WEdj634c50ebGsqE/e6MGtIOojOFpb7URUr+iIPc 5oIjYm2rqMxDo60UyJOxnPg2mknQ2UhVo+NDynRhEaFxy6FfzRtwnoSXyrA9PXZ4QOJ8VwBk5NNhKa F8ob15opFebohf3ghsyUyCxUK6Aqmqyuft6hEKNJYXzuVBDCz/EdKGhq/4KYwy9r8PUbV8AWKkiGzF SrUmB6zKYRxaPrNKfxfShdKaifxnfIbCxyOyD/Ec+bbi3tR5HtuSjy5a4WrN4akgYUW4uUdOXYww/t IPbr1HxwaoWsa+9CH/aO+adV0mhURYFZjpm1Vb/ZFbPXsXb2YIVS8rDfc5c0gafTt0CnaLfLnxiT2s qcbj6ZxI8JmdCn2h7X/TFvF+CG+nKD2Z8b8XGXOsJFikcK/WOOP4Fob3HizUSGvcPconTRhlqYRejO AHp2uZwFpPHuMIGQJNyh8R4cb9kSPi+8HYPL7maITrrHBnt/ELS/9cGNbGKHYdjhuK3wyeXcqnZ8EC GJgkqz9i6mpmYHQl2mfM9ICSupb2NEHeNb8TRpR00EAYMllM5tyHk7X/y2HQ== X-Developer-Key: i=amergnat@baylibre.com; a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Local arbiter (LARB) is a component of Smart Multimedia Interface (SMI), used to help the memory management (IOMMU). This patch add 4 LARBs and 2 clocks for the larb1 and larb3 support. Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 59 ++++++++++++++++++++++++++++++++ 1 file changed, 59 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index a03b8c0da68b..afcfa1dd242e 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -735,12 +735,71 @@ smi_common: smi@14002000 { power-domains = <&spm MT8365_POWER_DOMAIN_MM>; }; + larb0: larb@14003000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x14003000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_LARB0>, + <&mmsys CLK_MM_MM_SMI_LARB0>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_MM>; + mediatek,larb-id = <0>; + }; + camsys: syscon@15000000 { compatible = "mediatek,mt8365-imgsys", "syscon"; reg = <0 0x15000000 0 0x1000>; #clock-cells = <1>; }; + larb2: larb@15001000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x15001000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&mmsys CLK_MM_MM_SMI_IMG>, + <&camsys CLK_CAM_LARB2>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_CAM>; + mediatek,larb-id = <2>; + }; + + vdecsys: syscon@16000000 { + compatible = "mediatek,mt8365-vdecsys", "syscon"; + reg = <0 0x16000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb3: larb@16010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x16010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vdecsys CLK_VDEC_LARB1>, + <&vdecsys CLK_VDEC_LARB1>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VDEC>; + mediatek,larb-id = <3>; + }; + + vencsys: syscon@17000000 { + compatible = "mediatek,mt8365-vencsys", "syscon"; + reg = <0 0x17000000 0 0x1000>; + #clock-cells = <1>; + }; + + larb1: larb@17010000 { + compatible = "mediatek,mt8365-smi-larb", + "mediatek,mt8186-smi-larb"; + reg = <0 0x17010000 0 0x1000>; + mediatek,smi = <&smi_common>; + clocks = <&vencsys CLK_VENC>, <&vencsys CLK_VENC>; + clock-names = "apb", "smi"; + power-domains = <&spm MT8365_POWER_DOMAIN_VENC>; + mediatek,larb-id = <1>; + }; + apu: syscon@19020000 { compatible = "mediatek,mt8365-apu", "syscon"; reg = <0 0x19020000 0 0x1000>; From patchwork Mon Sep 25 18:17:41 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre Mergnat X-Patchwork-Id: 726168 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3C83B224CE for ; Mon, 25 Sep 2023 18:17:56 +0000 (UTC) Received: from mail-ej1-x62d.google.com (mail-ej1-x62d.google.com [IPv6:2a00:1450:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C3A058E for ; Mon, 25 Sep 2023 11:17:54 -0700 (PDT) Received: by mail-ej1-x62d.google.com with SMTP id a640c23a62f3a-99bdcade7fbso845493466b.1 for ; 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a=openpgp; fpr=231B5ED7F3EAAA700E60FE8B2B46499D7E31D445 X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Add iommu support in the SoC DTS using the 4 local arbiters (LARBs) Reviewed-by: Yong Wu Reviewed-by: AngeloGioacchino Del Regno Signed-off-by: Alexandre Mergnat --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index afcfa1dd242e..24581f7410aa 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -471,6 +471,14 @@ sysirq: interrupt-controller@10200a80 { reg = <0 0x10200a80 0 0x20>; }; + iommu: iommu@10205000 { + compatible = "mediatek,mt8365-m4u"; + reg = <0 0x10205000 0 0x1000>; + interrupts = ; + mediatek,larbs = <&larb0>, <&larb1>, <&larb2>, <&larb3>; + #iommu-cells = <1>; + }; + infracfg_nao: infracfg@1020e000 { compatible = "mediatek,mt8365-infracfg", "syscon"; reg = <0 0x1020e000 0 0x1000>;