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[176.86.136.19]) by smtp.gmail.com with ESMTPSA id i18sm91905591wrp.91.2019.07.31.13.29.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 31 Jul 2019 13:29:37 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, bjorn.andersson@linaro.org, sboyd@kernel.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v4 02/13] mbox: qcom: add APCS child device for QCS404 Date: Wed, 31 Jul 2019 22:29:18 +0200 Message-Id: <20190731202929.16443-3-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org> References: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org There is clock controller functionality in the APCS hardware block of qcs404 devices similar to msm8916. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Bjorn Andersson --- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) -- 2.22.0 diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index 705e17a5479c..76e1ad433b3f 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -89,7 +89,11 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev) return ret; } - if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global")) { + platform_set_drvdata(pdev, apcs); + + if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global") || + of_device_is_compatible(np, "qcom,qcs404-apcs-apps-global")) { + apcs->clk = platform_device_register_data(&pdev->dev, "qcom-apcs-msm8916-clk", -1, NULL, 0); @@ -97,8 +101,6 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev) dev_err(&pdev->dev, "failed to register APCS clk\n"); } - platform_set_drvdata(pdev, apcs); - return 0; } From patchwork Wed Jul 31 20:29:19 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 170227 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp4462470ile; Wed, 31 Jul 2019 13:29:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqx9flIVgPuc9/dY+caHfiRuqEX/D2I4J5576qMRL5b7e9LwNFkNNfiExNtlbhnWdYE33elZ X-Received: by 2002:a17:902:a612:: with SMTP id u18mr118687703plq.181.1564604984261; Wed, 31 Jul 2019 13:29:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564604984; cv=none; d=google.com; s=arc-20160816; b=f5U+T9zYwAnpxbgiX3AdmB/oJXQqlqafvA32QV0/fFRtjCzkaUW5+LB5QNntlxjaLB zox8VDOCzKdoV+weVEpoXkiuWieFKptM/aAkRyQ07+/WWqyM7Ng3LCwU8oVPiZG0xTdO L65z7rDZYS/pwIS4zCQ/D/zqokCb+ynUEfLNq02mmKqPmSJDUvkqFSFUrUB95KhkCR5z N3/FtGPp6YRmN6IvFXX9rGOZKX+gd7ioY4uNkPypo3HkFw2BR8gq0c9oj4YrtvoVQ1tF skmP9WyJc1kVAhwnYEGXz+amSei0B0AIHCvakxlP0J2pMepIfDnMkv9xNJ2gCyyYI/42 O4Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=NEmCczScxOjFfK/GsZ795dKDEuO/wf3t9hNmpIlsOQI=; b=hSLkgRxs56MIfsT6wn2HxsGMSTapxu5NieCoGAGpzIwYZsw6RDaElnB60sxP+4mBwY aGwb2WCA7JwnMW1KvyCXG92RJyg4K4SiTMib3NqMh3DNsezCrvygP3OrwdW1rjrEUaTC uT17FSeZ/y2upRH8eOWQCshAkg4qYi1fEe3849oVOXlmMqL6epR/Ptt04pdUblmrHS38 hW/FNopwzJmH6MDITgBegGbmVWeTatnxJvZY4OxjgruVVxPgm/h7b+mN8DHfheki+h8s JPhl51zJ2TdB1XC+GOzvzW+i0LqmO7I9HxUfDO/Of9qcrMdgHVDIuWrhxqYQGsSVAAsf ft9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hVxBbGLx; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[176.86.136.19]) by smtp.gmail.com with ESMTPSA id i18sm91905591wrp.91.2019.07.31.13.29.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 31 Jul 2019 13:29:39 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, bjorn.andersson@linaro.org, sboyd@kernel.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v4 03/13] mbox: qcom: replace integer with valid macro Date: Wed, 31 Jul 2019 22:29:19 +0200 Message-Id: <20190731202929.16443-4-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org> References: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the correct macro when registering the platform device. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Bjorn Andersson --- drivers/mailbox/qcom-apcs-ipc-mailbox.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.22.0 diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index 76e1ad433b3f..dc198802bdf7 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c @@ -96,7 +96,8 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev) apcs->clk = platform_device_register_data(&pdev->dev, "qcom-apcs-msm8916-clk", - -1, NULL, 0); + PLATFORM_DEVID_NONE, + NULL, 0); if (IS_ERR(apcs->clk)) dev_err(&pdev->dev, "failed to register APCS clk\n"); } From patchwork Wed Jul 31 20:29:20 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jorge Ramirez-Ortiz X-Patchwork-Id: 170228 Delivered-To: patch@linaro.org Received: by 2002:a92:512:0:0:0:0:0 with SMTP id q18csp4462487ile; Wed, 31 Jul 2019 13:29:45 -0700 (PDT) X-Google-Smtp-Source: APXvYqxPbEXsq6dlU80XXHuel0jgvG+sTgxY5N3KL7XooB69T/nZdCC4L3JPG381LlTt9xQNezq2 X-Received: by 2002:a17:90a:c70c:: with SMTP id o12mr4761460pjt.62.1564604985624; Wed, 31 Jul 2019 13:29:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1564604985; cv=none; d=google.com; s=arc-20160816; b=0Mjnat5+1Wf4504jgWwP7dAO37mTbATxKJ8+6nP0OuhIusmPyugBbLtioyylT0tnpx 13hquWrFJOXc5vT2v1oY7euICpNla+6EVQ061BQiWQWsXZpgCYJo5fhhquC5dJ7UlxcP Fi6hPQ+qle0YjgC0dgYgPRjn1DUQat117IXsRIYlUu+LuFSV5feupeYzgaUQoYG2YbCl yCU3X/8QwAnwQ1Zkr7GqFn1hrHbdFCl7xqMIcxAvuFyMu01m4sOqDiwqPgrqy1srPGc3 Or6OiCwVbSz2nvBjMA27EyFFAETJOn/ZLGQHodZ+ceWfd3b0zUEGDmUJlpSLnK5PBeWe UEjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YOocsbJSeEFZluDhuzPE1zAAorjfBXrmhgRxid6+uG4=; b=K1f3lxKy1mMKAe5RRnoiRQsf457yLi/iOqdCNWvQ3UFY/kFy/xvW0LgL6P3lmYMwsB XZBxbS9Miog6Es7HWeVWLV2m23l/wZPMSYsRjiNejIBAcB7JqND+VR9jhqYGj+dKGgBO 4m20scf2cIJ+GBpEDz3UYvT02QRRwReNkppaGqb7lx56mxDkZfzXYHDJAvBI9h8Hddi0 aGK8ZbyqH9f4DXowJfCoO8+cX4Gqv73MduVk+Zt03SP2DSFJWItuaSa8vdslsrh55WrG YQ33MPLgFBl7vp+B4WEGZl4boLGrrRoxG0pK2WPOsF606axu82oxMrcvKkBRSNppKM/7 bItQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fbHyeQff; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[176.86.136.19]) by smtp.gmail.com with ESMTPSA id i18sm91905591wrp.91.2019.07.31.13.29.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 31 Jul 2019 13:29:41 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, bjorn.andersson@linaro.org, sboyd@kernel.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v4 04/13] dt-bindings: mailbox: qcom: Add clock-name optional property Date: Wed, 31 Jul 2019 22:29:20 +0200 Message-Id: <20190731202929.16443-5-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org> References: <20190731202929.16443-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org When the APCS clock is registered (platform dependent), it retrieves its parent names from hardcoded values in the driver. The following commit allows the DT node to provide such clock names to the platform data based clock driver therefore avoiding having to explicitly embed those names in the clock driver source code. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz Reviewed-by: Rob Herring Reviewed-by: Bjorn Andersson --- .../mailbox/qcom,apcs-kpss-global.txt | 24 ++++++++++++++++--- 1 file changed, 21 insertions(+), 3 deletions(-) -- 2.22.0 diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt index 1232fc9fc709..b69310322b09 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt @@ -18,10 +18,11 @@ platforms. Usage: required Value type: Definition: must specify the base address and size of the global block + - clocks: - Usage: required if #clocks-cells property is present - Value type: - Definition: phandle to the input PLL, which feeds the APCS mux/divider + Usage: required if #clock-names property is present + Value type: + Definition: phandles to the two parent clocks of the clock driver. - #mbox-cells: Usage: required @@ -33,6 +34,12 @@ platforms. Value type: Definition: as described in clock.txt, must be 0 +- clock-names: + Usage: required if the platform data based clock driver needs to + retrieve the parent clock names from device tree. + This will requires two mandatory clocks to be defined. + Value type: + Definition: must be "aux" and "pll" = EXAMPLE The following example describes the APCS HMSS found in MSM8996 and part of the @@ -65,3 +72,14 @@ Below is another example of the APCS binding on MSM8916 platforms: clocks = <&a53pll>; #clock-cells = <0>; }; + +Below is another example of the APCS binding on QCS404 platforms: + + apcs_glb: mailbox@b011000 { + compatible = "qcom,qcs404-apcs-apps-global", "syscon"; + reg = <0x0b011000 0x1000>; + #mbox-cells = <1>; + clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>; + clock-names = "aux", "pll"; + #clock-cells = <0>; + };