From patchwork Thu Oct 12 17:58:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732666 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6AFDF374CB for ; Thu, 12 Oct 2023 17:58:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cKB13n2y" Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8A1DFDE; Thu, 12 Oct 2023 10:58:46 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-9a9f139cd94so201469366b.2; Thu, 12 Oct 2023 10:58:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133525; x=1697738325; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Na7qEhQMzmgECrh7kCLViTW0+wjTG3BvT0gTVRTb1co=; b=cKB13n2yKiBD/+PeliRSCVQYcidNla4SJ8EDGAsYzS2/32zgNBqo5nhj7zdmbdyevP 6OLJoKfqisvvIQ+IGJ/Yri8+idaHbc4G2hhjGMbNVf5Ou0sqeN20GvbxR0XzzEAR6tgB OMSDXI1gFF2YGrqDxMIAweyr6BEhW3C63JFOUSky17x8tTj0xW3tTblms8gDZxOZYrAF vB/uP2H2LeMHVzlrAdwmJehXLpPq2GSJtK1GU2Lncd2o2oSoOjmx7UtO5zInVsErpuUE ydZOpEImveOqnlDQ3S2bLE1fjLQlYBXwHtqLt2LnDvxakfSMby9FUeLLeiwTcBcp0sKU IVqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133525; x=1697738325; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Na7qEhQMzmgECrh7kCLViTW0+wjTG3BvT0gTVRTb1co=; b=KNclR0pOen7fgix9c80TCBLF4VfSt4OiK9g8aCCQt5tSL5/w7z68oKdQnOBXHuHv2r qymt4IgAvKo0V5sLz1St+yK4x82MJ5Gszd6idKfg60QnwORD18Uce7C37JyEA+4EB362 CO2cuwU8xjSZErkq+2YA3dGBxPrHJ1lKnqcz7SW7VOEBd1hjWQdGa27y1MAcLtqyWnOO WCw2l4DIhFk/mfzVha8kkYLiAh7WD2nSi6bwdWMOKNZQpuB0yvYIxZAG/ojRKqwB3j77 TuHIm35cqEzM3sHctSQ8GXKFcIurhEWZ5s++7vRG0qxS+Wa/G7T0W9GxYDtn2/Jq0ghq X5tw== X-Gm-Message-State: AOJu0YyDrkrjKV+c0YlNBBcUg/puCRiSXGCxFEo93L60v2asLE0OmJGT B9Q7LdzUUCbZrMOJNOVaM8o= X-Google-Smtp-Source: AGHT+IFsGm9j0df0xfB5g2DVVwguqau1uG6sbL8fG+3Kle7Qv1Kxdj2UGMlkZhbvgbFmTlKGn6hrfw== X-Received: by 2002:a17:907:1b11:b0:9ae:6ffd:bdf7 with SMTP id mp17-20020a1709071b1100b009ae6ffdbdf7mr27150064ejc.39.1697133524718; Thu, 12 Oct 2023 10:58:44 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id p8-20020a170906b20800b009adce1c97ccsm11335626ejz.53.2023.10.12.10.58.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:43 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 02/13] dt-bindings: thermal: tegra: Document throttle temperature Date: Thu, 12 Oct 2023 19:58:23 +0200 Message-ID: <20231012175836.3408077-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding Each throttling configuration needs to specify the temperature threshold at which it should start throttling. Previously this was tied to a given trip point as a cooling device and used the temperature specified for that trip point. This doesn't work well because the throttling mechanism is not a cooling device in the traditional sense. Instead, allow device trees to specify the throttle temperature in the throttle configuration directly so that the throttle doesn't need to be exposed as a cooling device. Signed-off-by: Thierry Reding --- Changes in v2: - rename temperature to temperature-millicelsius and drop $ref - add hysteresis-millicelsius property .../bindings/thermal/nvidia,tegra124-soctherm.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml index 04a2ba1aa946..0eb6277082fe 100644 --- a/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml +++ b/Documentation/devicetree/bindings/thermal/nvidia,tegra124-soctherm.yaml @@ -121,6 +121,20 @@ properties: # high (85%, TEGRA_SOCTHERM_THROT_LEVEL_HIGH) - 3 + temperature-millicelsius: + minimum: -273000 + maximum: 200000 + description: The temperature threshold (in millicelsius) that, + when crossed, will trigger the configured automatic throttling. + + hysteresis-millicelsius: + description: An unsigned integer expressing the hysteresis delta + (in millicelsius) with respect to the threshold temperature + property above. Throttling will be initiated when the + temperature falls below (temperature - hysteresis). This avoids + situations where throttling is repeatedly initiated and stopped + because of minor temperature variations. + # optional # Tegra210 specific and valid only for OCx throttle events nvidia,count-threshold: From patchwork Thu Oct 12 17:58:26 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732665 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E687374F6 for ; Thu, 12 Oct 2023 17:58:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="cd8EERvH" Received: from mail-ed1-x52a.google.com (mail-ed1-x52a.google.com [IPv6:2a00:1450:4864:20::52a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07FCBDD; Thu, 12 Oct 2023 10:58:50 -0700 (PDT) Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-53dfc28a2afso2194074a12.1; Thu, 12 Oct 2023 10:58:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133528; x=1697738328; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=8w1QvXNCjhCwydWbGL6K5jdkXe4i3JkNhn/cRw8swm4=; b=cd8EERvH6wtA3LHXZkYQCkeN3lQZVJO6i+bWn6+alq09962D6Lf2wkRk/mfoY/Rjrn LgBx5Qib4SM/B+jK5QkaOBLeUarNfmIbMEQroF5SGbsVtOPN1zXExGl02d0UKufWtaf5 Fr9LeTdkUgSq35OVZkUtaOHXdmQq6HTcBhOqPCi0SPDY+QsxaJLkv03puVgW2kbi/B3x XEwu6ggUI/HwOps+v0/mDRtmUYa/mjN1xTV64Myx4r3xBbC1ziKNugj3hytA3DupGAi2 7hbZYmB92L2K+nJZvCo1SQwFefWIDgvw7VE5uFMBGBxJQH6tVZyB3xQtEk77RD4Ac1lE P43w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133528; x=1697738328; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=8w1QvXNCjhCwydWbGL6K5jdkXe4i3JkNhn/cRw8swm4=; b=sqq+ayWtMIBF2F+7dqTCmKdvlX1tqutVbUqVFcOIEZHF88y5ReeDizKhfWtPElGSvq xFF+mqJUuNKvRguUv/WeH2coMUOmJtsB7+d6RZ01pNfdgjPVYiSKxWW8M2Elx4RCqsna 35uOnaNX7f2w5IYQaEYEzz531BWYda44tkgy82Adz3QJxKV0vkIVLtlFeE+Ma0hAqljb BYC9Fwx4oiz8kEvkNtkHpSny9sVliT9KlvueE6z7CIVeRDmRz/vFq0/APINYYVHMu8lH Fkd+nJ6vs5z08Wy3GGYX/v+L867ys56HQI/qTjW5y7WTfRDmvmyehPjk/BqnA1IGB+pS 6RxA== X-Gm-Message-State: AOJu0YwvAtbseHel2NSnzRp8rIZbE0yph1WNiMxSVe15Fq8cbaV3ATYa BOAvZvX5Mnd0IRGocAcpzSs= X-Google-Smtp-Source: AGHT+IENSRl5HdQNxKI72dP6CzFsGJdIGO1t5hauPXbx3MvA5x2RA3yUuEsex+p3PXXTGUJ7hKdUSg== X-Received: by 2002:a05:6402:2065:b0:53d:f072:7b0a with SMTP id bd5-20020a056402206500b0053df0727b0amr3279263edb.39.1697133528424; Thu, 12 Oct 2023 10:58:48 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id b25-20020aa7df99000000b0053808d83f0fsm10417564edy.9.2023.10.12.10.58.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:48 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 05/13] thermal: tegra: Constify SoC-specific data Date: Thu, 12 Oct 2023 19:58:26 +0200 Message-ID: <20231012175836.3408077-6-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding The SoC-specific parameter structure is read-only data, so consistently use const to mark it as such. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index f434e141dcdf..11c23ace2c81 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -339,7 +339,7 @@ struct tegra_soctherm { u32 *calib; struct thermal_zone_device **thermctl_tzs; - struct tegra_soctherm_soc *soc; + const struct tegra_soctherm_soc *soc; struct soctherm_throt_cfg throt_cfgs[THROTTLE_SIZE]; @@ -2054,19 +2054,15 @@ MODULE_DEVICE_TABLE(of, tegra_soctherm_of_match); static int tegra_soctherm_probe(struct platform_device *pdev) { - const struct of_device_id *match; struct tegra_soctherm *tegra; struct thermal_zone_device *z; struct tsensor_shared_calib shared_calib; - struct tegra_soctherm_soc *soc; + const struct tegra_soctherm_soc *soc; unsigned int i; int err; - match = of_match_node(tegra_soctherm_of_match, pdev->dev.of_node); - if (!match) - return -ENODEV; + soc = device_get_match_data(&pdev->dev); - soc = (struct tegra_soctherm_soc *)match->data; if (soc->num_ttgs > TEGRA124_SOCTHERM_SENSOR_NUM) return -EINVAL; @@ -2220,7 +2216,7 @@ static int __maybe_unused soctherm_suspend(struct device *dev) static int __maybe_unused soctherm_resume(struct device *dev) { struct tegra_soctherm *tegra = dev_get_drvdata(dev); - struct tegra_soctherm_soc *soc = tegra->soc; + const struct tegra_soctherm_soc *soc = tegra->soc; int err, i; err = soctherm_clk_enable(tegra, true); From patchwork Thu Oct 12 17:58:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732663 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1B1E037C86 for ; Thu, 12 Oct 2023 17:58:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="SPR6d2Qw" Received: from mail-ej1-x62f.google.com (mail-ej1-x62f.google.com [IPv6:2a00:1450:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1DF01C9; Thu, 12 Oct 2023 10:58:51 -0700 (PDT) Received: by mail-ej1-x62f.google.com with SMTP id a640c23a62f3a-9ad810be221so200445866b.2; Thu, 12 Oct 2023 10:58:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133529; x=1697738329; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=2WNElS/gVnJhRodzwUmP0WXL6VdUMTQJu5AaQ9GZlUg=; b=SPR6d2QwufOKWrXD2/9Q++jxb+iO7DJcj4nOwhln0SMWvYHA4FUeM2k22oL04Uoi+9 YyPfuCOzvA0ME4eNpBkOoqTcEVyJyLNcd8t7H740RXTWMOY1klh1bfuy3FHqit+ugpie NmySB39ZxmDZ7FKZOiNhcJBA8vqNj4eiW7K2YalKXKZ1g1gcGEn1jVZHXtZDTi2c9yu2 GFUDYKlsGkZg/lIeE37DvENcdTeunoOQ5cieWQunqM+THZ8fYnz9gyI3GuVlR/Wv5y/8 RLuWFVKwJCFH5fInU3/YCd3XDxUYJ9QvcPXchADYXZDYYIKFx18BXxROHgRuyrWmLWOJ Dk9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133529; x=1697738329; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=2WNElS/gVnJhRodzwUmP0WXL6VdUMTQJu5AaQ9GZlUg=; b=clc4p77qZnHdM78j+Yi63fq/RHp9GLcpCas/KTy7M6Ezwuqy6dnpovmebrr5nZh1Yn XrIb1jvLaNtawZhtQWHnxzBuKkh5I7pI5uMr/bnM1KZ9ppS4Yk0ttd9cwSz0ZKP2rGoy GVj+liPFC3iBqf0FCzxKLXgK4uIq9aJdsx9Cef2otiAX9fZnZpn/BktNud8V8EMGlNoK 6NxqAyVbMQQoDHHkzYlr1NSyk10P+6nSjC7VwBTj3K0LAlHdUX/kMozdQeg1qgIbKP1s 9wyrtQQYMsT4u5AWnOZKCvCSQg0PymB5OkPbGwO2iXXsiZ0huj08Yj5OWIuCP5nlvEDE Ju+Q== X-Gm-Message-State: AOJu0Yzulhws463wXg5TsEcWDFrrHsgNtqwlTBWW5c+1nD6QZvta8xWV ihZyX8gemQwvC7m/kYPmKkA= X-Google-Smtp-Source: AGHT+IHcE/jBQFNxQ41NPCURuAvnpb/2vkuwQ1FGV1bsMXNlj5dqIlQYfKNQyIRn2B0k5iQBXy23pA== X-Received: by 2002:a17:907:7603:b0:9b2:b633:ada2 with SMTP id jx3-20020a170907760300b009b2b633ada2mr21913345ejc.36.1697133529446; Thu, 12 Oct 2023 10:58:49 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id b20-20020a170906491400b00988dbbd1f7esm11314362ejq.213.2023.10.12.10.58.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:49 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 06/13] thermal: tegra: Do not register cooling device Date: Thu, 12 Oct 2023 19:58:27 +0200 Message-ID: <20231012175836.3408077-7-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding The SOCTHERM's built-in throttling mechanism doesn't map well to the concept of a cooling device because it will automatically start to throttle when the programmed temperature threshold is crossed. Remove the cooling device implementation and instead unconditionally program the throttling for the CPU and GPU thermal zones. Signed-off-by: Thierry Reding --- Changes in v2: - adapt to new DT bindings drivers/thermal/tegra/soctherm.c | 287 +++++++++------------- drivers/thermal/tegra/soctherm.h | 1 + drivers/thermal/tegra/tegra124-soctherm.c | 4 + drivers/thermal/tegra/tegra132-soctherm.c | 4 + drivers/thermal/tegra/tegra210-soctherm.c | 4 + 5 files changed, 132 insertions(+), 168 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 11c23ace2c81..105ec20d509d 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -33,7 +33,6 @@ #include -#include "../thermal_core.h" #include "soctherm.h" #define SENSOR_CONFIG0 0 @@ -317,12 +316,16 @@ struct soctherm_throt_cfg { const char *name; unsigned int id; u8 priority; + int temperature; + int hysteresis; u8 cpu_throt_level; u32 cpu_throt_depth; u32 gpu_throt_level; struct soctherm_oc_cfg oc_cfg; - struct thermal_cooling_device *cdev; bool init; + + unsigned int num_zones; + struct device_node **zones; }; struct tegra_soctherm { @@ -497,9 +500,7 @@ static int thermtrip_program(struct tegra_soctherm *ts, * throttrip_program() - Configures the hardware to throttle the * pulse if a given sensor group reaches a given temperature * @ts: pointer to a struct tegra_soctherm - * @sg: pointer to the sensor group to set the thermtrip temperature for * @stc: pointer to the throttle need to be triggered - * @trip_temp: the temperature in millicelsius to trigger the thermal trip at * * Sets the thermal trip threshold and throttle event of the given sensor * group. If this threshold is crossed, the hardware will trigger the @@ -510,43 +511,68 @@ static int thermtrip_program(struct tegra_soctherm *ts, * * Return: 0 upon success, or %-EINVAL upon failure. */ -static int throttrip_program(struct tegra_soctherm *ts, - const struct tegra_tsensor_group *sg, - struct soctherm_throt_cfg *stc, - int trip_temp) +static int throttrip_program(struct tegra_soctherm *tegra, + struct soctherm_throt_cfg *stc) { - int temp, cpu_throt, gpu_throt; - unsigned int throt; - u32 r, reg_off; + int high, low, cpu_throt, gpu_throt; + unsigned int throt, i, j; - if (!sg || !stc || !stc->init) - return -EINVAL; + high = enforce_temp_range(tegra, stc->temperature); + high /= tegra->soc->thresh_grain; + low = enforce_temp_range(tegra, stc->temperature - stc->hysteresis); + low /= tegra->soc->thresh_grain; - temp = enforce_temp_range(ts, trip_temp) / ts->soc->thresh_grain; + for (i = 0; i < stc->num_zones; i++) { + struct tegra_thermctl_zone *zone = NULL; + unsigned int offset; + u32 r; - /* Hardcode LIGHT on LEVEL1 and HEAVY on LEVEL2 */ - throt = stc->id; - reg_off = THERMCTL_LVL_REG(sg->thermctl_lvl0_offset, throt + 1); + for (j = 0; j < tegra->soc->num_ttgs; j++) { + struct thermal_zone_device *tz = tegra->thermctl_tzs[j]; - if (throt == THROTTLE_LIGHT) { - cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_LIGHT; - gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_LIGHT; - } else { - cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_HEAVY; - gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_HEAVY; - if (throt != THROTTLE_HEAVY) - dev_warn(ts->dev, - "invalid throt id %d - assuming HEAVY", - throt); - } + if (tz->device.of_node == stc->zones[i]) { + zone = thermal_zone_device_priv(tz); + break; + } + } - r = readl(ts->regs + reg_off); - r = REG_SET_MASK(r, sg->thermctl_lvl0_up_thresh_mask, temp); - r = REG_SET_MASK(r, sg->thermctl_lvl0_dn_thresh_mask, temp); - r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt); - r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt); - r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1); - writel(r, ts->regs + reg_off); + if (!zone) + continue; + + if (!zone->sg->can_throttle) { + dev_warn(tegra->dev, "zone %s cannot be throttled\n", + zone->sg->name); + continue; + } + + /* Hardcode LIGHT on LEVEL1 and HEAVY on LEVEL2 */ + throt = stc->id; + offset = THERMCTL_LVL_REG(zone->sg->thermctl_lvl0_offset, throt + 1); + + if (throt == THROTTLE_LIGHT) { + cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_LIGHT; + gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_LIGHT; + } else { + cpu_throt = THERMCTL_LVL0_CPU0_CPU_THROT_HEAVY; + gpu_throt = THERMCTL_LVL0_CPU0_GPU_THROT_HEAVY; + if (throt != THROTTLE_HEAVY) + dev_warn(tegra->dev, + "invalid throt id %d - assuming HEAVY", + throt); + } + + r = readl(tegra->regs + offset); + r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_up_thresh_mask, high); + r = REG_SET_MASK(r, zone->sg->thermctl_lvl0_dn_thresh_mask, low); + r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_CPU_THROT_MASK, cpu_throt); + r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_GPU_THROT_MASK, gpu_throt); + r = REG_SET_MASK(r, THERMCTL_LVL0_CPU0_EN_MASK, 1); + writel(r, tegra->regs + offset); + + dev_info(tegra->dev, + "throttrip: will throttle when %s reaches %d mC\n", + zone->sg->name, stc->temperature); + } return 0; } @@ -606,25 +632,6 @@ static int tegra_thermctl_set_trip_temp(struct thermal_zone_device *tz, int trip return thermtrip_program(ts, sg, temp); else return 0; - - } else if (trip.type == THERMAL_TRIP_HOT) { - int i; - - for (i = 0; i < THROTTLE_SIZE; i++) { - struct thermal_cooling_device *cdev; - struct soctherm_throt_cfg *stc; - - if (!ts->throt_cfgs[i].init) - continue; - - cdev = ts->throt_cfgs[i].cdev; - if (get_thermal_instance(tz, cdev, trip_id)) - stc = find_throttle_cfg_by_name(ts, cdev->type); - else - continue; - - return throttrip_program(ts, sg, stc, temp); - } } return 0; @@ -685,29 +692,9 @@ static const struct thermal_zone_device_ops tegra_of_thermal_ops = { .set_trips = tegra_thermctl_set_trips, }; -static int get_hot_temp(struct thermal_zone_device *tz, int *trip_id, int *temp) -{ - int i, ret; - struct thermal_trip trip; - - for (i = 0; i < thermal_zone_get_num_trips(tz); i++) { - - ret = thermal_zone_get_trip(tz, i, &trip); - if (ret) - return -EINVAL; - - if (trip.type == THERMAL_TRIP_HOT) { - *trip_id = i; - return 0; - } - } - - return -EINVAL; -} - /** * tegra_soctherm_set_hwtrips() - set HW trip point from DT data - * @dev: struct device * of the SOC_THERM instance + * @ts: pointer to a struct tegra_soctherm * @sg: pointer to the sensor group to set the thermtrip temperature for * @tz: struct thermal_zone_device * * @@ -725,16 +712,12 @@ static int get_hot_temp(struct thermal_zone_device *tz, int *trip_id, int *temp) * THERMTRIP has been enabled successfully when a message similar to * this one appears on the serial console: * "thermtrip: will shut down when sensor group XXX reaches YYYYYY mC" - * THROTTLE has been enabled successfully when a message similar to - * this one appears on the serial console: - * ""throttrip: will throttle when sensor group XXX reaches YYYYYY mC" */ static int tegra_soctherm_set_hwtrips(struct tegra_soctherm *ts, const struct tegra_tsensor_group *sg, struct thermal_zone_device *tz) { - struct soctherm_throt_cfg *stc; - int i, trip, temperature, ret; + int temperature, ret; /* Get thermtrips. If missing, try to get critical trips. */ temperature = tsensor_group_thermtrip_get(ts, sg->id); @@ -752,43 +735,31 @@ static int tegra_soctherm_set_hwtrips(struct tegra_soctherm *ts, dev_info(ts->dev, "thermtrip: will shut down when %s reaches %d mC\n", sg->name, temperature); - ret = get_hot_temp(tz, &trip, &temperature); - if (ret) { - dev_info(ts->dev, "throttrip: %s: missing hot temperature\n", - sg->name); - return 0; - } - - for (i = 0; i < THROTTLE_OC1; i++) { - struct thermal_cooling_device *cdev; - - if (!ts->throt_cfgs[i].init) - continue; - - cdev = ts->throt_cfgs[i].cdev; - if (get_thermal_instance(tz, cdev, trip)) - stc = find_throttle_cfg_by_name(ts, cdev->type); - else - continue; - - ret = throttrip_program(ts, sg, stc, temperature); - if (ret) { - dev_err(ts->dev, "throttrip: %s: error during enable\n", - sg->name); - return ret; - } + return 0; +} - dev_info(ts->dev, - "throttrip: will throttle when %s reaches %d mC\n", - sg->name, temperature); - break; - } +/* + * soctherm_enable_hw_throttling() - enable hardware throttling trip points + * @tegra: pointer to a struct tegra_soctherm + * + * THROTTLE has been enabled successfully when a message similar to + * this one appears on the serial console: + * ""throttrip: will throttle when sensor group XXX reaches YYYYYY mC" + */ +static void soctherm_enable_hw_throttling(struct tegra_soctherm *tegra) +{ + struct soctherm_throt_cfg *stc; + int err; - if (i == THROTTLE_SIZE) - dev_info(ts->dev, "throttrip: %s: missing throttle cdev\n", - sg->name); + /* if configured, program the pulse skipper for CPU and GPU zones */ + stc = find_throttle_cfg_by_name(tegra, "heavy"); + if (!stc) + return; - return 0; + err = throttrip_program(tegra, stc); + if (err) + dev_err(tegra->dev, "throttrip: %s: failed to enable: %d\n", + stc->name, err); } static irqreturn_t soctherm_thermal_isr(int irq, void *dev_id) @@ -1494,40 +1465,6 @@ static int soctherm_clk_enable(struct tegra_soctherm *tegra, bool enable) return 0; } -static int throt_get_cdev_max_state(struct thermal_cooling_device *cdev, - unsigned long *max_state) -{ - *max_state = 1; - return 0; -} - -static int throt_get_cdev_cur_state(struct thermal_cooling_device *cdev, - unsigned long *cur_state) -{ - struct tegra_soctherm *ts = cdev->devdata; - u32 r; - - r = readl(ts->regs + THROT_STATUS); - if (REG_GET_MASK(r, THROT_STATUS_STATE_MASK)) - *cur_state = 1; - else - *cur_state = 0; - - return 0; -} - -static int throt_set_cdev_state(struct thermal_cooling_device *cdev, - unsigned long cur_state) -{ - return 0; -} - -static const struct thermal_cooling_device_ops throt_cooling_ops = { - .get_max_state = throt_get_cdev_max_state, - .get_cur_state = throt_get_cdev_cur_state, - .set_cur_state = throt_set_cdev_state, -}; - static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) { struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; @@ -1633,6 +1570,33 @@ static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, else goto err; + ret = of_property_read_u32(np, "temperature-millicelsius", + &stc->temperature); + if (ret < 0) + goto err; + + ret = of_property_read_u32(np, "hysteresis-millicelsius", + &stc->hysteresis); + if (ret < 0) + goto err; + + stc->num_zones = of_count_phandle_with_args(np, "nvidia,thermal-zones", + NULL); + if (stc->num_zones > 0) { + struct device_node *zone; + unsigned int i; + + stc->zones = devm_kcalloc(ts->dev, stc->num_zones, sizeof(zone), + GFP_KERNEL); + if (!stc->zones) + return -ENOMEM; + + for (i = 0; i < stc->num_zones; i++) { + zone = of_parse_phandle(np, "nvidia,thermal-zones", i); + stc->zones[i] = zone; + } + } + return 0; err: @@ -1642,14 +1606,12 @@ static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, } /** - * soctherm_init_hw_throt_cdev() - Parse the HW throttle configurations - * and register them as cooling devices. + * soctherm_init_hw_throttling() - parse the HW throttle configurations * @tegra: pointer to Tegra soctherm structure */ -static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) +static void soctherm_init_hw_throttling(struct tegra_soctherm *tegra) { struct device_node *np_stc, *np_stcc; - const char *name; int i; for (i = 0; i < THROTTLE_SIZE; i++) { @@ -1666,11 +1628,10 @@ static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) } for_each_child_of_node(np_stc, np_stcc) { + const char *name = np_stcc->name; struct soctherm_throt_cfg *stc; - struct thermal_cooling_device *tcd; int err; - name = np_stcc->name; stc = find_throttle_cfg_by_name(tegra, name); if (!stc) { dev_err(tegra->dev, "throttle-cfg: could not find %s\n", @@ -1692,19 +1653,6 @@ static void soctherm_init_hw_throt_cdev(struct tegra_soctherm *tegra) if (stc->id >= THROTTLE_OC1) { soctherm_oc_cfg_parse(tegra, np_stcc, stc); stc->init = true; - } else { - - tcd = thermal_of_cooling_device_register(np_stcc, - (char *)name, tegra, - &throt_cooling_ops); - if (IS_ERR_OR_NULL(tcd)) { - dev_err(tegra->dev, - "throttle-cfg: %s: failed to register cooling device\n", - name); - continue; - } - stc->cdev = tcd; - stc->init = true; } } @@ -2148,7 +2096,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) soctherm_thermtrips_parse(tegra); - soctherm_init_hw_throt_cdev(tegra); + soctherm_init_hw_throttling(tegra); soctherm_init(tegra); @@ -2183,6 +2131,7 @@ static int tegra_soctherm_probe(struct platform_device *pdev) goto disable_clocks; } + soctherm_enable_hw_throttling(tegra); err = soctherm_interrupts_init(tegra); soctherm_debug_init(tegra); @@ -2238,6 +2187,8 @@ static int __maybe_unused soctherm_resume(struct device *dev) } } + soctherm_enable_hw_throttling(tegra); + return 0; } diff --git a/drivers/thermal/tegra/soctherm.h b/drivers/thermal/tegra/soctherm.h index 70501e73d586..894bee5d96c5 100644 --- a/drivers/thermal/tegra/soctherm.h +++ b/drivers/thermal/tegra/soctherm.h @@ -83,6 +83,7 @@ struct tegra_tsensor_group { u16 thermctl_lvl0_offset; u32 thermctl_lvl0_up_thresh_mask; u32 thermctl_lvl0_dn_thresh_mask; + bool can_throttle; }; struct tegra_tsensor_configuration { diff --git a/drivers/thermal/tegra/tegra124-soctherm.c b/drivers/thermal/tegra/tegra124-soctherm.c index 20ad27f4d1a1..7b11fa8fb533 100644 --- a/drivers/thermal/tegra/tegra124-soctherm.c +++ b/drivers/thermal/tegra/tegra124-soctherm.c @@ -60,6 +60,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_cpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = { @@ -79,6 +80,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_gpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra124_tsensor_group_pll = { @@ -96,6 +98,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_pll = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group tegra124_tsensor_group_mem = { @@ -115,6 +118,7 @@ static const struct tegra_tsensor_group tegra124_tsensor_group_mem = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, .thermctl_lvl0_up_thresh_mask = TEGRA124_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA124_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group *tegra124_tsensor_groups[] = { diff --git a/drivers/thermal/tegra/tegra132-soctherm.c b/drivers/thermal/tegra/tegra132-soctherm.c index b76308fdad9e..304561fe9110 100644 --- a/drivers/thermal/tegra/tegra132-soctherm.c +++ b/drivers/thermal/tegra/tegra132-soctherm.c @@ -60,6 +60,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_cpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = { @@ -79,6 +80,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_gpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra132_tsensor_group_pll = { @@ -96,6 +98,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_pll = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group tegra132_tsensor_group_mem = { @@ -115,6 +118,7 @@ static const struct tegra_tsensor_group tegra132_tsensor_group_mem = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, .thermctl_lvl0_up_thresh_mask = TEGRA132_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA132_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group *tegra132_tsensor_groups[] = { diff --git a/drivers/thermal/tegra/tegra210-soctherm.c b/drivers/thermal/tegra/tegra210-soctherm.c index d0ff793f18c5..6277a8e12b8a 100644 --- a/drivers/thermal/tegra/tegra210-soctherm.c +++ b/drivers/thermal/tegra/tegra210-soctherm.c @@ -61,6 +61,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_cpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_CPU, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra210_tsensor_group_gpu = { @@ -80,6 +81,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_gpu = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_GPU, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = true, }; static const struct tegra_tsensor_group tegra210_tsensor_group_pll = { @@ -97,6 +99,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_pll = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_TSENSE, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group tegra210_tsensor_group_mem = { @@ -116,6 +119,7 @@ static const struct tegra_tsensor_group tegra210_tsensor_group_mem = { .thermctl_lvl0_offset = THERMCTL_LEVEL0_GROUP_MEM, .thermctl_lvl0_up_thresh_mask = TEGRA210_THERMCTL_LVL0_UP_THRESH_MASK, .thermctl_lvl0_dn_thresh_mask = TEGRA210_THERMCTL_LVL0_DN_THRESH_MASK, + .can_throttle = false, }; static const struct tegra_tsensor_group *tegra210_tsensor_groups[] = { From patchwork Thu Oct 12 17:58:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732664 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E2CBC374FE for ; Thu, 12 Oct 2023 17:58:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="fphUbuP5" Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 34D00D8; Thu, 12 Oct 2023 10:58:52 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-98377c5d53eso196194666b.0; Thu, 12 Oct 2023 10:58:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133530; x=1697738330; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VUzeKB1yCFHbHpy/R/DeukJyJ6pBoEQylMQ/XA8sQ4U=; b=fphUbuP55o+wa/a6FvD0yF8Ys1nS0HJHhNeMIbvREYnreg96Blv1VXgeMMwcEJLEU6 zBsE0trI00fKSxwTHM3H1m2o25hvisUeER7KJRTkK9IdHkNz3zvo6K9iRrvUxtzMsa1K zzs2DrFts85eU7qrSMPjfl+wOcv/nhNpXGSDpTpLWWZniSKGS1+sbayqCpWh0kXEItW6 4IRJUOSttfOrAj368ymg2mq68X0d9VOvDXdhmICzcPJN2zZmpUKR39GntFguqZLRA+jb pGEAHctoNpcOvEyLOHImTfRgRspPsbl0Vpco7+EaPv5emtw4/NN6Yx113/6dBmfWrlod NzuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133530; x=1697738330; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VUzeKB1yCFHbHpy/R/DeukJyJ6pBoEQylMQ/XA8sQ4U=; b=YpBaUSwXq0hqpZ5UqB7cqbgIHwA210C2v7cDq8PRLiJRAFBMFdw06T+k2+ilkQrnxh s1E0Zd/krK7rOFDX+4lSqJbFKrVMN2LsSv4WGr+4KAlSxr8uKTpXyC5iC3Ukm7nSnpsh E9MrK6vP9071MeXhO76iBpZTgtn2n1pShxb4sXyz4isjvROC9AaMpNSqFHNYf9WWRIVK z9gmzZUs4fmisHfMargGWNzgib6JmqDycZj4FPYMLVlf7qfVDHwj6vmMjnanAKwhk4RQ 1TxKx/V6YZUWWiZ0GAfT7MhIkJHhivcH+GGKee0mEgj2Z4pyVcNbIR5I9WImYytdoYit YtAQ== X-Gm-Message-State: AOJu0Yx5bwcTXzjOHM7y6OkFGHfrhWbmbfjvM+XopVkU5MIxyFkc2L/U WFeOrjGHI0NF9U+pFakxtYk= X-Google-Smtp-Source: AGHT+IHaxIhtOujcEyPSq8wJRA+tkkWT7e+x3qFSajkRsuhGygsn9qYqURFra05J/HY7qpW3au+qaQ== X-Received: by 2002:a17:906:3081:b0:9ae:73ca:bbad with SMTP id 1-20020a170906308100b009ae73cabbadmr22046397ejv.43.1697133530282; Thu, 12 Oct 2023 10:58:50 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id rp19-20020a170906d97300b009b95b46bbd1sm11323217ejb.133.2023.10.12.10.58.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:50 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 07/13] thermal: tegra: Use unsigned int where appropriate Date: Thu, 12 Oct 2023 19:58:28 +0200 Message-ID: <20231012175836.3408077-8-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding Use unsigned integers more consistently, which helps to make it more explicit about what values can be expected. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 28 +++++++++++++++------------- 1 file changed, 15 insertions(+), 13 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 105ec20d509d..c7f8e36cbeab 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -591,8 +591,9 @@ find_throttle_cfg_by_name(struct tegra_soctherm *ts, const char *name) static int tsensor_group_thermtrip_get(struct tegra_soctherm *ts, int id) { - int i, temp = min_low_temp; struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; + int temp = min_low_temp; + unsigned int i; if (id >= TEGRA124_SOCTHERM_SENSOR_NUM) return temp; @@ -1469,33 +1470,34 @@ static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) { struct tsensor_group_thermtrips *tt = ts->soc->thermtrips; const int max_num_prop = ts->soc->num_ttgs * 2; + unsigned int i, j, count; u32 *tlb; - int i, j, n, ret; + int ret; if (!tt) return -ENOMEM; - n = of_property_count_u32_elems(ts->dev->of_node, "nvidia,thermtrips"); - if (n <= 0) { + ret = of_property_count_u32_elems(ts->dev->of_node, "nvidia,thermtrips"); + if (ret <= 0) { dev_info(ts->dev, - "missing thermtrips, will use critical trips as shut down temp\n"); - return n; + "missing thermtrips, will use critical trips as shut down temperature\n"); + return ret; } - n = min(max_num_prop, n); + count = min_t(unsigned int, ret, ts->soc->num_ttgs * 2); tlb = devm_kcalloc(ts->dev, max_num_prop, sizeof(u32), GFP_KERNEL); if (!tlb) return -ENOMEM; + ret = of_property_read_u32_array(ts->dev->of_node, "nvidia,thermtrips", - tlb, n); + tlb, count); if (ret) { dev_err(ts->dev, "invalid num ele: thermtrips:%d\n", ret); return ret; } - i = 0; - for (j = 0; j < n; j = j + 2) { + for (i = 0, j = 0; j < count; j = j + 2) { if (tlb[j] >= TEGRA124_SOCTHERM_SENSOR_NUM) continue; @@ -1612,7 +1614,7 @@ static int soctherm_throt_cfg_parse(struct tegra_soctherm *ts, static void soctherm_init_hw_throttling(struct tegra_soctherm *tegra) { struct device_node *np_stc, *np_stcc; - int i; + unsigned int i; for (i = 0; i < THROTTLE_SIZE; i++) { tegra->throt_cfgs[i].name = throt_names[i]; @@ -1875,8 +1877,8 @@ static void soctherm_throttle_program(struct tegra_soctherm *ts, static void tegra_soctherm_throttle(struct tegra_soctherm *ts) { + unsigned int i; u32 v; - int i; /* configure LOW, MED and HIGH levels for CCROC NV_THERM */ if (ts->soc->use_ccroc) { @@ -1950,8 +1952,8 @@ static int soctherm_interrupts_init(struct tegra_soctherm *tegra) static void soctherm_init(struct tegra_soctherm *tegra) { const struct tegra_tsensor_group **ttgs = tegra->soc->ttgs; - int i; u32 pdiv, hotspot; + unsigned int i; /* Initialize raw sensors */ for (i = 0; i < tegra->soc->num_tsensors; ++i) From patchwork Thu Oct 12 17:58:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732662 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1ABC8374F6 for ; Thu, 12 Oct 2023 17:58:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="HOcHNhzp" Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3E385DC; Thu, 12 Oct 2023 10:58:55 -0700 (PDT) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-9b275afb6abso510955266b.1; Thu, 12 Oct 2023 10:58:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133534; x=1697738334; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PFkzZubIKvHWWywCOt/a5WVYYq1z0VOWDgSVq/0tCKQ=; b=HOcHNhzpb2NmGar5HN4GdRTKm17L/wKTwf+A1HqCCtDbP+BZ2rfVT9AeP+Xexudvvc toZQJmU7z3aDEE4ySW2uNDrzVXI/9s8KYQc3aehlK0+liPul0XBuWKIb3bksfi89hIvW /KqLXccxY3P0QoQCytdbFfmLIKrsbnhFrA0+nQ5SyRj0xRsEmL4VLVXLtpWkNP9zrA8e /popt95cjztHQTRc6yBbf0s80qTy2IVVcRhEzu44NMJIPz9b0BSE8dtN4Y6L8RdgHNE5 ACjuFT4wMAKXwwNpluuRVJo3wFV/n3+Rt7nJpht9ByET95HChLhzIEo8CvDrd5QabSoc 4aoQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133534; x=1697738334; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PFkzZubIKvHWWywCOt/a5WVYYq1z0VOWDgSVq/0tCKQ=; b=SBD0NInu9aTcp0cj5czeKyAEaIuMGlD7PMqCnuUfaJxRo0VsTLz8BMPe3c6bn/iiKk t9jUcAD3RFNeAgX0aL8xB2r75ivO8pSB6wZd1idK50vje/VEgyJ1DecJ0m/2nN67f+2K ZA/gCBN62yI4evj2OKpuzr/8sXqlcY47nYp4iayPPNrZE2QaXOQXJRK3S9SsNX+J93jM cpITLtu8ZoyjMsG0frIQDiyA2V1b0Fnl9jM/eiDL21hizLLLzQSRDSdHREIXL2LkT90v jzH0kAUWlNpEu+jJy7hSoRFODbnNsxxhw8lWqrD7ufFNes4lXT3QpzKj4yKB10xS7R1d gBcw== X-Gm-Message-State: AOJu0YzQoMB3W4IKX5q0VNWDpEU/NGNorZ8MyQ05X+x21T/Z2/ZTv5V9 6/EmQoDXVTwM/jWNqvRjQv/5cOUg3I8= X-Google-Smtp-Source: AGHT+IEhP9J0SWf1YHmceNjScXupZVhu4lkNIj+37J22fpuqGX9MwnE3bgI+e3ppoizrDWiSWqDO4Q== X-Received: by 2002:a17:907:36c9:b0:9a9:fa4a:5a4e with SMTP id bj9-20020a17090736c900b009a9fa4a5a4emr17202083ejc.13.1697133533694; Thu, 12 Oct 2023 10:58:53 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id n14-20020aa7c44e000000b005361fadef32sm10260121edr.23.2023.10.12.10.58.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:53 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 10/13] thermal: tegra: Minor stylistic cleanups Date: Thu, 12 Oct 2023 19:58:31 +0200 Message-ID: <20231012175836.3408077-11-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding Fix up some whitespace (padding, identation) issues and reword an unreadable comment. Signed-off-by: Thierry Reding --- drivers/thermal/tegra/soctherm.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/thermal/tegra/soctherm.c b/drivers/thermal/tegra/soctherm.c index 77051d08e69f..f749fb960ebe 100644 --- a/drivers/thermal/tegra/soctherm.c +++ b/drivers/thermal/tegra/soctherm.c @@ -1492,7 +1492,9 @@ static int soctherm_thermtrips_parse(struct tegra_soctherm *ts) ret = of_property_read_u32_array(ts->dev->of_node, "nvidia,thermtrips", tlb, count); if (ret) { - dev_err(ts->dev, "invalid num ele: thermtrips:%d\n", ret); + dev_err(ts->dev, + "failed to read \"nvidia,thermtrips\" property: %d\n", + ret); return ret; } @@ -1812,7 +1814,7 @@ static void throttlectl_gpu_level_select(struct tegra_soctherm *ts, } static int soctherm_oc_cfg_program(struct tegra_soctherm *ts, - enum soctherm_throttle_id throt) + enum soctherm_throttle_id throt) { u32 r; struct soctherm_oc_cfg *oc = &ts->throt_cfgs[throt].oc_cfg; @@ -2104,8 +2106,9 @@ static int tegra_soctherm_probe(struct platform_device *pdev) soctherm_init(tegra); for (i = 0; i < soc->num_ttgs; ++i) { - struct tegra_thermctl_zone *zone = - devm_kzalloc(&pdev->dev, sizeof(*zone), GFP_KERNEL); + struct tegra_thermctl_zone *zone; + + zone = devm_kzalloc(&pdev->dev, sizeof(*zone), GFP_KERNEL); if (!zone) { err = -ENOMEM; goto disable_clocks; From patchwork Thu Oct 12 17:58:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732661 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D63D136B16 for ; Thu, 12 Oct 2023 17:58:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="PHNcE7C/" Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47D4FD8; Thu, 12 Oct 2023 10:58:56 -0700 (PDT) Received: by mail-ej1-x636.google.com with SMTP id a640c23a62f3a-9ada2e6e75fso220307866b.2; Thu, 12 Oct 2023 10:58:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133535; x=1697738335; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=bQuQUPOK41L8ruCThuwtkRFjbwLr0TuEAepWZfSMkPo=; b=PHNcE7C/o4LtzspoLqrhHdyJWGqg5TUwu6fBdwJv6lNCGbCelL2Wt18dU4YasY85fM FOd2j5Uukt2U93izLl34JnbZ6aisXv03rHejYcHieXLUcF22XU3TPpBt6VY6oSVnUz1u mPNI8qXjwsFVDdWj4FQPaIOgWJsFWyPcNizalkOtHj0FafrsnDj6MXgYdTLK6Vi0XgYU xLHLE/k1ykCFA3iya6ujnK7aNX3JKsdoLG733CmI/cV2KVu/PqkqoWjZSKfPTgbEE8ti /Md8KUzw+Ys6gZXefgVVyqwRTdD4PnMwnKoejtzq9y6wqaXX3wWTawJkVY3pn7F2GnOK zXnA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133535; x=1697738335; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bQuQUPOK41L8ruCThuwtkRFjbwLr0TuEAepWZfSMkPo=; b=wAVaiKCy/+MqsUiBEdayHKSdEvFCTHWuEkm9Z70QYbbkJ4tw1O269wF3PszEUj2YQQ dy3dRXGdGg27g8MrDf5ox8gkhDN1xa3R2o+QPlx6BVh7yxVUSUqa8Vw0TPGtFKGOvFCr giGmGMgWLJplQjNquJMBF1HT7qt7PEZSnEMfRrKGIsWFO3aQKUfhV/sVCKxp6Q2o1PmI VN5eFnQLfLwYZyUCxAk1YizEmpC1cMgbndsbrwayOLXKE029sCSux7WKbQv6dOFbK9vr 1AzwTiCEeAFGrDhzTY1XFh77WtgdHA7dmrN3H30FxcsD4/EPJ2QWrBWnhXd/1YnPCmgK xtnw== X-Gm-Message-State: AOJu0YyXLenoTC8JvxiiVd7eZSYEblOKCs0KXbNoaRWmr0nPg5AHp9ac 5Vjyrx7o13cXfub46xAD97J90d75kC8= X-Google-Smtp-Source: AGHT+IEA8/jn9S/lT9WfviI/mRMO3oKFAi8T0/gg6HfHQNpik2syq5btlK0iOgrRA+7BOaMq3R53aA== X-Received: by 2002:a17:906:768e:b0:9b2:f38d:c44b with SMTP id o14-20020a170906768e00b009b2f38dc44bmr21178653ejm.24.1697133534697; Thu, 12 Oct 2023 10:58:54 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id br13-20020a170906d14d00b0099cb349d570sm11337214ejb.185.2023.10.12.10.58.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:54 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 11/13] arm64: tegra: Rework SOCTHERM on Tegra132 and Tegra210 Date: Thu, 12 Oct 2023 19:58:32 +0200 Message-ID: <20231012175836.3408077-12-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding The "heavy throttle" cooling device that SOCTHERM uses isn't a cooling device in the traditional sense. It's an automatic mechanism that cannot be actively controlled. Do not expose it as a cooling device and instead of tying it to a specific trip point, hard-code the temperature at which the automatic throttling will begin. While at it, clean up the trip point names to reflect the names used by the thermal device tree bindings. Signed-off-by: Thierry Reding --- arch/arm64/boot/dts/nvidia/tegra132.dtsi | 66 ++++++------------ arch/arm64/boot/dts/nvidia/tegra210.dtsi | 86 +++++++----------------- 2 files changed, 45 insertions(+), 107 deletions(-) diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi index 7e24a212c7e4..105e01be341b 100644 --- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi @@ -878,11 +878,13 @@ soctherm: thermal-sensor@700e2000 { #thermal-sensor-cells = <1>; throttle-cfgs { - throttle_heavy: heavy { + heavy { nvidia,priority = <100>; nvidia,cpu-throt-level = ; - - #cooling-cells = <2>; + nvidia,thermal-zones = <&{/thermal-zones/cpu-thermal}>, + <&{/thermal-zones/gpu-thermal}>; + temperature-millicelsius = <102000>; + hysteresis-millicelsius = <4000>; }; }; }; @@ -1138,114 +1140,84 @@ cpu-thermal { polling-delay-passive = <1000>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; trips { - cpu_shutdown_trip { + critical { temperature = <105000>; hysteresis = <1000>; type = "critical"; }; - cpu_throttle_trip: throttle-trip { + hot { temperature = <102000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&cpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; mem-thermal { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; trips { - mem_shutdown_trip { + critical { temperature = <101000>; hysteresis = <1000>; type = "critical"; }; - mem_throttle_trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; gpu-thermal { polling-delay-passive = <1000>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; trips { - gpu_shutdown_trip { + critical { temperature = <101000>; hysteresis = <1000>; type = "critical"; }; - gpu_throttle_trip: throttle-trip { + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&gpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; pllx-thermal { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; trips { - pllx_shutdown_trip { + critical { temperature = <105000>; hysteresis = <1000>; type = "critical"; }; - pllx_throttle_trip { + + hot { temperature = <99000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; }; diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 47f8268e46bf..b340579594e4 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1329,12 +1329,14 @@ soctherm: thermal-sensor@700e2000 { #thermal-sensor-cells = <1>; throttle-cfgs { - throttle_heavy: heavy { + heavy { nvidia,priority = <100>; nvidia,cpu-throt-percent = <85>; nvidia,gpu-throt-level = ; - - #cooling-cells = <2>; + nvidia,thermal-zones = <&{/thermal-zones/cpu-thermal}>, + <&{/thermal-zones/gpu-thermal}>; + temperature-millicelsius = <98500>; + hysteresis-millicelsius = <4000>; }; }; }; @@ -2032,73 +2034,53 @@ cpu-thermal { polling-delay-passive = <1000>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_CPU>; trips { - cpu-shutdown-trip { + critical { temperature = <102500>; hysteresis = <0>; type = "critical"; }; - cpu_throttle_trip: throttle-trip { + hot { temperature = <98500>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&cpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; mem-thermal { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_MEM>; trips { - dram_nominal: mem-nominal-trip { - temperature = <50000>; - hysteresis = <1000>; - type = "passive"; - }; - - dram_throttle: mem-throttle-trip { - temperature = <70000>; - hysteresis = <1000>; - type = "active"; + critical { + temperature = <103000>; + hysteresis = <0>; + type = "critical"; }; - mem-hot-trip { + hot { temperature = <100000>; hysteresis = <1000>; type = "hot"; }; - mem-shutdown-trip { - temperature = <103000>; - hysteresis = <0>; - type = "critical"; + emc_throttle_trip: passive { + temperature = <95000>; + hysteresis = <2000>; + type = "passive"; }; }; cooling-maps { - dram-passive { - cooling-device = <&emc 0 0>; - trip = <&dram_nominal>; - }; - - dram-active { + map-passive { cooling-device = <&emc 1 1>; - trip = <&dram_throttle>; + trip = <&emc_throttle_trip>; }; }; }; @@ -2107,58 +2089,42 @@ gpu-thermal { polling-delay-passive = <1000>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_GPU>; trips { - gpu-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - gpu_throttle_trip: throttle-trip { + hot { temperature = <100000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - map0 { - trip = <&gpu_throttle_trip>; - cooling-device = <&throttle_heavy 1 1>; - }; - }; }; pllx-thermal { polling-delay-passive = <0>; polling-delay = <0>; - thermal-sensors = - <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; + thermal-sensors = <&soctherm TEGRA124_SOCTHERM_SENSOR_PLLX>; trips { - pllx-shutdown-trip { + critical { temperature = <103000>; hysteresis = <0>; type = "critical"; }; - pllx-throttle-trip { + hot { temperature = <100000>; hysteresis = <1000>; type = "hot"; }; }; - - cooling-maps { - /* - * There are currently no cooling maps, - * because there are no cooling devices. - */ - }; }; }; From patchwork Thu Oct 12 17:58:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 732660 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6BE338DE3 for ; Thu, 12 Oct 2023 17:59:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="iaZrBED5" Received: from mail-ej1-x632.google.com (mail-ej1-x632.google.com [IPv6:2a00:1450:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 20CECDC; Thu, 12 Oct 2023 10:59:00 -0700 (PDT) Received: by mail-ej1-x632.google.com with SMTP id a640c23a62f3a-9a645e54806so195597566b.0; Thu, 12 Oct 2023 10:59:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1697133538; x=1697738338; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zs3+sAOJu0kBwxZ0dser/vItknBWGT6p32J9u+acJCk=; b=iaZrBED548IW1oaqTyFiylNlS6rwaa4z3MIZSWBZTELGs75jurHxDiaMqPtYtFatkC jKWtL0Z5mkePuA2Vgj9Zh6VbblaNBeriNGZ82HcLwlbHAe1Mn/xbmXu0KNFHh9IItMtW m0OwQadbq88HgS4TS16Oi+UbYEbFdL/aGWfNQtvBvGtktLAbgFwNPrfukBVtGqf8QvXi Om+YEvEJVJQsmXfbtBo00j/fnFRnPK/fXk3Xh7CbFqDxWtyuBYdT7BXJEnbJh9j3wogU R6RDelqlnddhWTcoh3tuUuqT+C1feOjKueUzAeest1aExHbSF/nwh8oymVYie++Oryar KScg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697133538; x=1697738338; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zs3+sAOJu0kBwxZ0dser/vItknBWGT6p32J9u+acJCk=; b=bG/D3MhY8I9z0X0CjA30vzFavwCY5e3R5cI9wsAQ9S0jmOMfeMwuK6xXh4zLaBw44A 7U6/kjg8Hx1orBr9xme8Rq03+ya3uIIzxSZ+XD0DyE/ClQATlhYpHohnUVxnWypYRet7 3I9yz9ZX5kXB/an+w0h5jkr6vsb6mjHfB12WjB7ceycR1LckYJpsnmDS3EUIjnriKQ2m ybLc2jaRTqgQf3plmFCebUW8lEUTDhDPSi8uyRtrCGboWzuFS2vNcHvJzN55D5UHWSMO 3XIvzeIUkullUvHWoKzE/NH6FzSxlkQ7BNh0wAYfKMx/VFwVpm8cpxLd8TF5qRH3srQs lTKw== X-Gm-Message-State: AOJu0YxC0226hRWjqt1mjxVd86hLb8HwIvR9bwauTQ5iVDKptawE8Otz PH/6g9U4se+NHuqW7ckXxCs= X-Google-Smtp-Source: AGHT+IF/YU8vd6JUNl+eP3lbnEbdb/071IgSnsQGblva12Ql0JpQaNX94lXgXn3I3hzmtY1egSQFgw== X-Received: by 2002:a17:907:774c:b0:9b2:7a4e:69fc with SMTP id kx12-20020a170907774c00b009b27a4e69fcmr22373760ejc.19.1697133538582; Thu, 12 Oct 2023 10:58:58 -0700 (PDT) Received: from localhost (p200300e41f3f4900f22f74fffe1f3a53.dip0.t-ipconnect.de. [2003:e4:1f3f:4900:f22f:74ff:fe1f:3a53]) by smtp.gmail.com with ESMTPSA id cf7-20020a170906b2c700b009b296ce13a3sm11628560ejb.18.2023.10.12.10.58.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 12 Oct 2023 10:58:58 -0700 (PDT) From: Thierry Reding To: Daniel Lezcano , "Rafael J . Wysocki" , Thierry Reding , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Amit Kucheria , Zhang Rui , Jon Hunter , linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH v2 13/13] thermal: Enforce self-encapsulation Date: Thu, 12 Oct 2023 19:58:36 +0200 Message-ID: <20231012175836.3408077-16-thierry.reding@gmail.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231012175836.3408077-1-thierry.reding@gmail.com> References: <20231012175836.3408077-1-thierry.reding@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net From: Thierry Reding With the last driver being fixed to not reach into the core anymore, make sure that no new drivers will be able to do so by generating a build error when they try to do so. Signed-off-by: Thierry Reding --- drivers/thermal/thermal_core.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/thermal/thermal_core.h b/drivers/thermal/thermal_core.h index 91d9d4f63609..9c599658b866 100644 --- a/drivers/thermal/thermal_core.h +++ b/drivers/thermal/thermal_core.h @@ -15,7 +15,7 @@ #include "thermal_netlink.h" #ifndef THERMAL_CORE_SUBSYS -#warning This header can only be included by the thermal core code +#error This header can only be included by the thermal core code #endif /* Default Thermal Governor */