From patchwork Sat Oct 14 20:51:32 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 734718 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A5D701D53A for ; Sat, 14 Oct 2023 20:51:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Ho/Ip+wQ" Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 029EFDD for ; Sat, 14 Oct 2023 13:51:39 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id 2adb3069b0e04-507a936f4a9so213059e87.1 for ; Sat, 14 Oct 2023 13:51:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697316697; x=1697921497; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=Xcek1IExtexURMeKlMsRJspW07mCiJH38XQWX0Z5ASQ=; b=Ho/Ip+wQpanOLGx8D3hzsLV4Tar+92HUj1Gz3RrvpiKm7nrhMMprgjbrr9tviAYTwZ wy48pCICv5Ux6E1QBb7plk+9X79G/Q6gPcnDKpj9MPgZvlZy7yAP0/0xcDqogfXN/WsZ B8R2LnN0f5SV0NGPGhyw722BZTWB9cMvidX6zxZG4xbF+Ex+0SrIUO4mUucPSOJ7K5zD UnCo6XSyALVek5E1/UP/7BqhUIeK3/WMASl9xfBkm/OR8PxwL0V+GTAAfjm2VawdrR44 hImgWHksD8aReeQ5yxMI83MNN3RbPcQ8r30huphq9JuL2ASnlMdY7Ogk5OCORhDmzCBQ 1lvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697316697; x=1697921497; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Xcek1IExtexURMeKlMsRJspW07mCiJH38XQWX0Z5ASQ=; b=Uu0A63qU4BRqSd0TOnmCC1z1sa9li901EGB3uwY3VOGPpM6ORwRotmsXHXN0NUw/l7 wPjE8+SP+/08ThH+ZiNrRT8y0NmXOtJ9F+7NtgPREltev54eTyZnH4WNfombYSy5KgZ8 mOYC94FzEfxdp84n8+3N3a11m69yZcrGp8nTLmaOgmJmp1Wur0v+K3z6xWVkvSRZVksb Y5zoxPz/N5DPvs5pyz8b2k8s+r16Zj3j99DUarhNh6uZAaTCbxX/SyEFsiNEkY7W38Ca Tsp43DMTsECOjatjD2jwhhavRdD6lgwWh8XgyOLJDKS886poRIkt0mOHArfQ1tOa5H9V XBXQ== X-Gm-Message-State: AOJu0YzZRuHOZ1eAp1BwiiWGGhtnfRxNE0NW8C+Javh8HKpktYrCiqyx AOmQHFYSA7dtj63tBUFFs4jv0A== X-Google-Smtp-Source: AGHT+IFWoXuCIM9U+91E+u52ZglKN4DGR6vV6X5C3ttGMvevAUGWFRpQStXCC1OTmn0FFO1NbGVcKQ== X-Received: by 2002:a19:4f09:0:b0:500:c534:3e4e with SMTP id d9-20020a194f09000000b00500c5343e4emr24511184lfb.60.1697316697262; Sat, 14 Oct 2023 13:51:37 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o17-20020ac24e91000000b004ff96c09b47sm49926lfr.260.2023.10.14.13.51.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:51:36 -0700 (PDT) From: Linus Walleij Date: Sat, 14 Oct 2023 22:51:32 +0200 Subject: [PATCH net-next v2 1/5] dt-bindings: marvell: Rewrite MV88E6xxx in schema Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231014-marvell-88e6152-wan-led-v2-1-7fca08b68849@linaro.org> References: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> In-Reply-To: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net This is an attempt to rewrite the Marvell MV88E6xxx switch bindings in YAML schema. The current text binding says: WARNING: This binding is currently unstable. Do not program it into a FLASH never to be changed again. Once this binding is stable, this warning will be removed. Well that never happened before we switched to YAML markup, we can't have it like this, what about fixing the mess? Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6xxx.yaml | 241 +++++++++++++++++++++ .../devicetree/bindings/net/dsa/marvell.txt | 109 ---------- MAINTAINERS | 2 +- 3 files changed, 242 insertions(+), 110 deletions(-) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml new file mode 100644 index 000000000000..22ae844da2b5 --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml @@ -0,0 +1,241 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6xxx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6xxx DSA switch family + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6xxx switch series has been produced and sold + by Marvell since at least 2010. The switch has a few compatibles which + just indicate the base address of the switch, then operating systems + can investigate switch ID registers to find out which actual version + of the switch it is dealing with. + +properties: + compatible: + oneOf: + - enum: + - marvell,mv88e6085 + - marvell,mv88e6190 + - marvell,mv88e6250 + description: | + marvell,mv88e6085: This switch uses base address 0x10. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6085" should be + specified. This includes the following list of MV88Exxxx switches: + 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, 6171, 6172, 6175, 6176, + 6185, 6240, 6320, 6321, 6341, 6350, 6351, 6352 + marvell,mv88e6190: This switch uses base address 0x00. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6190" should be + specified. This includes the following list of MV88Exxxx switches: + 6190, 6190X, 6191, 6290, 6361, 6390, 6390X + marvell,mv88e6250: This switch uses base address 0x08 or 0x18. + This switch and its siblings will be autodetected from + ID registers found in the switch, so only "marvell,mv88e6250" should be + specified. This includes the following list of MV88Exxxx switches: + 6220, 6250 + + reg: + maxItems: 1 + + eeprom-length: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Set to the length of an EEPROM connected to the switch. Must be + set if the switch can not detect the presence and/or size of a connected + EEPROM, otherwise optional. + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + + interrupts: + description: The switch provides an external interrupt line, but it is + not always used by target systems. + maxItems: 1 + + interrupt-controller: + description: The switch has an internal interrupt controller used by + the different sub-blocks. + + '#interrupt-cells': + description: The internal interrupt controller only supports triggering + on active high level interrupts so the second cell must alway be set to + IRQ_TYPE_LEVEL_HIGH. + const: 2 + + mdio: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an internal mdio bus to + access switch ports, which is handled in this node. + + mdio-external: + $ref: /schemas/net/mdio.yaml# + unevaluatedProperties: false + description: Marvell MV88E6xxx switches have an external mdio bus to + access external PHYs connected to the switch ports. + + properties: + compatible: + const: marvell,mv88e6xxx-mdio-external + + required: + - compatible + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch0: switch@0 { + compatible = "marvell,mv88e6085"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@4 { + reg = <4>; + label = "wan"; + }; + + port@5 { + reg = <5>; + phy-mode = "sgmii"; + ethernet = <ð2>; + + fixed-link { + speed = <1000>; + full-duplex; + }; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch0phy0: switch0phy@0 { + reg = <0>; + interrupt-parent = <&switch0>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + }; + }; + + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch1: switch@0 { + compatible = "marvell,mv88e6190"; + reg = <0>; + reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; + interrupt-parent = <&gpio0>; + interrupts = <27 IRQ_TYPE_LEVEL_LOW>; + interrupt-controller; + #interrupt-cells = <2>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + }; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + switch1phy0: switch1phy@0 { + reg = <0>; + interrupt-parent = <&switch1>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + }; + }; + + mdio-external { + compatible = "marvell,mv88e6xxx-mdio-external"; + #address-cells = <1>; + #size-cells = <0>; + switch1phy9: switch1phy@9 { + reg = <9>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/net/dsa/marvell.txt b/Documentation/devicetree/bindings/net/dsa/marvell.txt deleted file mode 100644 index 6ec0c181b6db..000000000000 --- a/Documentation/devicetree/bindings/net/dsa/marvell.txt +++ /dev/null @@ -1,109 +0,0 @@ -Marvell DSA Switch Device Tree Bindings ---------------------------------------- - -WARNING: This binding is currently unstable. Do not program it into a -FLASH never to be changed again. Once this binding is stable, this -warning will be removed. - -If you need a stable binding, use the old dsa.txt binding. - -Marvell Switches are MDIO devices. The following properties should be -placed as a child node of an mdio device. - -The properties described here are those specific to Marvell devices. -Additional required and optional properties can be found in dsa.txt. - -The compatibility string is used only to find an identification register, -which is at a different MDIO base address in different switch families. -- "marvell,mv88e6085" : Switch has base address 0x10. Use with models: - 6085, 6095, 6097, 6123, 6131, 6141, 6161, 6165, - 6171, 6172, 6175, 6176, 6185, 6240, 6320, 6321, - 6341, 6350, 6351, 6352 -- "marvell,mv88e6190" : Switch has base address 0x00. Use with models: - 6190, 6190X, 6191, 6290, 6361, 6390, 6390X -- "marvell,mv88e6250" : Switch has base address 0x08 or 0x18. Use with model: - 6220, 6250 - -Required properties: -- compatible : Should be one of "marvell,mv88e6085", - "marvell,mv88e6190" or "marvell,mv88e6250" as - indicated above -- reg : Address on the MII bus for the switch. - -Optional properties: - -- reset-gpios : Should be a gpio specifier for a reset line -- interrupts : Interrupt from the switch -- interrupt-controller : Indicates the switch is itself an interrupt - controller. This is used for the PHY interrupts. -#interrupt-cells = <2> : Controller uses two cells, number and flag -- eeprom-length : Set to the length of an EEPROM connected to the - switch. Must be set if the switch can not detect - the presence and/or size of a connected EEPROM, - otherwise optional. -- mdio : Container of PHY and devices on the switches MDIO - bus. -- mdio? : Container of PHYs and devices on the external MDIO - bus. The node must contains a compatible string of - "marvell,mv88e6xxx-mdio-external" - -Example: - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6085"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - }; - }; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&gpio0>; - interrupts = <27 IRQ_TYPE_LEVEL_LOW>; - interrupt-controller; - #interrupt-cells = <2>; - - switch0: switch@0 { - compatible = "marvell,mv88e6190"; - reg = <0>; - reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; - - mdio { - #address-cells = <1>; - #size-cells = <0>; - switch1phy0: switch1phy0@0 { - reg = <0>; - interrupt-parent = <&switch0>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - mdio1 { - compatible = "marvell,mv88e6xxx-mdio-external"; - #address-cells = <1>; - #size-cells = <0>; - switch1phy9: switch1phy0@9 { - reg = <9>; - }; - }; - }; - }; diff --git a/MAINTAINERS b/MAINTAINERS index 90f13281d297..1b4475254d27 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,7 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/net/dsa/marvell.txt +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ F: include/linux/dsa/mv88e6xxx.h From patchwork Sat Oct 14 20:51:33 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 733766 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3D4F123749 for ; Sat, 14 Oct 2023 20:51:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="j1ijFjZu" Received: from mail-lf1-x134.google.com (mail-lf1-x134.google.com [IPv6:2a00:1450:4864:20::134]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1014DD9 for ; Sat, 14 Oct 2023 13:51:40 -0700 (PDT) Received: by mail-lf1-x134.google.com with SMTP id 2adb3069b0e04-5079f6efd64so1435222e87.2 for ; Sat, 14 Oct 2023 13:51:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697316698; x=1697921498; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=83tifkcL7STtWqxT7Toe1m2iOWJK+NJCvD/bs0pj7pU=; b=j1ijFjZuWa7QSevQlo1UNJE+HKtRD/d/rV3z56eHi6J7AnTobWDxl+P7YVkvRspxjG eXCQg/XErekoeFbFcUUL7GIg9XjazhEkCwdwCgbVP/SJaGzzXDPEQSd5+nhAnnbVPCIQ wZi2aJS9LQdIpVUmniUHihIrVmAqomzEwwaKPkfbOHWPZDwSuS94qIBQmuyqQO6Z8C2C CuVbRLIww0VgdDoG4lhVZeFACi4QKb1T5BVQG18abkXROKWcQRZeRajOM7SldOsl0S4r 0ZDPVJ4uoIh06s1Kzau9b8/ESjfHhcBtkitm2nzbinGrL9Oc4lTfBibNHn5Xd4dQQ/8j OPeA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697316698; x=1697921498; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=83tifkcL7STtWqxT7Toe1m2iOWJK+NJCvD/bs0pj7pU=; b=F6AqitAXY7GqvhB6WwUKGInDSRurQnbIqph9a6q5c1ag8UlWRyWtlPkIxVOTvdGpWb 7sOrQPSgTbybK+FhqLUJwuJ4M4o5sUHp1vdmgxVouylubuZgxhavKdG74U+W/wBJEZVK Gj7IWgG5nh354D+1rrKsCw3MWex6JPHd5e1HuyYWfcob97TdPS9lbtDinv5N7BBj9ZMP bsujsb85VCoTjtPrGIz8rghc5FUrgMx+6uGmFEBnrPcMXsrzdmTFvC061HaKpPafYB1c 5s2agB8b8ICF2w3Dqj3eRJmerpW5wFbgJf3U35vZ+5hlOq3FwAHVZVQdFBswWo0DmoGO 8TGA== X-Gm-Message-State: AOJu0YzG3uB1P3z+j8/0oBwm/xceKrCoAgoblm0Pxe2FtplqD9dpz77m t7nEXS87mEj2aqCrhX6NjvoK8w== X-Google-Smtp-Source: AGHT+IHFr/VAVKK4SuDqlJGBmO5soHuX301jwXaHnqV1V+ZBJoGsixdCBVKtlESDOjoGWehemW8ulQ== X-Received: by 2002:a05:6512:1153:b0:4fb:7559:aea3 with SMTP id m19-20020a056512115300b004fb7559aea3mr30227904lfg.39.1697316698352; Sat, 14 Oct 2023 13:51:38 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o17-20020ac24e91000000b004ff96c09b47sm49926lfr.260.2023.10.14.13.51.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:51:37 -0700 (PDT) From: Linus Walleij Date: Sat, 14 Oct 2023 22:51:33 +0200 Subject: [PATCH net-next v2 2/5] dt-bindings: marvell: Add Marvell MV88E6060 DSA schema Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231014-marvell-88e6152-wan-led-v2-2-7fca08b68849@linaro.org> References: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> In-Reply-To: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net The Marvell MV88E6060 is one of the oldest DSA switches from Marvell, and it has DT bindings used in the wild. Let's define them properly. It is different enough from the rest of the MV88E6xxx switches that it deserves its own binding. Signed-off-by: Linus Walleij --- .../bindings/net/dsa/marvell,mv88e6060.yaml | 106 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 107 insertions(+) diff --git a/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml new file mode 100644 index 000000000000..74e546a8472c --- /dev/null +++ b/Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/dsa/marvell,mv88e6060.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell MV88E6060 DSA switch + +maintainers: + - Andrew Lunn + +description: + The Marvell MV88E6060 switch has been produced and sold by Marvell + since at least 2010. The switch has one pin ADDR4 that controls the + MDIO address of the switch to be 0x10 or 0x00, and on the MDIO bus + connected to the switch, the PHY:s inside the switch appear as + independent devices on address 0x00-0x04 or 0x10-0x14, so in difference + from many other DSA switches this switch does not have an internal + MDIO bus for the PHY devices. + +properties: + compatible: + const: marvell,mv88e6060 + description: + The MV88E6060 is the oldest Marvell DSA switch product, and + as such a bit limited in features compared to later hardware. + + reg: + maxItems: 1 + + reset-gpios: + description: + GPIO to be used to reset the whole device + maxItems: 1 + +$ref: dsa.yaml# + +patternProperties: + "^(ethernet-)?ports$": + type: object + patternProperties: + "^(ethernet-)?port@[0-9]+$": + type: object + description: Ethernet switch ports + + $ref: dsa-port.yaml# + + unevaluatedProperties: false + +oneOf: + - required: + - ports + - required: + - ethernet-ports + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + #include + #include + mdio { + #address-cells = <1>; + #size-cells = <0>; + + switch@16 { + compatible = "marvell,mv88e6060"; + reg = <16>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + label = "lan1"; + }; + port@1 { + reg = <1>; + label = "lan2"; + }; + port@2 { + reg = <2>; + label = "lan3"; + }; + port@3 { + reg = <3>; + label = "lan4"; + }; + port@5 { + reg = <5>; + phy-mode = "rgmii-id"; + ethernet = <ðc>; + label = "cpu"; + fixed-link { + speed = <100>; + full-duplex; + }; + }; + }; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1b4475254d27..4c933a2a56ad 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12625,6 +12625,7 @@ MARVELL 88E6XXX ETHERNET SWITCH FABRIC DRIVER M: Andrew Lunn L: netdev@vger.kernel.org S: Maintained +F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6060.yaml F: Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml F: Documentation/networking/devlink/mv88e6xxx.rst F: drivers/net/dsa/mv88e6xxx/ From patchwork Sat Oct 14 20:51:34 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 734717 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A6D5250EF for ; Sat, 14 Oct 2023 20:51:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="toOR32us" Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0C09EE1 for ; Sat, 14 Oct 2023 13:51:41 -0700 (PDT) Received: by mail-lf1-x131.google.com with SMTP id 2adb3069b0e04-5079f3f3d7aso1811571e87.1 for ; Sat, 14 Oct 2023 13:51:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697316699; x=1697921499; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=XhgTFSg7xZQFKqQUdPj7mdXINHwkkUMiMJQ/LwbGzwg=; b=toOR32usVFgC3K5bD0wz39xZPKdtLnIUH/AAam7OSM/Bppg+L9mZZn9QfFtKofQkgN qTn3Xl+kIJ1gHrNwMq+yNR0dHlw3GriQBa7fGEgCUrZn/x5i+GZBSvKjV2nEwSH2urX6 dZAFj9NWrMFoo/uyN4DWQ9f4x5vX3Dh+one8tJCYMy3Xe+T64pswb1p7f0K785io8mHu LmOmM++n0a2QTv9UHPnMdZGo1YGVtmBBZhYqbdLG2YQz9KU2QJ/ftbu4qjt64+wjxo4M vzKgE1aEKXX17ExmBYfK2pigD28qahtmliS9QNJD9Zm3jSSe+Isvwv9hXR3fFZO5DV4/ z3iQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697316699; x=1697921499; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XhgTFSg7xZQFKqQUdPj7mdXINHwkkUMiMJQ/LwbGzwg=; b=kQ8MjAxF2ZelPRfk+xeNPq/gVpdmVUfzJ0VEVv/au0cy5QXvCZ0ApasXsJkNowmtFj iwRZcjU3FWmLALtbmD/iXcJoEmroAbznTTrD1wOREE8Fi3zNZmyxH4xnZBf+pfHFWWU7 /Dy5krjKUncTx0kZGs9rcMzro3ik9ue8pMpn0tILHn7SMsF7+d7h4u/UFpGlrgWsuzPx +yUXC8VO80uKU07rbF+dw9WnhJ/E42agcauuUnwDMWIk1Mb+OAgTQAetExIIhxT5BcBC wDT01FJncsGlFb46aXBkK+ANpThzRIgEzwEkOzTwA2duC9JXRmdJp3WgiFRSSReDgg6c b6qw== X-Gm-Message-State: AOJu0YyVzbFrFZ7VfC7plefqKFds8o9lO22K+24ipSIGEU96M4S0r/0W 2tRl4SLf2ymI+09e7tCbtyhhJw== X-Google-Smtp-Source: AGHT+IEma29vzsOEeaj3rANcQHH/FRA4IGToApFC9dzK/t1Uswcy9seJrul25z/pKhuvPvfeBMu/sA== X-Received: by 2002:a05:6512:b9f:b0:507:a12a:7753 with SMTP id b31-20020a0565120b9f00b00507a12a7753mr2584708lfv.22.1697316699386; Sat, 14 Oct 2023 13:51:39 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o17-20020ac24e91000000b004ff96c09b47sm49926lfr.260.2023.10.14.13.51.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:51:39 -0700 (PDT) From: Linus Walleij Date: Sat, 14 Oct 2023 22:51:34 +0200 Subject: [PATCH net-next v2 3/5] ARM: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231014-marvell-88e6152-wan-led-v2-3-7fca08b68849@linaro.org> References: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> In-Reply-To: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. - port@a is not normal port naming, use decimal port@10. - The ports node should have port@0 etc children, no plural "ports". This serves as an example of fixes needed for introducing a schema for the bindings, but the patch can simply be applied. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/marvell/armada-370-rd.dts | 2 -- .../arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts | 6 ++---- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts | 2 +- arch/arm/boot/dts/marvell/armada-385-linksys.dtsi | 2 -- arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts | 16 +++++++--------- arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 2 -- arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts | 2 -- 8 files changed, 11 insertions(+), 23 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-370-rd.dts b/arch/arm/boot/dts/marvell/armada-370-rd.dts index b459a670f615..e3a1834986ee 100644 --- a/arch/arm/boot/dts/marvell/armada-370-rd.dts +++ b/arch/arm/boot/dts/marvell/armada-370-rd.dts @@ -151,8 +151,6 @@ led@0 { switch: switch@10 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0x10>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts index f4c4b213ef4e..cf37f53ec070 100644 --- a/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts +++ b/arch/arm/boot/dts/marvell/armada-381-netgear-gs110emx.dts @@ -79,14 +79,12 @@ &mdio { switch@0 { compatible = "marvell,mv88e6190"; - #address-cells = <1>; #interrupt-cells = <2>; interrupt-controller; interrupt-parent = <&gpio1>; interrupts = <7 IRQ_TYPE_LEVEL_LOW>; pinctrl-0 = <&switch_interrupt_pins>; pinctrl-names = "default"; - #size-cells = <0>; reg = <0>; mdio { @@ -214,12 +212,12 @@ port@9 { reg = <9>; }; - port@a { + port@10 { /* 88X3310P external phy */ label = "lan10"; phy-handle = <&phy2>; phy-mode = "xaui"; - reg = <0xa>; + reg = <10>; }; }; }; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 1990f7d0cc79..1be0419f8f3e 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -7,7 +7,7 @@ / { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6190"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts index b795ad573891..6ec536222bfb 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts @@ -11,7 +11,7 @@ &sfp0 { }; &mdio { - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi index fc8216fd9f60..63a0bc9455ca 100644 --- a/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-linksys.dtsi @@ -160,8 +160,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { diff --git a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts index 2d8d319bec83..8c69dbd6a2c7 100644 --- a/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts +++ b/arch/arm/boot/dts/marvell/armada-385-turris-omnia.dts @@ -439,8 +439,6 @@ switch@10 { pinctrl-names = "default"; pinctrl-0 = <&swint_pins>; compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; dsa,member = <0 0>; reg = <0x10>; @@ -452,32 +450,32 @@ ports { #address-cells = <1>; #size-cells = <0>; - ports@0 { + port@0 { reg = <0>; label = "lan0"; }; - ports@1 { + port@1 { reg = <1>; label = "lan1"; }; - ports@2 { + port@2 { reg = <2>; label = "lan2"; }; - ports@3 { + port@3 { reg = <3>; label = "lan3"; }; - ports@4 { + port@4 { reg = <4>; label = "lan4"; }; - ports@5 { + port@5 { reg = <5>; ethernet = <ð1>; phy-mode = "rgmii-id"; @@ -488,7 +486,7 @@ fixed-link { }; }; - ports@6 { + port@6 { reg = <6>; ethernet = <ð0>; phy-mode = "rgmii-id"; diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts index 32c569df142f..ab46903580aa 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts @@ -94,8 +94,6 @@ &mdio { switch@4 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <4>; pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts index 7a0614fd0c93..2a5518c73bff 100644 --- a/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts +++ b/arch/arm/boot/dts/marvell/armada-xp-linksys-mamba.dts @@ -267,8 +267,6 @@ &mdio { switch@0 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <0>; ports { From patchwork Sat Oct 14 20:51:35 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 733765 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E01EA266B5 for ; Sat, 14 Oct 2023 20:51:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="XYNtJSZK" Received: from mail-lf1-x12e.google.com (mail-lf1-x12e.google.com [IPv6:2a00:1450:4864:20::12e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48494E6 for ; Sat, 14 Oct 2023 13:51:42 -0700 (PDT) Received: by mail-lf1-x12e.google.com with SMTP id 2adb3069b0e04-50435a9f800so4105520e87.2 for ; Sat, 14 Oct 2023 13:51:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697316700; x=1697921500; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=bRAJxOH+ejiFnd2dNnRhzRVyCxEiMIKKKk9Axu7hk70=; b=XYNtJSZK/uzSruRzgwY9rbGzw3b5LZBXjrfV1JJ5cBMaNlH4e2QOAnMN6K5LiEuVDW T8iQCPgKd6bcM1yN6YEDNHi3sBV9T6vxBlszwxGV2VLV9moIAysVUUjmKL7ZXqnmrwoq hrvJIA/TRSA2W8xr/oYcPfTQEu80UEkwQNY2rNW2XtAcXId83xneZZ03AdfL9P5nQxqZ dPH0tFdvo0a7IyRAdhk5K03r1/PJtrWqd6w5nbRJnwfkaRWVCZX9ZQMsr+D7Cv73EH1u Ut7FLrXQHe3fJ6oc8pQiYFQqS3aacvOep7oJKguFjvcfK0lku58rolqvLmDIzpeu0UB+ yZdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697316700; x=1697921500; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=bRAJxOH+ejiFnd2dNnRhzRVyCxEiMIKKKk9Axu7hk70=; b=nEbMSpSUMxoeKpdZ+oAxJU6KMJePV+f0Y964RkHUP4mjz8YUI+20WFbup9BHPGpfB5 Abtz4ZkAqhagOindus93ivFqPirSnAmIKR2ZRPRtnu1+PPMMTmNwEQN4jNdhY4wxbjlV sMgpc8Dy8on7r+83rC9nX4eIMFUyalAUGi/meIU3wxuV+AhrJPSgxYzuK3+DXSiNC2nO JUWPElSqtjCMPawy9V1FT9c8wcsIOCXEg4c2pTi89NFAUq/CCmNbHKNcoN5vVYi7M0/c DsVSFgLRm/j+Q2FS1T16Q3XfOxr28bgM7lz4iJdWDWFUbmICLfG0I0/F/mVTJUBbWIqd YkPQ== X-Gm-Message-State: AOJu0Yx8eBzB/zIr7i48Ix2mpVoQEeIgaVfNT46WivmSg4P0d5mWKmDh Id1JP9NKJ2PIv/4aLnaxMzCnUg== X-Google-Smtp-Source: AGHT+IHiYFzH4L27RvGel/ewKBVSDQZKNNhqc1MjbrSoR+syC458v0e8MZxut888hqckGMcP6t+aYw== X-Received: by 2002:ac2:46ed:0:b0:507:a12c:558c with SMTP id q13-20020ac246ed000000b00507a12c558cmr2254730lfo.46.1697316700511; Sat, 14 Oct 2023 13:51:40 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o17-20020ac24e91000000b004ff96c09b47sm49926lfr.260.2023.10.14.13.51.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:51:40 -0700 (PDT) From: Linus Walleij Date: Sat, 14 Oct 2023 22:51:35 +0200 Subject: [PATCH net-next v2 4/5] ARM: dts: nxp: Fix some common switch mistakes Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231014-marvell-88e6152-wan-led-v2-4-7fca08b68849@linaro.org> References: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> In-Reply-To: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_NONE, SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Fix some errors in the Marvell MV88E6xxx switch descriptions: - switch0@0 is not OK, should be switch@0 Signed-off-by: Linus Walleij --- arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts | 2 +- arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts | 8 ++++---- arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts | 2 +- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts | 4 ++-- arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts | 2 +- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts index 1a19aec8957b..add47d8fb58a 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-cfu1.dts @@ -162,7 +162,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6085"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_switch>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts index df1335492a19..50356bd87d04 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-scu4-aib.dts @@ -47,7 +47,7 @@ mdio_mux_1: mdio@1 { #address-cells = <1>; #size-cells = <0>; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 0>; @@ -130,7 +130,7 @@ mdio_mux_2: mdio@2 { #address-cells = <1>; #size-cells = <0>; - switch1: switch1@0 { + switch1: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 1>; @@ -188,7 +188,7 @@ mdio_mux_4: mdio@4 { #address-cells = <1>; #size-cells = <0>; - switch2: switch2@0 { + switch2: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 2>; @@ -276,7 +276,7 @@ mdio_mux_8: mdio@8 { #address-cells = <1>; #size-cells = <0>; - switch3: switch3@0 { + switch3: switch@0 { compatible = "marvell,mv88e6190"; reg = <0>; dsa,member = <0 3>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts index 1461804ecaea..20e9e2dacbe6 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-spb4.dts @@ -123,7 +123,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts index 463c2452b9b7..aa53a60518c3 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-dtu.dts @@ -112,7 +112,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; @@ -167,7 +167,7 @@ port@9 { }; }; - mdio1 { + mdio-external { compatible = "marvell,mv88e6xxx-mdio-external"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts index f5ae0d5de315..0b7063b74130 100644 --- a/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts +++ b/arch/arm/boot/dts/nxp/vf/vf610-zii-ssmb-spu3.dts @@ -137,7 +137,7 @@ mdio1: mdio { suppress-preamble; status = "okay"; - switch0: switch0@0 { + switch0: switch@0 { compatible = "marvell,mv88e6190"; pinctrl-0 = <&pinctrl_gpio_switch0>; pinctrl-names = "default"; From patchwork Sat Oct 14 20:51:36 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 734716 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 413C6266BA for ; Sat, 14 Oct 2023 20:51:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="hgcT2xmz" Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5EC8AE9 for ; Sat, 14 Oct 2023 13:51:43 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id 2adb3069b0e04-5079eed8bfbso1757893e87.1 for ; Sat, 14 Oct 2023 13:51:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1697316701; x=1697921501; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=e1L3K+Ebs1IkB2w2DJrMtsRdnXrx4C52cUF/HzYsLH8=; b=hgcT2xmzTa2ohiYfPvBgzJfM95hZwp9YcR0f64odrMk4/FOXw6mQrQl4/PszvgTLjl v1XB43QvH5psCS/tdEPbAkiZVM0MFjwnbynU+fnufV5GlvpSA45369Wiu9MQBgE5PimC 2QQkjrdm0ozN6KLNzGRHL1A4OVJSmx7v2ND8vQ4kgP27IN9Mfn9+aNYOW+2jfnS0Naxm IUaA7ioovaTRxSEJHECdaLNHhkh8tZaORZDWqDyAb2PTZnJgSL/pZV14UcY6LUJ052xo 8DoqRJ2CWGZoKFBkSSsk5M5ieVxQ0l1MjWJGKWQt/b356VmbNROqstobR5Ztww2LZZfE Hqog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1697316701; x=1697921501; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=e1L3K+Ebs1IkB2w2DJrMtsRdnXrx4C52cUF/HzYsLH8=; b=W8AnC3yKWMIN2Me8zxAXdEueRDdKF4y6/mATMUUwbVc/crVtZFts4Guyuo1i9/g4xS /dZ4buersJQGfRoX6dQsNgn9hslzqyDG1MOYnQXraO6eiyV6Umio/GPqRUtol09flDYi DqHj7Tid9AQ0RUAk+/W74DicDDjIyMdXfJT5YsOQrrHJMWj0CSEigzYKdI8mC6kGGpoI D9Q+aIboSz8/gpE+AWUZKF5DekTXxgGeSKPJrMUow2DRbu3FEBTHGh6DqsMg1VJxd5XB ZkEId4IF6hMRO7XkhSMWhfCZweAemOSeD8fSg6ioR3kdyBVcipv7EWMVsjEX5VqJIbRf U7KQ== X-Gm-Message-State: AOJu0YyRhpHXyknDoUPEyKT32fu7gsGhJu1K/qclrekecqjSxw/CUZ20 xCmEN/31pc1y1jqo3/jVcm/tEQ== X-Google-Smtp-Source: AGHT+IHtQpWgOHFYKb5Kidy8nqsBhBLPrhhxehpUXmo1r7QzUOnSNYAcKW4qHHgvbKZzfo+tqHM7mg== X-Received: by 2002:a05:6512:b01:b0:503:19d9:4b6f with SMTP id w1-20020a0565120b0100b0050319d94b6fmr29910390lfu.0.1697316701548; Sat, 14 Oct 2023 13:51:41 -0700 (PDT) Received: from [127.0.1.1] ([85.235.12.238]) by smtp.gmail.com with ESMTPSA id o17-20020ac24e91000000b004ff96c09b47sm49926lfr.260.2023.10.14.13.51.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 14 Oct 2023 13:51:41 -0700 (PDT) From: Linus Walleij Date: Sat, 14 Oct 2023 22:51:36 +0200 Subject: [PATCH net-next v2 5/5] ARM64: dts: marvell: Fix some common switch mistakes Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231014-marvell-88e6152-wan-led-v2-5-7fca08b68849@linaro.org> References: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> In-Reply-To: <20231014-marvell-88e6152-wan-led-v2-0-7fca08b68849@linaro.org> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Russell King , Florian Fainelli , Vladimir Oltean , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Christian Marangi , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Linus Walleij X-Mailer: b4 0.12.3 X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,RCVD_IN_DNSWL_BLOCKED, SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on lindbergh.monkeyblade.net Fix some errors in the Marvell MV88E6xxx switch descriptions: - The top node had no address size or cells. - switch0@0 is not OK, should be switch@0. - port@a is not normal port naming, use decimal port@10. Signed-off-by: Linus Walleij --- .../boot/dts/marvell/armada-3720-espressobin.dtsi | 4 +-- .../boot/dts/marvell/armada-3720-gl-mv1000.dts | 4 +-- .../boot/dts/marvell/armada-3720-turris-mox.dts | 32 +++++++++++----------- .../boot/dts/marvell/armada-7040-mochabin.dts | 2 -- .../dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +- arch/arm64/boot/dts/marvell/cn9130-crb.dtsi | 6 ++-- 6 files changed, 21 insertions(+), 29 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi index 5fc613d24151..b526efeee293 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtsi @@ -145,10 +145,8 @@ &usb2 { }; &mdio { - switch0: switch0@1 { + switch0: switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts index b1b45b4fa9d4..5de4417f929c 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-gl-mv1000.dts @@ -152,10 +152,8 @@ &uart0 { }; &mdio { - switch0: switch0@1 { + switch0: switch@1 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <1>; dsa,member = <0 0>; diff --git a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts index 9eab2bb22134..ea66ba5a9762 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dts @@ -305,7 +305,7 @@ phy1: ethernet-phy@1 { }; /* switch nodes are enabled by U-Boot if modules are present */ - switch0@10 { + switch@10 { compatible = "marvell,mv88e6190"; reg = <0x10>; dsa,member = <0 0>; @@ -410,8 +410,8 @@ port@9 { managed = "in-band-status"; }; - switch0port10: port@a { - reg = <0xa>; + switch0port10: port@10 { + reg = <10>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; @@ -419,8 +419,8 @@ switch0port10: port@a { status = "disabled"; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -430,7 +430,7 @@ port-sfp@a { }; }; - switch0@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 0>; @@ -497,7 +497,7 @@ port@5 { }; }; - switch1@11 { + switch@11 { compatible = "marvell,mv88e6190"; reg = <0x11>; dsa,member = <0 1>; @@ -602,8 +602,8 @@ switch1port9: port@9 { link = <&switch0port10>; }; - switch1port10: port@a { - reg = <0xa>; + switch1port10: port@10 { + reg = <10>; label = "dsa"; phy-mode = "2500base-x"; managed = "in-band-status"; @@ -611,8 +611,8 @@ switch1port10: port@a { status = "disabled"; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -622,7 +622,7 @@ port-sfp@a { }; }; - switch1@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 1>; @@ -689,7 +689,7 @@ port@5 { }; }; - switch2@12 { + switch@12 { compatible = "marvell,mv88e6190"; reg = <0x12>; dsa,member = <0 2>; @@ -794,8 +794,8 @@ switch2port9: port@9 { link = <&switch1port10 &switch0port10>; }; - port-sfp@a { - reg = <0xa>; + port-sfp@10 { + reg = <10>; label = "sfp"; sfp = <&sfp>; phy-mode = "sgmii"; @@ -805,7 +805,7 @@ port-sfp@a { }; }; - switch2@2 { + switch@2 { compatible = "marvell,mv88e6085"; reg = <0x2>; dsa,member = <0 2>; diff --git a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts index 48202810bf78..3cc794fcf12e 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-mochabin.dts @@ -303,8 +303,6 @@ eth2phy: ethernet-phy@1 { /* 88E6141 Topaz switch */ switch: switch@3 { compatible = "marvell,mv88e6085"; - #address-cells = <1>; - #size-cells = <0>; reg = <3>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts index 4125202028c8..7a25ea36b565 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts @@ -497,7 +497,7 @@ ge_phy: ethernet-phy@0 { reset-deassert-us = <10000>; }; - switch0: switch0@4 { + switch0: switch@4 { compatible = "marvell,mv88e6085"; reg = <4>; pinctrl-names = "default"; diff --git a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi index 32cfb3e2efc3..2f6281b66467 100644 --- a/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi +++ b/arch/arm64/boot/dts/marvell/cn9130-crb.dtsi @@ -207,11 +207,9 @@ phy0: ethernet-phy@0 { reg = <0>; }; - switch6: switch0@6 { + switch6: switch@6 { /* Actual device is MV88E6393X */ compatible = "marvell,mv88e6190"; - #address-cells = <1>; - #size-cells = <0>; reg = <6>; interrupt-parent = <&cp0_gpio1>; interrupts = <28 IRQ_TYPE_LEVEL_LOW>; @@ -280,7 +278,7 @@ port@9 { managed = "in-band-status"; }; - port@a { + port@10 { reg = <10>; ethernet = <&cp0_eth0>; phy-mode = "10gbase-r";