From patchwork Wed Oct 18 21:08:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 735334 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 10268CDB484 for ; Wed, 18 Oct 2023 21:08:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232144AbjJRVIS (ORCPT ); Wed, 18 Oct 2023 17:08:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40620 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232053AbjJRVIR (ORCPT ); Wed, 18 Oct 2023 17:08:17 -0400 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [IPv6:2001:df5:b000:5::4]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E71561B4 for ; Wed, 18 Oct 2023 14:08:13 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 2B7AA2C0733; Thu, 19 Oct 2023 10:08:10 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1697663290; bh=EuT/gQdJps2mm8D5MVpyIaH0L8xBo60NeGvPLwUUvxk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WGA4Atkg6sWfU2LOIK+AvrFimGjc+J+kDUMSEEH1QB1KnrjC7kRaWqdywS5mnjTnw 1ZNxINat7/iGuhweYljCmgoOtXmAWT7zQkTn7PLSyLVNUP0Htg3ye/n7BkUDFUCwMq wB4LNnYbvivHjaxLL95D/ipTNdLAS6ekNHd0qxM+g7fsRAJ4ALkstsqipi8oOaxbxw BWzRZmICBZmfM5YXzbjeo9+b2WV5yfD6JvA+0YS9iuONLnqBhIL6fnHGI5asSND7qX QMpPe6T1eYq/pzbC4rN9kr/P8EPQBKKXZvquT7cyAs9x5361+0wmfkBueGWmGdidnq H8qOf7Yl56FNg== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 19 Oct 2023 10:08:09 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 5964B13EE3F; Thu, 19 Oct 2023 10:08:09 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 564D7280450; Thu, 19 Oct 2023 10:08:09 +1300 (NZDT) From: Chris Packham To: gregory.clement@bootlin.com, andi.shyti@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v3 1/2] dt-bindings: i2c: mv64xxx: add reset-gpios property Date: Thu, 19 Oct 2023 10:08:04 +1300 Message-ID: <20231018210805.1569987-2-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231018210805.1569987-1-chris.packham@alliedtelesis.co.nz> References: <20231018210805.1569987-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=L6ZjvNb8 c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=bhdUkHdE2iEA:10 a=N1qcaoclDu5WUfG3NQYA:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add reset-gpios and reset-duration-us properties to the marvell,mv64xxx-i2c binding. These can be used to describe hardware where a common reset GPIO is connected to all downstream devices on and I2C bus. This reset will be asserted then released before the downstream devices on the bus are probed. Signed-off-by: Chris Packham Reviewed-by: Krzysztof Kozlowski --- Notes: Changes in v3: - Rename reset-delay-us to reset-duration-us to better reflect its purpose - Add default: for reset-duration-us - Add description: for reset-gpios Changes in v2: - Update commit message - Add reset-delay-us property .../devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml index 461d1c9ee3f7..ecf5b279cfa4 100644 --- a/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/marvell,mv64xxx-i2c.yaml @@ -70,6 +70,16 @@ properties: resets: maxItems: 1 + reset-gpios: + description: + GPIO pin providing a common reset for all downstream devices. This GPIO + will be asserted then released before the downstream devices are probed. + maxItems: 1 + + reset-duration-us: + description: Reset duration in us. + default: 1 + dmas: items: - description: RX DMA Channel From patchwork Wed Oct 18 21:08:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 735335 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 80FDFCDB483 for ; Wed, 18 Oct 2023 21:08:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232124AbjJRVIS (ORCPT ); Wed, 18 Oct 2023 17:08:18 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40594 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232002AbjJRVIR (ORCPT ); Wed, 18 Oct 2023 17:08:17 -0400 Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E586E133 for ; Wed, 18 Oct 2023 14:08:13 -0700 (PDT) Received: from svr-chch-seg1.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 165192C027A; Thu, 19 Oct 2023 10:08:10 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail181024; t=1697663290; bh=gqjjlKTu73EKTbIjc+Nes5NFC/xjbovCV1p0fBg4XUQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LaC81BLFbzLPwF2FE5Iw5P808xj561SjJ+odwE9ZXjlJpFNLGEXO2NOF/5vRve0sf 2fsbkxGlWP3hZNfEVVjZBDpCtVn9pa0vMES5Xtl/WBozwryyl55+Bst28gk2MtpRCO wCj6mUasup5vBtstzR9mfEbQVUIzklIsvykaLA3H7cetGspRj0lObiJQZqdyTsNdoF E3VHQ4SOlYSf8hiSWcrNWO60zCpbm3ALN06x2BYeJG1VYJZfhAY3I8nJcptKeHRXqG O+zYke7J3TZH5PdpV71rOlauzJHbZwAmhC/eLpXRB4rllp8Z0ZG8jn08gbzMPSTdu+ 2luiEBnDSWSQA== Received: from pat.atlnz.lc (Not Verified[10.32.16.33]) by svr-chch-seg1.atlnz.lc with Trustwave SEG (v8,2,6,11305) id ; Thu, 19 Oct 2023 10:08:09 +1300 Received: from chrisp-dl.ws.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by pat.atlnz.lc (Postfix) with ESMTP id 5BB9213EE85; Thu, 19 Oct 2023 10:08:09 +1300 (NZDT) Received: by chrisp-dl.ws.atlnz.lc (Postfix, from userid 1030) id 5A95C280450; Thu, 19 Oct 2023 10:08:09 +1300 (NZDT) From: Chris Packham To: gregory.clement@bootlin.com, andi.shyti@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org Cc: linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Chris Packham Subject: [PATCH v3 2/2] i2c: mv64xxx: add an optional reset-gpios property Date: Thu, 19 Oct 2023 10:08:05 +1300 Message-ID: <20231018210805.1569987-3-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20231018210805.1569987-1-chris.packham@alliedtelesis.co.nz> References: <20231018210805.1569987-1-chris.packham@alliedtelesis.co.nz> MIME-Version: 1.0 X-SEG-SpamProfiler-Analysis: v=2.3 cv=L6ZjvNb8 c=1 sm=1 tr=0 a=KLBiSEs5mFS1a/PbTCJxuA==:117 a=bhdUkHdE2iEA:10 a=VsZq4EHS3crWG1I_hwYA:9 X-SEG-SpamProfiler-Score: 0 x-atlnz-ls: pat Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Some hardware designs have a GPIO used to control the reset of all the devices on and I2C bus. It's not possible for every child node to declare a reset-gpios property as only the first device probed would be able to successfully request it (the others will get -EBUSY). Represent this kind of hardware design by associating the reset-gpios with the parent I2C bus. The reset line will be released prior to the child I2C devices being probed. Signed-off-by: Chris Packham --- Notes: Changes in v3: - Rename reset-delay to reset-duration - Use reset-duration-us property to control the reset pulse rather than delaying after the reset Changes in v2: - Add a property to cover the length of delay after releasing the reset GPIO - Use dev_err_probe() when requesing the GPIO fails drivers/i2c/busses/i2c-mv64xxx.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/drivers/i2c/busses/i2c-mv64xxx.c b/drivers/i2c/busses/i2c-mv64xxx.c index efd28bbecf61..28f11d2e800b 100644 --- a/drivers/i2c/busses/i2c-mv64xxx.c +++ b/drivers/i2c/busses/i2c-mv64xxx.c @@ -160,6 +160,7 @@ struct mv64xxx_i2c_data { bool clk_n_base_0; struct i2c_bus_recovery_info rinfo; bool atomic; + struct gpio_desc *reset_gpio; }; static struct mv64xxx_i2c_regs mv64xxx_i2c_regs_mv64xxx = { @@ -1036,6 +1037,7 @@ mv64xxx_i2c_probe(struct platform_device *pd) struct mv64xxx_i2c_data *drv_data; struct mv64xxx_i2c_pdata *pdata = dev_get_platdata(&pd->dev); struct resource *res; + u32 reset_duration; int rc; if ((!pdata && !pd->dev.of_node)) @@ -1083,6 +1085,14 @@ mv64xxx_i2c_probe(struct platform_device *pd) if (drv_data->irq < 0) return drv_data->irq; + drv_data->reset_gpio = devm_gpiod_get_optional(&pd->dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(drv_data->reset_gpio)) + return dev_err_probe(&pd->dev, PTR_ERR(drv_data->reset_gpio), + "Cannot get reset gpio\n"); + rc = device_property_read_u32(&pd->dev, "reset-duration-us", &reset_duration); + if (rc) + reset_duration = 1; + if (pdata) { drv_data->freq_m = pdata->freq_m; drv_data->freq_n = pdata->freq_n; @@ -1121,6 +1131,11 @@ mv64xxx_i2c_probe(struct platform_device *pd) goto exit_disable_pm; } + if (drv_data->reset_gpio) { + usleep_range(reset_duration, reset_duration + 10); + gpiod_set_value_cansleep(drv_data->reset_gpio, 0); + } + rc = request_irq(drv_data->irq, mv64xxx_i2c_intr, 0, MV64XXX_I2C_CTLR_NAME, drv_data); if (rc) {