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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id m16-20020a7bca50000000b00405d9a950a2sm4335932wml.28.2023.10.19.06.13.13 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:14 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/7] hw/ppc/spapr_vio: Realize SPAPR_VIO_BRIDGE device before accessing it Date: Thu, 19 Oct 2023 15:12:59 +0200 Message-ID: <20231019131305.19157-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22b; envelope-from=philmd@linaro.org; helo=mail-lj1-x22b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org qbus_new() should not be called on unrealized device. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Thomas Huth --- hw/ppc/spapr_vio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 9d4fec2c04..f8ef2b6fa8 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -574,13 +574,14 @@ SpaprVioBus *spapr_vio_bus_init(void) /* Create bridge device */ dev = qdev_new(TYPE_SPAPR_VIO_BRIDGE); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); /* Create bus on bridge device */ qbus = qbus_new(TYPE_SPAPR_VIO_BUS, dev, "spapr-vio"); bus = SPAPR_VIO_BUS(qbus); bus->next_reg = SPAPR_VIO_REG_BASE; + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + /* hcall-vio */ spapr_register_hypercall(H_VIO_SIGNAL, h_vio_signal); From patchwork Thu Oct 19 13:13:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735550 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1508902wro; Thu, 19 Oct 2023 06:14:39 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGTwl6sGFRLsax8p0Cd5lrmApe6mAbujVupIBLzXXupIPnrPnKtZITTfPPRWpMp73AQTtWE X-Received: by 2002:a2e:b616:0:b0:2c5:1482:719a with SMTP id r22-20020a2eb616000000b002c51482719amr1426917ljn.21.1697721279492; Thu, 19 Oct 2023 06:14:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697721279; cv=none; d=google.com; s=arc-20160816; b=E6dkhA95mLlD/7+Nt9D/Bm9D7zKJ6hizf4n5QvH35JGl5uKGW7McML4ke1jEe/LiBo VUNyYx+212tayahtjAIXahrXLc/FZ4mZ6QCwz2pL4fXR4XVQa2TbkrFfX5j1/cOl77tx Qcfz38E5N3f4cuC4ybbHuPrTbw+5SZiAu4zftYk+pPJ7RRB63Vio7gghin4oVMtewjSm Q37wLsRkvwYi1oyR53yE7c23hRib7IG/haE0xpHbowGvV4cDr3XSxdysUA8RnKPznKt8 NRiazQvT17JiGnc6iWeoO0V+m05Pq1/7Z76246OgAiC6hOCfUQuoNfWKlwSP2c0H8YQn PD3w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ldJFXb9fdD2sfJu6FP/y4XyBQnTwT0OjDzwlspACaHE=; fh=pKSa3NIqn0GzXJAy/2EwD+riYoiBTvQWIw5svo/o4rg=; b=BH70FeLvKAzcm5Vl1IOQplZcPXmIQpC40swmVjK7owtSeyzKKuhwmW91ycbQ1rg5gQ dCGp5EKMgeYcaFjUHWcqHQ1uJcNbSHHTgdn9Xbaeb+QRIoaJNvIYsfMHlAQmRuLWgl0Q 6zLJp8Lp/3yO8XnTPk4Amky3QFTyX4TNLgf3MhMYaJDHJt7F+RI+C7HQTJIuAW73Re4m fakpJV8ACc4mtM0rgJL3ivrQXEQq1Rtu78TH/EBpUOXim7dTUGxXR7212a0fBpVqIsim skgkWHy/9HO6ue+ElEc8AeI7Kcfwi6O/R0DKqAmKpphlLzv67PhPAF6WyngrVdp1oIiF UqgA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="jR/NU8jJ"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id q7-20020adffec7000000b0031980294e9fsm4462971wrs.116.2023.10.19.06.13.19 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/7] hw/ppc/pnv_xscom: Rename pnv_xscom_realize(Error **) -> pnv_xscom_init() Date: Thu, 19 Oct 2023 15:13:00 +0200 Message-ID: <20231019131305.19157-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=philmd@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org pnv_xscom_realize() is not used to *realize* QDev object, rename it as pnv_xscom_init(). The Error** argument is unused: remove it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 18 +++--------------- hw/ppc/pnv_xscom.c | 2 +- 3 files changed, 5 insertions(+), 17 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 9bc6463547..41671001da 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp); +void pnv_xscom_init(PnvChip *chip, uint64_t size); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index eb54f93986..456631c9dc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,11 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1512,11 +1508,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV9_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV9_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); @@ -1727,11 +1719,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_realize(chip, PNV10_XSCOM_SIZE, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } + pnv_xscom_init(chip, PNV10_XSCOM_SIZE); sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index d820e05e40..af57b55863 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_realize(PnvChip *chip, uint64_t size, Error **errp) +void pnv_xscom_init(PnvChip *chip, uint64_t size) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; From patchwork Thu Oct 19 13:13:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735549 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1508828wro; Thu, 19 Oct 2023 06:14:32 -0700 (PDT) X-Google-Smtp-Source: AGHT+IEfBFeAwFMV3MBnMiCBfA66jxGEE+88fzkMKqebligLdFKKecvPrqV6PG7QwImJB7/HRw6W X-Received: by 2002:a2e:7c03:0:b0:2c5:2182:48db with SMTP id x3-20020a2e7c03000000b002c5218248dbmr1416649ljc.20.1697721272182; Thu, 19 Oct 2023 06:14:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697721272; cv=none; d=google.com; s=arc-20160816; b=Vrk5eKrVx11P8tJOnmVmFIDscsSMR1XurCqXzypr6yw6ZHrx9dXalNRZw+xV3lOGWu f3oaZgfcCajeQH/woYIF3L5vgdiLI6umqzAiqIk30O8+k5AZANOmYaYO5wJrXT7CnalP 8GNgBw6KN1jGqJ6aOnQXIP90FDDFwo2aOCOmx7m1QYhjx4OA4eoBYFjtrral99H4QHzV N7fCMLioWQSKSSAgDWDpv4uU0yHgEcEGhwWOu53+rmJJ1dtXi6/W0i4ji/t9Pmi5mnBF rNzV/e1XRtJmPDRw7Q5gdIjA4XMtOPOIbsm4yJ3yh21vk518oASSUHkM824GBhNFrOjz IFQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wFvi5lmNEMObBf6omDuTraTBDs9CBVzxTa3XSY9GsF4=; fh=pKSa3NIqn0GzXJAy/2EwD+riYoiBTvQWIw5svo/o4rg=; b=l15nR7VyNjB0IzXi4sHMkio2HjJSLrcExLJs3ApHiTFjpmuJeQ5ALH2t2QmSwkmafV oEEs3NbI1wOBwvJOCIxJtTc2oYVMVwVVv69rXr8zHv10HNdRT4Qaze1uP/ig4PPAX5Sw sq2buPuZuO0FRv7mpinW3t5jUaGg80NRfYqo+vgwUTthou22Cjn3NLvI1KtBY+3r786W cEm1e261K8eT5f3YHgmw5iJjpswIz6cQSTdNZz9Kt0XKYGYcw40UtJ7gZPtu5b9g3MdF qqFrfhyBQuoRuL3MIwIr+yUH/5fxVTpe4H7Poy/g0mkLEiykVV9625TGcjB2UoUlYoBl EYEw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="TN1ocfb/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id c16-20020a05600c0ad000b003fee567235bsm4375612wmr.1.2023.10.19.06.13.25 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 3/7] hw/ppc/pnv_xscom: Move sysbus_mmio_map() call within pnv_xscom_init() Date: Thu, 19 Oct 2023 15:13:01 +0200 Message-ID: <20231019131305.19157-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philmd@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- include/hw/ppc/pnv_xscom.h | 2 +- hw/ppc/pnv.c | 9 +++------ hw/ppc/pnv_xscom.c | 3 ++- 3 files changed, 6 insertions(+), 8 deletions(-) diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h index 41671001da..35b19610f7 100644 --- a/include/hw/ppc/pnv_xscom.h +++ b/include/hw/ppc/pnv_xscom.h @@ -170,7 +170,7 @@ struct PnvXScomInterfaceClass { #define PNV10_XSCOM_PEC_PCI_BASE 0x8010800 /* index goes upwards ... */ #define PNV10_XSCOM_PEC_PCI_SIZE 0x200 -void pnv_xscom_init(PnvChip *chip, uint64_t size); +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr); int pnv_dt_xscom(PnvChip *chip, void *fdt, int root_offset, uint64_t xscom_base, uint64_t xscom_size, const char *compat, int compat_size); diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 456631c9dc..10158f7684 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1249,8 +1249,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp) assert(chip8->xics); /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV_XSCOM_SIZE, PNV_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1508,8 +1507,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV9_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV9_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV9_XSCOM_SIZE, PNV9_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { @@ -1719,8 +1717,7 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp) Error *local_err = NULL; /* XSCOM bridge is first */ - pnv_xscom_init(chip, PNV10_XSCOM_SIZE); - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 0, PNV10_XSCOM_BASE(chip)); + pnv_xscom_init(chip, PNV10_XSCOM_SIZE, PNV10_XSCOM_BASE(chip)); pcc->parent_realize(dev, &local_err); if (local_err) { diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index af57b55863..cf892c9fe8 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -221,7 +221,7 @@ const MemoryRegionOps pnv_xscom_ops = { .endianness = DEVICE_BIG_ENDIAN, }; -void pnv_xscom_init(PnvChip *chip, uint64_t size) +void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; @@ -230,6 +230,7 @@ void pnv_xscom_init(PnvChip *chip, uint64_t size) memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); sysbus_init_mmio(sbd, &chip->xscom_mmio); + sysbus_mmio_map(sbd, 0, addr); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Thu Oct 19 13:13:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735553 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1509244wro; Thu, 19 Oct 2023 06:15:19 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFudl87z3o+9ymw54GSIIfJ6h6VZgtUmgzvasAOUnRhMkhn5Gr/xFlKeP9Acb5xurhEZbqV X-Received: by 2002:adf:f701:0:b0:319:72f8:7249 with SMTP id r1-20020adff701000000b0031972f87249mr1571809wrp.66.1697721319476; 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id f19-20020adfb613000000b003232380ffd7sm4431399wre.102.2023.10.19.06.13.31 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:32 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 4/7] hw/ppc/pnv_xscom: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:02 +0200 Message-ID: <20231019131305.19157-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/ppc/pnv_xscom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c index cf892c9fe8..805b1d0c87 100644 --- a/hw/ppc/pnv_xscom.c +++ b/hw/ppc/pnv_xscom.c @@ -223,14 +223,12 @@ const MemoryRegionOps pnv_xscom_ops = { void pnv_xscom_init(PnvChip *chip, uint64_t size, hwaddr addr) { - SysBusDevice *sbd = SYS_BUS_DEVICE(chip); char *name; name = g_strdup_printf("xscom-%x", chip->chip_id); memory_region_init_io(&chip->xscom_mmio, OBJECT(chip), &pnv_xscom_ops, chip, name, size); - sysbus_init_mmio(sbd, &chip->xscom_mmio); - sysbus_mmio_map(sbd, 0, addr); + memory_region_add_subregion(get_system_memory(), addr, &chip->xscom_mmio); memory_region_init(&chip->xscom, OBJECT(chip), name, size); address_space_init(&chip->xscom_as, &chip->xscom, name); From patchwork Thu Oct 19 13:13:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735552 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1509171wro; Thu, 19 Oct 2023 06:15:11 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGCWYkVhmHmHitCr/A5il9DP3suuvjSRvZuE8nnziSekxN3yVVlaceQM6yZ1DQShCktXRbr X-Received: by 2002:a05:651c:b0b:b0:2c0:17bc:124e with SMTP id b11-20020a05651c0b0b00b002c017bc124emr1830655ljr.38.1697721311074; Thu, 19 Oct 2023 06:15:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697721311; cv=none; d=google.com; s=arc-20160816; b=HJUrw7mJ/2pSmFL+6/f4KY/1UuKdFVRIPGWv8aLdE2bt5fZTa2hPOu0nKJTWRbuDnk 0v0r0LJXyXqXfwatjwfzXdYgu4Cc+yUJjVdHKZ15YLMx5OjyzUPiAoWwj5lQnNwIjfRl G1nl02bUdo+qGix+IWQR7ZrZJx4pfGgzyFUO+Zlo8t9MmxMCr0pSXzNT1HH0QQTX1SKK H3a3M+h19QrBBYjfznh0/qeFTXlqh4bKp3eLmqtND+esXVveJmJLDzF54cF69eFh6CHG w35Pv3l/Ecs5/GkVoxvsBVW39tcP7H2g2ygnx0N2NLhIzF3HpaRgn8E5wSn5R0b1WahK qEag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Be57N8xZeT1c4/L41PlRl8GZmps32g61PsDN8JovFx4=; fh=pKSa3NIqn0GzXJAy/2EwD+riYoiBTvQWIw5svo/o4rg=; b=TviN9GwdwoVa1Lwb2BiuUqDmqyfFjSdPo3CWISnlRv51S17ksuKfFB+1MzxZTTQ8ND ANj8IWz54cTHhVgRI0g9ynRzyTtytWcFhZaOgU7BH+xOlJ6DOysHrrC07C62Kj7g9kXb VKLUZfMFd3rrpoRYl+fQUIExb7xoXsqtbHggazM1SBgOVN7qf+gbBXrTjzQgNzIlf+pg P5vAnYQgisbJWIWWTMRChCPiIjG0qUUhgfj3aHFdx4+jegqhJu4ME10ybfvD8GUXzqmW K/76dsCT1bteRL5aVt2B11WzXf78eDNEoZhp3PrinGFHOKHLeGqrblyvHpu4/9ELbdct Aq0A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zC0Lta4A; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id f17-20020a05600c155100b00405959bbf4fsm4497832wmg.19.2023.10.19.06.13.37 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:38 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 5/7] hw/ppc/pnv: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:03 +0200 Message-ID: <20231019131305.19157-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=philmd@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/ppc/pnv.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 10158f7684..c0e34fffbc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -1217,10 +1217,9 @@ static void pnv_chip_icp_realize(Pnv8Chip *chip8, Error **errp) name = g_strdup_printf("icp-%x", chip->chip_id); memory_region_init(&chip8->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); - sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip8->icp_mmio); g_free(name); - - sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + memory_region_add_subregion(get_system_memory(), PNV_ICP_BASE(chip), + &chip8->icp_mmio); /* Map the ICP registers for each thread */ for (i = 0; i < chip->nr_cores; i++) { From patchwork Thu Oct 19 13:13:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735548 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1508690wro; Thu, 19 Oct 2023 06:14:19 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHeWx4lRFwj8CtbaBxdpgk9FSJdy4/UXeqJh2r/5XiGq9ZDiOU8ddkPsAgffm4PXMebqIyS X-Received: by 2002:a05:600c:1907:b0:406:84cb:b014 with SMTP id j7-20020a05600c190700b0040684cbb014mr1783638wmq.22.1697721259376; Thu, 19 Oct 2023 06:14:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697721259; cv=none; d=google.com; s=arc-20160816; b=t4q8hKFQUJzo+vtvETpIMtVAzPzs+raeUvQ9q8c6jQvzA0dGORuNMRo/8C+Xo7lHw/ QBx3+rsu9c0JJUEfNnC7dRGfuEBdcnoGCs4Tzdy2s+RMlgNMt4KR+DAaJ/l4r79hekDi rPJQcWoEf4gJ3FhkA0ZO8CEZO3mEx5ryIpS3j80SBojgNz7MgzgaNs6BRzaJCvHmnYRF Te4gdpghQXhS925DlkpDjpyla30xo/SoEr12K6ABvKEfe/kEyH3Wqw0mTHq6a33ObmW2 FitF4uZ+MAxl4zXQXtTj0C83HgSYqOxH3TvD6w2NfDFUBmyP1evFRc3SDf0IW4DJkMmN DVxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=MvrIYZ1SHVtY4jy7jskbyHF3SwQhysiF+69uIEKUTD0=; fh=pKSa3NIqn0GzXJAy/2EwD+riYoiBTvQWIw5svo/o4rg=; b=h7vkwoQLBFJ6db5MT5FnQFcmOyx3Td6kQyDy8GQBerSAbCDKBqfKxLrfRoVAonI0JE oM5wQCAZmo1hEQEoRChGyvSd9Utqj51bTDjTCYB5KSmtecZUJU5l/ZvT5QgTtz9lwQe7 zsTcwkXN8yD/biW5+Okhl5XBKNs7n49Y9VepsAmaqmUmfBvyFX4CkouA56dFwo+qKrRp UJkkaFM+Rmy5LH4l6CM9bf80tz45KtAhqERd2D4f0oh2pRo+IUYHSuPPUBqli1Zq/fjV g1VeFyqqKpSU/qmF3ue85fcBAbXkld8uvGmKEOl9rPT4yatqPmGawtgQkLk3CEVyBtgM gG1A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j1IZgfB0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id f7-20020a05600c4e8700b00403b63e87f2sm4506590wmq.32.2023.10.19.06.13.43 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:44 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 6/7] hw/intc/spapr_xive: Move sysbus_init_mmio() calls around Date: Thu, 19 Oct 2023 15:13:04 +0200 Message-ID: <20231019131305.19157-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22a; envelope-from=philmd@linaro.org; helo=mail-lj1-x22a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In order to make the next commit trivial, move sysbus_init_mmio() calls just before the corresponding sysbus_mmio_map() calls. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/intc/spapr_xive.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 7f701d414b..12057ffe5b 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -316,7 +316,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); /* * Initialize the END ESB source @@ -328,7 +327,6 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) if (!qdev_realize(DEVICE(end_xsrc), NULL, errp)) { return; } - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); /* Set the mapping address of the END ESB pages after the source ESBs */ xive->end_base = xive->vc_base + xive_source_esb_len(xsrc); @@ -347,14 +345,16 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) /* TIMA initialization */ memory_region_init_io(&xive->tm_mmio, OBJECT(xive), &spapr_xive_tm_ops, xive, "xive.tima", 4ull << TM_SHIFT); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); /* * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); + sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); } From patchwork Thu Oct 19 13:13:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 735554 Delivered-To: patch@linaro.org Received: by 2002:adf:f0cd:0:b0:32d:baff:b0ca with SMTP id x13csp1509283wro; Thu, 19 Oct 2023 06:15:23 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGFhAiOhngyjJS7TAV4/VXoMn1jxOdAQYUcdQ2Uy9uymu8kmRnzc82FALvqcIK9+BKam+uJ X-Received: by 2002:a5d:46d0:0:b0:32d:806f:d080 with SMTP id g16-20020a5d46d0000000b0032d806fd080mr1346522wrs.50.1697721322702; Thu, 19 Oct 2023 06:15:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1697721322; cv=none; d=google.com; s=arc-20160816; b=LiJ9/Eh2x6arJB9IQKuQQBsUh6aK5D9F6Db0K538GCagOEwPOXd57CmaTM4VvkA7hD IxCzA42IS49FjakxLaFjvd0rWS3vN96JcrEz5BO3np5BRMLtmZ7XCfS4ci4a+ChFxzEX scgDAqRDm7Vuvxgu3m5rTcVcFvOOsMcu1PMHTJEczqbIDKnetOqVDcdwYPwRF94/cbNn xa46aEVXNhlXaHMbDvuoaTV8jC7JRvOKH+vOXxOYGtFtB/9CoZSjJshhH7g9lSrtVi3M oSwG7NuprrTzN5gzcOlFxpbvq7bROSohhNkKjsmNVKOOh6cIviQsQYxRfyGBmI/9YVKt oDZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=wtQTvP35/R8Mqpc3lXMAne5CQvH4pHB2/4W4n7b7ncs=; fh=pKSa3NIqn0GzXJAy/2EwD+riYoiBTvQWIw5svo/o4rg=; b=vW9P5SkKNxHmParCbYk878FWmpq+Wzz0KVfsgAOnKtoHAaNXbM44c6Tcrs5Abt+cdM Rzn4iHBS2c3VWYTNL/gXfCeMjHOUCqSd5MDNuNR/YXtYxi2CmrTpi69yJhAI6EK/vVH7 PKkinS7xBEKFIyOXsZ7JDqh7SlvXDZdMWN+4JmjtfP+i+rzpylZW+Mj95U8I6i8maW/r VrNZG4GNgUDxO6g35ERQ8fLiRf61KjlUBBVlrAks10hG78T0RlACt40pfduzoj0Hi6/S xpVJyNIp+1nxUu7vutzMFM/fh3WETtP3kjsmb98p9RSrNq+p6jIkC1jqRz2ld6ohtdua eU1g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xadH6JqO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[176.131.216.177]) by smtp.gmail.com with ESMTPSA id q12-20020a05600c2e4c00b0040648217f4fsm4341857wmf.39.2023.10.19.06.13.49 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 19 Oct 2023 06:13:50 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, Richard Henderson , =?utf-8?b?RnLDqWTDqXJpYyBCYXJyYXQ=?= , Harsh Prateek Bora , David Gibson , Nicholas Piggin , =?utf-8?q?C=C3=A9dric_Le_Goater?= , LIU Zhiwei , Daniel Henrique Barboza , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 7/7] hw/intc/spapr_xive: Do not use SysBus API to map local MMIO region Date: Thu, 19 Oct 2023 15:13:05 +0200 Message-ID: <20231019131305.19157-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231019131305.19157-1-philmd@linaro.org> References: <20231019131305.19157-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=philmd@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org There is no point in exposing an internal MMIO region via SysBus and directly mapping it in the very same device. Just map it without using the SysBus API. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Thomas Huth Reviewed-by: LIU Zhiwei --- hw/intc/spapr_xive.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c index 12057ffe5b..199c261b07 100644 --- a/hw/intc/spapr_xive.c +++ b/hw/intc/spapr_xive.c @@ -350,12 +350,12 @@ static void spapr_xive_realize(DeviceState *dev, Error **errp) * Map all regions. These will be enabled or disabled at reset and * can also be overridden by KVM memory regions if active */ - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 0, xive->vc_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &end_xsrc->esb_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 1, xive->end_base); - sysbus_init_mmio(SYS_BUS_DEVICE(xive), &xive->tm_mmio); - sysbus_mmio_map(SYS_BUS_DEVICE(xive), 2, xive->tm_base); + memory_region_add_subregion(get_system_memory(), xive->vc_base, + &xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->end_base, + &end_xsrc->esb_mmio); + memory_region_add_subregion(get_system_memory(), xive->tm_base, + &xive->tm_mmio); } static int spapr_xive_get_eas(XiveRouter *xrtr, uint8_t eas_blk,