From patchwork Mon Oct 23 08:11:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 739458 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3007ECDB474 for ; Mon, 23 Oct 2023 08:13:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232228AbjJWINL (ORCPT ); Mon, 23 Oct 2023 04:13:11 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49682 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231149AbjJWIM6 (ORCPT ); Mon, 23 Oct 2023 04:12:58 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B28910F7; Mon, 23 Oct 2023 01:12:55 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CTrq060057; Mon, 23 Oct 2023 16:12:29 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVZ53kgz2LHnPx; Mon, 23 Oct 2023 16:08:06 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:27 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 1/7] i2c: sprd: Add configurations that support 1Mhz and 3.4Mhz frequencies Date: Mon, 23 Oct 2023 16:11:52 +0800 Message-ID: <20231023081158.10654-2-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CTrq060057 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add support for 1Mhz and 3.4Mhz frequency configuration. Signed-off-by: Huangzheng Lai Acked-by: Andi Shyti --- drivers/i2c/busses/i2c-sprd.c | 25 ++++++++++++++++++++----- 1 file changed, 20 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index ffc54fbf814d..b44916c6741d 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -343,10 +343,23 @@ static void sprd_i2c_set_clk(struct sprd_i2c *i2c_dev, u32 freq) writel(div1, i2c_dev->base + ADDR_DVD1); /* Start hold timing = hold time(us) * source clock */ - if (freq == I2C_MAX_FAST_MODE_FREQ) - writel((6 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); - else if (freq == I2C_MAX_STANDARD_MODE_FREQ) + switch (freq) { + case I2C_MAX_STANDARD_MODE_FREQ: writel((4 * apb_clk) / 1000000, i2c_dev->base + ADDR_STA0_DVD); + break; + case I2C_MAX_FAST_MODE_FREQ: + writel((6 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); + break; + case I2C_MAX_FAST_MODE_PLUS_FREQ: + writel((8 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); + break; + case I2C_MAX_HIGH_SPEED_MODE_FREQ: + writel((8 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); + break; + default: + dev_err(i2c_dev->dev, "Unsupported frequency: %d\n", freq); + break; + } } static void sprd_i2c_enable(struct sprd_i2c *i2c_dev) @@ -519,9 +532,11 @@ static int sprd_i2c_probe(struct platform_device *pdev) if (!of_property_read_u32(dev->of_node, "clock-frequency", &prop)) i2c_dev->bus_freq = prop; - /* We only support 100k and 400k now, otherwise will return error. */ + /* We only support 100k\400k\1m\3.4m now, otherwise will return error. */ if (i2c_dev->bus_freq != I2C_MAX_STANDARD_MODE_FREQ && - i2c_dev->bus_freq != I2C_MAX_FAST_MODE_FREQ) + i2c_dev->bus_freq != I2C_MAX_FAST_MODE_FREQ && + i2c_dev->bus_freq != I2C_MAX_FAST_MODE_PLUS_FREQ && + i2c_dev->bus_freq != I2C_MAX_HIGH_SPEED_MODE_FREQ) return -EINVAL; ret = sprd_i2c_clk_init(i2c_dev); From patchwork Mon Oct 23 08:11:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 737412 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1CCDFC25B43 for ; Mon, 23 Oct 2023 08:13:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229617AbjJWINM (ORCPT ); Mon, 23 Oct 2023 04:13:12 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53546 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231573AbjJWIM6 (ORCPT ); Mon, 23 Oct 2023 04:12:58 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3B11210EF; Mon, 23 Oct 2023 01:12:54 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CUVW060087; Mon, 23 Oct 2023 16:12:30 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVb396Jz2KkWG6; Mon, 23 Oct 2023 16:08:07 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:28 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 2/7] i2c: sprd: Add I2C driver to use 'reset framework' function Date: Mon, 23 Oct 2023 16:11:53 +0800 Message-ID: <20231023081158.10654-3-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CUVW060087 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Add the 'reset framework' function for I2C drivers, which resets the I2C controller when a timeout exception occurs. Signed-off-by: Huangzheng Lai --- drivers/i2c/busses/i2c-sprd.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index b44916c6741d..aa602958d4fd 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -17,6 +17,7 @@ #include #include #include +#include #define I2C_CTL 0x00 #define I2C_ADDR_CFG 0x04 @@ -85,6 +86,7 @@ struct sprd_i2c { u32 src_clk; u32 bus_freq; struct completion complete; + struct reset_control *rst; u8 *buf; u32 count; int irq; @@ -278,9 +280,17 @@ static int sprd_i2c_handle_msg(struct i2c_adapter *i2c_adap, time_left = wait_for_completion_timeout(&i2c_dev->complete, msecs_to_jiffies(I2C_XFER_TIMEOUT)); - if (!time_left) + if (!time_left) { + dev_err(i2c_dev->dev, "transfer timeout, I2C_STATUS = 0x%x\n", + readl(i2c_dev->base + I2C_STATUS)); + if (i2c_dev->rst) { + int ret = reset_control_reset(i2c_dev->rst); + + if (ret < 0) + dev_warn(i2c_dev->dev, "i2c soft reset failed, ret = %d\n", ret); + } return -ETIMEDOUT; - + } return i2c_dev->err; } @@ -544,6 +554,11 @@ static int sprd_i2c_probe(struct platform_device *pdev) return ret; platform_set_drvdata(pdev, i2c_dev); + i2c_dev->rst = devm_reset_control_get(i2c_dev->dev, "i2c_rst"); + if (IS_ERR(i2c_dev->rst)) { + dev_dbg(i2c_dev->dev, "reset control not configured!\n"); + i2c_dev->rst = NULL; + } ret = clk_prepare_enable(i2c_dev->clk); if (ret) From patchwork Mon Oct 23 08:11:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 737410 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 54D94C25B42 for ; Mon, 23 Oct 2023 08:13:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232208AbjJWINR (ORCPT ); Mon, 23 Oct 2023 04:13:17 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53558 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229926AbjJWINB (ORCPT ); Mon, 23 Oct 2023 04:13:01 -0400 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65503D65; Mon, 23 Oct 2023 01:12:57 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CVvw060127; Mon, 23 Oct 2023 16:12:31 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVc2FJWz2LHnPx; Mon, 23 Oct 2023 16:08:08 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:28 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 3/7] i2c: sprd: Use global variables to record I2C ack/nack status instead of local variables Date: Mon, 23 Oct 2023 16:11:54 +0800 Message-ID: <20231023081158.10654-4-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CVvw060127 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org We found that when the interrupt bit of the I2C controller is cleared, the ack/nack bit is also cleared at the same time. After clearing the interrupt bit in sprd_i2c_isr(), incorrect ack/nack information will be obtained in sprd_i2c_isr_thread(), resulting in incorrect communication when nack cannot be recognized. To solve this problem, we used a global variable to record ack/nack information before clearing the interrupt bit instead of a local variable. Fixes: 8b9ec0719834 ("i2c: Add Spreadtrum I2C controller driver") Cc: # v4.14+ Signed-off-by: Huangzheng Lai --- drivers/i2c/busses/i2c-sprd.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index aa602958d4fd..dec627ef408c 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -85,6 +85,7 @@ struct sprd_i2c { struct clk *clk; u32 src_clk; u32 bus_freq; + bool ack_flag; struct completion complete; struct reset_control *rst; u8 *buf; @@ -119,6 +120,7 @@ static void sprd_i2c_clear_ack(struct sprd_i2c *i2c_dev) { u32 tmp = readl(i2c_dev->base + I2C_STATUS); + i2c_dev->ack_flag = 0; writel(tmp & ~I2C_RX_ACK, i2c_dev->base + I2C_STATUS); } @@ -393,7 +395,6 @@ static irqreturn_t sprd_i2c_isr_thread(int irq, void *dev_id) { struct sprd_i2c *i2c_dev = dev_id; struct i2c_msg *msg = i2c_dev->msg; - bool ack = !(readl(i2c_dev->base + I2C_STATUS) & I2C_RX_ACK); u32 i2c_tran; if (msg->flags & I2C_M_RD) @@ -409,7 +410,7 @@ static irqreturn_t sprd_i2c_isr_thread(int irq, void *dev_id) * For reading data, ack is always true, if i2c_tran is not 0 which * means we still need to contine to read data from slave. */ - if (i2c_tran && ack) { + if (i2c_tran && i2c_dev->ack_flag) { sprd_i2c_data_transfer(i2c_dev); return IRQ_HANDLED; } @@ -420,7 +421,7 @@ static irqreturn_t sprd_i2c_isr_thread(int irq, void *dev_id) * If we did not get one ACK from slave when writing data, we should * return -EIO to notify users. */ - if (!ack) + if (!i2c_dev->ack_flag) i2c_dev->err = -EIO; else if (msg->flags & I2C_M_RD && i2c_dev->count) sprd_i2c_read_bytes(i2c_dev, i2c_dev->buf, i2c_dev->count); @@ -437,7 +438,6 @@ static irqreturn_t sprd_i2c_isr(int irq, void *dev_id) { struct sprd_i2c *i2c_dev = dev_id; struct i2c_msg *msg = i2c_dev->msg; - bool ack = !(readl(i2c_dev->base + I2C_STATUS) & I2C_RX_ACK); u32 i2c_tran; if (msg->flags & I2C_M_RD) @@ -456,7 +456,8 @@ static irqreturn_t sprd_i2c_isr(int irq, void *dev_id) * means we can read all data in one time, then we can finish this * transmission too. */ - if (!i2c_tran || !ack) { + i2c_dev->ack_flag = !(readl(i2c_dev->base + I2C_STATUS) & I2C_RX_ACK); + if (!i2c_tran || !i2c_dev->ack_flag) { sprd_i2c_clear_start(i2c_dev); sprd_i2c_clear_irq(i2c_dev); } From patchwork Mon Oct 23 08:11:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 739456 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BBE17C001E0 for ; Mon, 23 Oct 2023 08:13:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232161AbjJWINP (ORCPT ); Mon, 23 Oct 2023 04:13:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41044 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229670AbjJWINK (ORCPT ); Mon, 23 Oct 2023 04:13:10 -0400 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F0A3210C3; Mon, 23 Oct 2023 01:13:07 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CWdJ060171; Mon, 23 Oct 2023 16:12:32 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVd1qp2z2KkWG6; Mon, 23 Oct 2023 16:08:09 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:29 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 4/7] i2c: sprd: Add I2C controller driver to support dynamic switching of 400K/1M/3.4M frequency Date: Mon, 23 Oct 2023 16:11:55 +0800 Message-ID: <20231023081158.10654-5-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CWdJ060171 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org When I2C-slaves supporting different frequencies use the same I2C controller, the I2C controller usually only operates at lower frequencies. In order to improve the performance of I2C-slaves transmission supporting faster frequencies, we dynamically configure the I2C operating frequency based on the value of the input parameter msg ->flag. Signed-off-by: Huangzheng Lai --- drivers/i2c/busses/i2c-sprd.c | 101 +++++++++++++++++++--------------- 1 file changed, 57 insertions(+), 44 deletions(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index dec627ef408c..f1f7fad42ecd 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -75,7 +75,14 @@ #define SPRD_I2C_PM_TIMEOUT 1000 /* timeout (ms) for transfer message */ #define I2C_XFER_TIMEOUT 1000 - +/* dynamic modify clk_freq flag */ +#define I2C_3M4_FLAG 0x0100 +#define I2C_1M_FLAG 0x0080 +#define I2C_400K_FLAG 0x0040 + +#define I2C_FREQ_400K 400000 +#define I2C_FREQ_1M 1000000 +#define I2C_FREQ_3_4M 3400000 /* SPRD i2c data structure */ struct sprd_i2c { struct i2c_adapter adap; @@ -94,6 +101,49 @@ struct sprd_i2c { int err; }; +static void sprd_i2c_set_clk(struct sprd_i2c *i2c_dev, u32 freq) +{ + u32 apb_clk = i2c_dev->src_clk; + /* + * From I2C databook, the prescale calculation formula: + * prescale = freq_i2c / (4 * freq_scl) - 1; + */ + u32 i2c_dvd = apb_clk / (4 * freq) - 1; + /* + * From I2C databook, the high period of SCL clock is recommended as + * 40% (2/5), and the low period of SCL clock is recommended as 60% + * (3/5), then the formula should be: + * high = (prescale * 2 * 2) / 5 + * low = (prescale * 2 * 3) / 5 + */ + u32 high = ((i2c_dvd << 1) * 2) / 5; + u32 low = ((i2c_dvd << 1) * 3) / 5; + u32 div0 = I2C_ADDR_DVD0_CALC(high, low); + u32 div1 = I2C_ADDR_DVD1_CALC(high, low); + + writel(div0, i2c_dev->base + ADDR_DVD0); + writel(div1, i2c_dev->base + ADDR_DVD1); + + /* Start hold timing = hold time(us) * source clock */ + switch (freq) { + case I2C_MAX_STANDARD_MODE_FREQ: + writel((4 * apb_clk) / 1000000, i2c_dev->base + ADDR_STA0_DVD); + break; + case I2C_MAX_FAST_MODE_FREQ: + writel((6 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); + break; + case I2C_MAX_FAST_MODE_PLUS_FREQ: + writel((8 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); + break; + case I2C_MAX_HIGH_SPEED_MODE_FREQ: + writel((8 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); + break; + default: + dev_err(i2c_dev->dev, "Unsupported frequency: %d\n", freq); + break; + } +} + static void sprd_i2c_set_count(struct sprd_i2c *i2c_dev, u32 count) { writel(count, i2c_dev->base + I2C_COUNT); @@ -269,6 +319,12 @@ static int sprd_i2c_handle_msg(struct i2c_adapter *i2c_adap, sprd_i2c_send_stop(i2c_dev, !!is_last_msg); } + if (msg->flags & I2C_400K_FLAG) + sprd_i2c_set_clk(i2c_dev, I2C_FREQ_400K); + else if (msg->flags & I2C_1M_FLAG) + sprd_i2c_set_clk(i2c_dev, I2C_FREQ_1M); + else if (msg->flags & I2C_3M4_FLAG) + sprd_i2c_set_clk(i2c_dev, I2C_FREQ_3_4M); /* * We should enable rx fifo full interrupt to get data when receiving * full data. @@ -331,49 +387,6 @@ static const struct i2c_algorithm sprd_i2c_algo = { .functionality = sprd_i2c_func, }; -static void sprd_i2c_set_clk(struct sprd_i2c *i2c_dev, u32 freq) -{ - u32 apb_clk = i2c_dev->src_clk; - /* - * From I2C databook, the prescale calculation formula: - * prescale = freq_i2c / (4 * freq_scl) - 1; - */ - u32 i2c_dvd = apb_clk / (4 * freq) - 1; - /* - * From I2C databook, the high period of SCL clock is recommended as - * 40% (2/5), and the low period of SCL clock is recommended as 60% - * (3/5), then the formula should be: - * high = (prescale * 2 * 2) / 5 - * low = (prescale * 2 * 3) / 5 - */ - u32 high = ((i2c_dvd << 1) * 2) / 5; - u32 low = ((i2c_dvd << 1) * 3) / 5; - u32 div0 = I2C_ADDR_DVD0_CALC(high, low); - u32 div1 = I2C_ADDR_DVD1_CALC(high, low); - - writel(div0, i2c_dev->base + ADDR_DVD0); - writel(div1, i2c_dev->base + ADDR_DVD1); - - /* Start hold timing = hold time(us) * source clock */ - switch (freq) { - case I2C_MAX_STANDARD_MODE_FREQ: - writel((4 * apb_clk) / 1000000, i2c_dev->base + ADDR_STA0_DVD); - break; - case I2C_MAX_FAST_MODE_FREQ: - writel((6 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); - break; - case I2C_MAX_FAST_MODE_PLUS_FREQ: - writel((8 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); - break; - case I2C_MAX_HIGH_SPEED_MODE_FREQ: - writel((8 * apb_clk) / 10000000, i2c_dev->base + ADDR_STA0_DVD); - break; - default: - dev_err(i2c_dev->dev, "Unsupported frequency: %d\n", freq); - break; - } -} - static void sprd_i2c_enable(struct sprd_i2c *i2c_dev) { u32 tmp = I2C_DVD_OPT; From patchwork Mon Oct 23 08:11:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 739457 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA9F6C25B41 for ; Mon, 23 Oct 2023 08:13:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229716AbjJWINN (ORCPT ); Mon, 23 Oct 2023 04:13:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:49712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229729AbjJWINF (ORCPT ); Mon, 23 Oct 2023 04:13:05 -0400 Received: from SHSQR01.spreadtrum.com (mx1.unisoc.com [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0DF1593; Mon, 23 Oct 2023 01:13:01 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CWbY060214; Mon, 23 Oct 2023 16:12:32 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVf0qD7z2LHnQ0; Mon, 23 Oct 2023 16:08:10 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:30 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 5/7] i2c: sprd: Configure the enable bit of the I2C controller before each transmission initiation Date: Mon, 23 Oct 2023 16:11:56 +0800 Message-ID: <20231023081158.10654-6-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CWbY060214 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org When a timeout exception occurs in the I2C driver, the I2C controller will be reset, and after resetting, control bits such as I2C_EN and I2C_INT_EN will be reset to 0, and the I2C master cannot initiate Transmission unless sprd_i2c_enable() is executed. To address this issue, this patch places sprd_i2c_enable() before each transmission initiation to ensure that the necessary control bits of the I2C controller are configured. Signed-off-by: Huangzheng Lai --- drivers/i2c/busses/i2c-sprd.c | 38 +++++++++++++++++------------------ 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index f1f7fad42ecd..b65729ba7d5a 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -352,6 +352,23 @@ static int sprd_i2c_handle_msg(struct i2c_adapter *i2c_adap, return i2c_dev->err; } +static void sprd_i2c_enable(struct sprd_i2c *i2c_dev) +{ + u32 tmp = I2C_DVD_OPT; + + writel(tmp, i2c_dev->base + I2C_CTL); + + sprd_i2c_set_full_thld(i2c_dev, I2C_FIFO_FULL_THLD); + sprd_i2c_set_empty_thld(i2c_dev, I2C_FIFO_EMPTY_THLD); + + sprd_i2c_set_clk(i2c_dev, i2c_dev->bus_freq); + sprd_i2c_reset_fifo(i2c_dev); + sprd_i2c_clear_irq(i2c_dev); + + tmp = readl(i2c_dev->base + I2C_CTL); + writel(tmp | I2C_EN | I2C_INT_EN, i2c_dev->base + I2C_CTL); +} + static int sprd_i2c_master_xfer(struct i2c_adapter *i2c_adap, struct i2c_msg *msgs, int num) { @@ -362,6 +379,8 @@ static int sprd_i2c_master_xfer(struct i2c_adapter *i2c_adap, if (ret < 0) return ret; + sprd_i2c_enable(i2c_dev); + for (im = 0; im < num - 1; im++) { ret = sprd_i2c_handle_msg(i2c_adap, &msgs[im], 0); if (ret) @@ -387,23 +406,6 @@ static const struct i2c_algorithm sprd_i2c_algo = { .functionality = sprd_i2c_func, }; -static void sprd_i2c_enable(struct sprd_i2c *i2c_dev) -{ - u32 tmp = I2C_DVD_OPT; - - writel(tmp, i2c_dev->base + I2C_CTL); - - sprd_i2c_set_full_thld(i2c_dev, I2C_FIFO_FULL_THLD); - sprd_i2c_set_empty_thld(i2c_dev, I2C_FIFO_EMPTY_THLD); - - sprd_i2c_set_clk(i2c_dev, i2c_dev->bus_freq); - sprd_i2c_reset_fifo(i2c_dev); - sprd_i2c_clear_irq(i2c_dev); - - tmp = readl(i2c_dev->base + I2C_CTL); - writel(tmp | I2C_EN | I2C_INT_EN, i2c_dev->base + I2C_CTL); -} - static irqreturn_t sprd_i2c_isr_thread(int irq, void *dev_id) { struct sprd_i2c *i2c_dev = dev_id; @@ -669,8 +671,6 @@ static int __maybe_unused sprd_i2c_runtime_resume(struct device *dev) if (ret) return ret; - sprd_i2c_enable(i2c_dev); - return 0; } From patchwork Mon Oct 23 08:11:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 737411 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2107ACDB474 for ; Mon, 23 Oct 2023 08:13:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230045AbjJWINP (ORCPT ); Mon, 23 Oct 2023 04:13:15 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41024 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232178AbjJWINK (ORCPT ); Mon, 23 Oct 2023 04:13:10 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DDB9510C2; Mon, 23 Oct 2023 01:13:07 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CXFC060218; Mon, 23 Oct 2023 16:12:33 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVg0CXSz2KkWG6; Mon, 23 Oct 2023 16:08:11 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:31 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 6/7] i2c: sprd: Increase the waiting time for I2C transmission to avoid system crash issues Date: Mon, 23 Oct 2023 16:11:57 +0800 Message-ID: <20231023081158.10654-7-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CXFC060218 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org Due to the relatively low priority of the isr_thread, when the CPU load is high, the execution of sprd_i2c_isr_thread will be delayed. After the waiting time is exceeded, the I2C driver will perform operations such as disabling the I2C controller. Later, when sprd_i2c_isr_thread is called by the CPU, there will be kernel panic caused by illegal access to the IIC register. After pressure testing, we found that increasing the IIC waiting time to 10 seconds can avoid this problem. Fixes: 0b884fe71f9e ("i2c: sprd: use a specific timeout to avoid system hang up issue") Cc: # v5.11+ Signed-off-by: Huangzheng Lai Acked-by: Andi Shyti --- drivers/i2c/busses/i2c-sprd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index b65729ba7d5a..dbdac89ad482 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -74,7 +74,7 @@ /* timeout (ms) for pm runtime autosuspend */ #define SPRD_I2C_PM_TIMEOUT 1000 /* timeout (ms) for transfer message */ -#define I2C_XFER_TIMEOUT 1000 +#define I2C_XFER_TIMEOUT 10000 /* dynamic modify clk_freq flag */ #define I2C_3M4_FLAG 0x0100 #define I2C_1M_FLAG 0x0080 From patchwork Mon Oct 23 08:11:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Huangzheng Lai X-Patchwork-Id: 739455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6C62BC001E0 for ; Mon, 23 Oct 2023 08:13:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232660AbjJWINX (ORCPT ); Mon, 23 Oct 2023 04:13:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:44392 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229898AbjJWINM (ORCPT ); Mon, 23 Oct 2023 04:13:12 -0400 Received: from SHSQR01.spreadtrum.com (unknown [222.66.158.135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E7A0910C8; Mon, 23 Oct 2023 01:13:08 -0700 (PDT) Received: from dlp.unisoc.com ([10.29.3.86]) by SHSQR01.spreadtrum.com with ESMTP id 39N8CYVU060250; Mon, 23 Oct 2023 16:12:34 +0800 (+08) (envelope-from Huangzheng.Lai@unisoc.com) Received: from SHDLP.spreadtrum.com (shmbx04.spreadtrum.com [10.0.1.214]) by dlp.unisoc.com (SkyGuard) with ESMTPS id 4SDSVh0GKCz2LHnPx; Mon, 23 Oct 2023 16:08:12 +0800 (CST) Received: from xm9614pcu.spreadtrum.com (10.13.2.29) by shmbx04.spreadtrum.com (10.0.1.214) with Microsoft SMTP Server (TLS) id 15.0.1497.23; Mon, 23 Oct 2023 16:12:32 +0800 From: Huangzheng Lai To: Andi Shyti CC: Orson Zhai , Baolin Wang , Chunyan Zhang , , , huangzheng lai , Huangzheng Lai , Xiongpeng Wu Subject: [PATCH V2 7/7] i2c: sprd: Add I2C_NACK_EN and I2C_TRANS_EN control bits Date: Mon, 23 Oct 2023 16:11:58 +0800 Message-ID: <20231023081158.10654-8-Huangzheng.Lai@unisoc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> References: <20231023081158.10654-1-Huangzheng.Lai@unisoc.com> MIME-Version: 1.0 X-Originating-IP: [10.13.2.29] X-ClientProxiedBy: SHCAS01.spreadtrum.com (10.0.1.201) To shmbx04.spreadtrum.com (10.0.1.214) X-MAIL: SHSQR01.spreadtrum.com 39N8CYVU060250 Precedence: bulk List-ID: X-Mailing-List: linux-i2c@vger.kernel.org The new I2C IP version on the UNISOC platform has added I2C_NACK_EN and I2C_TRANS_EN control bits. To ensure that the I2C controller can initiate transmission smoothly, these two bits need to be configured. Signed-off-by: Huangzheng Lai --- drivers/i2c/busses/i2c-sprd.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-sprd.c b/drivers/i2c/busses/i2c-sprd.c index dbdac89ad482..431c0db84d22 100644 --- a/drivers/i2c/busses/i2c-sprd.c +++ b/drivers/i2c/busses/i2c-sprd.c @@ -33,6 +33,8 @@ #define ADDR_RST 0x2c /* I2C_CTL */ +#define I2C_NACK_EN BIT(22) +#define I2C_TRANS_EN BIT(21) #define STP_EN BIT(20) #define FIFO_AF_LVL_MASK GENMASK(19, 16) #define FIFO_AF_LVL 16 @@ -366,7 +368,7 @@ static void sprd_i2c_enable(struct sprd_i2c *i2c_dev) sprd_i2c_clear_irq(i2c_dev); tmp = readl(i2c_dev->base + I2C_CTL); - writel(tmp | I2C_EN | I2C_INT_EN, i2c_dev->base + I2C_CTL); + writel(tmp | I2C_EN | I2C_INT_EN | I2C_NACK_EN | I2C_TRANS_EN, i2c_dev->base + I2C_CTL); } static int sprd_i2c_master_xfer(struct i2c_adapter *i2c_adap,