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[209.51.188.17]) by mx.google.com with ESMTPS id q7-20020a05622a030700b00419a6207c03si5784943qtw.81.2023.10.30.07.42.08 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 30 Oct 2023 07:42:08 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AL6U92Ku; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qxTRI-0001Oq-Ut; Mon, 30 Oct 2023 10:40:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qxTRG-0001OC-O9 for qemu-devel@nongnu.org; Mon, 30 Oct 2023 10:40:22 -0400 Received: from mail-wm1-x336.google.com ([2a00:1450:4864:20::336]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qxTR9-0001mf-G7 for qemu-devel@nongnu.org; Mon, 30 Oct 2023 10:40:22 -0400 Received: by mail-wm1-x336.google.com with SMTP id 5b1f17b1804b1-4079ed65582so33318535e9.1 for ; Mon, 30 Oct 2023 07:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1698676808; x=1699281608; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=k6siaLDPN7rSUcCidjmSdujoZ1Clu6ak+uuvWhAfvmw=; b=AL6U92Kutol4J+wa3wAIFluDUGyz6apXLR542dFacd/PZZJOOixnspwIBfGo2AjB5V PurkAjC4HIFtigzycQz0QslPyOEZKzXorsvn4kWq8bRH14mXrcTqe0KURmLFI14/oPsP hFGkRR6ukWPRDAxVsEzx62G8pdlsB2liDsDa15yUTriCVbH7zHtsL/xPczZAJSGJ5waO CCIojWqsozvSm8XS+q3feDDJUcVq9eSdTT7kAdOERmQ3PxTjLttpRHhC4ltxi1TaTl2h jESlYgVl47RrVrjRh3R+ZSm5Fzpj1FU6nXxyhe9a9MGYsQU6zOi8KTYmN6q1fr1ro6fZ sCaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1698676808; x=1699281608; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=k6siaLDPN7rSUcCidjmSdujoZ1Clu6ak+uuvWhAfvmw=; b=eb7txxUt/VDapPSllYi8TnNn2h77QUxD4J4mzz+ZI7q83T47CUzdWf6cNYGVe/QwD9 t2VqHy75/E3aZav/zABjo3pA9z2ZU8jGjETCzHPPXxbQB581RSD1No0XT2qTuDggTY8w qgpMDyB4onx1vHz3xsiYSOdaZl7WB7VVowByNbkdFul/9ArhbNRRIrhFpMyMUApqDaRq 2Huw6TPnJ8qIsOVMgwWfvDckSux99Ei9elQqt0a06r0/7lJ49FX/DM6MW7EkJ7e/b9X8 LfPTqdWnFoOgOix6M/FHImbQUMxXZg47MWmaOoV5joAJpwGNzpCU6lZrRB3y7K7/TdEY QFfA== X-Gm-Message-State: AOJu0YyQkgvTdyVwofvFM75xnhXVJWlfvXAhYbPiIZIOcTnqjH3Cn2DS 8nJibboPr4VlYkscxpi54nINOW/gK521UNbeCs4= X-Received: by 2002:a05:600c:3b20:b0:407:612b:91fb with SMTP id m32-20020a05600c3b2000b00407612b91fbmr8013575wms.30.1698676808504; Mon, 30 Oct 2023 07:40:08 -0700 (PDT) Received: from m1x-phil.lan ([176.170.212.50]) by smtp.gmail.com with ESMTPSA id bg9-20020a05600c3c8900b004063cd8105csm13009491wmb.22.2023.10.30.07.40.06 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 30 Oct 2023 07:40:08 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org, Peter Maydell , Markus Armbruster Cc: Luc Michel , Daniel Henrique Barboza , Alistair Francis , Paolo Bonzini , Eduardo Habkost , Mark Cave-Ayland , Bernhard Beschow , qemu-ppc@nongnu.org, "Edgar E . Iglesias" , "Daniel P . Berrange" , Thomas Huth , Kevin Wolf , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 1/5] qdev: Add qdev_prop_set_array() Date: Mon, 30 Oct 2023 15:39:52 +0100 Message-ID: <20231030143957.82988-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231030143957.82988-1-philmd@linaro.org> References: <20231030143957.82988-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Kevin Wolf Instead of exposing the ugly hack of how we represent arrays in qdev (a static "foo-len" property and after it is set, dynamically created "foo[i]" properties) to boards, add an interface that allows setting the whole array at once. Once all internal users of devices with array properties have been converted to use this function, we can change the implementation to move away from this hack. Signed-off-by: Kevin Wolf Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Peter Maydell Tested-by: Philippe Mathieu-Daudé Message-ID: <20231030114802.3671871-4-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé --- include/hw/qdev-properties.h | 3 +++ hw/core/qdev-properties.c | 21 +++++++++++++++++++++ 2 files changed, 24 insertions(+) diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index e1df08876c..7fa2fdb7c9 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -206,6 +206,9 @@ void qdev_prop_set_macaddr(DeviceState *dev, const char *name, const uint8_t *value); void qdev_prop_set_enum(DeviceState *dev, const char *name, int value); +/* Takes ownership of @values */ +void qdev_prop_set_array(DeviceState *dev, const char *name, QList *values); + void *object_field_prop_ptr(Object *obj, Property *prop); void qdev_prop_register_global(GlobalProperty *prop); diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 357b8761b5..950ef48e01 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -3,12 +3,14 @@ #include "qapi/error.h" #include "qapi/qapi-types-misc.h" #include "qapi/qmp/qerror.h" +#include "qapi/qmp/qlist.h" #include "qemu/ctype.h" #include "qemu/error-report.h" #include "qapi/visitor.h" #include "qemu/units.h" #include "qemu/cutils.h" #include "qdev-prop-internal.h" +#include "qom/qom-qobject.h" void qdev_prop_set_after_realize(DeviceState *dev, const char *name, Error **errp) @@ -739,6 +741,25 @@ void qdev_prop_set_enum(DeviceState *dev, const char *name, int value) &error_abort); } +void qdev_prop_set_array(DeviceState *dev, const char *name, QList *values) +{ + const QListEntry *entry; + g_autofree char *prop_len = g_strdup_printf("len-%s", name); + uint32_t i = 0; + + object_property_set_int(OBJECT(dev), prop_len, qlist_size(values), + &error_abort); + + QLIST_FOREACH_ENTRY(values, entry) { + g_autofree char *prop_idx = g_strdup_printf("%s[%u]", name, i); + object_property_set_qobject(OBJECT(dev), prop_idx, entry->value, + &error_abort); + i++; + } + + qobject_unref(values); +} + static GPtrArray *global_props(void) { static GPtrArray *gp; From patchwork Mon Oct 30 14:39:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 739260 Delivered-To: patch@linaro.org Received: by 2002:a5d:4c47:0:b0:32d:baff:b0ca with SMTP id n7csp1155928wrt; Mon, 30 Oct 2023 07:41:02 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFU++soxxiw5X6Ep5WpOxkcVkWMVsLcQMp7VNvGxuCwFkFlKI4ocMUe6jhWKQNmsgKPsvzS X-Received: by 2002:a05:620a:1c:b0:779:efb4:73bb with SMTP id j28-20020a05620a001c00b00779efb473bbmr9287417qki.41.1698676861951; Mon, 30 Oct 2023 07:41:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698676861; cv=none; d=google.com; s=arc-20160816; b=0B2FIq4brJd2TdaVwRkZJlhm0PNBg8Q8r/c39A+2qQHG1jDjsCb6ONN3Ctv/Fo5Uaz DZKAWlDq5zxSvnDEKAP4mFJw3riIrC5mhEbcWA/rWRl6PliPYNFkgP3jJtV6wagBiVfj CvZ8j+YiaJHdjfJkQ+LNRsKJBvJ2C22JoWYS3DGwFA7papSeNPFZb2m1v1oYioLcJhFS 1BJS9gAknN82UGebYPY/wRspndeOLtl57v2uy/RpKIQmVDbQlCOSLhLY4XC9CZA/n/0V JyostPa/0weK1ALMF7qXTW58hKkdTNAPQaeuG+PlX0Vmb4x5vlzNbF7ciU12Bzgq0N64 Igyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=I7ToXfUjeHh4GxTtDabuQxd+6LNHtLDODSscY/4+OEc=; fh=h9i03/I3DsCPcmeGrMxb+5kHX6/oPGtJs5JE9RaGQZs=; b=hZn80Ek2Z18dcrnh9zs0JsdeOHOMSzoJTq2ZN7LrwDl5FLiX89qOMbCMG/JdE9xZco 0KW5YOJzhhocqYxZg3sWdOo/e2tVkeMnRJnPin09CSOeZr1BZ6UuZCDOn2CWq/PcjM3D /iowRbVmUE4LhdAFDKWPoHakMpvZXcZbG3ptx03hVBi9WJ4qgZ25qBCMjCLUbvs5lTXL Uak3uh8Z3/OMpnY3urNG4Q6gaMwcnTfnk/bUqjQ3FWhC33g8gW+AIb70l8pwkVGOMOHs EUzmI7y/MAGtBXxcfF9P4vp9LOxzLBBzrx+GDDHBfm8lP7qTuaT0hr+EZZL2VtVd0QFi zSRg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=m94c3oL4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 2/5] hw/ppc/e500: Declare CPU QOM types using DEFINE_TYPES() macro Date: Mon, 30 Oct 2023 15:39:53 +0100 Message-ID: <20231030143957.82988-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231030143957.82988-1-philmd@linaro.org> References: <20231030143957.82988-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When multiple QOM types are registered in the same file, it is simpler to use the the DEFINE_TYPES() macro. In particular because type array declared with such macro are easier to review. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza --- I'm going to do that for each file I modify, so eventually we'll get all converted. --- hw/ppc/ppce500_spin.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index bbce63e8a4..e3608d8c16 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -195,17 +195,14 @@ static void ppce500_spin_class_init(ObjectClass *klass, void *data) dc->reset = spin_reset; } -static const TypeInfo ppce500_spin_info = { - .name = TYPE_E500_SPIN, - .parent = TYPE_SYS_BUS_DEVICE, - .instance_size = sizeof(SpinState), - .instance_init = ppce500_spin_initfn, - .class_init = ppce500_spin_class_init, +static const TypeInfo ppce500_spin_types[] = { + { + .name = TYPE_E500_SPIN, + .parent = TYPE_SYS_BUS_DEVICE, + .instance_size = sizeof(SpinState), + .instance_init = ppce500_spin_initfn, + .class_init = ppce500_spin_class_init, + }, }; -static void ppce500_spin_register_types(void) -{ - type_register_static(&ppce500_spin_info); -} - -type_init(ppce500_spin_register_types) +DEFINE_TYPES(ppce500_spin_types) From patchwork Mon Oct 30 14:39:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 739259 Delivered-To: patch@linaro.org Received: by 2002:a5d:4c47:0:b0:32d:baff:b0ca with SMTP id n7csp1155770wrt; Mon, 30 Oct 2023 07:40:41 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHRcgEMNIMFzRQMOpP/INYTBkxCWrX1mvpyhUl2QXFv1XXWJ7LIOBe7F2T24S7pFXrN6UuH X-Received: by 2002:a05:6808:20d:b0:3ae:5bf5:4ad1 with SMTP id l13-20020a056808020d00b003ae5bf54ad1mr10698120oie.33.1698676841306; Mon, 30 Oct 2023 07:40:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698676841; cv=none; d=google.com; s=arc-20160816; b=uUYiMBNuDoTZlk4TE/GUQa6i5Q5pPyZJEs/wpIJD0ixWYpUy+y4u8vIZO/yI7/yH1x Ys3ZEB6ARr8qNOBmNTXD27K+OOfo3cwycPCOSBjwvUQjlBznODsdSfWq6Pc+aEBxFkFk 6SDja+jHd12USHZEhAbNavbUZfSHDA+A4uNYtZcY8ayG1dqernyv/BceMl5UmelEurv4 vUNDa1pVI//9IQVsxkSpAcRcw6DEpRoFpo8uk5P+GfJLZtEkeKqvK0UoaLZST/ONXX9I ZUDApNINxGiz5HWXY625u3Aemok1XlwnSr/8jobA7+J5TSb16HDPcoa6q/IkFMe+Jk9A h2Rw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WuUDSxKsXjW5GqbYcOSHq6FGSIjG2WuDJO98unbaNSY=; fh=h9i03/I3DsCPcmeGrMxb+5kHX6/oPGtJs5JE9RaGQZs=; b=EdrdWcXm3nFc+p0SyU7WcWldibBFnen3T22L5ZLv9hx7AoUXUZE/lwj7w0zrG1ejM2 e9rL2pK9+Wn8oIs8KKyZ7SlWOJsU4HLwYDzordqmbrATnMNXtRlf21v539RrXXxdAQsB wwgXlcpucHmZhqxmXI1UsYCcdRXgbIk+v6GUIe7YdSa1iSe0TDPOoLpixuQ/CWxeqmg2 johnBrqqzPK8tPTs4xanPOXnEalTu1jZ/Vn/ewHTyYslPyojL8zGnX7KTaS2ZzeF9IrR wSbeWXkFZLVzTfa+wS8IJkz1UDKKWe6BxgtHigDYA20GqMvXyyUy+O+p8Y4Qnoh98IOi 4AOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ECN+3hdz; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 3/5] hw/ppc/e500: QOM-attach CPUs to the machine container Date: Mon, 30 Oct 2023 15:39:54 +0100 Message-ID: <20231030143957.82988-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231030143957.82988-1-philmd@linaro.org> References: <20231030143957.82988-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::434; envelope-from=philmd@linaro.org; helo=mail-wr1-x434.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Instead of having CPUs dangling in the /unattached/device bucket, attach them to the machine container. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza --- hw/ppc/e500.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index e04114fb3c..f8177c0280 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -946,6 +946,7 @@ void ppce500_init(MachineState *machine) exit(1); } + object_property_add_child(OBJECT(machine), "cpu[*]", OBJECT(cs)); /* * Secondary CPU starts in halted state for now. Needs to change * when implementing non-kernel boot. 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Iglesias" , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH 4/5] hw/ppc/e500: Inline sysbus_create_simple(E500_SPIN) Date: Mon, 30 Oct 2023 15:39:55 +0100 Message-ID: <20231030143957.82988-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231030143957.82988-1-philmd@linaro.org> References: <20231030143957.82988-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, T_SPF_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org In the next commit we'll set properties to the TYPE_E500_SPIN object. In order to ease next commit review, inline the sysbus_create_simple() call first. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Daniel Henrique Barboza --- hw/ppc/e500.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index f8177c0280..e38f46df38 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -1082,7 +1082,9 @@ void ppce500_init(MachineState *machine) } /* Register spinning region */ - sysbus_create_simple("e500-spin", pmc->spin_base, NULL); + dev = qdev_new("e500-spin"); + sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, pmc->spin_base); if (pmc->has_mpc8xxx_gpio) { qemu_irq poweroff_irq; From patchwork Mon Oct 30 14:39:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 739261 Delivered-To: patch@linaro.org Received: by 2002:a5d:4c47:0:b0:32d:baff:b0ca with SMTP id n7csp1156195wrt; Mon, 30 Oct 2023 07:41:39 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGzf/ClhuR2ljiM9oPqMqhDBYcSFsGZY8yEYqta8yDv2u9aazmg0LohKELD0KcTUXQEQYYl X-Received: by 2002:a05:6214:2a8b:b0:64c:9d23:8f55 with SMTP id jr11-20020a0562142a8b00b0064c9d238f55mr12013211qvb.58.1698676899041; Mon, 30 Oct 2023 07:41:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1698676899; cv=none; d=google.com; s=arc-20160816; b=Mn5TAXRe+I3CrWayNgxzJ/dS10MX1fiW2nX3WAFdkHiunwPrZFCL/WMe6QYUooD9pb NcjjsoScpBoCTqimhes8w6LbVkcLtXdackfwdZJY5RvVLiUtI3l6gPeCe4nuBwGG1Sft 0kUYHhFHN1LF2YUjuabbO7zG55/yXghBokpwAJVfGWj+EiulhkukEeg+o6l4aP26zBpa AEdNEm5a2qnNjrcf1d8J2GRu8efLCxOq93MkKkQEqew+PfleAyQYa1m3KrnoWaUjxDih qPEyzmciTmr733PgRGhaCMuTbBGruGU6SomfJZIDlJO0YexUIV6xKuvkd6W89SdJhGwV ITqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/nhttjW6fGHzpzQpigFGqu2RntvPUsap0hdm5++FEtY=; fh=h9i03/I3DsCPcmeGrMxb+5kHX6/oPGtJs5JE9RaGQZs=; b=UnYUl9V6trgOhh6XDONtEbWRA3tApYihzv3vFDl+SkM3CLOARt/j+GNZG3du2lM5L8 RNdHAxYYhHIbH9qbsm5ZdJ/OKud6+iXEDJWiX6TxxJNnPMJaG6fxoCl2391F7brCubsG hxNasaZ3YxV8Eq/Kf4CwHeFU4XcnCnNa0yUYTb58ceUo2OPfHhmtNRUQGmyyLf18NKoR EHDgfnjmvh9m3jS+qrygvyMSgvwHQNaxDRTfB0MVqP1mC8zqj7m8OshpPCOHS3f3gIBP uos8oVSZBspXDUGp3LbhdwWaTmxNRQuggaeNAquq3R3SFsxtpple92O8lrRo/fCwu7Wl sDRQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cQnsIBwT; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [RFC PATCH 5/5] hw/ppc/e500: Pass array of CPUs as array of canonical QOM paths Date: Mon, 30 Oct 2023 15:39:56 +0100 Message-ID: <20231030143957.82988-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20231030143957.82988-1-philmd@linaro.org> References: <20231030143957.82988-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::331; envelope-from=philmd@linaro.org; helo=mail-wm1-x331.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Devices should avoid calling qemu_get_cpu() because this call doesn't work as expected with heterogeneous machines. Such devices often iterate over a cluster of CPUs, which the device's parent has direct access (when creating the child device). We can pass QOM as 'link' between objects, but we can't pass an array of links. Here we exploits QAPI simplicity, by using DEFINE_PROP_ARRAY and a list of strings, each string being the CPU canonical path in QOM tree (which is constant and unique). When the device realizes itself, the original CPU pointer is recovered via a object_resolve_path() call. Inspired-by: Peter Maydell Inspired-by: Markus Armbruster Signed-off-by: Philippe Mathieu-Daudé --- Tested with: $ make check-qtest-ppc{,64} $ make check-avocado AVOCADO_TAGS='machine:ppce500 machine:mpc8544ds' RFC: See cover FIXME: Should we free spin_cpu_list using g_autoptr(QList)? --- hw/ppc/e500.c | 6 ++++++ hw/ppc/ppce500_spin.c | 48 ++++++++++++++++++++++++++++++++++++------- 2 files changed, 47 insertions(+), 7 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index e38f46df38..8b31143dca 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -18,6 +18,7 @@ #include "qemu/datadir.h" #include "qemu/units.h" #include "qemu/guest-random.h" +#include "qapi/qmp/qlist.h" #include "qapi/error.h" #include "e500.h" #include "e500-ccsr.h" @@ -930,11 +931,13 @@ void ppce500_init(MachineState *machine) SysBusDevice *s; PPCE500CCSRState *ccsr; I2CBus *i2c; + QList *spin_cpu_list = qlist_new(); irqs = g_new0(IrqLines, smp_cpus); for (i = 0; i < smp_cpus; i++) { PowerPCCPU *cpu; CPUState *cs; + g_autofree char *cpu_qompath; cpu = POWERPC_CPU(object_new(machine->cpu_type)); env = &cpu->env; @@ -954,6 +957,8 @@ void ppce500_init(MachineState *machine) object_property_set_bool(OBJECT(cs), "start-powered-off", i != 0, &error_fatal); qdev_realize_and_unref(DEVICE(cs), NULL, &error_fatal); + cpu_qompath = object_get_canonical_path(OBJECT(cs)); + qlist_append_str(spin_cpu_list, cpu_qompath); if (!firstenv) { firstenv = env; @@ -1083,6 +1088,7 @@ void ppce500_init(MachineState *machine) /* Register spinning region */ dev = qdev_new("e500-spin"); + qdev_prop_set_array(dev, "cpus-qom-path", spin_cpu_list); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, pmc->spin_base); diff --git a/hw/ppc/ppce500_spin.c b/hw/ppc/ppce500_spin.c index e3608d8c16..a67046b2ea 100644 --- a/hw/ppc/ppce500_spin.c +++ b/hw/ppc/ppce500_spin.c @@ -30,11 +30,13 @@ #include "qemu/osdep.h" #include "qemu/module.h" #include "qemu/units.h" +#include "qapi/error.h" #include "hw/hw.h" #include "hw/sysbus.h" #include "sysemu/hw_accel.h" #include "e500.h" #include "qom/object.h" +#include "hw/qdev-properties.h" #define MAX_CPUS 32 @@ -46,6 +48,10 @@ typedef struct spin_info { uint64_t reserved; } QEMU_PACKED SpinInfo; +/* + * QEMU interface: + * + QOM array property "cpus-qom-path": QOM canonical path of each CPU. + */ #define TYPE_E500_SPIN "e500-spin" OBJECT_DECLARE_SIMPLE_TYPE(SpinState, E500_SPIN) @@ -54,6 +60,9 @@ struct SpinState { MemoryRegion iomem; SpinInfo spin[MAX_CPUS]; + uint32_t cpu_count; + char **cpu_canonical_path; + CPUState **cpu; }; static void spin_reset(DeviceState *dev) @@ -121,16 +130,10 @@ static void spin_write(void *opaque, hwaddr addr, uint64_t value, { SpinState *s = opaque; int env_idx = addr / sizeof(SpinInfo); - CPUState *cpu; + CPUState *cpu = s->cpu[env_idx]; SpinInfo *curspin = &s->spin[env_idx]; uint8_t *curspin_p = (uint8_t*)curspin; - cpu = qemu_get_cpu(env_idx); - if (cpu == NULL) { - /* Unknown CPU */ - return; - } - if (cpu->cpu_index == 0) { /* primary CPU doesn't spin */ return; @@ -188,11 +191,42 @@ static void ppce500_spin_initfn(Object *obj) sysbus_init_mmio(dev, &s->iomem); } +static void ppce500_spin_realize(DeviceState *dev, Error **errp) +{ + SpinState *s = E500_SPIN(dev); + + if (s->cpu_count == 0) { + error_setg(errp, "'cpus-qom-path' property array must be set"); + return; + } else if (s->cpu_count > MAX_CPUS) { + error_setg(errp, "at most %d CPUs are supported", MAX_CPUS); + return; + } + + s->cpu = g_new(CPUState *, s->cpu_count); + for (unsigned i = 0; i < s->cpu_count; i++) { + bool ambiguous; + Object *obj; + + obj = object_resolve_path(s->cpu_canonical_path[i], &ambiguous); + assert(!ambiguous); + s->cpu[i] = CPU(obj); + } +} + +static Property ppce500_spin_properties[] = { + DEFINE_PROP_ARRAY("cpus-qom-path", SpinState, cpu_count, + cpu_canonical_path, qdev_prop_string, char *), + DEFINE_PROP_END_OF_LIST(), +}; + static void ppce500_spin_class_init(ObjectClass *klass, void *data) { DeviceClass *dc = DEVICE_CLASS(klass); dc->reset = spin_reset; + dc->realize = ppce500_spin_realize; + device_class_set_props(dc, ppce500_spin_properties); } static const TypeInfo ppce500_spin_types[] = {