From patchwork Tue Oct 31 07:49:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 739645 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26C09C4332F for ; Tue, 31 Oct 2023 07:58:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229537AbjJaH6H (ORCPT ); Tue, 31 Oct 2023 03:58:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53296 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343786AbjJaHvT (ORCPT ); Tue, 31 Oct 2023 03:51:19 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4E151FA; Tue, 31 Oct 2023 00:51:16 -0700 (PDT) Received: from pps.filterd (m0279870.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39V6n83x002281; Tue, 31 Oct 2023 07:50:52 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=nhIIT2kzeEZlo4CsbgL/7pZZITzSXD1n/q6MZPjPdKU=; b=l7p+u8Sz48c955BZA0g3GVqh2fqpahIpA9UD+7sgG7ZbFOMmXy7adpoJCMtL/7dCmJDI nW0KGGfIyj1x6/X+I4yZ2+KVgUzutybI1O+9tRlToHsYCWyZFO2Ze7cTY8l7YFNCqes/ 4vYI+u3/immAtyvx7sWT/8VDG9U1JgDxcWPEeWlhdDfXAAYNhEGuaCLkPweP/VgUMVxK /EgKjHXb14MZBfHsJrlJcIJqoqjeG+mohAnmK0wuB1WZx/29yfdqXVBRa3ziFjz1sbs1 2qX+uMTzpA8lR45dYXA02OGyhCzKUBLTqBjCTVW2DyN2fBDXJtTq7mQN91iYe8eQoVEd ew== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u2fuvhpbq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:50:52 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7ofD4027414 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:50:41 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:50:32 -0700 From: Tengfei Fan To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , Ajit Pandey , Tengfei Fan Subject: [PATCH v6 1/6] arm64: dts: qcom: sm4450: Add apps_rsc and cmd_db node Date: Tue, 31 Oct 2023 15:49:59 +0800 Message-ID: <20231031075004.3850-2-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031075004.3850-1-quic_tengfan@quicinc.com> References: <20231031075004.3850-1-quic_tengfan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: N29Q3sJvjYbpOXKQl1PFkVjDugl-oaVV X-Proofpoint-GUID: N29Q3sJvjYbpOXKQl1PFkVjDugl-oaVV X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 bulkscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 mlxscore=0 priorityscore=1501 phishscore=0 mlxlogscore=946 adultscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310060 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Ajit Pandey Add apps_rsc node and cmd_db memory region for sm4450. Reviewed-by: Konrad Dybcio Signed-off-by: Ajit Pandey Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/sm4450.dtsi | 35 ++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index c4e5b33f5169..5e09880f4218 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -5,6 +5,7 @@ #include #include +#include / { interrupt-parent = <&intc>; @@ -328,6 +329,18 @@ }; }; + reserved_memory: reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + aop_cmd_db_mem: cmd-db@80860000 { + compatible = "qcom,cmd-db"; + reg = <0x0 0x80860000 0x0 0x20000>; + no-map; + }; + }; + soc: soc@0 { #address-cells = <2>; #size-cells = <2>; @@ -419,6 +432,28 @@ status = "disabled"; }; }; + + apps_rsc: rsc@17a00000 { + compatible = "qcom,rpmh-rsc"; + reg = <0x0 0x17a00000 0x0 0x10000>, + <0x0 0x17a10000 0x0 0x10000>, + <0x0 0x17a20000 0x0 0x10000>; + reg-names = "drv-0", "drv-1", "drv-2"; + interrupts = , + , + ; + label = "apps_rsc"; + qcom,tcs-offset = <0xd00>; + qcom,drv-id = <2>; + qcom,tcs-config = , , + , ; + power-domains = <&CLUSTER_PD>; + + apps_bcm_voter: bcm-voter { + compatible = "qcom,bcm-voter"; + }; + }; + }; timer { From patchwork Tue Oct 31 07:50:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 739648 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B93D8C4332F for ; Tue, 31 Oct 2023 07:51:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343753AbjJaHvU (ORCPT ); Tue, 31 Oct 2023 03:51:20 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35778 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343761AbjJaHvP (ORCPT ); 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Tue, 31 Oct 2023 07:50:48 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7olRK029917 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:50:47 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:50:38 -0700 From: Tengfei Fan To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , Tengfei Fan , Ajit Pandey Subject: [PATCH v6 2/6] arm64: dts: qcom: sm4450: Add RPMH and Global clock Date: Tue, 31 Oct 2023 15:50:00 +0800 Message-ID: <20231031075004.3850-3-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031075004.3850-1-quic_tengfan@quicinc.com> References: <20231031075004.3850-1-quic_tengfan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: Zw5tdkjNVSN2pq0Dm0kz9Za9eiVY1269 X-Proofpoint-ORIG-GUID: Zw5tdkjNVSN2pq0Dm0kz9Za9eiVY1269 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 spamscore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 mlxlogscore=843 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310060 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add device node for RPMH and Global clock controller on Qualcomm SM4450 platform. Reviewed-by: Konrad Dybcio Signed-off-by: Ajit Pandey Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/sm4450.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index 5e09880f4218..5a8a54b0f6c1 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -3,6 +3,8 @@ * Copyright (c) 2023, Qualcomm Innovation Center, Inc. All rights reserved. */ +#include +#include #include #include #include @@ -348,6 +350,20 @@ dma-ranges = <0 0 0 0 0x10 0>; compatible = "simple-bus"; + gcc: clock-controller@100000 { + compatible = "qcom,sm4450-gcc"; + reg = <0x0 0x00100000 0x0 0x1f4200>; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&sleep_clk>, + <0>, + <0>, + <0>, + <0>; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -452,6 +468,13 @@ apps_bcm_voter: bcm-voter { compatible = "qcom,bcm-voter"; }; + + rpmhcc: clock-controller { + compatible = "qcom,sm4450-rpmh-clk"; + #clock-cells = <1>; + clocks = <&xo_board>; + clock-names = "xo"; + }; }; }; From patchwork Tue Oct 31 07:50:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 740142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1FE16C4167B for ; Tue, 31 Oct 2023 07:51:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343764AbjJaHvV (ORCPT ); Tue, 31 Oct 2023 03:51:21 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53326 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343792AbjJaHvT (ORCPT ); Tue, 31 Oct 2023 03:51:19 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C90EDF; Tue, 31 Oct 2023 00:51:17 -0700 (PDT) Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39V6FWZC028188; Tue, 31 Oct 2023 07:50:55 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=PWOq3jmRIiq+uiTPsHXaiaeOPpH/u4Efbtd5jc4OIgE=; b=OpYbCHmrGD7NiSux9yQWo5PL5BRx42jURdMxyEWZAMgc1G0Q8CCmhY609co9ve5VvyiP abTouCKiAFSQJ5LXzw+pOS1VV0ZZr9NSafK+2y+XY4KEuUcvRJs/Ft2SHvJkKCNcH0s8 HVAeGudqPVCSYi5ypkzR/ctuN4hN+9Qg5HuKAcwU9C7WKtJ6hWmTk6bFOCGCRPtjUUvF KF6L+nEbN3y9fFWuImA2Ed90gWD6S973fvrQfA3iaSW/ftbbK1HviS0GqY+RLZJek7jc i6wdkC0/i0iLyOBWAol1enkzj5c7BhoLM7UJlTEbQUgWs2ecmS+pHNCFMUqw2zkHOalf 1w== Received: from nalasppmta03.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u280jtv7c-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:50:55 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA03.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7osPf027837 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:50:54 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:50:45 -0700 From: Tengfei Fan To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH v6 3/6] arm64: dts: qcom: add uart console support for SM4450 Date: Tue, 31 Oct 2023 15:50:01 +0800 Message-ID: <20231031075004.3850-4-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031075004.3850-1-quic_tengfan@quicinc.com> References: <20231031075004.3850-1-quic_tengfan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 8nEUtl3pE51MxYiZz141Us5PlcEMq-X1 X-Proofpoint-ORIG-GUID: 8nEUtl3pE51MxYiZz141Us5PlcEMq-X1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 phishscore=0 mlxlogscore=863 adultscore=0 spamscore=0 bulkscore=0 impostorscore=0 clxscore=1015 mlxscore=0 suspectscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310060 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add base description of UART and TLMM nodes which helps SM4450 boot to shell with console on boards with this SoC. Signed-off-by: Tengfei Fan Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm4450.dtsi | 49 ++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4450.dtsi b/arch/arm64/boot/dts/qcom/sm4450.dtsi index 5a8a54b0f6c1..3e7ae3bebbe0 100644 --- a/arch/arm64/boot/dts/qcom/sm4450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm4450.dtsi @@ -364,6 +364,29 @@ <0>; }; + qupv3_id_0: geniqup@ac0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x00ac0000 0x0 0x2000>; + ranges; + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + clock-names = "m-ahb", "s-ahb"; + #address-cells = <2>; + #size-cells = <2>; + status = "disabled"; + + uart7: serial@a88000 { + compatible = "qcom,geni-debug-uart"; + reg = <0x0 0x00a88000 0x0 0x4000>; + clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; + clock-names = "se"; + interrupts = ; + pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>; + pinctrl-names = "default"; + status = "disabled"; + }; + }; + tcsr_mutex: hwlock@1f40000 { compatible = "qcom,tcsr-mutex"; reg = <0x0 0x01f40000 0x0 0x40000>; @@ -380,6 +403,32 @@ interrupt-controller; }; + tlmm: pinctrl@f100000 { + compatible = "qcom,sm4450-tlmm"; + reg = <0x0 0x0f100000 0x0 0x300000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&tlmm 0 0 137>; + wakeup-parent = <&pdc>; + + qup_uart7_rx: qup-uart7-rx-state { + pins = "gpio23"; + function = "qup1_se2_l2"; + drive-strength = <2>; + bias-disable; + }; + + qup_uart7_tx: qup-uart7-tx-state { + pins = "gpio22"; + function = "qup1_se2_l2"; + drive-strength = <2>; + bias-disable; + }; + }; + intc: interrupt-controller@17200000 { compatible = "arm,gic-v3"; reg = <0x0 0x17200000 0x0 0x10000>, /* GICD */ From patchwork Tue Oct 31 07:50:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 739647 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 399BEC4332F for ; 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Tue, 31 Oct 2023 07:51:01 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7p0cE029986 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:51:00 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:50:51 -0700 From: Tengfei Fan To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH v6 4/6] arm64: dts: qcom: sm4450-qrd: add QRD4450 uart support Date: Tue, 31 Oct 2023 15:50:02 +0800 Message-ID: <20231031075004.3850-5-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031075004.3850-1-quic_tengfan@quicinc.com> References: <20231031075004.3850-1-quic_tengfan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: jXX2LCIbDnAmrrksb0V3mYMYp4uGrtAN X-Proofpoint-GUID: jXX2LCIbDnAmrrksb0V3mYMYp4uGrtAN X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 bulkscore=0 phishscore=0 adultscore=0 spamscore=0 priorityscore=1501 mlxlogscore=889 malwarescore=0 mlxscore=0 suspectscore=0 impostorscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310060 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add uart support for QRD4450 for enable uart console. Reviewed-by: Konrad Dybcio Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts index 00a1c81ca397..bb8c58fb4267 100644 --- a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts @@ -10,9 +10,19 @@ model = "Qualcomm Technologies, Inc. SM4450 QRD"; compatible = "qcom,sm4450-qrd", "qcom,sm4450"; - aliases { }; + aliases { + serial0 = &uart7; + }; chosen { - bootargs = "console=hvc0"; + stdout-path = "serial0:115200n8"; }; }; + +&qupv3_id_0 { + status = "okay"; +}; + +&uart7 { + status = "okay"; +}; From patchwork Tue Oct 31 07:50:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 740141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F0BD5C4332F for ; Tue, 31 Oct 2023 07:51:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343819AbjJaHvp (ORCPT ); Tue, 31 Oct 2023 03:51:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53470 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343815AbjJaHvf (ORCPT ); Tue, 31 Oct 2023 03:51:35 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8C763F7; Tue, 31 Oct 2023 00:51:29 -0700 (PDT) Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39V5hkYT019964; Tue, 31 Oct 2023 07:51:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=4VIZxs8DjczlVgSQKkcQ7k7fvAkaKqb4Bg0Ju/+yY7E=; b=f6jq3wh6aCeqZar/5LXPJV+TUiiCdbnhpePNysIoQAXiCjU4BLkPQC/aVpQXNDIxVcPQ gIotp35toTq29rM+LZllVVV7864zJKZp1xDHS9XliCYyTzBmDhRUp3TCnTkdSkip1n13 B783fFR80mrW4+g9AGUfqddr+dA7hgXLLsuCG25oaBZrwF1+6TMiT6vBAXBaJwCXkWn+ blf4DrMtq7hvNGaZayaS8PG53+CIZwHPLmG1qCL3uPFCKvLS1In0OuY1IcDfutw2gsTZ iVIg2vyr4HDP2ew+Jqzj7qvQduQsHFRx2HlhyT22PFSmVRYyNNUQetg5rmeC4bn2Wu9n hw== Received: from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u29fetp0b-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:51:07 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7p6QK013853 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:51:06 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:50:57 -0700 From: Tengfei Fan To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH v6 5/6] arm64: dts: qcom: sm4450-qrd: mark QRD4450 reserved gpios Date: Tue, 31 Oct 2023 15:50:03 +0800 Message-ID: <20231031075004.3850-6-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031075004.3850-1-quic_tengfan@quicinc.com> References: <20231031075004.3850-1-quic_tengfan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: 5ST4inr-Z28v7M_yVjZxZj59xTAa-9Xk X-Proofpoint-ORIG-GUID: 5ST4inr-Z28v7M_yVjZxZj59xTAa-9Xk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 impostorscore=0 spamscore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 clxscore=1015 bulkscore=0 mlxlogscore=624 mlxscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310060 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some gpios are reserved for other subsystems, so mark these reserved gpios. Signed-off-by: Tengfei Fan --- arch/arm64/boot/dts/qcom/sm4450-qrd.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts index bb8c58fb4267..e354bad57a9e 100644 --- a/arch/arm64/boot/dts/qcom/sm4450-qrd.dts +++ b/arch/arm64/boot/dts/qcom/sm4450-qrd.dts @@ -23,6 +23,11 @@ status = "okay"; }; +&tlmm { + /* Reserved for other subsystems */ + gpio-reserved-ranges = <0 4>, <136 1>; +}; + &uart7 { status = "okay"; }; From patchwork Tue Oct 31 07:50:04 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tengfei Fan X-Patchwork-Id: 739646 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A9B5C4167B for ; Tue, 31 Oct 2023 07:51:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1343765AbjJaHvv (ORCPT ); Tue, 31 Oct 2023 03:51:51 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:37318 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343733AbjJaHvl (ORCPT ); Tue, 31 Oct 2023 03:51:41 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 74A35E8; Tue, 31 Oct 2023 00:51:37 -0700 (PDT) Received: from pps.filterd (m0279865.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 39V5nhpB016649; Tue, 31 Oct 2023 07:51:13 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=H7rT/fVlCzeEK+nheDOv/nNqokMKnkydXyq6BK8BIq0=; b=hfqGwonoVwoKNpaD2FbjAlfDWFDfdvxwp78KJtAskWsPmSW60QDBpSymjNbvZrcExY1a yDtI2Q+DV+0dgp/5LCr4/ejoLJ8B3viZ83asRNu8SLB83jtwPJtRqZmQ7UYzeoCiAqAV 750bAl45UTSxfFhy8RzQVWiN+isJ+xSLYTrG3f+wSkhw9oj3IIH9VElJBAwtGDvkjGrF 2aW0iV4FgKrO8KQJBsUo79pBXK7S3e9/7dfwgetu8PTj9xrUhrqviL9351UFq0rglGyv 9ngU7L5riS6OJWO/tvgBA+TZpUJxtt9MwYo4HPn++yXADidA/MWT0dC3O0nWTDdF+8Zx tw== Received: from nalasppmta05.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3u2at12f6a-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:51:13 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 39V7pCDD019020 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 31 Oct 2023 07:51:12 GMT Received: from tengfan2-gv.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.39; Tue, 31 Oct 2023 00:51:03 -0700 From: Tengfei Fan To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , Tengfei Fan Subject: [PATCH v6 6/6] arm64: defconfig: enable clock controller and pinctrl Date: Tue, 31 Oct 2023 15:50:04 +0800 Message-ID: <20231031075004.3850-7-quic_tengfan@quicinc.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20231031075004.3850-1-quic_tengfan@quicinc.com> References: <20231031075004.3850-1-quic_tengfan@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: Tzgk_Atg459kBPxP8WtwdDI6h7zjB0eH X-Proofpoint-GUID: Tzgk_Atg459kBPxP8WtwdDI6h7zjB0eH X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.987,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-10-30_13,2023-10-31_03,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 adultscore=0 mlxlogscore=609 bulkscore=0 mlxscore=0 phishscore=0 impostorscore=0 spamscore=0 malwarescore=0 clxscore=1015 suspectscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2310240000 definitions=main-2310310060 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Enable global clock controller and pinctrl for support the Qualcomm SM4450 platform to boot to UART console. The serial engine depends on some global clock controller and pinctrl, but as the serial console driver is only available as built-in, so the global clock controller and pinctrl also needs be built-in for the UART device to probe and register the console. Signed-off-by: Tengfei Fan Reviewed-by: Krzysztof Kozlowski --- arch/arm64/configs/defconfig | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b60aa1f89343..bfc898568884 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -599,6 +599,7 @@ CONFIG_PINCTRL_SC8280XP=y CONFIG_PINCTRL_SDM660=y CONFIG_PINCTRL_SDM670=y CONFIG_PINCTRL_SDM845=y +CONFIG_PINCTRL_SM4450=y CONFIG_PINCTRL_SM6115=y CONFIG_PINCTRL_SM6115_LPASS_LPI=m CONFIG_PINCTRL_SM6125=y @@ -1257,6 +1258,7 @@ CONFIG_SM_DISPCC_6115=m CONFIG_SM_DISPCC_8250=y CONFIG_SM_DISPCC_8450=m CONFIG_SM_DISPCC_8550=m +CONFIG_SM_GCC_4450=y CONFIG_SM_GCC_6115=y CONFIG_SM_GCC_8350=y CONFIG_SM_GCC_8450=y