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Y. Srinivasan" , Len Brown , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, linux-snps-arc@lists.infradead.org, linux-tegra@vger.kernel.org, Russell King , Lorenzo Pieralisi , Marek Szyprowski , Hector Martin , Palmer Dabbelt , patches@lists.linux.dev, Paul Walmsley , "Rafael J. Wysocki" , Robert Moore , Rob Herring , Robin Murphy , Sudeep Holla , Suravee Suthikulpanit , Sven Peter , Thierry Reding , Thomas Bogendoerfer , Krishna Reddy , Vineet Gupta , virtualization@lists.linux.dev, Wei Liu , Will Deacon Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , Lu Baolu , Christoph Hellwig , Jerry Snitselaar , Moritz Fischer , Zhenhua Huang , "Rafael J. Wysocki" , Rob Herring Subject: [PATCH v2 01/17] iommu: Remove struct iommu_ops *iommu from arch_setup_dma_ops() Date: Wed, 15 Nov 2023 10:05:52 -0400 Message-ID: <1-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR15CA0030.namprd15.prod.outlook.com (2603:10b6:208:1b4::43) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SJ0PR12MB7007:EE_ X-MS-Office365-Filtering-Correlation-Id: 529d66cd-e412-498d-4a9f-08dbe5e40483 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 0gCY+Ym8EtLaXF0idmv8eBZsOt0ZR2YAsRF660hQrp3EIl0O6FwmkLEeAzh9gegD1+OZViyptSfLDyCVZ8826Rth4QZlWhd+DnRy4kP/CuhXiDB/QZQEINH480RqnKTQff7ttp4NOtw0+5IH1aXRIRuBom3NfUm0fJatj6B3CfHOcHYbKJS4GyFdNVzfQN3vSNPD73aZ73Ja4Vg76QdBaKMKcCu9lL43i75SRNA0dzF3vzMJMIev0UA3oNh4A4tCyH96r7y9lKRLKfS/a1DR1KjkmfbcbaAfeK7IAPKW+1RZ4sG9wcejEwIVqFiG0QoFDhO8RL4navaXuJTgiApDtTTBt3Y+gpr8XhFXgOiwqlGwMuKKOt5wqFF3oLdtOcBMhCaNU54UJwiIiGne4QlSWd8hLLOX3oDmFyaqcOKHYHqfinluOSfKLc9qEGQLjLqIArX0J2CYFy5OmbRN2aeQeKOn+4/aM48mFhxw44hEamovQnxVB/150REIRW3RGxu4eSmTRTkx75rOmbkT+3wtG8IYfMbBhbB3r07nGac0dRDwPhC5wjsBQrbV2IFsOUK3tB0FOTYx5zK0mM2RyDjTw86EkkSUj4Td872gA/iE+ESsdJcPJeje9OhZyLXbsHHW X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(346002)(376002)(366004)(39860400002)(396003)(230922051799003)(451199024)(1800799009)(186009)(64100799003)(7406005)(6666004)(6506007)(2616005)(6512007)(83380400001)(7416002)(41300700001)(8676002)(5660300002)(4326008)(7366002)(8936002)(478600001)(2906002)(6486002)(66476007)(54906003)(110136005)(66946007)(66556008)(316002)(86362001)(36756003)(38100700002)(26005)(921008)(66899024)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: zxicClb42zqzzbk5CRq5SS7TF8hlGviEoIfKZmp6AgFTjqC5x1+eWNO5F+1WnS3wdz01ItY/EugCvFGcRQAu2TC2IbZ4m2ZBtfZ2Zm5lF2CHVtyXeisYO8kjjLF8ENUZKTnoWSesByLNpqwHpEoMgodKMg0CaXWMGnEEdi4YhhkqhHB7p5+GTXTrYN6VEX3wVMXKyihQ/MtJoGJfOWya6V01IYIHASaskSfSsKHxHYCwDc2/KqqTVJpHd8Kwx6qcRKtwCOKNRM69hfeFDL35sk1QpHLTsjtiWetB0IpMXPyWj+q6u7UUD7aB0ZFmBJRusUov6Mh/kw7H06Q1Blbhstp26d07pYLnoGJkv/VR42IHhV9YKu8UO+PlbRmXO3s7FAydcESyMPVf468UnVSKXIR9f/5kd10JFa4o6Sra1Dkoj/gWIQBu/kjHHpZ0Q4pnRRztX0TP4oNDu1g4hWIavPT9ZAlx8qnYuvSemJ2FR44oJLXomAv/XS9AOJ2XRBEL77o/OF72yDBbSAfd6aH6RT6BQ7iO1f8Vsv6U/QwNsX6FaDaEgccTjlXFtYWXGt7nfrxbBarmWGANR+fvKsI9pO26STUhuPiOjT7WEQsty6ynUQVF2MJmUDjorDz4tfJHmzKwKQBGyL5kH+c87usv0T/UrOFsq1PSkaiywEHKrTqCDc08IVc3dwCfrAGGMy1/xtrBAR01ZtZ5e1DcB1zX/EyApueplcWvJc7KoCD8T+Ckhi+r9LtsZjj9XK9Y5sEiTLbp1Y1TCuN8w/PEjz6AOblp3G6PvhA7rj7jeAUskLYxAbffGqdJUluIAbu5mU6qGA1eZastn019VYVA/Ksw878amMLRS+OEpcSTHR8Pk6UlZgR59rhhITaco7ETJ/LBL3zpPubBxuF5rRm4hbjuv5Tr5bGDAXsNYq4Xt9/DDemMUu4vvB3qIko0cVLIYWpF7RLiFIOypmYYOfUqCu7VauGdWITuHs93PyQAKT5Y+mwTRIIRGi2wrCobmY3LVbAvjZniYQWgOBLrEzlsoKDEmZCJAUBjH4oFHwwMBlWvJ6xrtAncye6pdUn8QRdZREplARwrBiioqwZPeWo4NjT3lWJ5++7V3yIWez5SZ5buENfpg8riphhQ8NeR7rR9wgK8+cqEPR4cfeC6wnU6ProrTmBzgBnYhuc+cos4h+Q7zRDvieuTEFyV03JT5y3sq0/C32JrKLixaQz1f3WL8vLB4fewt7bKTiuAe8wD6sBB3y27g/+NdDdzXGmKUT8HirHguuE6r0DLEtSvW6550cZtodI7c/VBkWEJLvCHrTja3sPePhFX5TNrePplqjO1n65CNEiyjhL1tHUCbnZIcKCqWyiMgvwLDIcDnn5AUD6VeSJEUgL91FvvgfgfLszrPjOQshwSxaV1NfZYW1LtYFO0Rfn6vwGOBFjm5TwjhF7yj+MsFqsXnxZSnV7dczgUcEKcg7GND92FYHLcAi2mMGKXpcWSOuqfi/DJ3Z5yvfU8jj8I62ulcRWljZb9s3dxl6ShDCdxe20AjBrMItTLNtqVRZVXg1pc8nrYBpCUZFXIQsY= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 529d66cd-e412-498d-4a9f-08dbe5e40483 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:09.7177 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: hTHc7Zw1a9Fani+aerdNTNjb/5AZQI3t2tk74t7C6SUiSrPZbqsYPslwg7m2DeSN X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7007 This is not being used to pass ops, it is just a way to tell if an iommu driver was probed. These days this can be detected directly via device_iommu_mapped(). Call device_iommu_mapped() in the two places that need to check it and remove the iommu parameter everywhere. Reviewed-by: Jerry Snitselaar Reviewed-by: Lu Baolu Reviewed-by: Moritz Fischer Acked-by: Christoph Hellwig Acked-by: Rob Herring Signed-off-by: Jason Gunthorpe --- arch/arc/mm/dma.c | 2 +- arch/arm/mm/dma-mapping-nommu.c | 2 +- arch/arm/mm/dma-mapping.c | 10 +++++----- arch/arm64/mm/dma-mapping.c | 4 ++-- arch/mips/mm/dma-noncoherent.c | 2 +- arch/riscv/mm/dma-noncoherent.c | 2 +- drivers/acpi/scan.c | 3 +-- drivers/hv/hv_common.c | 2 +- drivers/of/device.c | 2 +- include/linux/dma-map-ops.h | 4 ++-- 10 files changed, 16 insertions(+), 17 deletions(-) diff --git a/arch/arc/mm/dma.c b/arch/arc/mm/dma.c index 2a7fbbb83b7056..197707bc765889 100644 --- a/arch/arc/mm/dma.c +++ b/arch/arc/mm/dma.c @@ -91,7 +91,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, * Plug in direct dma map ops. */ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { /* * IOC hardware snoops all DMA traffic keeping the caches consistent diff --git a/arch/arm/mm/dma-mapping-nommu.c b/arch/arm/mm/dma-mapping-nommu.c index cfd9c933d2f09c..b94850b579952a 100644 --- a/arch/arm/mm/dma-mapping-nommu.c +++ b/arch/arm/mm/dma-mapping-nommu.c @@ -34,7 +34,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, } void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { if (IS_ENABLED(CONFIG_CPU_V7M)) { /* diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c index 5409225b4abc06..6c359a3af8d9c7 100644 --- a/arch/arm/mm/dma-mapping.c +++ b/arch/arm/mm/dma-mapping.c @@ -1713,7 +1713,7 @@ void arm_iommu_detach_device(struct device *dev) EXPORT_SYMBOL_GPL(arm_iommu_detach_device); static void arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { struct dma_iommu_mapping *mapping; @@ -1748,7 +1748,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev) #else static void arm_setup_iommu_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { } @@ -1757,7 +1757,7 @@ static void arm_teardown_iommu_dma_ops(struct device *dev) { } #endif /* CONFIG_ARM_DMA_USE_IOMMU */ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { /* * Due to legacy code that sets the ->dma_coherent flag from a bus @@ -1776,8 +1776,8 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, if (dev->dma_ops) return; - if (iommu) - arm_setup_iommu_dma_ops(dev, dma_base, size, iommu, coherent); + if (device_iommu_mapped(dev)) + arm_setup_iommu_dma_ops(dev, dma_base, size, coherent); xen_setup_dma_ops(dev); dev->archdata.dma_ops_setup = true; diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 3cb101e8cb29ba..61886e43e3a10f 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -47,7 +47,7 @@ void arch_teardown_dma_ops(struct device *dev) #endif void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { int cls = cache_line_size_of_cpu(); @@ -58,7 +58,7 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, ARCH_DMA_MINALIGN, cls); dev->dma_coherent = coherent; - if (iommu) + if (device_iommu_mapped(dev)) iommu_setup_dma_ops(dev, dma_base, dma_base + size - 1); xen_setup_dma_ops(dev); diff --git a/arch/mips/mm/dma-noncoherent.c b/arch/mips/mm/dma-noncoherent.c index 3c4fc97b9f394b..0f3cec663a12cd 100644 --- a/arch/mips/mm/dma-noncoherent.c +++ b/arch/mips/mm/dma-noncoherent.c @@ -138,7 +138,7 @@ void arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { dev->dma_coherent = coherent; } diff --git a/arch/riscv/mm/dma-noncoherent.c b/arch/riscv/mm/dma-noncoherent.c index 4e4e469b8dd66c..843107f834b231 100644 --- a/arch/riscv/mm/dma-noncoherent.c +++ b/arch/riscv/mm/dma-noncoherent.c @@ -129,7 +129,7 @@ void arch_dma_prep_coherent(struct page *page, size_t size) } void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent) + bool coherent) { WARN_TAINT(!coherent && riscv_cbom_block_size > ARCH_DMA_MINALIGN, TAINT_CPU_OUT_OF_SPEC, diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index fa5dd71a80fad9..9682291188c49c 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -1636,8 +1636,7 @@ int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, if (PTR_ERR(iommu) == -EPROBE_DEFER) return -EPROBE_DEFER; - arch_setup_dma_ops(dev, 0, U64_MAX, - iommu, attr == DEV_DMA_COHERENT); + arch_setup_dma_ops(dev, 0, U64_MAX, attr == DEV_DMA_COHERENT); return 0; } diff --git a/drivers/hv/hv_common.c b/drivers/hv/hv_common.c index 4372f5d146ab22..0285a74363b3d1 100644 --- a/drivers/hv/hv_common.c +++ b/drivers/hv/hv_common.c @@ -488,7 +488,7 @@ void hv_setup_dma_ops(struct device *dev, bool coherent) * Hyper-V does not offer a vIOMMU in the guest * VM, so pass 0/NULL for the IOMMU settings */ - arch_setup_dma_ops(dev, 0, 0, NULL, coherent); + arch_setup_dma_ops(dev, 0, 0, coherent); } EXPORT_SYMBOL_GPL(hv_setup_dma_ops); diff --git a/drivers/of/device.c b/drivers/of/device.c index 1ca42ad9dd159d..65c71be71a8d45 100644 --- a/drivers/of/device.c +++ b/drivers/of/device.c @@ -193,7 +193,7 @@ int of_dma_configure_id(struct device *dev, struct device_node *np, dev_dbg(dev, "device is%sbehind an iommu\n", iommu ? " " : " not "); - arch_setup_dma_ops(dev, dma_start, size, iommu, coherent); + arch_setup_dma_ops(dev, dma_start, size, coherent); if (!iommu) of_dma_set_restricted_buffer(dev, np); diff --git a/include/linux/dma-map-ops.h b/include/linux/dma-map-ops.h index f2fc203fb8a1a2..2cb98a12c50348 100644 --- a/include/linux/dma-map-ops.h +++ b/include/linux/dma-map-ops.h @@ -426,10 +426,10 @@ bool arch_dma_unmap_sg_direct(struct device *dev, struct scatterlist *sg, #ifdef CONFIG_ARCH_HAS_SETUP_DMA_OPS void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, - const struct iommu_ops *iommu, bool coherent); + bool coherent); #else static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base, - u64 size, const struct iommu_ops *iommu, bool coherent) + u64 size, bool coherent) { } #endif /* CONFIG_ARCH_HAS_SETUP_DMA_OPS */ From patchwork Wed Nov 15 14:05:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 744112 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 118D3200DE; Wed, 15 Nov 2023 14:06:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="gw/2BqJh" Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2043.outbound.protection.outlook.com [40.107.244.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 98C40B3; Wed, 15 Nov 2023 06:06:13 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=T2m3n1lAzivhQlx99aJdx8OKn0X5RfjZFcdS6VhdsmpHLsiaUlJ0Bdde4++CPvs8+laAAZWslyZ+JNTocLBuwWxu8vAFthSMryHF3f5i2YDzsdhJ44x7q4uN6blVI/DlkkgXth3r0cbbOqF2VS1VKcyBr+aURPWLj9lAjwNCKTHhLoQPayD3bbNwJjrPeap5c9oXgFSOGENJ+P+ggiVIMXSuZpVTgqrBmwE2Mob+zIeqeiDUgRL/JafA5APrr4TVd96P3sMST8vrmqzXatx+Mig23pdUAL0/NQIsAWB4eInNUhTJsygcZGEua8aat2Q35yFU6e5/0zLqsLPUYskE6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=2Cg0L7AKccOs0U4ZynPRAV7esL8tk+X5jnUDyQcs/B8=; b=Cs8DAY0SiTOzKhKB2P+jAWgffrKr/syAe9YnBPugk/CoC5R7U6REnoA+TbEZctwz69M/pRP9uwrDrLlWvpbM5C0oIkN54TRv/mg6LawbdLQya2t/t6kmAkfPDhaJ5YX4CRuxlfxcCEpRkkFRpwV1y4WnixkqTdztL8usAxbJIQPUx82qj6cTvFjCg2KSV4Yo2ya6MjdnoiBTTZWvCI7axugfhGEhjxiZoHzeY0NkrJCxv0+JGMyvTY3MvbLjXHmHxkvTzJfPhw7G9aewQ1mgBMX/h9ID0A7gcmx/dCM6z9O5S0Y9X7HiQoxP07UIPetr1FkCzpokCI8VWFh5nEBwSg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=2Cg0L7AKccOs0U4ZynPRAV7esL8tk+X5jnUDyQcs/B8=; b=gw/2BqJhTByyrCGvW46kx8CVO//kuFJFfUC9RFW+tYgx+/yw2zWpykJ7i0pz95DmAsO42eCXjFYFAmMmJr9G+F58K+U2dzvYW0i9yLMfJU/PQWEzPsd/PYg8tFKgSkGBXuPgT5puGSXZlYrDCGWKtm2K5vLXxC8cQbpXlpQSj3CcGhmiMq7ryk0AArWcRh3JXH+dUVbm8VFZgPigEgH06zM/MzQT2eRL+uyOdALE+8NcroFOu2sABz8D7iammWfSn5zS8+a1pBiI5AfqMENqqmUAa0aU+NwFOeiG46wdjCbSFlnMFFId8NRdaAOqEADwVZXFvieAloxkFLpv4MJeGg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) by SJ0PR12MB7007.namprd12.prod.outlook.com (2603:10b6:a03:486::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6977.31; Wed, 15 Nov 2023 14:06:10 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93%4]) with mapi id 15.20.6977.029; Wed, 15 Nov 2023 14:06:09 +0000 From: Jason Gunthorpe To: acpica-devel@lists.linux.dev, Alyssa Rosenzweig , Albert Ou , asahi@lists.linux.dev, Catalin Marinas , Dexuan Cui , devicetree@vger.kernel.org, David Woodhouse , Frank Rowand , Hanjun Guo , Haiyang Zhang , iommu@lists.linux.dev, Jean-Philippe Brucker , Jonathan Hunter , Joerg Roedel , "K. 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Wysocki" , Rob Herring Subject: [PATCH v2 04/17] acpi: Do not return struct iommu_ops from acpi_iommu_configure_id() Date: Wed, 15 Nov 2023 10:05:55 -0400 Message-ID: <4-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: BLAPR03CA0117.namprd03.prod.outlook.com (2603:10b6:208:32a::32) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SJ0PR12MB7007:EE_ X-MS-Office365-Filtering-Correlation-Id: cf7309fe-f1c9-4419-4a9f-08dbe5e40483 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: ePTi3F+oZbUMQCUcsp2v6wREhVh00swp1NKNuUMA+WByeY6evt7aCVb5o7P+kKM+17tuVIcqtnhkfc/s9UviyPhvZjIGoq+dVwV3dSnIX/mAhnHLgbWFHX4aUcs/ikXVaDRVzhFRZSSjViTy1KYNYtvzAVrwPYThjo3EblJVfb6X+w8cCbzBh8Q9jIC3btPT0DqCAQ4SCHzkOBEESoBI+vjIcAU5Rp8QZ2eeVGHQOqz4/tLeAe+bFTtTq/LTq3rlfE8P4RKFg+58FUYpOAnzKS1VLTk8ARWSSs31+zZbCCiK/UPlH1XFKRBcETqDyzb3JNaX6FKbe6sgRpdIg2D3EFulaqE/9ICeNLdVoGpdiHK/6nW+8nA5uRXPG0Gs+w60xK6xgyI+R2SpRWF2Uq/9xcSLeHDLwH18JwWIVFtVcjpe0wmMoGFnCJTzH+7fIYP3aj1gtVhETh9V2svW9ui/0unvRrDbxndthSrMFiQ2Y0jZP1mARSgiAE+Wp3lhwcrt6EJibDEryo4PpXFTmpsIhI3/nvt3PNu8DTp/FJGy4eOUbUlEPfsjo4kCyASFVUECQy8nlW+ufAsQHB9BsYiBt5aO+MsPNEanlUSsdmNTNouA4AV9k8ArzArid/Bys72z X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(346002)(376002)(366004)(39860400002)(396003)(230922051799003)(451199024)(1800799009)(186009)(64100799003)(7406005)(6666004)(6506007)(2616005)(6512007)(83380400001)(7416002)(41300700001)(8676002)(5660300002)(4326008)(7366002)(8936002)(478600001)(2906002)(6486002)(66476007)(54906003)(110136005)(66946007)(66556008)(316002)(86362001)(36756003)(38100700002)(26005)(921008)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: YRGOVSeiGcR8haEtk0a6r13M2MCGQQsWdOny4DOIvVSG9ekISERiqrl+BlI1Ae+gJE8O1HTogKTeSHzE6OTE0p2AkumI8sIcY+iTSTITfyLr7lVSpVUSbBMyC6H87OGYuQmjc8EYjrzoAJScq09BHnia1WL45L8MZSyUfEJ0hu8xwnh+pqREKcmYbiEjG//ahYcTUgBo7uGGI26okf0sUM8+3+pDA6pImrzgxPgLOkWwKaR/a/0MR83StkkZd4ihyV4sqT4TcqJdFdSHo+25KBvLMX4Kq6KoTaZB36LpOrEw3XSlkFwiML4H0hdmmwoeOtiO3YIwYPy56yJRtF/a5VOIIS0Bm5nwGmdwQidE8g6VnqJTc1n2DdCFVsZdCQeWpcd1x3Y8OA+W2geb4DMNuz26atSMxDcEwEzfS5r/GP84o1pCWe6E2awafcnCvNIxXt1SkhTW3Yq2ISnG6Hu2QzGb7X2u5kzd23wV+HO698CtKN+31tUtypC1YPkGKEvBwplgwKOH+Mwidxx4BKL1D0YNhn+opephCQmnNRTEbITJAPig09IKMMvz9uT4A7DNaDZDy/gTGqtQo4QU3qmGABAgd4MtLW81p8xMmX+HEtwlogNS8LdtfxeKf0VCfMXblq11+wfrsFOVJ1rJN3/StH4ENxSXoh4M9k1rkm5WCPnydV+mghKHpp3R1eGpkpo6hbAjjapQAWuhX/7HMcF5EHUC4G+jcl+/KSf7TWUAyse243nOgFaa9D43GXy/CaHwJbYXv3BoegqBqQQlE0Y319KErjlvD1tGDyKrfAFyP3fgTiwXfEXTxV+bGa3S7EvihU/WPPXdgBdX/2HH0DMzV7yny3tOqZLR7TgYq3uv68McslMtdU6CJbVP7Vn/HiP7QL8A5d7QJhf6a0RJqrnmga+kPimv/aOsY6WUSciPxevPUH+bBwm74k35PfG2bQfNA0nbr1J6Jjx3ONzS6oY9OPtSnywOLZLaW/g9XcYmNBSBEP099YYLpwBAEltqs3Xl/vInVXNbge40xVHxbHnE6azBbHSVtow2A0lBnSkNN30oawDIDxtuwL9F3EWcugJ1y42MiNBCN2TwsKKlhUbC1079un9s5gZpFNiBjVnDTZ1X0WlEiftbJpZGFmO19fVaXmkjexrUbC20yQI4Rv/2TWGFgP6WmZUITxwYEAaRssI62nU5W+HLDJa6eRv1xvH4ay+4GSZ7MXB61Wa6raAXbRslTAKSuERkoDDxDN/mZT1StAfxd0Fhln8mOK9i9cBGT+Or4AjCI8/upadts+ETqz8PA0/RcRDZFqJAe1c5lalq0t2Rc9P+2U8jwgUBGeqk20B842DwLzyvDjXs89oLnNdR1yfEYjZaxyh/S2NE+pwBFXUXUNRpaz44ddQ2Um94KcnKCiMtLJtS9lUDEiQZkLlNDr0M92O0kR5uC55ICGSocsKBCDQ9lvUq99D3cPWBfcupepb/diJlN8CZ/l5NJQqfJRyCZX6diU345QGBnl5QYvH7LFOdyKC647XMVcUpNrdpSaDNfj8eQfO/jH81usxXF+LlrXAdBO0HJ7DGb+4= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: cf7309fe-f1c9-4419-4a9f-08dbe5e40483 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:09.6989 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: lYuiPds6pWGE/2wRJv4qtFqt3GYu5J5zYrSN0uxlcZZflI5NSJ/YZMpaAd6xWKg9 X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7007 Nothing needs this pointer. Return a normal error code with the usual IOMMU semantic that ENODEV means 'there is no IOMMU driver'. Acked-by: Rafael J. Wysocki Signed-off-by: Jason Gunthorpe --- drivers/acpi/scan.c | 24 +++++++++++++++--------- 1 file changed, 15 insertions(+), 9 deletions(-) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 9682291188c49c..d171d193f2a51c 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -1562,8 +1562,7 @@ static inline const struct iommu_ops *acpi_iommu_fwspec_ops(struct device *dev) return fwspec ? fwspec->ops : NULL; } -static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, - const u32 *id_in) +static int acpi_iommu_configure_id(struct device *dev, const u32 *id_in) { int err; const struct iommu_ops *ops; @@ -1574,7 +1573,7 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, */ ops = acpi_iommu_fwspec_ops(dev); if (ops) - return ops; + return 0; err = iort_iommu_configure_id(dev, id_in); if (err && err != -EPROBE_DEFER) @@ -1589,12 +1588,14 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, /* Ignore all other errors apart from EPROBE_DEFER */ if (err == -EPROBE_DEFER) { - return ERR_PTR(err); + return err; } else if (err) { dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); - return NULL; + return -ENODEV; } - return acpi_iommu_fwspec_ops(dev); + if (!acpi_iommu_fwspec_ops(dev)) + return -ENODEV; + return 0; } #else /* !CONFIG_IOMMU_API */ @@ -1623,7 +1624,7 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, const u32 *input_id) { - const struct iommu_ops *iommu; + int ret; if (attr == DEV_DMA_NOT_SUPPORTED) { set_dma_ops(dev, &dma_dummy_ops); @@ -1632,10 +1633,15 @@ int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, acpi_arch_dma_setup(dev); - iommu = acpi_iommu_configure_id(dev, input_id); - if (PTR_ERR(iommu) == -EPROBE_DEFER) + ret = acpi_iommu_configure_id(dev, input_id); + if (ret == -EPROBE_DEFER) return -EPROBE_DEFER; + /* + * Historically this routine doesn't fail driver probing due to errors + * in acpi_iommu_configure_id() + */ + arch_setup_dma_ops(dev, 0, U64_MAX, attr == DEV_DMA_COHERENT); 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Wysocki" , Rob Herring Subject: [PATCH v2 07/17] iommu: Add iommu_probe_device_fwspec() Date: Wed, 15 Nov 2023 10:05:58 -0400 Message-ID: <7-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: BLAPR03CA0109.namprd03.prod.outlook.com (2603:10b6:208:32a::24) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|PH8PR12MB6916:EE_ X-MS-Office365-Filtering-Correlation-Id: c586f63e-b4e6-4a6a-8d98-08dbe5e40589 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: BXUf/SmFrdNP2K0nUEx7X6+NljQ4IDKHlXRa90X1IrI6XtdPIpKWzQtYndq7l7KzSyervLlnXUW5sLUVBila/Lp8mITk417Uv7wCwOl5krNtGLEnanWEp3ltm2Kha8JXbU8ume7fZjrHdn3qn/lIUmYJRLSGXfy+DyIDKGKZxSw+9/c63Lxyhw48q8ia1PUPmcg4AvzZ0kAgsmU5feb2wfC5TUEIqRAlfnuxSvWQntY9eOIyhEvIKB2mtrPHw4k9y77O8j3VQ81AQApfIcrd0IR3aZb876ALrTEUeVZ+I794BmuV7oQA/AfxN5LSAO0DL2lSd3Qa9RJ3iEujWgbuEt7EtHC0Gr6CreOq2hsYwVPuxxPtMLRZhN5CMMpV7KC/Urg4doNcIp1oCi5PBRRosOqywB5rhVaiX8/ykDTBpdWoDDkk2G4B2bDhqIqOQkgWOA5ze7dz5ylO3kfr0myZohnMRNpDwqKnAm4W37q9fIiBqgODxr7xw+0YyxOL5/9lIVEsAaDSx2aYlLBfJbQHfMi4jFNB2qPI+DLGF0oLWsyOHoU1F3AbSTlC6V1fhxSj6kTEofENIYdJ8p1ApuABzMjvvnd0aYFAbIXdTZhLDIhmVPhmkEVJ0dtYxa9LwU6V X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(39860400002)(376002)(346002)(396003)(366004)(136003)(230922051799003)(1800799009)(64100799003)(186009)(451199024)(66899024)(110136005)(316002)(66946007)(54906003)(66476007)(66556008)(6486002)(478600001)(6666004)(7366002)(86362001)(5660300002)(7406005)(7416002)(921008)(41300700001)(2906002)(36756003)(8676002)(4326008)(8936002)(2616005)(38100700002)(26005)(83380400001)(6506007)(6512007)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: XrtZQZHWMD8kqqPCvKpXuD3uzmrOhjTHtoZoSwZ5gbClYeMNtSVsaLw98QgKfy/NQ2etUkmvvZXqMyYB3VEx0GUob6tpRigD8LLkm02A1r2m0+9K3oTBfh9l7EfCQOWDCQanLAiTjpJhcMrnieGhzDNH8MN1npg36hsvjoH472UKgW6bob62cp6Mts8GooSDvKztNFgzdfOwKk0tDQ/nLA0QsDS6fkKCmW8flNeySGXd+zd1vhsuQRViTEyBmxj0D/UDZUzGZFT55t7MAJfyY3oohUj3KCTmRFdNumrQtN4K75eLZq3tYn7FfjgqgnTZXWjH/Hxpyfp1xLoEBM/WVBB+Sd01U0xldVIBHcue5OeOzJSMi8RDGPHubK4D+du/QcCGFHPJ/ARlQ2ENEXGWUbRRFNpkfwhtSxkqZ6mM71i5QtVbmIjfBqWLYvqZ+qkvwdzZ4sC008iOAdMm/LYTvuKUYoIQ1M/T1zoBaRYM1ljH55lLDzJNVAUZ3SETnyLfdFBP6e8efv6ISgd5wV5gKLytBvLIAC135oZ05yrlzE7uvfI7Fz3syGV/fpmnolMN/YISgdPkYzTNB9dSwxxFJ0nYSs2IHKuoaVDNQcor0SYvxSKLz8Uh3MKKfUrfBD3cdh+sfJifJahKbxUg1yhyP8w33jZQYgKUOXICZEB74c6JWtcZyAnduJjaSf7yxUfwnqtg/m5LxCtvDGGHxF5PXlVh6nAMkHiaHV5BiCAUNF0smYPI7Z7hj/pwBN8JHbHc915moEtl1Fj56WhCzRCWVj7lXoB8SzMHChOmMEIgPPS5fRT2dF4HzH0e/dWu20QMQln2dg54VKfOW/OVikvs+xGjiQOIgYUzB3ZwP3569jNZY4X0/oSdockUrs+rn0j3jOl+1KNdT/giQobMl1JE+VR/VLp7aoJHSKIJJD5Z0ahtmMiO3j5HuzHFIsysbkNSqerBvZ4zMDvHjtnfoZHxxinNs/RKeAWzAMtty+3NPadoK0/jLja+QetlUvOp6SlelTiXzwLwZ7dt1POJ3NkPHBu21TItpI6O4WphAefIomAHbMFx+zxq/c9JnYsFGPGpne9PzBhm+N1MiRji4kGQKL7ayZqDvPl8vWadgQp7M/2/0VO5F0uf3nysY/J1x0p/X0+MRWHlB89S0pBb/H1l47HE2CxCfcQGaoq8LYoXmLiU4MAZsxp0GRe2BTb1h7SRbAJLQlrI8qQHOMMQijGmbGFJWFAe9O74X1vm1TFhQwh37dti2mSW0UqCszJH6+neixbsf+sWC4PVo/G/VW8lSuz8ha1c59QXYFI6iQEUwFon0etZ8Ztge5nLebh1GX4Wtmpv4egtt0Vzfcbh3K9HIIBbP5Cknuoa+T8CJc/BaMZLTwyWE4K6p1sX8WgPz5nJMgyrDS9YYyAivsK5Ok7LxEp0dC+LDOp2HQ+3Ny1QdSdy6XN/LQdm1SCyUhrqr0iiRf3CwU+z3RmL2mxQnTKl+H+FW3IdiEWMA3VN//ez7pwfV7WeF5WfDRjrAZqD4oP0UoOzjeLK7y2Ox3ylmu1i1rp9K0DT7os9h5MQ35C/4V8= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: c586f63e-b4e6-4a6a-8d98-08dbe5e40589 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:11.4212 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: IPMsRct3UdXDK1DMpHB9irJ5Gk+20sJiuiyAslPXmjUm74Z8hFSYc1wTQrTjuWH/ X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6916 Instead of obtaining an iommu_fwspec from dev->iommu allow a caller allocated fwspec to be passed into the probe logic. To keep the driver ops APIs the same the fwspec is stored in dev->iommu under the iommu_probe_device_lock. If a fwspec is available use it to provide the ops instead of the bus. The lifecycle logic is a bit tortured because of how the existing driver code works. The new routine unconditionally takes ownership, even for failure. This could be simplified we can get rid of the remaining iommu_fwspec_init() callers someday. Reviewed-by: Jerry Snitselaar Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 53 +++++++++++++++++++++++++++++++------------ include/linux/iommu.h | 6 ++++- 2 files changed, 44 insertions(+), 15 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 86bbb9e75c7e03..667495faa461f7 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -386,16 +386,24 @@ static u32 dev_iommu_get_max_pasids(struct device *dev) /* * Init the dev->iommu and dev->iommu_group in the struct device and get the - * driver probed + * driver probed. Take ownership of fwspec, it always freed on error + * or freed by iommu_deinit_device(). */ -static int iommu_init_device(struct device *dev, const struct iommu_ops *ops) +static int iommu_init_device(struct device *dev, struct iommu_fwspec *fwspec, + const struct iommu_ops *ops) { struct iommu_device *iommu_dev; struct iommu_group *group; int ret; - if (!dev_iommu_get(dev)) + if (!dev_iommu_get(dev)) { + iommu_fwspec_dealloc(fwspec); return -ENOMEM; + } + + if (dev->iommu->fwspec && dev->iommu->fwspec != fwspec) + iommu_fwspec_dealloc(dev->iommu->fwspec); + dev->iommu->fwspec = fwspec; if (!try_module_get(ops->owner)) { ret = -EINVAL; @@ -483,16 +491,17 @@ static void iommu_deinit_device(struct device *dev) dev_iommu_free(dev); } -static int __iommu_probe_device(struct device *dev, struct list_head *group_list) +static int __iommu_probe_device(struct device *dev, + struct iommu_fwspec *caller_fwspec, + struct list_head *group_list) { - const struct iommu_ops *ops = dev->bus->iommu_ops; + struct iommu_fwspec *fwspec = caller_fwspec; + const struct iommu_ops *ops; struct iommu_group *group; static DEFINE_MUTEX(iommu_probe_device_lock); struct group_device *gdev; int ret; - if (!ops) - return -ENODEV; /* * Serialise to avoid races between IOMMU drivers registering in * parallel and/or the "replay" calls from ACPI/OF code via client @@ -502,13 +511,25 @@ static int __iommu_probe_device(struct device *dev, struct list_head *group_list */ mutex_lock(&iommu_probe_device_lock); - /* Device is probed already if in a group */ - if (dev->iommu_group) { - ret = 0; + if (!fwspec && dev->iommu) + fwspec = dev->iommu->fwspec; + if (fwspec) + ops = fwspec->ops; + else + ops = dev->bus->iommu_ops; + if (!ops) { + ret = -ENODEV; goto out_unlock; } - ret = iommu_init_device(dev, ops); + /* Device is probed already if in a group */ + if (dev->iommu_group) { + ret = 0; + iommu_fwspec_dealloc(caller_fwspec); + goto out_unlock; + } + + ret = iommu_init_device(dev, fwspec, ops); if (ret) goto out_unlock; @@ -566,12 +587,16 @@ static int __iommu_probe_device(struct device *dev, struct list_head *group_list return ret; } -int iommu_probe_device(struct device *dev) +/* + * Ownership of fwspec always transfers to iommu_probe_device_fwspec(), it will + * be free'd even on failure. + */ +int iommu_probe_device_fwspec(struct device *dev, struct iommu_fwspec *fwspec) { const struct iommu_ops *ops; int ret; - ret = __iommu_probe_device(dev, NULL); + ret = __iommu_probe_device(dev, fwspec, NULL); if (ret) return ret; @@ -1820,7 +1845,7 @@ static int probe_iommu_group(struct device *dev, void *data) struct list_head *group_list = data; int ret; - ret = __iommu_probe_device(dev, group_list); + ret = __iommu_probe_device(dev, NULL, group_list); if (ret == -ENODEV) ret = 0; diff --git a/include/linux/iommu.h b/include/linux/iommu.h index c7c68cb59aa4dc..ca86cd3fe50a82 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -855,7 +855,11 @@ static inline void dev_iommu_priv_set(struct device *dev, void *priv) dev->iommu->priv = priv; } -int iommu_probe_device(struct device *dev); +int iommu_probe_device_fwspec(struct device *dev, struct iommu_fwspec *fwspec); +static inline int iommu_probe_device(struct device *dev) +{ + return iommu_probe_device_fwspec(dev, NULL); +} int iommu_dev_enable_feature(struct device *dev, enum iommu_dev_features f); int iommu_dev_disable_feature(struct device *dev, enum iommu_dev_features f); From patchwork Wed Nov 15 14:06:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 744105 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8F3D628DC3; Wed, 15 Nov 2023 14:06:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="tNBiXw5Q" Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1F773C5; 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Wysocki" , Rob Herring Subject: [PATCH v2 11/17] iommu: Hold iommu_probe_device_lock while calling ops->of_xlate Date: Wed, 15 Nov 2023 10:06:02 -0400 Message-ID: <11-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR10CA0001.namprd10.prod.outlook.com (2603:10b6:208:120::14) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|PH8PR12MB6916:EE_ X-MS-Office365-Filtering-Correlation-Id: 30034502-39d2-49f7-9f19-08dbe5e405bb X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qKoJ00Kq5CZ2mVHAIGxnEG5vMgGT8yPlYAykGDKukVtHl2dra88qrT24dDn3QSCNHs+vTVQgBQnqqjgcURQzVyWH6Q/h8FyjYCFSUQGIr3AVO8YPJlIy5CaLbCcTj9faTr94rZsq1NTyUx7R9ttZsXARlsLEQphPM82VoQvmD7hlgmzaBXIv5BVVsSeSuJkoDOKhAAVfqEEroBKS5n9pn5it9UrXNNVtYVnjGHWc9nWOYoTOClm1X+SN/FVsYSJ/FRRbW8nmVkDxrXQpQ1q+0h8nJbTF1o/NDcMbX9In2ntch/0Ow4No3R6LVBC4BB8VnReXOi+wFSRVCBX48zQU9ug1SHp1Osls26vrKwvFdaPQRTTF6inoMFKo3FhROBljyjDf8EyHElunNojjM7+g0mpppyk9y9XwdIc6s4k2Yl0pT6PF+RDgBTb1W6xbvt2qocTu9FZqejOgomGgP2WYArJMGCeqYZ937zf3a6cI9T/hL7P4xlffYr6piuX/07bej8+XcEFa2G8hOpzB4LRtLl9nLuTi/7yTaRxx+d2ncbR1Mu4/TirP6ovtptHx5HZ1pkdAwa3jISCNB0IgKDnwnFPQE2KsLYJgLgc8X3uHF975GFPUD+u5vIbqLsSSy4xHhO+1FzB5POkavCAOWbafNA== X-Forefront-Antispam-Report: CIP:255.255.255.255; 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The approach also closes a similar race for what should be a successful probe where the above basic construction results in ops->probe observing a partially initialized fwspec. Reviewed-by: Jerry Snitselaar Reported-by: Zhenhua Huang Closes: https://lore.kernel.org/linux-arm-kernel/20231017163337.GE282036@ziepe.ca/T/#mee0d7bdc375541934a571ae69f43b9660f8e7312 Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index f7bda1c0959d34..5af98cad06f9ef 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -41,6 +41,7 @@ static struct kset *iommu_group_kset; static DEFINE_IDA(iommu_group_ida); static DEFINE_IDA(iommu_global_pasid_ida); +static DEFINE_MUTEX(iommu_probe_device_lock); static unsigned int iommu_def_domain_type __read_mostly; static bool iommu_dma_strict __read_mostly = IS_ENABLED(CONFIG_IOMMU_DEFAULT_DMA_STRICT); @@ -498,7 +499,6 @@ static int __iommu_probe_device(struct device *dev, struct iommu_fwspec *fwspec = caller_fwspec; const struct iommu_ops *ops; struct iommu_group *group; - static DEFINE_MUTEX(iommu_probe_device_lock); struct group_device *gdev; int ret; @@ -2985,8 +2985,11 @@ int iommu_fwspec_of_xlate(struct iommu_fwspec *fwspec, struct device *dev, if (!fwspec->ops->of_xlate) return -ENODEV; - if (!dev_iommu_get(dev)) + mutex_lock(&iommu_probe_device_lock); + if (!dev_iommu_get(dev)) { + mutex_unlock(&iommu_probe_device_lock); return -ENOMEM; + } /* * ops->of_xlate() requires the fwspec to be passed through dev->iommu, @@ -2998,6 +3001,7 @@ int iommu_fwspec_of_xlate(struct iommu_fwspec *fwspec, struct device *dev, ret = fwspec->ops->of_xlate(dev, iommu_spec); if (dev->iommu->fwspec == fwspec) dev->iommu->fwspec = NULL; + mutex_unlock(&iommu_probe_device_lock); return ret; } @@ -3027,6 +3031,8 @@ int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); int ret; + lockdep_assert_held(&iommu_probe_device_lock); + if (fwspec) return ops == fwspec->ops ? 0 : -EINVAL; @@ -3080,6 +3086,8 @@ int iommu_fwspec_add_ids(struct device *dev, u32 *ids, int num_ids) { struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + lockdep_assert_held(&iommu_probe_device_lock); + if (!fwspec) return -EINVAL; return iommu_fwspec_append_ids(fwspec, ids, num_ids); From patchwork Wed Nov 15 14:06:05 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 744108 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 20147286B2; Wed, 15 Nov 2023 14:06:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Vcm7pksB" Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2043.outbound.protection.outlook.com [40.107.244.43]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C35CDAC; Wed, 15 Nov 2023 06:06:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=CdmHegBcy0EzF4/7tz0ElUWuZvWvVxbNxXODoqughxs1lSBXLk4mSRq5UGl/b5Zc+U6QIE6XGJIbwXXDJJheIVz3zW5N6AvuADc0qyRGCDrx0lNYha9KP/g/woiNO/hcrVnDwPSJ112r/3iN4yNuY8/ZJWONb/XdADdMgs5i4CyW6xvk6M4m4kwxGCUXRBBoqWO8fyLfKw/io6hpp2LItpXKqxOhPx/sy95q6hnQ6LaIm/XxMkNNYNeDWhi/eyE6/jLJqR7MmvrdbVFmnDMseCnpOh4NmTpcmqf8iPYLAF0bulNIw9VLLJH+WR2lyc1NPZShcgvNEvu1G3qLUZgemw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=9ttRQdDT1iUTyxqOUZ4d5fqMjqgasJxTCJ5kIwrGzsM=; b=fe5l1UeLe41+A2KceTAeEKtuDMSVKCtbcutXwJhT7bUjWurn/FJ7MFu08G+ggQg2AtWWMrlw5W1U2BT8OrMI9az7fbpIkw9FmDv7lQwwZ2HdNOLAluTJekxu3vuw/MPPTUWaQfSj9ShCF0Aajp8BWmFHjWyYAmjJES8iXlkmkFrDAYR3NgpLHgzxPqcdGSU3vOpos/2qMF2gq/+87mw6XqmK8jxhLctos00c8kSPol1KP3csyJ+lz4xy/2cHKBSsd0lHawJkllpsosFy48noPbsw6U19hBtttZhIl+MNGb2ZZDamo+orbR2RpVKfqXHgZMzjPzQkEBEgIjAWkasmkw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=9ttRQdDT1iUTyxqOUZ4d5fqMjqgasJxTCJ5kIwrGzsM=; b=Vcm7pksBiSVh3xCEjWOXj2fGlP4FrEIAZto7e/Uu99uP7L4wjFdDiIZpLn4uVYPsHzwnSvo6IyoHr33+Rem3j15dXZl95jFbH/iq7WTzkO6n+/Iu7kitJHGpDObgqK0vMQTE+Gd5F+ERVI3jU7mEMG+JKXkvTmfZ32ydLkx3SUrA07d37ELAG7/1YiVap/DCMIj+m1bJREyydpWO3H7IC0Hk+1duboXTAI9MEQDfjQ7f1eMY1QxhHBe/JzJyJw7jFfLc/2KOMcjBF2VAFlkrZWKJx6hDINMqjyMhMbRo4jLb95/wu9deRPhxUwtp1ourTZoirW1ydUKf6BecY1qc7w== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) by SJ0PR12MB7007.namprd12.prod.outlook.com (2603:10b6:a03:486::8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6977.31; Wed, 15 Nov 2023 14:06:13 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93%4]) with mapi id 15.20.6977.029; Wed, 15 Nov 2023 14:06:13 +0000 From: Jason Gunthorpe To: acpica-devel@lists.linux.dev, Alyssa Rosenzweig , Albert Ou , asahi@lists.linux.dev, Catalin Marinas , Dexuan Cui , devicetree@vger.kernel.org, David Woodhouse , Frank Rowand , Hanjun Guo , Haiyang Zhang , iommu@lists.linux.dev, Jean-Philippe Brucker , Jonathan Hunter , Joerg Roedel , "K. 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Wysocki" , Rob Herring Subject: [PATCH v2 14/17] iommu: Remove pointless iommu_fwspec_free() Date: Wed, 15 Nov 2023 10:06:05 -0400 Message-ID: <14-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR15CA0024.namprd15.prod.outlook.com (2603:10b6:208:1b4::37) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SJ0PR12MB7007:EE_ X-MS-Office365-Filtering-Correlation-Id: 78ae980c-9d84-4f0b-3376-08dbe5e404cd X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: qNmDKqSnJLF7/mzcfUL3cdjdbWYGFSmiWcRhg3H/850VdC+MxC6XzeTI6wKOtue2Eow7mvswV5oxNoz3Q30rQQzir+DPkZT3qmQoncSburTIML1ArD/d01682Gernsf1rrK8Xoe1Ypk1X4o6WLFR7Tlr1/VJLxbg+pUo9YR3CeJh5wNCrvGYrIKbbWBd5ZQAIjs4QX0l2HuQr3Exp+1SkMO/PPJG/rXvaomlA5LFmLRvwTb64bzFTUF9i2kVaigOtAr4OXexg9DPCLqPEMFvfujBI3YTqQXjvjeoNhLCKqKxMkLxrZ7Lxb/o2zAgmA9v6bnTguhrDUztVr/ejYBSmuFtEov/ggJquauI6E3fvnAM2J8xzNCCAycOVmlrPXY+K1cA52UvkLLcLMCW8k4CMdBF55a5xETLgWRevIHXeBZv1yvP/uMxLssDQeS+Spg+DE00kQ8vDzxOjsAefV9u2Ca9DY08jPGuSCJ2OoeYmyHCeqz/Rx/2CAcfOw2sDF3ytsiumWA88sXkNlorIBAL6qijOqj3kftAUUB+ImMvVWAxa8EREqI1dNMllHpDdEMDrdsLwrcTQBfPG5SEGOeWiKaNF8hh1+29tlpqHy5X2hA= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(346002)(376002)(366004)(39860400002)(396003)(230922051799003)(451199024)(1800799009)(186009)(64100799003)(7406005)(6666004)(6506007)(2616005)(6512007)(83380400001)(7416002)(41300700001)(8676002)(5660300002)(4326008)(7366002)(8936002)(478600001)(2906002)(6486002)(66476007)(54906003)(110136005)(66946007)(66556008)(316002)(86362001)(36756003)(38100700002)(26005)(921008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: enoFHoBcZzDseAw7me972qrcOM9YkN59Ur/T55dFTwh1YTESvUUzW882tL9+3T/UwkDCLFOMHLaZYvtd54nFvHV+e/ac2pHK02bQN9Y/RQTXyDxBMr8oHrWim/5xZtmvrjsW/x07ESAp4Kgx9k1MpOozsprEmhasiFSNuO6yfcypkEpWszoOqzpO6Kf/OvWOp4FqxzfrMHMjx3ES7gp8Z3u/zhUMaBsd1m60YbQUEkiV62wZGpdQZefW8dvCWUY7+/i7cpVyidT2VCi9oglNbvo3N/0o/Dger1FawsL00YV1nhJh+q0NjKuT6sx8SutQVy/rEBUZn2vHGgRA5pTdIvVR8dYgIMJwzJa2cwxd8F+mfhUZzmUAZHtEduL2F2Jk5DOxhbMoRfsrXk1smFtm272aKf5RWYx6xDtocf0zlxtNvugvu67GW31Lms88zMxUke4gy2CKim1OydAa+c9U2qSvcHaOBfPJe94og064QuHtD5tk5E7VbIPbnyI/wnV3bNGGXSrFlZkKCjkmlqjknXYKJP0Ffm3aowNufDEJOwc5+L5dMGNKEQb8/y29aur0H1KoMPS0gSH9XM58u4L/5GuCebpjvU4Q5uwrWanFeu/s335kZ2S0y3J7n6szyIUABR338f5V7jWzO3qydX6cIMPnm4G3Zhr9rkwVu+AFiwBWFD7JAj5OdEs1LOXaxSQAd8AO5OFdJpgSWtnRr6FuswyNH/LmC51/NW+iv0gIQ4FYElDKirTWmDoGR+TpjVz4X6S3+zOdOc9qd22W3qzH6zEE/js46WuuMykapplofUAKtzDOEk6w20Jfn15lJWF3ijMOjCdCbH9JPR/v9y5oCSCTyAzJ2YEzs70iX/732DVrYua6w3UldVfB3aYRHPxAUh7MoE/+R+EIz51sKxUC7uMVa3iHfYByS7Ualp3RKEpGG/0hsG6wmrtIN7wSHw1zNETwn6IQv2TQ+mUrwYfYjVlO+Y187jnIQq9iV+kENZVOAMn9s1Sarxytk+OkvmXBKYi2QJaZcIjjbfOJpMHCclZ8rTZSwBSabM2OHMyZXKe7BuqlSCJV4L4IBnLLzovDboLPj1SqFHktj64fJyI86/DzjF2nEGJIUWJ6v7C+/+shB8SHoWymKWDO17q8mnqeD7z7dhsQM3+pE4YfW3+QpfPsecYdxvCULRN636zMAMLAIraZrntGnXXOfwi0GiBWyvd00BFXbSTQ80SO2tohu/+mfKzNMCgflwIiygjYWaeGzHQQVnfvi410JFYWoC3LxPpB5F0SiFEER03H7xYnWULqzfCtBnGkNPPxIxv5JmTrw6oaS1Xyztz7BdY6Bv5zUCW2XiMcEJ6P78t8F6+ZN67PKlwATkAQTtuLgcPT6Gd2nZLig5im3hbmwX4EhsPg2uJv2v8MCsmHVZpE5yTite+Hvsx9CcpPmC5Pdfq5/nmJRIQwPTvnL3zRccRR+8lA0TsUaDZELMR+gNfvb5FR+K0itQg3dk9LiRwc6UAoIzTqqlJFsCgJPe/XzxJxuL43P7VoQhlY98AylstkS05PLqw9UlPnKd7/3wvfCorEoVM= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 78ae980c-9d84-4f0b-3376-08dbe5e404cd X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:10.1336 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 86fgSq9JBJCJJvzy4+WJNLBtVDmNvNFopwEByebpkwvow0MF4maohj/deHLFiEWf X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7007 These days the core code will free the fwspec if probe fails, no reason for any driver to call this on a probe failure path. Reviewed-by: Jerry Snitselaar Signed-off-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu/arm-smmu.c | 14 +++++--------- drivers/iommu/tegra-smmu.c | 1 - 2 files changed, 5 insertions(+), 10 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index d6d1a2a55cc069..854efcb1b84ddf 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1348,6 +1348,8 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) if (using_legacy_binding) { ret = arm_smmu_register_legacy_master(dev, &smmu); + if (ret) + return ERR_PTR(ret); /* * If dev->iommu_fwspec is initally NULL, arm_smmu_register_legacy_master() @@ -1355,15 +1357,12 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) * later use. */ fwspec = dev_iommu_fwspec_get(dev); - if (ret) - goto out_free; } else if (fwspec && fwspec->ops == &arm_smmu_ops) { smmu = arm_smmu_get_by_fwnode(fwspec->iommu_fwnode); } else { return ERR_PTR(-ENODEV); } - ret = -EINVAL; for (i = 0; i < fwspec->num_ids; i++) { u16 sid = FIELD_GET(ARM_SMMU_SMR_ID, fwspec->ids[i]); u16 mask = FIELD_GET(ARM_SMMU_SMR_MASK, fwspec->ids[i]); @@ -1371,20 +1370,19 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) if (sid & ~smmu->streamid_mask) { dev_err(dev, "stream ID 0x%x out of range for SMMU (0x%x)\n", sid, smmu->streamid_mask); - goto out_free; + return ERR_PTR(-EINVAL); } if (mask & ~smmu->smr_mask_mask) { dev_err(dev, "SMR mask 0x%x out of range for SMMU (0x%x)\n", mask, smmu->smr_mask_mask); - goto out_free; + return ERR_PTR(-EINVAL); } } - ret = -ENOMEM; cfg = kzalloc(offsetof(struct arm_smmu_master_cfg, smendx[i]), GFP_KERNEL); if (!cfg) - goto out_free; + return ERR_PTR(-ENOMEM); cfg->smmu = smmu; dev_iommu_priv_set(dev, cfg); @@ -1408,8 +1406,6 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) out_cfg_free: kfree(cfg); -out_free: - iommu_fwspec_free(dev); return ERR_PTR(ret); } diff --git a/drivers/iommu/tegra-smmu.c b/drivers/iommu/tegra-smmu.c index 310871728ab4b6..e3101aa2f35689 100644 --- a/drivers/iommu/tegra-smmu.c +++ b/drivers/iommu/tegra-smmu.c @@ -844,7 +844,6 @@ static int tegra_smmu_configure(struct tegra_smmu *smmu, struct device *dev, err = ops->of_xlate(dev, args); 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Wysocki" , Rob Herring Subject: [PATCH v2 15/17] iommu: Add ops->of_xlate_fwspec() Date: Wed, 15 Nov 2023 10:06:06 -0400 Message-ID: <15-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR11CA0027.namprd11.prod.outlook.com (2603:10b6:208:23b::32) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SJ0PR12MB7007:EE_ X-MS-Office365-Filtering-Correlation-Id: b1c2f9f8-00a0-479c-f556-08dbe5e4050f X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: AuVXENTqbrGQCV1jo64LTEDBXP9j3MJFPxnDJU47drDW6sE73fS6p88avtxNclsClzrlyHs/V0nhmBbuLyyTDpiRrorZFwVBLVgnDQfmVeOLvXihhUBfAyergBUgSHpOXYhRTL6GYhBHgpSY1WnX68S8Xr8aFDiZJleHw16pa35JGNtmztODZwda8a551/ZifZTyDRFJG94Lf2a/lqLX29F2QzAjRRVnehVXAwZFqjIM3VzSajOvy6CKzMPrQd0qgD4CSbcvKU7KHZXfZ/PmCsQAO3DXBGVh9msO7trFhWhvO2QS8MMvqJOFWrXkbO4GGe7S7d7U9vi44xbj0PmfmwvNBqIHWYfu4p7ovQFZlL6GgXRxCkJVZ0GbXmtWdSbbMND3zqQW9cAcBeBuZLBGK5WVjB3gaGJG5JqSrb/HT+mCXl43UoDcr99mu7LUUcfk9jQUk14uZsMYrTDWRpGVT4bH0JKaZK+a1tL2hZoLsFftm2J9rpPQbXDn5DjW7UZ44ITqgnd52/RFeQbk3dzovrDfEfqAwIB2Yxbb5TALHaOVnhQ6BRAYiNCkOnoZDbnPy+ZmbDHo4TiFXD6nCwmsGowxG8ePTiREYL4AnouCEUU= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(346002)(376002)(366004)(39860400002)(396003)(230922051799003)(451199024)(1800799009)(186009)(64100799003)(7406005)(6666004)(6506007)(2616005)(6512007)(83380400001)(7416002)(41300700001)(8676002)(5660300002)(4326008)(7366002)(8936002)(478600001)(2906002)(6486002)(66476007)(54906003)(110136005)(66946007)(66556008)(316002)(86362001)(36756003)(38100700002)(26005)(921008); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 6+ZxTZH4tMQT+XeOCjsnZ4kqX9jC/ju2Pxg1G6R1k60K9MyC0cD6w9CVS8mRJoeHM5QYrgZCC9FLxip9JnFSvNlmpVwOVVcPUsDd5D/Dh694Nbay6gtSfKFJNLHrwB+X4dQuZQmP135EWFSdashAjZa7RBnU4vH/+z0peWKGgaZMo0zkb5s+vSzF9VI/0Rcic3pxHXq4UqMfcNVOpGTo/2e2mhlJ0t0GAI+IlidxH0CMnG2Px2Er+k9eTIU2wPs1UTjbnzbYW/1paeBas1puvYsoYsxDMhYUmzQNnvefao2YLAEFrSBQP1XpRp0Z3nByaKlZZutV21sFFbBLbigAzU1daBUE0KDdqQFbbnUrT9VY/8XdgW4+62EXFa6rXrW5yjB71Pxi7MpJ3eRn7LA2mmABWYyDbZtF9sVQPVuQReLBLpXxh6P2gmT102Ejk6vd4YH2b5fsU36vLXRZaivUSHQqNSFseqRVBiBi1GdC13MEJw2V7QK0A9MslV1pRnVVENpzWDtvDMJmvjxtxJ0YUtjEvV6N/mh3Bumlbfky3eplgQ/xTzulZ9RwYW+NqPJNoWw35YnUOEScALP0cTw437YRtJO/F7rE/j0dXS73EeGwqM/UBJs5VGmgOd9Ez+7J9ivabEVHRV5l6JsrbtGYX+GGPWwkTFArpTrcanRidtz1calvJsx2IjcTpmbPRV8MJOBl0SPYzUvR+3t/QrwrHHIL9OGG5nm0geFsVw2dY4LKAj4raQOJOzIEaCxYxp9cioR54nBDoTJYc65i0C8KHUV3lmJ0/Q1Ah8E5p39X2qBgEHnqdxPBALYtOFuQ0kbgy9YOQxjN+/tXYY8bnmflvO/6nYGOnRppcl4WydKJf9F7QftvQWtf89URNbljzDauBmeNZpGnbsnq8OurZNFD+brBFiwivHK5REzxfzNVDkyONV01xE9b4OW2LLSyKpc4tDbTKjkcI979+dBRX5UU+twkKu/kXe3gpa+3sKpkhpAkwJjNDpXAHvxWzEhF1rpxy/usfuc43wBjWQePCGQDHzRUi5OkBg8Hr2+/m2pWUP+d1rLhTaSqx6XEEnWP96GR8jQgd0HVLo9ikXpBC6KFdSphnjKC7VyEVB2n0P9MWYJmvWKn7AkIDmKD1+r7umCJ2QqzBeqy0X7DIKJgNW126yxAWcLjqRrFFIFo3h16bm68mamgC6LmRNlMudCsEOQQ9A6WNAvyBphaFIfmGr0byf/6362nCWgSWJOAOz57tfE/f5bFx/WG62tfY4K7EXRD54GvRsWt5UdzX2RjcsnipJ99hSjKJBHRqaoJAZGdRrap56vMGQNzrVCRnUG0j4pj7uhhxkbekOkCx5OY5rtz5ORA5UY2YZsPzx1Rb+uiKxvBYExF5M9/uqIXKGzu+Q2YrOCPPxhYrNUDX7oMDmhKIRfJxFWOtVEvOTHRrx0A3iFHdgD4Uup4tZ4NusyWgt1HnZfdRAyTGglHYXYSERoFzY81iajuHflFbzyxra2cs5Ej5Blmoeu2rTsi0RODnmjyF76eGs6EnL4ggWVju0RYNbgIXe+OPVNdKwv29uoturg= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: b1c2f9f8-00a0-479c-f556-08dbe5e4050f X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:10.5041 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: pUipwaw1jn/9ZE0o6HKl6sPblNHjYOGgLuv/Ik/MnFR9uCME0ffxG9PcqJGV1z1j X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ0PR12MB7007 The new callback takes in the fwspec instead of retrieving it from the dev->iommu. Provide iommu_fwspec_append_ids() to work directly on the fwspec. Convert SMMU, SMMUv3, and virtio to use iommu_fwspec_append_ids() and the new entry point. This avoids having to touch dev->iommu at all, and doesn't require the iommu_probe_device_lock. Reviewed-by: Jerry Snitselaar Signed-off-by: Jason Gunthorpe --- drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 8 +++++--- drivers/iommu/arm/arm-smmu/arm-smmu.c | 8 +++++--- drivers/iommu/iommu.c | 3 +++ drivers/iommu/virtio-iommu.c | 8 +++++--- include/linux/iommu.h | 3 +++ 5 files changed, 21 insertions(+), 9 deletions(-) diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 7445454c2af244..b1309f04ebc0d9 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2748,9 +2748,11 @@ static int arm_smmu_enable_nesting(struct iommu_domain *domain) return ret; } -static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) +static int arm_smmu_of_xlate_fwspec(struct iommu_fwspec *fwspec, + struct device *dev, + struct of_phandle_args *args) { - return iommu_fwspec_add_ids(dev, args->args, 1); + return iommu_fwspec_append_ids(fwspec, args->args, 1); } static void arm_smmu_get_resv_regions(struct device *dev, @@ -2858,7 +2860,7 @@ static struct iommu_ops arm_smmu_ops = { .probe_device = arm_smmu_probe_device, .release_device = arm_smmu_release_device, .device_group = arm_smmu_device_group, - .of_xlate = arm_smmu_of_xlate, + .of_xlate_fwspec = arm_smmu_of_xlate_fwspec, .get_resv_regions = arm_smmu_get_resv_regions, .remove_dev_pasid = arm_smmu_remove_dev_pasid, .dev_enable_feat = arm_smmu_dev_enable_feature, diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 854efcb1b84ddf..8c4a60d8e5d522 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1510,7 +1510,9 @@ static int arm_smmu_set_pgtable_quirks(struct iommu_domain *domain, return ret; } -static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) +static int arm_smmu_of_xlate_fwspec(struct iommu_fwspec *fwspec, + struct device *dev, + struct of_phandle_args *args) { u32 mask, fwid = 0; @@ -1522,7 +1524,7 @@ static int arm_smmu_of_xlate(struct device *dev, struct of_phandle_args *args) else if (!of_property_read_u32(args->np, "stream-match-mask", &mask)) fwid |= FIELD_PREP(ARM_SMMU_SMR_MASK, mask); - return iommu_fwspec_add_ids(dev, &fwid, 1); + return iommu_fwspec_append_ids(fwspec, &fwid, 1); } static void arm_smmu_get_resv_regions(struct device *dev, @@ -1562,7 +1564,7 @@ static struct iommu_ops arm_smmu_ops = { .release_device = arm_smmu_release_device, .probe_finalize = arm_smmu_probe_finalize, .device_group = arm_smmu_device_group, - .of_xlate = arm_smmu_of_xlate, + .of_xlate_fwspec = arm_smmu_of_xlate_fwspec, .get_resv_regions = arm_smmu_get_resv_regions, .def_domain_type = arm_smmu_def_domain_type, .pgsize_bitmap = -1UL, /* Restricted during device attach */ diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 8fc3d0ff881260..de6dcb244bff4a 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -2983,6 +2983,9 @@ int iommu_fwspec_of_xlate(struct iommu_fwspec *fwspec, struct device *dev, if (ret) return ret; + if (fwspec->ops->of_xlate_fwspec) + return fwspec->ops->of_xlate_fwspec(fwspec, dev, iommu_spec); + if (!fwspec->ops->of_xlate) return -ENODEV; diff --git a/drivers/iommu/virtio-iommu.c b/drivers/iommu/virtio-iommu.c index 379ebe03efb6d4..2283f1d1155981 100644 --- a/drivers/iommu/virtio-iommu.c +++ b/drivers/iommu/virtio-iommu.c @@ -1027,9 +1027,11 @@ static struct iommu_group *viommu_device_group(struct device *dev) return generic_device_group(dev); } -static int viommu_of_xlate(struct device *dev, struct of_phandle_args *args) +static int viommu_of_xlate_fwspec(struct iommu_fwspec *fwspec, + struct device *dev, + struct of_phandle_args *args) { - return iommu_fwspec_add_ids(dev, args->args, 1); + return iommu_fwspec_append_ids(fwspec, args->args, 1); } static bool viommu_capable(struct device *dev, enum iommu_cap cap) @@ -1050,7 +1052,7 @@ static struct iommu_ops viommu_ops = { .release_device = viommu_release_device, .device_group = viommu_device_group, .get_resv_regions = viommu_get_resv_regions, - .of_xlate = viommu_of_xlate, + .of_xlate_fwspec = viommu_of_xlate_fwspec, .owner = THIS_MODULE, .default_domain_ops = &(const struct iommu_domain_ops) { .attach_dev = viommu_attach_dev, diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 352070c3ab3126..3495db0c3e4631 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -43,6 +43,7 @@ struct notifier_block; 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Wysocki" , Rob Herring Subject: [PATCH v2 16/17] iommu: Mark dev_iommu_get() with lockdep Date: Wed, 15 Nov 2023 10:06:07 -0400 Message-ID: <16-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR15CA0030.namprd15.prod.outlook.com (2603:10b6:208:1b4::43) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|PH8PR12MB6916:EE_ X-MS-Office365-Filtering-Correlation-Id: cd57df2f-70fa-4365-9035-08dbe5e4054b X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 5+PCHwyQoTgcnmOhU0+wAdo5BJF9MNJThP2tjYcfTlDLIRfE6+NZFNDhHZ5MLgPyVYyONBOoLyAV1MuagOj6dvFwDmvWvybBwzKbma+IubR/CmGpimfDV4kInJMssRgZ5fKwarqEs+m00IWa+mQuCyqJjq7/sguQDYXTor4LsPV5doaLPU7liKDX5yehsQb3rRrM2fA7dHhCbzVtNXxeFcUiVVVJMIXXYtkEmcMbY5yXtIGPTsmRtD0O+CE9PqMdiw5QHGfHGRbAccHZ6gEu6YEpBN37yp/Ul7g5XSRVhctH8Y5mUn36Xbq7lSrCAs5Sc6xw1r/hm4YxVq0ZdAl5cWrf4AKawUqTiG6oWedoldwvuxqDZxSybt6Uriqv7SzcAAz1IuQSkUHj5/UUJtJHPe9mIyAeaqDCdbSCYJ7OZIeyvikaYjWZbL2jqej7v9vlZ3HLftk0rSZQxwsBYp3tWgnUNXkGlUurxJWLuX5rIsJ0iX0qZV4EKTm91RwdWnu2WXT369LCWCKQBZT/pRjy+hoclCIbhqIxCqr6SBQzWIRGHT9HqAmPy/zcWdJ1+ZYpb+9Qe7DRas9HEhYutmmHGpBZL9nFu2lp5iLSbBqoUf0= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(39860400002)(376002)(346002)(396003)(366004)(136003)(230922051799003)(1800799009)(64100799003)(186009)(451199024)(110136005)(316002)(66946007)(54906003)(66476007)(66556008)(6486002)(478600001)(6666004)(7366002)(86362001)(5660300002)(7406005)(7416002)(4744005)(921008)(41300700001)(2906002)(36756003)(8676002)(4326008)(8936002)(2616005)(38100700002)(26005)(83380400001)(6506007)(6512007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: Ua2aJLcFIbc5+itcPpnHBFBTlyrcf8EJZLPTpR0ouZnfSMAVqcDM5urushXdtM4fFQeqXnOxgbygNVorw3yAXqF1vRXU1ZLhbzBf0IRGQNjCgB3751V0B1BTeNCU5YtpkhyHXoMPCa4iN314wodKSjs55dTx3LMdgovijS+2zVNiSYhcaWYhXPfI7S1n5sa9MznopuU0TOKac4LZLVug2FmeCSSe8cZM6WE6WnBxVM4aXaiCCh5TVTU3RIA96Gp3HwFRoW/SrFa2qQRijp4hLffit5rmOaBGuzDajX6jM6zlFOCMOREIqiOXjUsfVvnavoPdKxTJymkp5XHxNzqJQ/f/DYRKKSQxqHHWKNdQpLDwAXLo3lQ81vlkISlkiZ5vA/Q8fePktKFFIHffVFkg7kGV1oKrOwsywfHlQw7JD93NcsAbRHBUjCB0601qmYqjayjfvyojvTI+on1ZH13TJ+pLDMG6UpoRQw74ZP4/UmtqM2hIDt9IMK2H+xC2AW1kDts7QRpehkhyiwXdO9puJhSv22sT2sC2gi6Nby7EgVV0tunGZyHIib8ZDdr94rBojMMHZPIfI+WRwyTYmC9cfMZj1o4hbGza38ly2GoQ1xF+uF+rvMWqNPAr1YRtk1mVNPbN+0Ohyqr3LcVIrwkX0RJaw21NtjbQDth7I6mDdIAHYKrXetcFgeOR95rKep4xewWhSb3gSb6mdTK/hXkkHN4nPRB/ymSaO94Z9tnFhWYl9XzcMzttEmv5RKSI15U9IAEPc/84b/s1YsOk6QCkl1fMVaEh1F+n/6uxJfmzc3mB301LKpjOthZpfY17+WpXHiAp7KbMWXK/tC5DdigVRrsYrUveo1TTn0LYQwfwU85f7XB759LVfeZbGOzyTQ4wQ6+eEiDwBdh+hcvlEXnrvdaBGVsxUWFKNf5NDAAz7iodlOWlGYFMbylGTT10l7tn/L0ivb0iWEFRsAi5hj/PAaLgERunztWXDa0u8p8mLAP9bwBz6pTPmVahN44xSPmYcrAONazAds2lbHRtz/kGlLSBWiXHx1RIxbYNcqxK9r94ExnvSpXqrxV30XxZOGOYx+pxyJ4A8bj9q8pUcqT3cj81BhivsviRa0s6O8VXc8jql435vd4NTAdFlOADzqr1+aKhQlYEIRgoB3IR/oJldgApuX96E1PulMK/CmNwzbJ8xHC/stRQzwTJAWtn8t833ZeKznY6A0yjfOnDD75SEjkXPHH+2EQzAxGi8n+tacxcxMFwwo9cn/jVyAGSIL+kiLbppyKEx+2/BkApgjBDLNaPeJcDWJIDb2ch1yI/Rei9ca7RFjj+D4F3i9PpbWzdoIwh7e8C7MKa3HpNP2f07Uk9cIJyCpmRKq+Q/RDNfGa/sBSkRYmPnSsqlPTAkWfmwppCQKK4jr9VGeqE0d8W7CUakGAjRhfW/Qrbw6PaRMSz/fK8u1jet2BwJKlSpE+mKfr71Siwvxo1TgqSjKCALDobUHKVYOpM1W7pTYgdjwqIK0YpG7CXbIVw/nksIJFTheYhzPl+hpqk8z0FCetxEIuB68Ob4w59P2k4cJInqHk= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: cd57df2f-70fa-4365-9035-08dbe5e4054b X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:10.9323 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: TfvvkzP18CpfUqZFB3Z1GoS5XhWLYoplp+SyiKUoGPeZB5/IG2hxCOyiQvqFe3qg X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6916 Allocation of dev->iommu must be done under the iommu_probe_device_lock. Mark this with lockdep to discourage future mistakes. Reviewed-by: Jerry Snitselaar Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index de6dcb244bff4a..34c4b07a6aafae 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -345,6 +345,8 @@ static struct dev_iommu *dev_iommu_get(struct device *dev) { struct dev_iommu *param = dev->iommu; + lockdep_assert_held(&iommu_probe_device_lock); + if (param) return param; From patchwork Wed Nov 15 14:06:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 744110 Received: from lindbergh.monkeyblade.net (lindbergh.monkeyblade.net [23.128.96.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 402C5208CA; Wed, 15 Nov 2023 14:06:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="IVhPFLV5" Received: from NAM11-BN8-obe.outbound.protection.outlook.com (mail-bn8nam11on2040.outbound.protection.outlook.com [40.107.236.40]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 88A4011D; Wed, 15 Nov 2023 06:06:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=e77UutjJtK2uoNSL0JhrSh09GOFve/uwDy0qY7X9ugyGfO18F+HChWT2Yd1ySwxWtRcaw/de5HehtXd5BmZbCM9kpnKyxPCfbJ6+2g0oe4tyGhk1X+vUw6DQf30PoUhpV4p35sGgkRABVIsqQKLwHAhjLm+r4pQfKByIiuDfc7Kgf4pxu96aq2vKKkOv49ZYg9awAp+cz/ZZejkefORaTGeGYnu18iNlsQ0AnmL5976GCEUi7Ew10N4xcZE5XiEMM3tf8bgqzOEqAflsJihrXfyFRpnuc/RgKvd5kuhNumFsWMm59E/aF7pPgYsbsx2SNgUTcbleEn8CyXndDgoqKw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=h1GujaaPcQbdHtiaRGjCcNI83AftjT8Nj3eA/aJbfRg=; b=OK4pHeuKIoow80ktkUWHf5j449fMsilxNZPy+z62rLg7Fh5p6aAr+Sv+kLvsV9e5gstWkWap9ZW7VvoVdocgl/0PegQNqKuU8UWkTF9Rq32mS5QkXeghueRIzXUR3elkC1vQEGA+nAPTZk+LWZBWdPXuWNhXPzeWoKTqzPiqNtfjYRO+NPuG9hskZOlUVUNrHXdCt4U+lF+8NIBiOUFqz+mbJMax974lhMcw8/m+5TX6MbIIiwNcLFZI+jtORl3ctQ2l6ixFLW6c/2rDsBj5OdGRzX4RWyhTqBJ2NqfdeaG0wXm5DrYBwV3JRO0Ifxi+u6JsgqMHHYpXnV5gmV4wyg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=h1GujaaPcQbdHtiaRGjCcNI83AftjT8Nj3eA/aJbfRg=; b=IVhPFLV5h8oQ5RHN73YYWym7TYHqgqfaFf8F+evXaQuwk0Ue6o3NwXlPvFLnnsqDGYHxnC1+uRZBnlY888mvsOpWO1OAmynwQVyDtwA3MmvdRcMPstLqlyeEP2OFvhUP+YRguV4RlznuAaLPxCj0Fc8KncMa/33Nzudd1rlJerMIO+WVMoPAISxB+s1uja8hl6TNPC8qDiQUJrmVTwiUPFB+y+EzmIr5JtamtvYSKKXTP+mg31KSexGZ9VMCpca3xkcBnN2wU4qpkSj34RrMjSrUpm+Mt9QhxQPsucaYnC0TuXOafoC07MdvHKs5ZIrsj5qbsj9muBbUoNyWWRn7AQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) by PH8PR12MB6916.namprd12.prod.outlook.com (2603:10b6:510:1bd::10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6977.31; Wed, 15 Nov 2023 14:06:15 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93%4]) with mapi id 15.20.6977.029; Wed, 15 Nov 2023 14:06:15 +0000 From: Jason Gunthorpe To: acpica-devel@lists.linux.dev, Alyssa Rosenzweig , Albert Ou , asahi@lists.linux.dev, Catalin Marinas , Dexuan Cui , devicetree@vger.kernel.org, David Woodhouse , Frank Rowand , Hanjun Guo , Haiyang Zhang , iommu@lists.linux.dev, Jean-Philippe Brucker , Jonathan Hunter , Joerg Roedel , "K. Y. Srinivasan" , Len Brown , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, linux-snps-arc@lists.infradead.org, linux-tegra@vger.kernel.org, Russell King , Lorenzo Pieralisi , Marek Szyprowski , Hector Martin , Palmer Dabbelt , patches@lists.linux.dev, Paul Walmsley , "Rafael J. Wysocki" , Robert Moore , Rob Herring , Robin Murphy , Sudeep Holla , Suravee Suthikulpanit , Sven Peter , Thierry Reding , Thomas Bogendoerfer , Krishna Reddy , Vineet Gupta , virtualization@lists.linux.dev, Wei Liu , Will Deacon Cc: =?utf-8?q?Andr=C3=A9_Draszik?= , Lu Baolu , Christoph Hellwig , Jerry Snitselaar , Moritz Fischer , Zhenhua Huang , "Rafael J. Wysocki" , Rob Herring Subject: [PATCH v2 17/17] iommu: Mark dev_iommu_priv_set() with a lockdep Date: Wed, 15 Nov 2023 10:06:08 -0400 Message-ID: <17-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> In-Reply-To: <0-v2-36a0088ecaa7+22c6e-iommu_fwspec_jgg@nvidia.com> References: X-ClientProxiedBy: MN2PR11CA0028.namprd11.prod.outlook.com (2603:10b6:208:23b::33) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|PH8PR12MB6916:EE_ X-MS-Office365-Filtering-Correlation-Id: 3f8cf913-e808-4457-e104-08dbe5e4051b X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: NBnV+3+sCeD6bpEZFjODNEbAsY7ndRKIQKbI/7waKsRhxVYz6miBgl2fhZJMAe/RXYfts7OYc7KTGyTtFSD1F6wUB0subQxNM58t59M9zcUd4Ff5GZ/0V0HCbXXN/tMw7jXWuRbxfzBNztSGFfDoXobpFTioFHaJviptZkOyr/Xq3PEmvoir8zeaFzVH9B/mpY2qm27K1ZL9VckFYShtbyAr0dz+e/mJcMA7GbINB48PizlS27YzFzKVVlSD/WiSwWllmx3JvUnxCkdQGD5MvKVRfMLBVYYhRLeNytTpNxMq3Tkc2mPZz1mLJfwTyO1TrU5CN/txqvVFFFm7aijEPPnNlCO0iAofQR60GrDDk4U0opPjUBrOpRcTSOt0xF0Rup1Je1obygi2reRgArHm246GqPyAXEvoxj+lC15zzZrSF9lXwpXS1iBQygQVic3KoEORNdzU3PLawfg8i/1STn8SQ81cyl9l6n9zbIGbKsoDwjB/iZKwL3mmhXotfdAwph2P1k2w8KOP0CW8Xl0vP4MVf6TRp2OjZ91OzvHL7/wCIwdw8/mhp81sPCyC3yHiPvfnQHR4BUDbOzHBUvFxcNOwNxicfqOysq4LWEI9NaQ= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(39860400002)(376002)(346002)(396003)(366004)(136003)(230922051799003)(1800799009)(64100799003)(186009)(451199024)(110136005)(316002)(66946007)(54906003)(66476007)(66556008)(6486002)(478600001)(6666004)(7366002)(86362001)(5660300002)(7406005)(7416002)(921008)(41300700001)(2906002)(36756003)(8676002)(4326008)(8936002)(2616005)(38100700002)(26005)(83380400001)(6506007)(6512007); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: e0if6SP1GlB9PDzgRPtOZWHLnGvb/YeRiMRnt0KYqynBMhSZen24QMDVcB0qfbxQoLAYuEMleO3c+u4yfxHV/tfbSc6HGSoqapW3ohxGJnPdeoht7LPak3XmGGtse7Aa7eX3J/faF3NP/wJS+nCKgBumkTSojcT8vrZDuPlThmw69K441S/s44c29mqjIYMKzQvOA6RS36ljUkhTTXvc2h9y0uLloa1W8eoaV8KGxT0tmdruFJXDCCFC44V/0C+slM66e9qBW39/QlrNF5KtUcW0NfHYHRrZNMSWu8mxr/KNWphEHgfj10Rsrxg73ZMHpf4dGSo8ELaCgXjXwSIiM7OTUs1ac1mFV5ReZ6JugObpR+y8FjH9szIw7wdumL8cL0wxG4tppkqUUZIEtDfvqc0333yDnOA6RE+aHKQczKLM1PTm83DeZicz0oVtBgR49GiyZnohvYpvjKL1jYuwWxqK1/crPqwJ6KscOFIjsyQV3yzE1YcHgPiOySjSMsJAtOGVCcWgu5sY8Id0JvkOwLUs7YQXbgNmFRJB08cTL0VxEudjLJ59hWvYvVDmCyJjYZ4EtFgNSN9ozyiXMk7cRJHcTZQSB6fxrjTLL0kxk4XKU2oeVz0ptFAuqEk/L7B8rsK5QdBrOaLtcjWstGlBtwfxSfrdJOoPzUHSxAmwSNcZR7Ly3fs6Pe6CZygsL7cBzx2Kwu7PhNynN69oWE+WnZr3NdJvZb0mIHw+68stfW6x4YB78xpmz30s1XgBmJJlDsRSdPolU/+iNdh1rVSSuLHYzG9oJSLUNUklwYen7YuXpVRop57mRfymBvTnI0f2J/iyQe5rAW6QOaRlm7orfmnN11/yUoYurBf3VWkytDCPzEe/SVf8wg9MKA0nbvv8PWuPfxaNnHFha5WiwJSIVBHvGR5/05cmH7QUeLSC7aXYTwuGEWcUilxojfiJMwJiRgBB3ZfLlp2GWLO5VrXusF62I34S/7aVavn78SLAQO+Aljpsls+vkMRZNyRQXS5B1fGJ+NZSMxHI6Vpux3Mg3QaKj/2Rp12dj5x+EG1zXaHJfCCVbrgoHWYh4IlJ/MzhWCKEXK5vmvtta8/NjIZJS4AuT1pvmnELyQJaYZmuBbZ/XD9XrmKHiYTfYY8OhQ07mwWon6r/iyWTgt3aobYvL14ztjM686zxFGM1IWegljBK+PyZif9r957gvTASIGKubBpylxDWdzHqq1xhh4Z2O88jne2HxolChUYt30kjkrK/0iGjbwurSkcjyZsBhB37677N4acK1jJ0eGQjQP6iNTywPFnwS0yX8KksDrLvHF0BB6OdKZWG1prHYQ7FccUamti7RXtKhRRGzO943AyYQMsabQnCmJ/pecSdX+brAtv7knvU2dU9Mo86475/oaKnIwi4aS7hP/Rt/FAz+MBoOF+BnfIjeZkKslSX2HXKHSmW9QwMxrHnfk5UL6vNk9mvDLq2u+K/EGC0dCCVA7+w4SOLUSm024vCbbXWHHOP/4MFXqS0G8xOqvLOGSuXJ/lYGJwXiKOdNboIGfc0prtCDjg+OwX+nXxIdgvh1TK97Ps= X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 3f8cf913-e808-4457-e104-08dbe5e4051b X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 15 Nov 2023 14:06:10.6128 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jYB4zXZxebzO9WEXDZ4ZJaJRplN3TWVB05TDh50kBnIo457V1UZKTVQEx6vynJQn X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB6916 A perfect driver would only call dev_iommu_priv_set() from its probe callback. We've made it functionally correct to call it from the of_xlate by adding a lock around that call. lockdep assert that iommu_probe_device_lock is held to discourage misuse. Exclude PPC kernels with CONFIG_FSL_PAMU turned on because FSL_PAMU uses a global static for its priv and abuses priv for its domain. Remove the pointless stores of NULL, all these are on paths where the core code will free dev->iommu after the op returns. Reviewed-by: Lu Baolu Reviewed-by: Jerry Snitselaar Signed-off-by: Jason Gunthorpe --- drivers/iommu/amd/iommu.c | 2 -- drivers/iommu/apple-dart.c | 1 - drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 - drivers/iommu/arm/arm-smmu/arm-smmu.c | 1 - drivers/iommu/intel/iommu.c | 2 -- drivers/iommu/iommu.c | 9 +++++++++ drivers/iommu/omap-iommu.c | 1 - include/linux/iommu.h | 5 +---- 8 files changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index fcc987f5d4edc3..8199c678c2dc2a 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -551,8 +551,6 @@ static void amd_iommu_uninit_device(struct device *dev) if (dev_data->domain) detach_device(dev); - dev_iommu_priv_set(dev, NULL); - /* * We keep dev_data around for unplugged devices and reuse it when the * device is re-plugged - not doing so would introduce a ton of races. diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c index ee05f4824bfad1..56cfc33042e0b5 100644 --- a/drivers/iommu/apple-dart.c +++ b/drivers/iommu/apple-dart.c @@ -740,7 +740,6 @@ static void apple_dart_release_device(struct device *dev) { struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); - dev_iommu_priv_set(dev, NULL); kfree(cfg); } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index b1309f04ebc0d9..df81fcd25a75b0 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2698,7 +2698,6 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) err_free_master: kfree(master); - dev_iommu_priv_set(dev, NULL); return ERR_PTR(ret); } diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 8c4a60d8e5d522..6fc040a4168aa3 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1423,7 +1423,6 @@ static void arm_smmu_release_device(struct device *dev) arm_smmu_rpm_put(cfg->smmu); - dev_iommu_priv_set(dev, NULL); kfree(cfg); } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 3531b956556c7d..4a5792888e6433 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4457,7 +4457,6 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) ret = intel_pasid_alloc_table(dev); if (ret) { dev_err(dev, "PASID table allocation failed\n"); - dev_iommu_priv_set(dev, NULL); kfree(info); return ERR_PTR(ret); } @@ -4475,7 +4474,6 @@ static void intel_iommu_release_device(struct device *dev) dmar_remove_one_dev_info(dev); intel_pasid_free_table(dev); intel_iommu_debugfs_remove_dev(info); - dev_iommu_priv_set(dev, NULL); kfree(info); set_dma_ops(dev, NULL); } diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 34c4b07a6aafae..fbfb9ba4da0ee2 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -387,6 +387,15 @@ static u32 dev_iommu_get_max_pasids(struct device *dev) return min_t(u32, max_pasids, dev->iommu->iommu_dev->max_pasids); } +void dev_iommu_priv_set(struct device *dev, void *priv) +{ + /* FSL_PAMU does something weird */ + if (!IS_ENABLED(CONFIG_FSL_PAMU)) + lockdep_assert_held(&iommu_probe_device_lock); + dev->iommu->priv = priv; +} +EXPORT_SYMBOL_GPL(dev_iommu_priv_set); + /* * Init the dev->iommu and dev->iommu_group in the struct device and get the * driver probed. Take ownership of fwspec, it always freed on error diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index c66b070841dd41..c9528065a59afa 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -1719,7 +1719,6 @@ static void omap_iommu_release_device(struct device *dev) if (!dev->of_node || !arch_data) return; - dev_iommu_priv_set(dev, NULL); kfree(arch_data); } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 3495db0c3e4631..8be153a54c8ca2 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -852,10 +852,7 @@ static inline void *dev_iommu_priv_get(struct device *dev) return NULL; } -static inline void dev_iommu_priv_set(struct device *dev, void *priv) -{ - dev->iommu->priv = priv; -} +void dev_iommu_priv_set(struct device *dev, void *priv); int iommu_probe_device_fwspec(struct device *dev, struct iommu_fwspec *fwspec); static inline int iommu_probe_device(struct device *dev)