From patchwork Wed Nov 29 13:22:43 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 748291 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="RbDR8dYc" Received: from mail-ej1-x630.google.com (mail-ej1-x630.google.com [IPv6:2a00:1450:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 524DC1735 for ; Wed, 29 Nov 2023 05:22:54 -0800 (PST) Received: by mail-ej1-x630.google.com with SMTP id a640c23a62f3a-9fd0059a967so172116666b.1 for ; Wed, 29 Nov 2023 05:22:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701264173; x=1701868973; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=V8cKP8tRfrnJA83704gxkzdOYrlmQTMNSgQeXlvMQfk=; b=RbDR8dYcHiCTBz0d01OTO+c+eOfW23uwsI9HwIng3gsuLf3xtHa/8vP1AlpD095NmH R6vmGA3KZGH4/OLNWf5i7hFSoPIryrnsMWmV8jAkUnfkq8tlWFQwL1vElERLIAg4dvHq OLKZIVOCPgwcWsFSGGvxvYzMb3LFy7cXB9lmniSBTLX0mENS/mKu57Bz+ZuCAgGJxCDc Rx+gzm5duLiCZM8VXnKNGDaWHKcSFl4LaXlcg5fEHQ5Q6EGvJJiopmd1+rbNiuvaTX9n sCLd9W6kLV34cRM9fqkhJIwk5ngE1jTgGuoJtZ3xmr5zPTDS+TQ52KzYoZ5nmvWtJm5x NJTA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701264173; x=1701868973; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=V8cKP8tRfrnJA83704gxkzdOYrlmQTMNSgQeXlvMQfk=; b=iCm5oOD1mJQivkxyEgIDuCfN4BfO9af7AZvesffkA5qQwToLAlM57PSkIm8XOC9ogP tOfqCesISBDyJ0yZR2t9jLvZoXdw2xKH7MDtOa1N2sFrMGbFRsTg/x+FAEQ7XLhoQ7dJ Sy0HjeXey1UD/ddTYvL/jIHVB9QM0qD7UFiwhf1Ni8n0VWiN6+Jqp/CGR6PJGuSDOnE4 xen/CzXC/aGbUWtBTUV8aezNti7Yqe4Pui+z/R5K2rzSjsYYGhiXNFneGoZwxRxbUHRp SD6nAgpKeJGN5LRW41EytiX042mqb4oVPtD9oeVOXfHZJIU7G1ElOfEIyMuqvg6xRrON ZdhA== X-Gm-Message-State: AOJu0Yz76zGhQkpbRyIPVfOqfbMT6mKd2TWZ09nJJQltXcDb6/3XMeGQ 0Ez1Y6miVFe89kLj3I+f6BxOkIgjAZ22kh5vCrk= X-Google-Smtp-Source: AGHT+IECkp9Gbm6qzKkc7lwm9UVyumqJ4XPBZZczUNpzbW2fxEIkSaFfkE7RSlm6QoOYEMMEqbPhSg== X-Received: by 2002:a17:906:b88d:b0:9ae:50ec:bd81 with SMTP id hb13-20020a170906b88d00b009ae50ecbd81mr17811111ejb.21.1701264172765; Wed, 29 Nov 2023 05:22:52 -0800 (PST) Received: from krzk-bin.. ([178.197.223.109]) by smtp.gmail.com with ESMTPSA id lb16-20020a170907785000b009fda665860csm7844842ejc.22.2023.11.29.05.22.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 05:22:52 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Neil Armstrong Subject: [PATCH 1/5] arm64: dts: qcom: sm8650: add ADSP GPR Date: Wed, 29 Nov 2023 14:22:43 +0100 Message-Id: <20231129132247.63721-2-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> References: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the ADSP Generic Packet Router (GPR) device node as part of audio subsystem in Qualcomm SM8650 SoC. Cc: Neil Armstrong Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 40 ++++++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 41dfa5e19a15..9df79297dad7 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -4326,6 +4326,46 @@ fastrpc { #address-cells = <1>; #size-cells = <0>; }; + + gpr { + compatible = "qcom,gpr"; + qcom,glink-channels = "adsp_apps"; + qcom,domain = ; + qcom,intents = <512 20>; + #address-cells = <1>; + #size-cells = <0>; + + q6apm: service@1 { + compatible = "qcom,q6apm"; + reg = ; + #sound-dai-cells = <0>; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6apmdai: dais { + compatible = "qcom,q6apm-dais"; + iommus = <&apps_smmu 0x1001 0x80>, + <&apps_smmu 0x1061 0x0>; + }; + + q6apmbedai: bedais { + compatible = "qcom,q6apm-lpass-dais"; + #sound-dai-cells = <1>; + }; + }; + + q6prm: service@2 { + compatible = "qcom,q6prm"; + reg = ; + qcom,protection-domain = "avs/audio", + "msm/adsp/audio_pd"; + + q6prmcc: clock-controller { + compatible = "qcom,q6prm-lpass-clocks"; + #clock-cells = <2>; + }; + }; + }; }; }; From patchwork Wed Nov 29 13:22:44 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 748777 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="CinnIAUV" Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D5D81BC0 for ; Wed, 29 Nov 2023 05:22:56 -0800 (PST) Received: by mail-ed1-x530.google.com with SMTP id 4fb4d7f45d1cf-543456dbd7bso1677536a12.1 for ; Wed, 29 Nov 2023 05:22:56 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701264175; x=1701868975; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=tlzLVTMs92fwwEwaB8T7DJx+dwVSGFo+h22EKZkAkLQ=; b=CinnIAUVBQ+UDUoGmPVrk7UjsVmNH4gNa5Y+8nq5WB/74dqqDeDfAy1mfYTdtuLHW0 u4bZotmLlknbf+PyDrkRus4rpaB5OiNGuXxoWy5qE9vy0a2Nj0D60tErPgGdGIuxhY3A Yr/TRuHAGId/SHkI/KRWV3dtYXWU7usOnwgPoQFPWpgjOIcXGDY/9jykTBs+MLS/YYzY JfUata8pAgnJ9/mxmGnJ5flSPQD/dK2dv7+PuIJIOTb95rdBc/SJV06cRxx0VckzT0du nfxZuUysEacNAJ9op1nIMt9FPlpGNlBEtrGc+z4ZEwIyK8sCqvpdYkUdEeevSnIBMv0x vivA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701264175; x=1701868975; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=tlzLVTMs92fwwEwaB8T7DJx+dwVSGFo+h22EKZkAkLQ=; b=cpcHpGJQspHOzaVP/kBcliZIvulwB4+W0d9xlJu91w/72gQIWxzVX9HbXNRfxmgn0e V22bT8HaTfPRkp/0deMmiZ9OdVWBC/OgxBTBPw/GUQ9tfCbPgbtoylqLFlIQYN+0xr0u /nGMrcPkTKyeb7Lw8jQlaUhARUrn2vUYdTMAyFV7Zhe13XAUQXQ580x43d6TkbaSOfdW frNiF0tK37Bw7/JTR+fxQh1qDRfJgoNACThMLh9xLg95l3rcNzC9wk+H5EsTv7yOztp2 XAo6b7FK78eiRiZSOYVcpaz3I9FUVtBf9bHyR8InN8rq1MqGLX5MmFs8tMUioXV6Pt7Q G9MA== X-Gm-Message-State: AOJu0Ywkp1Aos5m1+8WL9JEKMv2ELgoOlpI9UkwgnfBckiRJQP2AKD6Z vMMgXHPgguY60E/lj3xCbGZB3w== X-Google-Smtp-Source: AGHT+IGRHjDlG833IMCkZNY8/R8yds6YdmKWjfneh699twb912CYx4++MyR+8Sy4h2rKSfvTh8Z5tQ== X-Received: by 2002:a17:906:2212:b0:9fd:fdae:a9d0 with SMTP id s18-20020a170906221200b009fdfdaea9d0mr20603479ejs.5.1701264174985; Wed, 29 Nov 2023 05:22:54 -0800 (PST) Received: from krzk-bin.. ([178.197.223.109]) by smtp.gmail.com with ESMTPSA id lb16-20020a170907785000b009fda665860csm7844842ejc.22.2023.11.29.05.22.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 05:22:54 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Neil Armstrong Subject: [PATCH 2/5] arm64: dts: qcom: sm8650: add LPASS LPI pin controller Date: Wed, 29 Nov 2023 14:22:44 +0100 Message-Id: <20231129132247.63721-3-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> References: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the Low Power Audio SubSystem Low Power Island (LPASS LPI) pin controller device node as part of audio subsystem in Qualcomm SM8650 SoC. Cc: Neil Armstrong Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index 9df79297dad7..e926329cf3f9 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -21,6 +21,7 @@ #include #include #include +#include #include / { @@ -2610,6 +2611,19 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; + lpass_tlmm: pinctrl@6e80000 { + compatible = "qcom,sm8650-lpass-lpi-pinctrl"; + reg = <0 0x06e80000 0 0x20000>; + + clocks = <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "core", "audio"; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&lpass_tlmm 0 0 23>; + }; + lpass_lpiaon_noc: interconnect@7400000 { compatible = "qcom,sm8650-lpass-lpiaon-noc"; reg = <0 0x07400000 0 0x19080>; From patchwork Wed Nov 29 13:22:45 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 748290 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="b4lTRfKB" Received: from mail-ej1-x633.google.com (mail-ej1-x633.google.com [IPv6:2a00:1450:4864:20::633]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0F551172E for ; Wed, 29 Nov 2023 05:22:58 -0800 (PST) Received: by mail-ej1-x633.google.com with SMTP id a640c23a62f3a-9fffa4c4f43so917858166b.3 for ; Wed, 29 Nov 2023 05:22:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1701264176; x=1701868976; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=4TjEg2HvGQeoausXFkvYKgkgDLti5NyQehvAtnGer54=; b=b4lTRfKB9Akefg78S7KGFCMceYsais8bPjNQWTrkNb1P73noLbtkkz1wcCvgNj+njM dTP2Jh5BJRFokXekM4OZhnx+HLdJULIv0W5SI4fHDy1qqs1GABa54uLi5paYeE9ueA2i oxv0kKoYzwu+SR4yj1FB6r2zTpcUGLlu0d/yttgu6ssnahScYjpnO3OMVikGn4v4NjWr 6Z+yhhlDLkJu3yyNYBFnoZVk7iJ8cwiHGSnXxz6nfz/lEgFr6n6oLk2clcASnqEPMYRl cBax84yFRIuqCwtdJfCfoeX4CpdT8U575YDz5/eSENkvnB/05E8ZfasNW+kouSovDHzG EJgg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1701264176; x=1701868976; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=4TjEg2HvGQeoausXFkvYKgkgDLti5NyQehvAtnGer54=; b=mZYpnMKDAW1WeLVGH2I/6ohGloBZHhwpQspIluB2iNO6ogBPOKvyf6q+7JEBK+WKNH 5OBWk990EKFzyJ8oEcW7jcNb+TSnUJ3CGHTJsxixWGHmuOnYgkVqjfmmqXN56m1BIN1u 6REU+Bz4NyRBhKTDhw9jbATz01ciqAxQmzs37atNucMiomukiBi+KU9ghEIsRLIjdx17 Z/oAW/0DJoq48onGk35tCDsIYJW0Gkc9GcE6kun13+0GTd3i7hA7brZuNnwID6IyKjD5 O9f0p/crOJmEPRpsf1KAY0cFh+XazqKQVj8Ephe4AskWV+3EmrUX1xdtkLMlJu497Pan 25sQ== X-Gm-Message-State: AOJu0YwKEVSsVc+DkPcqj/JtaXcoiKCoQAVpvCd8dToBalEfdprDH2x+ xpK3ADCED+zsCOgJBPvmcnI+3A== X-Google-Smtp-Source: AGHT+IHFzPydF67lkY02IFVQ51QTFe4qk+uw/ix/kOwXbvKZHQQRGyZnmLYuL/eagTwX/n3ehdO2kA== X-Received: by 2002:a17:906:1009:b0:a0c:c864:8878 with SMTP id 9-20020a170906100900b00a0cc8648878mr11670511ejm.65.1701264176496; Wed, 29 Nov 2023 05:22:56 -0800 (PST) Received: from krzk-bin.. ([178.197.223.109]) by smtp.gmail.com with ESMTPSA id lb16-20020a170907785000b009fda665860csm7844842ejc.22.2023.11.29.05.22.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 05:22:56 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Neil Armstrong Subject: [PATCH 3/5] arm64: dts: qcom: sm8650: add ADSP audio codec macros Date: Wed, 29 Nov 2023 14:22:45 +0100 Message-Id: <20231129132247.63721-4-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> References: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the Low Power Audio SubSystem (LPASS) / ADSP audio codec macros on Qualcomm SM8650. The nodes are very similar to SM8550. Cc: Neil Armstrong Signed-off-by: Krzysztof Kozlowski --- Bindings were documented here: https://lore.kernel.org/linux-devicetree/20231129113014.38837-1-krzysztof.kozlowski@linaro.org/ --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 83 ++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index e926329cf3f9..cf663a18c9f0 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2611,6 +2611,89 @@ IPCC_MPROC_SIGNAL_GLINK_QMP }; }; + lpass_wsa2macro: codec@6aa0000 { + compatible = "qcom,sm8650-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro"; + reg = <0 0x06aa0000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names = "mclk", "macro", "dcodec", "fsgen"; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA2_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>; + + #clock-cells = <0>; + clock-output-names = "wsa2-mclk"; + #sound-dai-cells = <1>; + }; + + lpass_rxmacro: codec@6ac0000 { + compatible = "qcom,sm8650-lpass-rx-macro", "qcom,sm8550-lpass-rx-macro"; + reg = <0 0x06ac0000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names = "mclk", "macro", "dcodec", "fsgen"; + + assigned-clocks = <&q6prmcc LPASS_CLK_ID_RX_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>; + + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + }; + + lpass_txmacro: codec@6ae0000 { + compatible = "qcom,sm8650-lpass-tx-macro", "qcom,sm8550-lpass-tx-macro"; + reg = <0 0x06ae0000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names = "mclk", "macro", "dcodec", "fsgen"; + assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + + assigned-clock-rates = <19200000>; + + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + }; + + lpass_wsamacro: codec@6b00000 { + compatible = "qcom,sm8650-lpass-wsa-macro", "qcom,sm8550-lpass-wsa-macro"; + reg = <0 0x06b00000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&lpass_vamacro>; + clock-names = "mclk", "macro", "dcodec", "fsgen"; + + assigned-clocks = <&q6prmcc LPASS_CLK_ID_WSA_CORE_TX_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>; + + #clock-cells = <0>; + clock-output-names = "mclk"; + #sound-dai-cells = <1>; + }; + + lpass_vamacro: codec@6d44000 { + compatible = "qcom,sm8650-lpass-va-macro", "qcom,sm8550-lpass-va-macro"; + reg = <0 0x06d44000 0 0x1000>; + clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_MACRO_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>, + <&q6prmcc LPASS_HW_DCODEC_VOTE LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + clock-names = "mclk", "macro", "dcodec"; + + assigned-clocks = <&q6prmcc LPASS_CLK_ID_TX_CORE_MCLK LPASS_CLK_ATTRIBUTE_COUPLE_NO>; + assigned-clock-rates = <19200000>; + + #clock-cells = <0>; + clock-output-names = "fsgen"; + #sound-dai-cells = <1>; + }; + lpass_tlmm: pinctrl@6e80000 { compatible = "qcom,sm8650-lpass-lpi-pinctrl"; reg = <0 0x06e80000 0 0x20000>; From patchwork Wed Nov 29 13:22:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 748776 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NovxcUhD" Received: from mail-ej1-x634.google.com (mail-ej1-x634.google.com [IPv6:2a00:1450:4864:20::634]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0EDE41990 for ; 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([178.197.223.109]) by smtp.gmail.com with ESMTPSA id lb16-20020a170907785000b009fda665860csm7844842ejc.22.2023.11.29.05.22.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 05:22:58 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Neil Armstrong Subject: [PATCH 4/5] arm64: dts: qcom: sm8650: add Soundwire controllers Date: Wed, 29 Nov 2023 14:22:46 +0100 Message-Id: <20231129132247.63721-5-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> References: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add nodes for LPASS Soundwire v2.0.0 controllers. Use labels with indices matching downstream DTS, to make any comparisons easier. Cc: Neil Armstrong Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8650.dtsi | 226 +++++++++++++++++++++++++++ 1 file changed, 226 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi index cf663a18c9f0..148118e3fb0a 100644 --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi @@ -2627,6 +2627,36 @@ lpass_wsa2macro: codec@6aa0000 { #sound-dai-cells = <1>; }; + swr3: soundwire@6ab0000 { + compatible = "qcom,soundwire-v2.0.0"; + reg = <0 0x06ab0000 0 0x10000>; + interrupts = ; + clocks = <&lpass_wsa2macro>; + clock-names = "iface"; + label = "WSA2"; + + pinctrl-names = "default"; + pinctrl-0 = <&wsa2_swr_active>; + + qcom,din-ports = <4>; + qcom,dout-ports = <9>; + + qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>; + qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>; + qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + + #address-cells = <2>; + #size-cells = <0>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + lpass_rxmacro: codec@6ac0000 { compatible = "qcom,sm8650-lpass-rx-macro", "qcom,sm8550-lpass-rx-macro"; reg = <0 0x06ac0000 0 0x1000>; @@ -2644,6 +2674,36 @@ lpass_rxmacro: codec@6ac0000 { #sound-dai-cells = <1>; }; + swr1: soundwire@6ad0000 { + compatible = "qcom,soundwire-v2.0.0"; + reg = <0 0x06ad0000 0 0x10000>; + interrupts = ; + clocks = <&lpass_rxmacro>; + clock-names = "iface"; + label = "RX"; + + pinctrl-names = "default"; + pinctrl-0 = <&rx_swr_active>; + + qcom,din-ports = <0>; + qcom,dout-ports = <11>; + + qcom,ports-sinterval = /bits/ 16 <0x03 0x1f 0x1f 0x07 0x03 0xff 0xff 0x31 0xff 0xff 0xff>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x0b 0x09 0x01 0xff 0xff 0x00 0xff 0xff 0xff>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x0b 0x00 0x00 0xff 0xff 0x00 0xff 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0x03 0xff 0xff 0xff 0xff 0xff 0x00 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0x06 0xff 0xff 0xff 0xff 0xff 0x0f 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0x01 0x07 0x04 0xff 0xff 0xff 0xff 0x18 0xff 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0x00 0x01 0xff 0xff 0xff 0xff 0x01 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0x01 0x03 0xff 0xff 0x00 0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x00 0x00 0x00 0x00 0xff 0xff 0x01 0xff 0xff 0xff>; + + #address-cells = <2>; + #size-cells = <0>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + lpass_txmacro: codec@6ae0000 { compatible = "qcom,sm8650-lpass-tx-macro", "qcom,sm8550-lpass-tx-macro"; reg = <0 0x06ae0000 0 0x1000>; @@ -2678,6 +2738,68 @@ lpass_wsamacro: codec@6b00000 { #sound-dai-cells = <1>; }; + swr0: soundwire@6b10000 { + compatible = "qcom,soundwire-v2.0.0"; + reg = <0 0x06b10000 0 0x10000>; + interrupts = ; + clocks = <&lpass_wsamacro>; + clock-names = "iface"; + label = "WSA"; + + pinctrl-names = "default"; + pinctrl-0 = <&wsa_swr_active>; + + qcom,din-ports = <4>; + qcom,dout-ports = <9>; + + qcom,ports-sinterval = /bits/ 16 <0x07 0x1f 0x3f 0x07 0x1f 0x3f 0x18f 0xff 0xff 0x0f 0x0f 0xff 0x31f>; + qcom,ports-offset1 = /bits/ 8 <0x01 0x03 0x05 0x02 0x04 0x15 0x00 0xff 0xff 0x06 0x0d 0xff 0x00>; + qcom,ports-offset2 = /bits/ 8 <0xff 0x07 0x1f 0xff 0x07 0x1f 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x0f>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0x08 0xff 0xff 0xff 0xff 0xff 0x18>; + qcom,ports-block-pack-mode = /bits/ 8 <0x00 0x01 0x01 0x00 0x01 0x01 0x00 0x00 0x00 0x01 0x01 0x00 0x00>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff>; + + #address-cells = <2>; + #size-cells = <0>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + + swr2: soundwire@6d30000 { + compatible = "qcom,soundwire-v2.0.0"; + reg = <0 0x06d30000 0 0x10000>; + interrupts = , + ; + interrupt-names = "core", "wakeup"; + clocks = <&lpass_txmacro>; + clock-names = "iface"; + label = "TX"; + + pinctrl-names = "default"; + pinctrl-0 = <&tx_swr_active>; + + qcom,din-ports = <4>; + qcom,dout-ports = <0>; + + qcom,ports-sinterval-low = /bits/ 8 <0x01 0x01 0x03 0x03>; + qcom,ports-offset1 = /bits/ 8 <0x00 0x00 0x01 0x01>; + qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x00 0x00>; + qcom,ports-hstart = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-hstop = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-word-length = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-block-pack-mode = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-block-group-count = /bits/ 8 <0xff 0xff 0xff 0xff>; + qcom,ports-lane-control = /bits/ 8 <0x01 0x02 0x00 0x00>; + + #address-cells = <2>; + #size-cells = <0>; + #sound-dai-cells = <1>; + status = "disabled"; + }; + lpass_vamacro: codec@6d44000 { compatible = "qcom,sm8650-lpass-va-macro", "qcom,sm8550-lpass-va-macro"; reg = <0 0x06d44000 0 0x1000>; @@ -2705,6 +2827,110 @@ lpass_tlmm: pinctrl@6e80000 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&lpass_tlmm 0 0 23>; + + tx_swr_active: tx-swr-active-state { + clk-pins { + pins = "gpio0"; + function = "swr_tx_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio1", "gpio2", "gpio14"; + function = "swr_tx_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + rx_swr_active: rx-swr-active-state { + clk-pins { + pins = "gpio3"; + function = "swr_rx_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio4", "gpio5"; + function = "swr_rx_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + dmic01_default: dmic01-default-state { + clk-pins { + pins = "gpio6"; + function = "dmic1_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio7"; + function = "dmic1_data"; + drive-strength = <8>; + input-enable; + }; + }; + + dmic02_default: dmic02-default-state { + clk-pins { + pins = "gpio8"; + function = "dmic2_clk"; + drive-strength = <8>; + output-high; + }; + + data-pins { + pins = "gpio9"; + function = "dmic2_data"; + drive-strength = <8>; + input-enable; + }; + }; + + wsa_swr_active: wsa-swr-active-state { + clk-pins { + pins = "gpio10"; + function = "wsa_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio11"; + function = "wsa_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; + + wsa2_swr_active: wsa2-swr-active-state { + clk-pins { + pins = "gpio15"; + function = "wsa2_swr_clk"; + drive-strength = <2>; + slew-rate = <1>; + bias-disable; + }; + + data-pins { + pins = "gpio16"; + function = "wsa2_swr_data"; + drive-strength = <2>; + slew-rate = <1>; + bias-bus-hold; + }; + }; }; lpass_lpiaon_noc: interconnect@7400000 { From patchwork Wed Nov 29 13:22:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Krzysztof Kozlowski X-Patchwork-Id: 748289 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="MRvnUbey" Received: from mail-ed1-x52e.google.com (mail-ed1-x52e.google.com [IPv6:2a00:1450:4864:20::52e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DC70E19AB for ; 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([178.197.223.109]) by smtp.gmail.com with ESMTPSA id lb16-20020a170907785000b009fda665860csm7844842ejc.22.2023.11.29.05.22.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Nov 2023 05:22:59 -0800 (PST) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski , Neil Armstrong Subject: [PATCH 5/5] arm64: dts: qcom: sm8650-mtp: add WSA8845 speakers Date: Wed, 29 Nov 2023 14:22:47 +0100 Message-Id: <20231129132247.63721-6-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> References: <20231129132247.63721-1-krzysztof.kozlowski@linaro.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add nodes for WSA8845 speakers on SM8650 MTP board. Cc: Neil Armstrong Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/sm8650-mtp.dts | 48 +++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts index 656cdbc6f234..a0cd66e5cb93 100644 --- a/arch/arm64/boot/dts/qcom/sm8650-mtp.dts +++ b/arch/arm64/boot/dts/qcom/sm8650-mtp.dts @@ -434,6 +434,16 @@ &dispcc { status = "okay"; }; +&lpass_tlmm { + spkr_1_sd_n_active: spkr-1-sd-n-active-state { + pins = "gpio21"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-low; + }; +}; + &mdss { status = "okay"; }; @@ -580,6 +590,36 @@ &sleep_clk { clock-frequency = <32000>; }; +&swr0 { + status = "okay"; + + /* WSA8845, Speaker Left */ + left_spkr: speaker@0,0 { + compatible = "sdw20217020400"; + reg = <0 0>; + pinctrl-names = "default"; + pinctrl-0 = <&spkr_1_sd_n_active>; + powerdown-gpios = <&lpass_tlmm 21 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + sound-name-prefix = "SpkrLeft"; + vdd-1p8-supply = <&vreg_l15b_1p8>; + vdd-io-supply = <&vreg_l3c_1p2>; + }; + + /* WSA8845, Speaker Right */ + right_spkr: speaker@0,1 { + compatible = "sdw20217020400"; + reg = <0 1>; + pinctrl-names = "default"; + pinctrl-0 = <&spkr_2_sd_n_active>; + powerdown-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>; + #sound-dai-cells = <0>; + sound-name-prefix = "SpkrRight"; + vdd-1p8-supply = <&vreg_l15b_1p8>; + vdd-io-supply = <&vreg_l3c_1p2>; + }; +}; + &tlmm { /* Reserved I/Os for NFC */ gpio-reserved-ranges = <32 8>; @@ -611,6 +651,14 @@ mdp_vsync_suspend: mdp-vsync-suspend-state { drive-strength = <2>; bias-pull-down; }; + + spkr_2_sd_n_active: spkr-2-sd-n-active-state { + pins = "gpio77"; + function = "gpio"; + drive-strength = <16>; + bias-disable; + output-low; + }; }; &uart15 {