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Wysocki" , Rob Herring , Thierry Reding Subject: [PATCH 02/10] iommmu/of: Do not return struct iommu_ops from of_iommu_configure() Date: Tue, 28 Nov 2023 20:47:58 -0400 Message-ID: <2-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> In-Reply-To: <0-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> References: X-ClientProxiedBy: SN6PR05CA0011.namprd05.prod.outlook.com (2603:10b6:805:de::24) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|MW5PR12MB5649:EE_ X-MS-Office365-Filtering-Correlation-Id: f92f5945-2a58-42a8-3f7e-08dbf074dba1 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: TNU9Nc56M2GNSx5gMKa29y+BfTLeDaly8sgITbBvzSpGEBDJe5eq8lzPCfHyXxcq6NJDqe65T9ORTGJk2YqZ6yftHOEUxf1VfnpIY+zlcqQQrfh21WZoYQUN8WnsaMyxT8fZ78CoxlZSQfTGf4rhnJbpOwLqhfXYWL3v+r/uY/+iuCzPFDNUh425G9VbCmy2exEdVmSvwIK6u1206aJohk8j5CB3hAPrvdzaT2enZiSAUfhFKyZhGLTSwil9YNPN4vZSzHqjP6PJs+sCFRxsUD6qaaC1okRY8GhsUXgjR20J6vAPf7MwQXcpVWZVc78JJLazleeq2UYakWciUkfE2QwCZ6mKxsp+IL2OE+zW66FZTQoZ34g6tMeDIUo1Xn8fv8idQajNfI/MDlMmUHAw96Tp7LKAGZBInxkEuBm/IfXtJQZXgwnlHOZjN9FxAN8qyw2wwJyBZZG0DICuJI+RppHGp6MvJZkrpReY2Fg+xqu8QO9T29oD9dr/RTdYje9GOVldRy1WP68nJKvo5JSiSOokusrVGegR+DxFUR8Vvn3G4S5ImwPGAKjNCxACqYeSkat7mVS49GsNfce0gBAkkCg9NvWXj42KzEQFddiVekIzqxF5ZHQoLnBO6deFXa5Y X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(39860400002)(396003)(366004)(376002)(346002)(230922051799003)(186009)(1800799012)(64100799003)(451199024)(5660300002)(7416002)(7366002)(7406005)(41300700001)(4326008)(8936002)(8676002)(2906002)(110136005)(316002)(66556008)(66476007)(54906003)(66946007)(2616005)(921008)(6486002)(478600001)(36756003)(6512007)(6506007)(26005)(6666004)(83380400001)(86362001)(38100700002)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: QoXaJEos8zrhw+/KQMgsmJKOnnICyEY91C1GucNa0r6H1Jhsg3+YfO7wgaISu1H9/I516jNBl9qtJ/SrhfUh+kVf1HVn3FI8yrIwqdMSZLjFAkKZI5Xzub21E/DEFZlyq99Me+LFQtD23UHwnMxFEYQMD2FyJLey7esF8XYYazr98KIwBpsMrHFO8pAVXiWmJKANNvkPoUUITODp1tZXej9unuEFZs7WlZUZI0wHan1hZZB+Y1VyTua1K+FmiMygWhlvvWqeDC2k3KjvJEqBjsZmUDgI2QNB1Qdx7veUChTOYh4RxwYdFxvVyouB3I5YO29D4/R06OhH/SQkpq1FI2FiRorXlBQNcG/+Di8hIxDfBNjpUyGr8OZOXx6oiEq04OzNP4juNWiXDVy70Ii0Tytxza5fX/oOfDdkGG/GXtEfFJpEkkdoxZJZvcN5ZKlsTxtG0rrSnUP0P9x3WYKdlNPXosbTqKz9zrZ6rhC+nkvYiys7Zygb+NRMTe6u9cl8iCd8ZlXjcHMfa4w/kCihj6eyOkNTYWwF0I5+9nl12sOAxhm/Hzyo31jGYhY4H+VPKZuLfXmP1yOBiUh2XTe5rfOIWNsmbTml7kEMJdGVH9v16QoPGmOp2k8+MiDtPH2qvctYQtKOElsu5W9N0jCdBeocZNEV6P6RTXjLRRVLVQPP14qDZ8uJVXep7bv3iyuFawG4Bs5rxHootK61nNC2qE17yXVVk/AewIGGWS2YvsaLMvjU9o9tmuNBL8SBWQ29ui1jeJCWc0TgDAmYVA3fLX+NgqyRftlo+3dC24h0H/Sp/uG+TYjwqnn3LgkFQRzkT+Jrn3zJ5oYk3OldORi/+X4f8lOpSe7DR/Jn7Yp/dAaXisMMRpTTrLuGOwCCx7Fti7pgoludFMPYGKDsHanqCkqD6nRiYTzrM3000vLzhw8gWG183Yalt2r0aotUhG9WRbA8qDckrrDNSmuSbS/vphIWS2DsQAJBPygAg2nQuvE8kGbAbn8ZI4rr/53TKcJjne9zBIcee+H1spt3G4KIGjRdfEjQ0E33giSfuTgKXsEfm+MTnnq+To157aCvp7qtYS0xdunvcGCPWaYQH5bWhKVvRA3UW3OUKabwDplgG9Nk3hJF+xPQy7HBAA8ac8hfGGXeh7Unx+AggXMLX8cpbIKLRyKT3sfgmAewealgZRqscn7lF2A1ez9aKJTe5OAOhgucMFhL8UmxaipZmnVyiFRilyx/jkQhRvGXWIJgNPnn3SbeiKKZZA+XXKOe8c1lqa6cOM3sfm19y6/hqTHLccHIWPMPJuv+rPY3d3olqgTJBKw2yc1OJeXVohsHyAyEA1ynB+ivdNV0YrDebzcjO0lPLsF+G8RbNoxxyacQZIK0pZY3whlVXlwlYHIXxq472Gm6Je3iWKUz+daILd+F25QtUN5z2gQomMFJwSMCENEbGg/CgC7aUQrr5Z+95mhbIN05hvPqlv0/R05XdNS2/jUr3KR06M+51JhRB2569kQtSqwz/cvYL+ikokBgC6YBwWQMcrQ5NoElSVcFyyNGPk26uAHlJEU7MUZEwkNYS1MQcpyxbA2iGbFDoiSi4uaZ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: f92f5945-2a58-42a8-3f7e-08dbf074dba1 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Nov 2023 00:48:09.6197 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dyh/uRIgbBig3OtDbjljalNXcPjxXk2zIhbwrInbAOFSs91usD860fVYGvBVSsdo X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5649 Nothing needs this pointer. Return a normal error code with the usual IOMMU semantic that ENODEV means 'there is no IOMMU driver'. Reviewed-by: Jerry Snitselaar Acked-by: Rob Herring Tested-by: Hector Martin Signed-off-by: Jason Gunthorpe --- drivers/iommu/of_iommu.c | 31 +++++++++++++++++++------------ drivers/of/device.c | 22 +++++++++++++++------- include/linux/of_iommu.h | 13 ++++++------- 3 files changed, 40 insertions(+), 26 deletions(-) diff --git a/drivers/iommu/of_iommu.c b/drivers/iommu/of_iommu.c index 5ecca53847d325..c6510d7e7b241b 100644 --- a/drivers/iommu/of_iommu.c +++ b/drivers/iommu/of_iommu.c @@ -107,16 +107,22 @@ static int of_iommu_configure_device(struct device_node *master_np, of_iommu_configure_dev(master_np, dev); } -const struct iommu_ops *of_iommu_configure(struct device *dev, - struct device_node *master_np, - const u32 *id) +/* + * Returns: + * 0 on success, an iommu was configured + * -ENODEV if the device does not have any IOMMU + * -EPROBEDEFER if probing should be tried again + * -errno fatal errors + */ +int of_iommu_configure(struct device *dev, struct device_node *master_np, + const u32 *id) { const struct iommu_ops *ops = NULL; struct iommu_fwspec *fwspec; int err = NO_IOMMU; if (!master_np) - return NULL; + return -ENODEV; /* Serialise to make dev->iommu stable under our potential fwspec */ mutex_lock(&iommu_probe_device_lock); @@ -124,7 +130,7 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, if (fwspec) { if (fwspec->ops) { mutex_unlock(&iommu_probe_device_lock); - return fwspec->ops; + return 0; } /* In the deferred case, start again from scratch */ iommu_fwspec_free(dev); @@ -169,14 +175,15 @@ const struct iommu_ops *of_iommu_configure(struct device *dev, err = iommu_probe_device(dev); /* Ignore all other errors apart from EPROBE_DEFER */ - if (err == -EPROBE_DEFER) { - ops = ERR_PTR(err); - } else if (err < 0) { - dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); - ops = NULL; + if (err < 0) { + if (err == -EPROBE_DEFER) + return err; + dev_dbg(dev, "Adding to IOMMU failed: %pe\n", ERR_PTR(err)); + return err; } - - return ops; + if (!ops) + return -ENODEV; + return 0; } static enum iommu_resv_type __maybe_unused diff --git a/drivers/of/device.c b/drivers/of/device.c index 65c71be71a8d45..873d933e8e6d1d 100644 --- a/drivers/of/device.c +++ b/drivers/of/device.c @@ -93,12 +93,12 @@ of_dma_set_restricted_buffer(struct device *dev, struct device_node *np) int of_dma_configure_id(struct device *dev, struct device_node *np, bool force_dma, const u32 *id) { - const struct iommu_ops *iommu; const struct bus_dma_region *map = NULL; struct device_node *bus_np; u64 dma_start = 0; u64 mask, end, size = 0; bool coherent; + int iommu_ret; int ret; if (np == dev->of_node) @@ -181,21 +181,29 @@ int of_dma_configure_id(struct device *dev, struct device_node *np, dev_dbg(dev, "device is%sdma coherent\n", coherent ? " " : " not "); - iommu = of_iommu_configure(dev, np, id); - if (PTR_ERR(iommu) == -EPROBE_DEFER) { + iommu_ret = of_iommu_configure(dev, np, id); + if (iommu_ret == -EPROBE_DEFER) { /* Don't touch range map if it wasn't set from a valid dma-ranges */ if (!ret) dev->dma_range_map = NULL; kfree(map); return -EPROBE_DEFER; - } + } else if (iommu_ret == -ENODEV) { + dev_dbg(dev, "device is not behind an iommu\n"); + } else if (iommu_ret) { + dev_err(dev, "iommu configuration for device failed with %pe\n", + ERR_PTR(iommu_ret)); - dev_dbg(dev, "device is%sbehind an iommu\n", - iommu ? " " : " not "); + /* + * Historically this routine doesn't fail driver probing + * due to errors in of_iommu_configure() + */ + } else + dev_dbg(dev, "device is behind an iommu\n"); arch_setup_dma_ops(dev, dma_start, size, coherent); - if (!iommu) + if (iommu_ret) of_dma_set_restricted_buffer(dev, np); return 0; diff --git a/include/linux/of_iommu.h b/include/linux/of_iommu.h index 9a5e6b410dd2fb..e61cbbe12dac6f 100644 --- a/include/linux/of_iommu.h +++ b/include/linux/of_iommu.h @@ -8,20 +8,19 @@ struct iommu_ops; #ifdef CONFIG_OF_IOMMU -extern const struct iommu_ops *of_iommu_configure(struct device *dev, - struct device_node *master_np, - const u32 *id); +extern int of_iommu_configure(struct device *dev, struct device_node *master_np, + const u32 *id); extern void of_iommu_get_resv_regions(struct device *dev, struct list_head *list); #else -static inline const struct iommu_ops *of_iommu_configure(struct device *dev, - struct device_node *master_np, - const u32 *id) +static inline int of_iommu_configure(struct device *dev, + struct device_node *master_np, + const u32 *id) { - return NULL; + return -ENODEV; } static inline void of_iommu_get_resv_regions(struct device *dev, From patchwork Wed Nov 29 00:48:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 748816 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Ag0rU854" Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2055.outbound.protection.outlook.com [40.107.92.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C91D119A6; Tue, 28 Nov 2023 16:48:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=epFQZzGvPg20YK61GY/0NW1+KQ+3x4jg5XKP2mEQpMkCxpbyKutrvaeeT0U3nfr975MCPuVDIfxMgBTKl1ZmtTqifkU5drUFNFTljzLATJgakhwyE9HMBH7LWLLsoOcXmIz9OJLh+kQbHbbBSptWPxX8g3b/u2Z/5/k7urxV1Ov2cl2Ie7U6IVGwZRh1AJtR1Oq5ocPHvIjR355/2/skKDOBZm09ltiv0w9X752dIrfkc3jxzenFm0tWerOaNVkliExtqLeZWB66SQrMh2CTK7AYlYzAHsDeGqKsOJvLVUHWhHDn37YMaHQKVKH0V/VGT2UtO82n+7nUYv3Bq2f4ag== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=GPakWZHYvHors5WFXL2bapVjFF3wl8GrN0XWXN4rPVI=; b=aALj6puZVU5xzPw6otZHvyUs9JNxdMLzTcHc3FSaEmUCKi5yHZLKrp6aG8EfKMev9XftiSye5FnXZU2PTkalIZtP6ig6EOsuhFFe/70DwMdJTo6jijYuhDC3AKAWQq4jviN64Uz+wMg96L7L/pgjashsDgV1nKj9dhZ1a56J0C1PcdHSsiRaXo6BJlb2MYGtlsJdS9kimNf2Stb3gaZcQasFztIDbNNodRgrK9lit4w6+pze3Ob1NdXG6y3zP9e60QlmzgEG10LGX4ithFdq4qIr8VoPa3c2SEh/jE/Ep1DbQNqV8ukEDOgtpzaJFtZGxoOE1HskXy06ZcuPmePamw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nvidia.com; dmarc=pass action=none header.from=nvidia.com; dkim=pass header.d=nvidia.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=GPakWZHYvHors5WFXL2bapVjFF3wl8GrN0XWXN4rPVI=; b=Ag0rU854tJH60xOPDaD/u5zg9CfPodJc4i5mTPa5gBLmnYjeJlhMPF+mTTtgrQAG23NbPDE9oAXIqsU40xoQx9HOcGQGsNO7M2l2MJgP/E+LdEiI0tbStUdOrL82AJPtfA717QBwbIe6TlnCvqt6F5L0p0TazbQko9kZ3MOZ3RsCV1mfBVejksBgYtUPIqfr2nqIzUbA6rrIxyEI2gaMkRfycVLg3X6eDPjkUfQ/lrM3p5abYb06S0daViUsWjRumaAPFB0xzSMNS00ZgXqmW2z0f27dRFq4wF7xroYgSg10/Uwb3YKpWH9Fi+L05kyZyzbOPMuzSMiNoCIx/4HZmw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nvidia.com; Received: from LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) by MW5PR12MB5649.namprd12.prod.outlook.com (2603:10b6:303:19d::13) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.7046.22; Wed, 29 Nov 2023 00:48:10 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93%4]) with mapi id 15.20.7025.022; Wed, 29 Nov 2023 00:48:10 +0000 From: Jason Gunthorpe To: David Airlie , Alyssa Rosenzweig , Albert Ou , asahi@lists.linux.dev, Catalin Marinas , Danilo Krummrich , Daniel Vetter , Dexuan Cui , devicetree@vger.kernel.org, dmaengine@vger.kernel.org, dri-devel@lists.freedesktop.org, David Woodhouse , Frank Rowand , Hanjun Guo , Haiyang Zhang , iommu@lists.linux.dev, Jon Hunter , Joerg Roedel , Karol Herbst , Krzysztof Kozlowski , "K. Y. Srinivasan" , Laxman Dewangan , Len Brown , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, linux-snps-arc@lists.infradead.org, linux-tegra@vger.kernel.org, Russell King , Lorenzo Pieralisi , Lyude Paul , Marek Szyprowski , nouveau@lists.freedesktop.org, Palmer Dabbelt , Paul Walmsley , "Rafael J. Wysocki" , Rob Herring , Robin Murphy , Sudeep Holla , Suravee Suthikulpanit , Sven Peter , Thomas Bogendoerfer , Vineet Gupta , Vinod Koul , Wei Liu , Will Deacon Cc: Lu Baolu , Christoph Hellwig , Jerry Snitselaar , Hector Martin , Moritz Fischer , patches@lists.linux.dev, "Rafael J. Wysocki" , Rob Herring , Thierry Reding Subject: [PATCH 05/10] iommu: Mark dev_iommu_priv_set() with a lockdep Date: Tue, 28 Nov 2023 20:48:01 -0400 Message-ID: <5-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> In-Reply-To: <0-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> References: X-ClientProxiedBy: SA9P223CA0008.NAMP223.PROD.OUTLOOK.COM (2603:10b6:806:26::13) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|MW5PR12MB5649:EE_ X-MS-Office365-Filtering-Correlation-Id: e88e5898-d817-4847-c6f3-08dbf074da91 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: rgANoarTBWKnyjqZqIYXEl2mPTVN+nMaMwCAU1TyUvtAj1jv6+jBXL1mJK1VcTwp5KhZsUCdmaBY+Tzo7S64zoTwsOKhRs9qwfiS5LDCTL522D/7IFCgy2SYIqC+2SfCzmXDltCHaikpWh/9EHiMQY7wZ8D4EjIcWraeyxIVPiSjJWLjj1JKjjyAsFoKiZ9imoR35JzlNujG1eZfhc5c2N13iuNyBUiGugNkw9KWKcMEZMx1LTM83FUVWe6NgUFMXEkQzfeEKGs4uBujftG+kki3i+N7LObsANvyZe91c8q0CDt4ebS6bRmNFC29JznHovWHfhdR78RNypvGcx3wWiHgbMsA0/Umz5zi1R/hl50XgNFFdossmRmz47OU48KdW+HXWaKK0xbl7IJ13SJIspNzkLHMNI3+V01XLnkC6T70lPWT4lfrCDpdJOGUVHyhR7KCfchXHGQA4XNVMIaHl5IkGoX4x1nvEvuXdtAAF/3pAKewIvk/8zp8GCCjQFyei9ms966aOqn5oEwpsIR2dTvmX/z2QKJKfWBjOla/Mw0bhPu/AOugxKTR37AFP4yunhb7JOvMdmme9VDJIHh39fgmzH32oAiDvFNZtds/Vc3RD2KSOWldv7XbqiuyI2yS X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(39860400002)(396003)(366004)(376002)(346002)(230922051799003)(186009)(1800799012)(64100799003)(451199024)(5660300002)(7416002)(7366002)(7406005)(41300700001)(4326008)(8936002)(8676002)(2906002)(110136005)(316002)(66556008)(66476007)(54906003)(66946007)(2616005)(921008)(6486002)(478600001)(36756003)(6512007)(6506007)(26005)(6666004)(83380400001)(86362001)(38100700002)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: OPVIl6+Au+z4F37cddz/VvvSeyIpE8y1PwNznFfquIdqbCyBGLElTq9XlzXphqQiLa5jZz8as0mKlle0zqRdAtiMZD/7GK571yeTzwLmaPToVECPC6tBbIXIOJPOZYJcIHxjx089BswJUoUgI9/kkRgX1SDCg0ca1b1ElxYajE1WGQjYvt0UkRQRS/5eJZvhE66Wi4akv+DryqYPp9vWghx/YbuAC1G5DJSWJmdh93lFqfxRjMH+xU4NQ70cm+WytpS5+3M5+Rh1KQZOwQ3tCbtlAA0PrdPTBDYX+8sWzPGUnygIvA2UK3Ny1fRjgaCyJ2lGSZ2SvxHUDMZEKnMX33zXIA90y/GcVJjFt76XVkjZqRBZCL53b0z3xGu3CFtqA1v1s4r7hoQJXPS6+39c2Hj4hMdAD1j7vj7aMTBuYfHBjBiZpN1j0V3XUTaQthyH35n167qFkHjShYFO+vyz/K1g4KclAEUKOCVJQGsbkLGI1NhXvDXRgQg7buM9c7bsK/5K2qT1jdOE7nKnavuAuOTJJAw+QAJ22nifjE2McOKRdajBQA16GBn57eEfEKz9plV4TloPSZFhc8f1ZeTHdae0fU2IAMPY9sbWV8MBb6HdFj/cBBYWNzIrBmPOMByD8fO0fyrj7kvR1N25oxp9+/id6MDYvgEkdOXOCWIBUFdi1iL2i2BtMHidNC8H7h+H7QPSlV9APNlvqRvxPyjPZaKVPIFfpuumj2RA4FBpc6ON5fllQsV0pBW/2lF+CIGDn4Zi9nHOr/zwqSUB7xw+yT2q2tioBruXQGkPGhs95g0OkPgxsIom0C9g0PIUP9Xa2TcQrNILZRFODl0d0KyoBJ3UgB5bKWhk3ZYnvYUMw+UX39AmKi6BXYipq/ltVsliZ8+JfkX0UFXRgWQTYPZUUwFY9jW6wxS1+hbg0lIposKnhBsr8g+HYvJayUxpRP737hxIApajsx/5FbEpcd7dFpOm96TwNvjqVTlz2ijwO1B3jZa98zMmVLAwPHOcD9j8VGxpuwXobuGSdContI0WsSD0ieK1C/pBDU/a+q/wMYN2ZQhqNZXC3ZGAFEKfVOOuOkZPO7Tq+nGD/V9OSrv29j6Dlmhx/2RhcHmmvLNIn+2O7Ea+T3KqhmjS52EZkVPi5XJA4ogriXcke49GD0/Qf2l2yobXtX1D5xSfKdESO7ZK/Mlng/ER1BT2XYTfZDmlC2FYx4SmJeYwioONjUbTK7lE7zbhxf7RAA4vgKC3++KavVeLh9y4AjP/EjH3Bcy0QONJrMqGxYsnUzlrMTpuCSXhlDe2MoarJr0QHzftZTSnLEIDLu36TShF8CGp+3yoUp0h7DhauVoPECAWDX35FrHJTT75EHWej/Yus+WxfhiIcQZYKe1b032ivpPp5HDiX0bqWKwMYgUVeyUlHJN6zXiyUlWV5zYgM06Pvu0NghhAVediQUr6UZSbhri7GJn8/i7GhiU9yssG1TAuQlyjNp764fcrTLWeyXrNTSlpK+H8uV5Aqfi6+MbNcp8bb/GV4SYZ178WTtJuxf7AeoSrSldEsf3D2L8Qr1Y1VRBQQz2YGF6jnYrMjGq1aD0XtrjT X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: e88e5898-d817-4847-c6f3-08dbf074da91 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Nov 2023 00:48:07.8059 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: wCLxYnh0Nz04x6MvAHftLs2Aq4/fyuwGZWn/kVmvb8d2fHv5lLYPqJ8YE50aJedN X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5649 A perfect driver would only call dev_iommu_priv_set() from its probe callback. We've made it functionally correct to call it from the of_xlate by adding a lock around that call. lockdep assert that iommu_probe_device_lock is held to discourage misuse. Exclude PPC kernels with CONFIG_FSL_PAMU turned on because FSL_PAMU uses a global static for its priv and abuses priv for its domain. Remove the pointless stores of NULL, all these are on paths where the core code will free dev->iommu after the op returns. Reviewed-by: Lu Baolu Reviewed-by: Jerry Snitselaar Tested-by: Hector Martin Signed-off-by: Jason Gunthorpe --- drivers/iommu/amd/iommu.c | 2 -- drivers/iommu/apple-dart.c | 1 - drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 1 - drivers/iommu/arm/arm-smmu/arm-smmu.c | 1 - drivers/iommu/intel/iommu.c | 2 -- drivers/iommu/iommu.c | 9 +++++++++ drivers/iommu/omap-iommu.c | 1 - include/linux/iommu.h | 5 +---- 8 files changed, 10 insertions(+), 12 deletions(-) diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 9f706436082833..be58644a6fa518 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -551,8 +551,6 @@ static void amd_iommu_uninit_device(struct device *dev) if (dev_data->domain) detach_device(dev); - dev_iommu_priv_set(dev, NULL); - /* * We keep dev_data around for unplugged devices and reuse it when the * device is re-plugged - not doing so would introduce a ton of races. diff --git a/drivers/iommu/apple-dart.c b/drivers/iommu/apple-dart.c index 7438e9c82ba982..25135440b5dd54 100644 --- a/drivers/iommu/apple-dart.c +++ b/drivers/iommu/apple-dart.c @@ -743,7 +743,6 @@ static void apple_dart_release_device(struct device *dev) { struct apple_dart_master_cfg *cfg = dev_iommu_priv_get(dev); - dev_iommu_priv_set(dev, NULL); kfree(cfg); } diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index fc4317c25b6d53..1855d3892b15f8 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2695,7 +2695,6 @@ static struct iommu_device *arm_smmu_probe_device(struct device *dev) err_free_master: kfree(master); - dev_iommu_priv_set(dev, NULL); return ERR_PTR(ret); } diff --git a/drivers/iommu/arm/arm-smmu/arm-smmu.c b/drivers/iommu/arm/arm-smmu/arm-smmu.c index 4d09c004789274..adc7937fd8a3a3 100644 --- a/drivers/iommu/arm/arm-smmu/arm-smmu.c +++ b/drivers/iommu/arm/arm-smmu/arm-smmu.c @@ -1420,7 +1420,6 @@ static void arm_smmu_release_device(struct device *dev) arm_smmu_rpm_put(cfg->smmu); - dev_iommu_priv_set(dev, NULL); kfree(cfg); } diff --git a/drivers/iommu/intel/iommu.c b/drivers/iommu/intel/iommu.c index 897159dba47de4..511589341074f0 100644 --- a/drivers/iommu/intel/iommu.c +++ b/drivers/iommu/intel/iommu.c @@ -4461,7 +4461,6 @@ static struct iommu_device *intel_iommu_probe_device(struct device *dev) ret = intel_pasid_alloc_table(dev); if (ret) { dev_err(dev, "PASID table allocation failed\n"); - dev_iommu_priv_set(dev, NULL); kfree(info); return ERR_PTR(ret); } @@ -4479,7 +4478,6 @@ static void intel_iommu_release_device(struct device *dev) dmar_remove_one_dev_info(dev); intel_pasid_free_table(dev); intel_iommu_debugfs_remove_dev(info); - dev_iommu_priv_set(dev, NULL); kfree(info); set_dma_ops(dev, NULL); } diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 4323b6276e977f..08f29a1dfcd5f8 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -387,6 +387,15 @@ static u32 dev_iommu_get_max_pasids(struct device *dev) return min_t(u32, max_pasids, dev->iommu->iommu_dev->max_pasids); } +void dev_iommu_priv_set(struct device *dev, void *priv) +{ + /* FSL_PAMU does something weird */ + if (!IS_ENABLED(CONFIG_FSL_PAMU)) + lockdep_assert_held(&iommu_probe_device_lock); + dev->iommu->priv = priv; +} +EXPORT_SYMBOL_GPL(dev_iommu_priv_set); + /* * Init the dev->iommu and dev->iommu_group in the struct device and get the * driver probed diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c index c66b070841dd41..c9528065a59afa 100644 --- a/drivers/iommu/omap-iommu.c +++ b/drivers/iommu/omap-iommu.c @@ -1719,7 +1719,6 @@ static void omap_iommu_release_device(struct device *dev) if (!dev->of_node || !arch_data) return; - dev_iommu_priv_set(dev, NULL); kfree(arch_data); } diff --git a/include/linux/iommu.h b/include/linux/iommu.h index c7394b39599c84..c24933a1d0d643 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -840,10 +840,7 @@ static inline void *dev_iommu_priv_get(struct device *dev) return NULL; } -static inline void dev_iommu_priv_set(struct device *dev, void *priv) -{ - dev->iommu->priv = priv; -} +void dev_iommu_priv_set(struct device *dev, void *priv); extern struct mutex iommu_probe_device_lock; int iommu_probe_device(struct device *dev); From patchwork Wed Nov 29 00:48:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 748815 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="N/iXvLmF" Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2055.outbound.protection.outlook.com [40.107.92.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 85D1719A7; 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Wysocki" , Rob Herring , Thierry Reding Subject: [PATCH 06/10] iommu: Replace iommu_device_lock with iommu_probe_device_lock Date: Tue, 28 Nov 2023 20:48:02 -0400 Message-ID: <6-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> In-Reply-To: <0-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> References: X-ClientProxiedBy: SA1P222CA0194.NAMP222.PROD.OUTLOOK.COM (2603:10b6:806:3c4::19) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|MW5PR12MB5649:EE_ X-MS-Office365-Filtering-Correlation-Id: 8536a7a9-4d35-47de-3bfe-08dbf074db6a X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PxS2FBkvXWMjSWU1n2OdknlwkOgcJ7RywKreiC8AoA2LZtZBfPaBb5dp9VlPetsbepLqNtKiBxvcJ66fh5n6DdyHQBMH4LuYs2LhWE/IGP069pqR5CyENlcYk0mK6OBvMWDYio+y1rBDjOTDP/aZLT5OKqA7aEXbsltjdyCdDkIu8H6LC3zz7keZWyFQvsPDd+25kNg3QVB6joZtmWRERyJ8Rfcldm0+8eoJ3aeNa3d29PXBGS2dBRybXWXcm+BascuXafiykoezcReA3BuXHPP/1OItgsmPpU3UloJExGi7sQbFQql588g8VK/GiOwA+5fdXiF4oR2dOZeytz9M4vDgmqp5/0iKUHMOrN/4+O+dxTuX1gCSAQscpAoabbIG+aAprz0qVSW4jGwhsLdEqeX09I2Ny/1Wy5hLE3yGTrboEwcoVlffdmG9brgDePdfr/Gq60sd2CDpz6+W9+EHvONC1DdrsB5Tfzg78w7+BhLlNoJYHYwt5F6c04NbX2Mgv/yEGU+BRE+FxNqq8kmuqWY3ob7+3lVnmqihoMwwDIwggWJd8EfutjV5LLtaMYKUmbmfbBJO6NW03TTcDiGKMlyX2xGSuWN7F/4LkNEEN+ADERFHa9eJNR/jJuxpguay X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(39860400002)(396003)(366004)(376002)(346002)(230922051799003)(186009)(1800799012)(64100799003)(451199024)(5660300002)(7416002)(7366002)(7406005)(41300700001)(4326008)(8936002)(8676002)(2906002)(110136005)(316002)(66556008)(66476007)(54906003)(66946007)(2616005)(921008)(6486002)(478600001)(36756003)(6512007)(6506007)(26005)(6666004)(83380400001)(86362001)(38100700002)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: IFlViVJx6CBLEjamz78Y886lbVHMNJCKbrz+kHHPpM7mbMyJNPnPN5+9TeRdV1FLiH9QbgXDAERDtyRD+q0psUz12S5gxWcVytHIfrDJLg/d4ohepHVHdci26bfM7jf6BvFmisj8Kfn6pdHGN3R1T84bKNT2R9hTxOYZcwjOM6NXTstGgE+iapkuiBvQTHg4aUl7lqOs0KteTIbVe88ATpIeaxDUxWq4TrOKJjSDthqc1Ez4jzHEFbMvE8GmbUcBTW84Z4bxxybXO1oMbup/zCj+Kh+7o3PKLqIHQyXNr+RX0onbE4E8Kw6PE/s/QwscFQVK2NJUfmIpdwLsfRTehXPbB5iAHjoxGSwnddoy5HwMxYmp2FAi9uV68y59ZJNLWXQR6+DlOoxmUAM1BvMKoHyZ3Ft7wxEZAa1gf6EHF2DzUh3c+KP4dvLGG81Jb2f3SS1SzXU0fcgKMowQc6QzQeilpii7bHIkAMr0jwFlRJD7CbLf7fBI1BUXXUs1oFIpHeBi6O/eeeW1J2GfaFI6TUHn/Cvtw9dCeKYUTY9UbjmjSq0dqJpDPNLtuWThJqm2F2THiA3UmmcbUJGeEtaxItdftPcgg+OQBAonmDBbipSmk1bTdBlfPEhbfTd+4hEEm8sI+fi+QfvbZcyO9/l6UFNfUAoHHaKgGbZbklPtjKgORk/lugLB4Texzo9tePQZnrVBDV6wBpEISyfomdWN0u5RC3Fj9FnTxNciCT0fg5qh21nMLnE6JVPkhFmRzk1B7XS1j2e5NAlZL9SbJrJf9QscgJCa1LWfXbs16R5DVz0A7TySHwg21XrJMSI9VUwTjdoo9ZJS/AJ1JnX6twk3/yD2ntFEeSarFtMB4oRbk3kz5XO5GlzeKtDN4Aydp0Aa+0YjPUHTezy1RIPy53j5tFCwFQU1c/8+4uO49CP7SLoe5VhtMIa3L9ASa5x0UX6PiHviAHkOZozdGc3CYm9cAiIELX1FSGFamXragpJD6D38ErBorW7crA6HkEEi8iWsjGZpqYZmtUGJG9idtLLPielsmnWy/HpJkp1wH7kyfJWBAqwW6JA6i6jDHemSSwqgDzWZwIOOQL433feffgk6Pw/Vd811dYKHbldShfigvC58RSqP+10izw2Af7R6DT57nOLR7V/Wjcymf78Jm4G7yoL1KOo+V/Sf8roTtx34yYUMb4aKrXNad30Q5TfvJugGXuprGQVaOe9FQt9o2BXRxIF1Y0N8xHAz6PtV+qgw6NXJTDtN5dGVRBPT/A1nb2kwjugcmEChVDA7Du0+iOT1XuV9VvI/uIeSKPdk3gILJxB5n9aF/RAaRuVujPK0ePgt+ojR40PoffD58io6Fo23nrDRZqh12hS3nEdpCCqWESohmcd+jNN3jLLMNBlV5VUSspAfEH5GIgPu48/jtFxn7HyEMj9z3OoX8IzCj1I5KFlL/otuYmFK3Kt63HjGbgYUGytF4Nem5Y7M2EZaaSLAinZFx1HUOaGCnoR/FLFRl/EAPWFiYJKY1MG9uV+3/Cw5+lg3I68hIgkyXdZZAllzzigwFj1uhZ0IUCVjKDDAFd9eYAJ/vmqWvwz7JBWCK1rO X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 8536a7a9-4d35-47de-3bfe-08dbf074db6a X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Nov 2023 00:48:09.2376 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: vU8nM8hRTqWQk/nZDor+27mpHqRBzU3fNn/Vj2pJuFDohMSLaOPZEvzrbRjxh0aO X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5649 The iommu_device_lock protects the iommu_device_list which is only read by iommu_ops_from_fwnode(). This is now always called under the iommu_probe_device_lock, so we don't need to double lock the linked list. Use the iommu_probe_device_lock on the write side too. Signed-off-by: Jason Gunthorpe --- drivers/iommu/iommu.c | 30 +++++++++++++----------------- 1 file changed, 13 insertions(+), 17 deletions(-) diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c index 08f29a1dfcd5f8..9557c2ec08d915 100644 --- a/drivers/iommu/iommu.c +++ b/drivers/iommu/iommu.c @@ -146,7 +146,6 @@ struct iommu_group_attribute iommu_group_attr_##_name = \ container_of(_kobj, struct iommu_group, kobj) static LIST_HEAD(iommu_device_list); -static DEFINE_SPINLOCK(iommu_device_lock); static const struct bus_type * const iommu_buses[] = { &platform_bus_type, @@ -262,9 +261,9 @@ int iommu_device_register(struct iommu_device *iommu, if (hwdev) iommu->fwnode = dev_fwnode(hwdev); - spin_lock(&iommu_device_lock); + mutex_lock(&iommu_probe_device_lock); list_add_tail(&iommu->list, &iommu_device_list); - spin_unlock(&iommu_device_lock); + mutex_unlock(&iommu_probe_device_lock); for (int i = 0; i < ARRAY_SIZE(iommu_buses) && !err; i++) err = bus_iommu_probe(iommu_buses[i]); @@ -279,9 +278,9 @@ void iommu_device_unregister(struct iommu_device *iommu) for (int i = 0; i < ARRAY_SIZE(iommu_buses); i++) bus_for_each_dev(iommu_buses[i], NULL, iommu, remove_iommu_group); - spin_lock(&iommu_device_lock); + mutex_lock(&iommu_probe_device_lock); list_del(&iommu->list); - spin_unlock(&iommu_device_lock); + mutex_unlock(&iommu_probe_device_lock); /* Pairs with the alloc in generic_single_device_group() */ iommu_group_put(iommu->singleton_group); @@ -316,9 +315,9 @@ int iommu_device_register_bus(struct iommu_device *iommu, if (err) return err; - spin_lock(&iommu_device_lock); + mutex_lock(&iommu_probe_device_lock); list_add_tail(&iommu->list, &iommu_device_list); - spin_unlock(&iommu_device_lock); + mutex_unlock(&iommu_probe_device_lock); err = bus_iommu_probe(bus); if (err) { @@ -2033,9 +2032,9 @@ bool iommu_present(const struct bus_type *bus) for (int i = 0; i < ARRAY_SIZE(iommu_buses); i++) { if (iommu_buses[i] == bus) { - spin_lock(&iommu_device_lock); + mutex_lock(&iommu_probe_device_lock); ret = !list_empty(&iommu_device_list); - spin_unlock(&iommu_device_lock); + mutex_unlock(&iommu_probe_device_lock); } } return ret; @@ -2980,17 +2979,14 @@ EXPORT_SYMBOL_GPL(iommu_default_passthrough); const struct iommu_ops *iommu_ops_from_fwnode(struct fwnode_handle *fwnode) { - const struct iommu_ops *ops = NULL; struct iommu_device *iommu; - spin_lock(&iommu_device_lock); + lockdep_assert_held(&iommu_probe_device_lock); + list_for_each_entry(iommu, &iommu_device_list, list) - if (iommu->fwnode == fwnode) { - ops = iommu->ops; - break; - } - spin_unlock(&iommu_device_lock); - return ops; + if (iommu->fwnode == fwnode) + return iommu->ops; + return NULL; } int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode, From patchwork Wed Nov 29 00:48:03 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 748817 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="Pz7DsLNZ" Received: from NAM11-DM6-obe.outbound.protection.outlook.com (mail-dm6nam11on2069.outbound.protection.outlook.com [40.107.223.69]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E1F6419A7; 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Wysocki" , Rob Herring , Thierry Reding Subject: [PATCH 07/10] acpi: Do not return struct iommu_ops from acpi_iommu_configure_id() Date: Tue, 28 Nov 2023 20:48:03 -0400 Message-ID: <7-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> In-Reply-To: <0-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> References: X-ClientProxiedBy: SA9P223CA0005.NAMP223.PROD.OUTLOOK.COM (2603:10b6:806:26::10) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|SA0PR12MB4575:EE_ X-MS-Office365-Filtering-Correlation-Id: ef3cdcb0-8c41-4123-7cd2-08dbf074da78 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: XQ/oIi8TJPmjZtfvky7xdhC2/jExbpChgU6sTLMLyf5bQ+f5hVLvPCTdw293CKX9ZHMRFfPgLLEVqfvPhLXbxJjLxlqc9mfWetr/h4JCpqgs0+MivYgTJ86YEMWoWepRJWlKgwvFZMUUd8uPmQ8LpDmdeKleGj9jO2Ql/OOUIvRBqTH1fJgxfEkStBUCwaZHjl8EBkBpJHUPZISt3ZKd+9XIvDU3ePA5SRauyg+3gKZmHSesIMr1sz79TmqoQkwJUIwoX0zsEIKF5KrYQiElZ8INT8wPG74EZ5fit6AuSqAgVUiBkASPK7bMWVXPpQPA972NG9o0+gmFLc4Zi6m78HOgiHeGm+X4o85RBt0m2o6iD6nq5dce4p1FtSBz6HGOcmAEqz3uQtUJv3O1ECwnOfdlcdIhv2ui287cNvIculigwtmlvi8ok9Bw/vykRgf7uH+tTA5HLq3w9IqrzToNUoarboaTxmdFC3nPWiIqxvSqAquIsj0Dtdq6qAUNEHUS3L5K5dglp6hjE+y6AqhHML7lGt/bDarJ7dpQDWwvkzRI+MUHqahMQe68RrMQ35PI+vFS7AL1JtNhmcAMn2Z9RLh+Zf0a8bn+3v4fuKN0gwidzWfQXE0qeFHWp1P5jlaE X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(346002)(396003)(376002)(39860400002)(136003)(366004)(230922051799003)(64100799003)(186009)(1800799012)(451199024)(26005)(2616005)(8676002)(6506007)(6512007)(7366002)(8936002)(7406005)(110136005)(7416002)(4326008)(86362001)(5660300002)(478600001)(6486002)(316002)(66476007)(66946007)(54906003)(66556008)(38100700002)(83380400001)(2906002)(6666004)(921008)(41300700001)(36756003)(4216001); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UIMOVXjZiFjB0AIWkmVunPDmNCZi8g2JpAWfAkfiebC81CO+KT4j7oVqS9xnehEhdmTRF697zhxDoGoiyAqVFTI00QSYf5v0oPx6CxeCQgRPh5QrFw7HcJqYLhLK9iih1dMpcAgQCmpjIMxIkN2wLNNytG58YmFtogf8g707jZFsMB4IycTGDGUB/tacwb98FxfdcAClkQ9gYVcM0pWbGK+5Uab7lMVcL5TBDdYSRCxZjtyHyKDjscKN0Be3eVkuQNaPYQ1JEaex5prBg4MuLKkZ6B6PVCaRIzjYiNOp4VRwZKRqGo8j12n0HGn0Uo+Cyd2txXpZ6fFTdQd5o1UeFRwlzOb/xJmPviJpggLsKr5mQxx/Dh1fsQ1S0hFs4JAdihDeH233wp3ppyqv8vdZXHzIDemD4yRjFrf2KxUFyy+YUkQbTCKJqJdWnOccWhcBBMIFU62NUMuYXJaUbtPxL8YL6VbTW//OP3uzbLJwKcMCoFQKXncyxF2X6rRaCHX58HyCiMGm8N9Qfrb1MmRCkp+rx8AWv2+qYfOio4ephra3S/uGHRD9Td2fNU8c0NTEejUolNwYVPCsSQUb0XuXE4Bpa87qMhnvvwsmVmh6Ip+AZO8qYBT+7NEmApeiQGA7n3zcPVZCnYOxkDzB/0luBJYhQmwjq9lpD/AEF63hbut/74MuMqYypab1sAJGWT2KXGaC7A+lHR0JrT4nd0qWrxDMzncczehTvaC49RaZilSkqmxIIK9A6afKFNT1R9PMgs/dW1mDaeNjUbS0+0ykq+UgTwCfwOk+BMgr4c3UZUHYoc95kL9WtbrU7uT3zfRonb/TcK2ZjlaoSJSIS9miiZkDMeTMFY4T6gQhQq+wce0XerMAdL9frgf4e9jpkw87FREr3AZDyf/F1fOV6J6vU0oGyCVXyYt9nekfJ4SwVbR1QTXGVCgQEzKKQjf6QTLZXqdhIld47V7oapvHX/lzh7f45N6egSP6YS9XVJeMpqhITqPKFq50EaUt/cPL92YHVN861IhjfpVLgO8nOMEKEBeMI5xjAYqmRDH+JPdtdsXnyd4fwxhgXTMhMLqOsyNTiRSYlEzsfmZ8fMOqszq5PNI62BF+QO7VEmSwrjj8PM21ei4H/2+SP3nR7MjkzTxnOikh8tTeCCshTTD31WRQXtm0rHMZcr1yJdDOi2KO1pRjmBCs3coKdUTs7DHWmHHlCqBBlONb03FRSSMXp9SXiRSB1Nm2qNmE/AglXcNJkd377GSnPdxqepN4IjcgYXqU3Zxqeg/uoTqCD1K8DKoO3pLZPiy+NH59TTwCAjdkC1OZSAeOq2RHw79pWblsb2280c6ek4V6+nq40H+EFt6561NYtSVkFTnMWSMD8KCT+cn5mFQO1DsDkAXrR2UkkKjUMNF0GtjL4aLPfDcVXdV3ITDIgnoIt6IxMk4NM2llN29UkE5MDdEUKDSuTYqgtF7LPKZaF0dsAQk72HuUrLnP6Z8qaTPSXT6QjkhYjU8o/tgV5AMc8kIIdRrJUZoeTd8Uq9Njyg9l7KgUrWqUWHf2kV/MCuBq9wB3Q/4omXgTK05pzDDSRyIo+VLfGP6TqtZY X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: ef3cdcb0-8c41-4123-7cd2-08dbf074da78 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Nov 2023 00:48:07.6484 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: ycF7p2nhNFwOx38q7XDzAfgW83E9drWUTsKuRY2KhN4tnEtUWbtf3z4zCttReeHz X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4575 Nothing needs this pointer. Return a normal error code with the usual IOMMU semantic that ENODEV means 'there is no IOMMU driver'. Acked-by: Rafael J. Wysocki Reviewed-by: Jerry Snitselaar Tested-by: Hector Martin Signed-off-by: Jason Gunthorpe --- drivers/acpi/scan.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/drivers/acpi/scan.c b/drivers/acpi/scan.c index 444a0b3c72f2d8..340ba720c72129 100644 --- a/drivers/acpi/scan.c +++ b/drivers/acpi/scan.c @@ -1562,8 +1562,7 @@ static inline const struct iommu_ops *acpi_iommu_fwspec_ops(struct device *dev) return fwspec ? fwspec->ops : NULL; } -static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, - const u32 *id_in) +static int acpi_iommu_configure_id(struct device *dev, const u32 *id_in) { int err; const struct iommu_ops *ops; @@ -1577,7 +1576,7 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, ops = acpi_iommu_fwspec_ops(dev); if (ops) { mutex_unlock(&iommu_probe_device_lock); - return ops; + return 0; } err = iort_iommu_configure_id(dev, id_in); @@ -1594,12 +1593,14 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, /* Ignore all other errors apart from EPROBE_DEFER */ if (err == -EPROBE_DEFER) { - return ERR_PTR(err); + return err; } else if (err) { dev_dbg(dev, "Adding to IOMMU failed: %d\n", err); - return NULL; + return -ENODEV; } - return acpi_iommu_fwspec_ops(dev); + if (!acpi_iommu_fwspec_ops(dev)) + return -ENODEV; + return 0; } #else /* !CONFIG_IOMMU_API */ @@ -1611,10 +1612,9 @@ int acpi_iommu_fwspec_init(struct device *dev, u32 id, return -ENODEV; } -static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, - const u32 *id_in) +static int acpi_iommu_configure_id(struct device *dev, const u32 *id_in) { - return NULL; + return -ENODEV; } #endif /* !CONFIG_IOMMU_API */ @@ -1628,7 +1628,7 @@ static const struct iommu_ops *acpi_iommu_configure_id(struct device *dev, int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, const u32 *input_id) { - const struct iommu_ops *iommu; + int ret; if (attr == DEV_DMA_NOT_SUPPORTED) { set_dma_ops(dev, &dma_dummy_ops); @@ -1637,10 +1637,15 @@ int acpi_dma_configure_id(struct device *dev, enum dev_dma_attr attr, acpi_arch_dma_setup(dev); - iommu = acpi_iommu_configure_id(dev, input_id); - if (PTR_ERR(iommu) == -EPROBE_DEFER) + ret = acpi_iommu_configure_id(dev, input_id); + if (ret == -EPROBE_DEFER) return -EPROBE_DEFER; + /* + * Historically this routine doesn't fail driver probing due to errors + * in acpi_iommu_configure_id() + */ + arch_setup_dma_ops(dev, 0, U64_MAX, attr == DEV_DMA_COHERENT); return 0; From patchwork Wed Nov 29 00:48:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jason Gunthorpe X-Patchwork-Id: 748814 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="F31DiXX8" Received: from NAM10-BN7-obe.outbound.protection.outlook.com (mail-bn7nam10on2055.outbound.protection.outlook.com [40.107.92.55]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2C40119AA; Tue, 28 Nov 2023 16:48:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; 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Wed, 29 Nov 2023 00:48:12 +0000 Received: from LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93]) by LV2PR12MB5869.namprd12.prod.outlook.com ([fe80::60d4:c1e3:e1aa:8f93%4]) with mapi id 15.20.7025.022; Wed, 29 Nov 2023 00:48:12 +0000 From: Jason Gunthorpe To: David Airlie , Alyssa Rosenzweig , Albert Ou , asahi@lists.linux.dev, Catalin Marinas , Danilo Krummrich , Daniel Vetter , Dexuan Cui , devicetree@vger.kernel.org, dmaengine@vger.kernel.org, dri-devel@lists.freedesktop.org, David Woodhouse , Frank Rowand , Hanjun Guo , Haiyang Zhang , iommu@lists.linux.dev, Jon Hunter , Joerg Roedel , Karol Herbst , Krzysztof Kozlowski , "K. Y. Srinivasan" , Laxman Dewangan , Len Brown , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-hyperv@vger.kernel.org, linux-mips@vger.kernel.org, linux-riscv@lists.infradead.org, linux-snps-arc@lists.infradead.org, linux-tegra@vger.kernel.org, Russell King , Lorenzo Pieralisi , Lyude Paul , Marek Szyprowski , nouveau@lists.freedesktop.org, Palmer Dabbelt , Paul Walmsley , "Rafael J. Wysocki" , Rob Herring , Robin Murphy , Sudeep Holla , Suravee Suthikulpanit , Sven Peter , Thomas Bogendoerfer , Vineet Gupta , Vinod Koul , Wei Liu , Will Deacon Cc: Lu Baolu , Christoph Hellwig , Jerry Snitselaar , Hector Martin , Moritz Fischer , patches@lists.linux.dev, "Rafael J. Wysocki" , Rob Herring , Thierry Reding Subject: [PATCH 10/10] ACPI: IORT: Allow COMPILE_TEST of IORT Date: Tue, 28 Nov 2023 20:48:06 -0400 Message-ID: <10-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> In-Reply-To: <0-v1-720585788a7d+811b-iommu_fwspec_p1_jgg@nvidia.com> References: X-ClientProxiedBy: SA9P223CA0022.NAMP223.PROD.OUTLOOK.COM (2603:10b6:806:26::27) To LV2PR12MB5869.namprd12.prod.outlook.com (2603:10b6:408:176::16) Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: LV2PR12MB5869:EE_|MW5PR12MB5649:EE_ X-MS-Office365-Filtering-Correlation-Id: 20a43a15-015e-42b5-e00b-08dbf074db78 X-LD-Processed: 43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: sfyePDuXbQpivM4GgUNxLSUDKfV946alWGd0hI2n+rpIrNB+3/j/3zBB93NCwPRqllydZ6s3EPhIOQAvu0il6gt747jv9zfRwNe2F6K+sLefTwlKl8eK0qDxUSi//Sx8NGdpqCdvrmCGKsFfZ9efYgDRrgyoQt+oxZKyJonSmMRpVnEZNqMmXruMUwpCd6VldvUMMTEe6q7xzxfaUW3RckcyqZdwCfHHI0PJu1uWfj+HCeXGTqrrUdINYSwBOHN65U+6QKlBpjzfLMLq77srcAL1yk3uZQvWftAiSf/vv97MCAmCOYxGl+caSwdf3DIxj0ErSwETifhy8vxBCS+E69fnqY/WIDJwcxpER4tszS3ayGTovyO6WGAwSSmwkHyGY4Qa0JjupUxt4uu5s6xsCkT7vY17EGzO2pYF5Evj//VPyEJFmByrpwREJLe3MPR8sd7wc1A80FhfKj5MVncE8XH/3u0U9DWFNunYb/dZAurN09u3c2NkunRKYARRqGvuEE0JaeZngIcix5hD9VRq+ffOx0gi/55JhJuJzBOVw5wDkAODAgy6tOc0RqBuADuG+6Dj7UAUqrXGN7IgvI3K1u8uVB96D1KrD3AUbUajURs= X-Forefront-Antispam-Report: CIP:255.255.255.255; CTRY:; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:LV2PR12MB5869.namprd12.prod.outlook.com; PTR:; CAT:NONE; SFS:(13230031)(136003)(39860400002)(396003)(366004)(376002)(346002)(230922051799003)(186009)(1800799012)(64100799003)(451199024)(5660300002)(7416002)(7366002)(7406005)(41300700001)(4326008)(8936002)(8676002)(2906002)(110136005)(316002)(66556008)(66476007)(54906003)(66946007)(2616005)(921008)(6486002)(478600001)(36756003)(6512007)(6506007)(26005)(6666004)(83380400001)(86362001)(38100700002); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: UNYheQyrasSXpcpCfTUQaMtUs0mW6dFUk1bWLYTCnkPpP1S0bWCCjqumkRKdiC9+AHjWdZzDQqy+3MdwLX1LbDScSZmNXnFjltT2pXbrXzFEUz8FB8kcBIqcTgbL9HQoW321eihXHodmuwOVY1gNvKFn27NBBKsYVeWCxprj8LHmN/NKKvfV8OA53XejEyvQqQBPt99HAn61ZhT2Ajv7Uie+kJ32eMKGwn/5icwu2rdyxlOGZ53TCr85bJcAPLv0kNbxBnacotlcfTPEPeXMzGUsoE5t/Jhtxf8PumC2UH1aYAZ24tgv/MPvTxxgPb3hBbQ35Iz1iYLSk9TbIljShLqvZmwZy+JnEAAlXE68t1w66msf4GkGBxaAhPdy/K2GNhaOmwZgeO9/NUrSF1wk3tx89Y41XvzAefaa1iUGKV0kopWp9iTgZqFOYEZr27XwpzpNOy9xBtt8uq+2T3cV81FHNbTtwMEn93odYwqOUyUUvOe39IVnAcleYcZz75cZZ+vN6gJWFaZ+RHbQ5tzGhrunEVXTzRXYGXO0TYkFCfYpnnc5QB7bSH8zZ3PKeafPIxIaDWMMQv0DMLY+PL9OMwpmRJWr0Jg18rry/TgTyUOAQhik+iGqA2IcicKNXojGrGgjfZLzrr+f+D6VV1o9JvZE75QLj1PTXtwTSqOGhePFl7HXcSODJfULwweKq5fbkHQ6q+hntYEx/4Fczb0MiJ9w1zL9bMsm/QUtbh7Jv20N7S+5sp1p4n05848HDISWHjS+9iL2s3mYlCQiDX70k2nN8USM1TKsOHiO3jGpLSXwLHKYBSJF8mz6h07McxuWndpRWhIdvUm5E5ySn1DnJxQxtM+s30JRXCpBPVzv/FLNGuUM0WJTC7oTAGk+hTbwzMKSdJFM9QBBerNjYCa3T7Q1RAdWLargJAlGrNHUQjkYWkr8xV4Qt8c/42cL9k4Y9DxVo/ao5etyYU4VkFT+f6u94cmmF1hK3ISdCL89zLoaH0QmZSrfzMsYF2sGUcFAom7F+hEFd8iJAgGnh9pUjI+wua2EyBfbwP7jliGi48T6YFFqJiRntTNWE8QDLJP5M06AevL93EkCZa7IUWlgQz/es+y5dpZFylpeQ4LculrKC8pphqh1qnJOrgOSa0gDdbAIVr64jhofH/WC5+tvKoEOGr4JBj4JinnZACzdlhw1LiiJyNegq1Ti9KTKIRKeGgYxkmPyV/R40SRvVCXzUJQzOu2lNUjBlxLICqa5d4A1iDCOqXxqx5zrUCF+4osncWumF0P9VXkaXV2koAeToihb6kFOTERI2ZMJJERbA/oF0KOLZuno2bY/p+83/VeZ8YAMiJs9ZboiQ3TYY+UrOYuNWordO1zzjIIl2eyWVBVZMphne4ZXmCiGa6bvsddyz98GdODAIWVJZTNyRxkahU0o/Q5wM1pB3c+2/ZDDQG5LFpYrSgOeiRL+kRrFiyha970ppgNxtpqBXx9Om762Zj78V9GtfqH5E/+xs0jicG4KXoYL4c0ydiV6l7kEqmz1EV8WUNWCvcVtP7yk4D+e68VxdbaMzRUnf1NpxR5sCW/ExxZ2KOkfWs9gUS4QWlV+ X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-Network-Message-Id: 20a43a15-015e-42b5-e00b-08dbf074db78 X-MS-Exchange-CrossTenant-AuthSource: LV2PR12MB5869.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Nov 2023 00:48:09.3393 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: aglFzULK+XmqsoZKcrZ9ubmCg+LHORgBHdMuQg4VAhNMC/DOMeDwcNrzcZcKmdom X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5649 The arm-smmu driver can COMPILE_TEST on x86, so expand this to also enable the IORT code so it can be COMPILE_TEST'd too. Signed-off-by: Jason Gunthorpe --- drivers/acpi/Kconfig | 2 -- drivers/acpi/Makefile | 2 +- drivers/acpi/arm64/Kconfig | 1 + drivers/acpi/arm64/Makefile | 2 +- drivers/iommu/Kconfig | 1 + 5 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig index f819e760ff195a..3b7f77b227d13a 100644 --- a/drivers/acpi/Kconfig +++ b/drivers/acpi/Kconfig @@ -541,9 +541,7 @@ config ACPI_PFRUT To compile the drivers as modules, choose M here: the modules will be called pfr_update and pfr_telemetry. -if ARM64 source "drivers/acpi/arm64/Kconfig" -endif config ACPI_PPTT bool diff --git a/drivers/acpi/Makefile b/drivers/acpi/Makefile index eaa09bf52f1760..4e77ae37b80726 100644 --- a/drivers/acpi/Makefile +++ b/drivers/acpi/Makefile @@ -127,7 +127,7 @@ obj-y += pmic/ video-objs += acpi_video.o video_detect.o obj-y += dptf/ -obj-$(CONFIG_ARM64) += arm64/ +obj-y += arm64/ obj-$(CONFIG_ACPI_VIOT) += viot.o diff --git a/drivers/acpi/arm64/Kconfig b/drivers/acpi/arm64/Kconfig index b3ed6212244c1e..537d49d8ace69e 100644 --- a/drivers/acpi/arm64/Kconfig +++ b/drivers/acpi/arm64/Kconfig @@ -11,6 +11,7 @@ config ACPI_GTDT config ACPI_AGDI bool "Arm Generic Diagnostic Dump and Reset Device Interface" + depends on ARM64 depends on ARM_SDE_INTERFACE help Arm Generic Diagnostic Dump and Reset Device Interface (AGDI) is diff --git a/drivers/acpi/arm64/Makefile b/drivers/acpi/arm64/Makefile index 143debc1ba4a9d..71d0e635599390 100644 --- a/drivers/acpi/arm64/Makefile +++ b/drivers/acpi/arm64/Makefile @@ -4,4 +4,4 @@ obj-$(CONFIG_ACPI_IORT) += iort.o obj-$(CONFIG_ACPI_GTDT) += gtdt.o obj-$(CONFIG_ACPI_APMT) += apmt.o obj-$(CONFIG_ARM_AMBA) += amba.o -obj-y += dma.o init.o +obj-$(CONFIG_ARM64) += dma.o init.o diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 7673bb82945b6c..309378e76a9bc9 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -318,6 +318,7 @@ config ARM_SMMU select IOMMU_API select IOMMU_IO_PGTABLE_LPAE select ARM_DMA_USE_IOMMU if ARM + select ACPI_IORT if ACPI help Support for implementations of the ARM System MMU architecture versions 1 and 2.