From patchwork Fri Dec 8 06:58:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752344 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="WDJ/1kBs" Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71A581984 for ; Thu, 7 Dec 2023 22:59:20 -0800 (PST) Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1d0c4d84bf6so13259935ad.1 for ; Thu, 07 Dec 2023 22:59:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018760; x=1702623560; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=zxwk551dNXF7eGBqSesuNZZ5bUVezIJLfHSd1F1iOFQ=; b=WDJ/1kBsMY4hucIVyMGLZqtb5blAeDeb+dRrxlyvUMKhh9FEBEYu4Fa2XHxy3MKQE6 Z1et48zOaAXOk10VXh6qxGFez9ZBUapHZ93rZLO0QXqD9mZA9C8GVux+FGP6Ge+B7aG0 5wt4XPwgVQSqxYMwogpJk+644daI3bL/+DYStIgStbDQOMXfwHESX/FLYDNkuoRCrxFV uLhiSouAJuR8rGzPt9L5z4bSmOp2IJk7T8ipC03TRLolG4W1TtB7L+m6uIGYLTbfMYdW 84BrUhlRaWdQDMkgwQKrd8tG3LQTdXiKTbx6DE/Co9M2fHWinLnkJSSxthaBcU5nGVhP 0aUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018760; x=1702623560; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=zxwk551dNXF7eGBqSesuNZZ5bUVezIJLfHSd1F1iOFQ=; b=XtxwNYRESMFxxVoLDtK4YsGxvbG4agtQeK31QZP0IGeEI6qwdmn/7gSvdUW8Orbq4q TxNydXSmomAhAMDZRA9UGGvEgZxkeJioLO5mHbu3yCb46xp3SPXIxd1RfUu3RE01wJcn on2ZYxBSyYQQ6XKPer7XN2cdLZ6+t5YglVPA25PjCLBKBOjgbDvNn60VrM5nAfMGyiif vdfSDxhjSNRh+IVdrDtLb03bEwfPNDGPxQSu5/aGwohCHG4NiIPyfDrPWBrWB/94+ldr Z2lh8ppjN3gpzAInx4HWYMOOQPNCmcg11/ibUuSgwF+P/zXaQmU2n2XHXIQNnPcJeYYA YyZQ== X-Gm-Message-State: AOJu0Yx+XoSWkzSKA7eql0AKIxRMYkz4PbEq9PCkFrnuL2w4xZrtnmLm AZkYzphCugocig3hgSd8PI5f X-Google-Smtp-Source: AGHT+IEkoR7dWArUlpalfnxds9mQVbxsXb/Ae51VkkL95E/8Ul7u+C4yDK+IX+0+FLByp5ZxPxQ5wA== X-Received: by 2002:a17:902:e811:b0:1d0:c229:a01b with SMTP id u17-20020a170902e81100b001d0c229a01bmr3939511plg.48.1702018759791; Thu, 07 Dec 2023 22:59:19 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:19 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 01/17] scsi: ufs: qcom: Use clk_bulk APIs for managing lane clocks Date: Fri, 8 Dec 2023 12:28:46 +0530 Message-Id: <20231208065902.11006-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Lane clock handling can be simplified by using the clk_bulk APIs. So let's make use of them. This also get's rid of the clock validation in the driver as kernel should just rely on the firmware (DT/ACPI) to provide the clocks required for proper functioning. Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 94 ++----------------------------------- drivers/ufs/host/ufs-qcom.h | 6 +-- 2 files changed, 7 insertions(+), 93 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 96cb8b5b4e66..cbb6a696cd97 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -194,52 +194,12 @@ static inline int ufs_qcom_ice_suspend(struct ufs_qcom_host *host) } #endif -static int ufs_qcom_host_clk_get(struct device *dev, - const char *name, struct clk **clk_out, bool optional) -{ - struct clk *clk; - int err = 0; - - clk = devm_clk_get(dev, name); - if (!IS_ERR(clk)) { - *clk_out = clk; - return 0; - } - - err = PTR_ERR(clk); - - if (optional && err == -ENOENT) { - *clk_out = NULL; - return 0; - } - - if (err != -EPROBE_DEFER) - dev_err(dev, "failed to get %s err %d\n", name, err); - - return err; -} - -static int ufs_qcom_host_clk_enable(struct device *dev, - const char *name, struct clk *clk) -{ - int err = 0; - - err = clk_prepare_enable(clk); - if (err) - dev_err(dev, "%s: %s enable failed %d\n", __func__, name, err); - - return err; -} - static void ufs_qcom_disable_lane_clks(struct ufs_qcom_host *host) { if (!host->is_lane_clks_enabled) return; - clk_disable_unprepare(host->tx_l1_sync_clk); - clk_disable_unprepare(host->tx_l0_sync_clk); - clk_disable_unprepare(host->rx_l1_sync_clk); - clk_disable_unprepare(host->rx_l0_sync_clk); + clk_bulk_disable_unprepare(host->num_clks, host->clks); host->is_lane_clks_enabled = false; } @@ -247,43 +207,14 @@ static void ufs_qcom_disable_lane_clks(struct ufs_qcom_host *host) static int ufs_qcom_enable_lane_clks(struct ufs_qcom_host *host) { int err; - struct device *dev = host->hba->dev; - - if (host->is_lane_clks_enabled) - return 0; - err = ufs_qcom_host_clk_enable(dev, "rx_lane0_sync_clk", - host->rx_l0_sync_clk); + err = clk_bulk_prepare_enable(host->num_clks, host->clks); if (err) return err; - err = ufs_qcom_host_clk_enable(dev, "tx_lane0_sync_clk", - host->tx_l0_sync_clk); - if (err) - goto disable_rx_l0; - - err = ufs_qcom_host_clk_enable(dev, "rx_lane1_sync_clk", - host->rx_l1_sync_clk); - if (err) - goto disable_tx_l0; - - err = ufs_qcom_host_clk_enable(dev, "tx_lane1_sync_clk", - host->tx_l1_sync_clk); - if (err) - goto disable_rx_l1; - host->is_lane_clks_enabled = true; return 0; - -disable_rx_l1: - clk_disable_unprepare(host->rx_l1_sync_clk); -disable_tx_l0: - clk_disable_unprepare(host->tx_l0_sync_clk); -disable_rx_l0: - clk_disable_unprepare(host->rx_l0_sync_clk); - - return err; } static int ufs_qcom_init_lane_clks(struct ufs_qcom_host *host) @@ -294,26 +225,11 @@ static int ufs_qcom_init_lane_clks(struct ufs_qcom_host *host) if (has_acpi_companion(dev)) return 0; - err = ufs_qcom_host_clk_get(dev, "rx_lane0_sync_clk", - &host->rx_l0_sync_clk, false); - if (err) - return err; - - err = ufs_qcom_host_clk_get(dev, "tx_lane0_sync_clk", - &host->tx_l0_sync_clk, false); - if (err) + err = devm_clk_bulk_get_all(dev, &host->clks); + if (err <= 0) return err; - /* In case of single lane per direction, don't read lane1 clocks */ - if (host->hba->lanes_per_direction > 1) { - err = ufs_qcom_host_clk_get(dev, "rx_lane1_sync_clk", - &host->rx_l1_sync_clk, false); - if (err) - return err; - - err = ufs_qcom_host_clk_get(dev, "tx_lane1_sync_clk", - &host->tx_l1_sync_clk, true); - } + host->num_clks = err; return 0; } diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 9950a0089475..e2df4c528a2a 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -213,10 +213,8 @@ struct ufs_qcom_host { struct phy *generic_phy; struct ufs_hba *hba; struct ufs_pa_layer_attr dev_req_params; - struct clk *rx_l0_sync_clk; - struct clk *tx_l0_sync_clk; - struct clk *rx_l1_sync_clk; - struct clk *tx_l1_sync_clk; + struct clk_bulk_data *clks; + u32 num_clks; bool is_lane_clks_enabled; struct icc_path *icc_ddr; From patchwork Fri Dec 8 06:58:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751688 Authentication-Results: smtp.subspace.kernel.org; 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Thu, 07 Dec 2023 22:59:25 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam , Abel Vesa Subject: [PATCH v2 02/17] scsi: ufs: qcom: Fix the return value of ufs_qcom_ice_program_key() Date: Fri, 8 Dec 2023 12:28:47 +0530 Message-Id: <20231208065902.11006-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Currently, the function returns -EINVAL if algorithm other than AES-256-XTS is requested. But the correct error code is -EOPNOTSUPP. Fix it! Cc: Abel Vesa Fixes: 56541c7c4468 ("scsi: ufs: ufs-qcom: Switch to the new ICE API") Reviewed-by: Abel Vesa Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index cbb6a696cd97..852179e456f2 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -158,7 +158,7 @@ static int ufs_qcom_ice_program_key(struct ufs_hba *hba, cap = hba->crypto_cap_array[cfg->crypto_cap_idx]; if (cap.algorithm_id != UFS_CRYPTO_ALG_AES_XTS || cap.key_size != UFS_CRYPTO_KEY_SIZE_256) - return -EINVAL; + return -EOPNOTSUPP; if (config_enable) return qcom_ice_program_key(host->ice, From patchwork Fri Dec 8 06:58:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752343 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="LRDPeH5c" Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AEADF198C for ; Thu, 7 Dec 2023 22:59:31 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1d2f1cecf89so206885ad.1 for ; Thu, 07 Dec 2023 22:59:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018771; x=1702623571; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=rAuafsSJin/545S9JBl3k3169/mG+pk906+BZqM02rw=; b=LRDPeH5c3X1gTwXbBsyhAE/Qfkm2in7DS7OWrRZlWbwmq2SiHtQj8ogscfsNPh7on/ Yf385E5UGVZYYBDjkL793HhhuPofS7TvBDFsu49/F0JLVPrvBlNkppRg/iUi6fhxxt8M ULYMLrGQIYAOKgkoki617P1KFpo5XYEqMC51lWtIoin+xVQWWhDpckFkmnLxcF+MGYUl /WpSGoI5AhsIo3MDOP4y2CiatZVzJ2alhoavN5CUw5IRKPoeKgKapzcM9HVFFjBxepnp XLuHItg1WOE9NakN2u5GaapYffw7YczLfray0h29Y3efzJ3zzhqNg9Ou4ixQLh9viXKJ Bk9w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018771; x=1702623571; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=rAuafsSJin/545S9JBl3k3169/mG+pk906+BZqM02rw=; b=pjZLAPWO8f/0bLknFJmQUxUYQvjkNqsBFn/heWtVkpjCDMmUcXhIkhqhbbmcjNzV6p bbNsF1z7pU3N7joivOtmStqStxPthouznYS4+9oTYQmUzgj4fiGTQ6kQxl77ZGtvo4uE YQ/IH0XGXv0wVYtaLdY17KUyMc21kG2vVvzrFX6dhIN2Mw6mI5aUVHiCUfpSZh8vMgdb 4au29H+qmL5fprKpp84ThjV+3Fo5pEZOU4gbdzDB+lN4C/KszIHdOY418LMd3D1sawed o52cQWI4oGLw6CeTfAVEkDuOF5MTCj1Z0fPAgknKQgF0nL468wI7ba78h5fCFALDDZHb DLQw== X-Gm-Message-State: AOJu0YxNwhro92kH+mPVP7Vo9YvtCpJcCONQNeUHi+Qcz2zW2MvVjMyI jcOwQhMdn2DKn6j5DLkRKXIz X-Google-Smtp-Source: AGHT+IGflETh4yKi3d3wNFGR84GW61XgeduRIXTsZv1jIX1NkcqrGsIZt50fSYYR0Goipa+nqYoolg== X-Received: by 2002:a17:903:228b:b0:1d0:5878:d4f4 with SMTP id b11-20020a170903228b00b001d05878d4f4mr3198154plh.5.1702018771023; Thu, 07 Dec 2023 22:59:31 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:30 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 03/17] scsi: ufs: qcom: Fix the return value when platform_get_resource_byname() fails Date: Fri, 8 Dec 2023 12:28:48 +0530 Message-Id: <20231208065902.11006-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The return value should be -ENODEV indicating that the resource is not provided in DT, not -ENOMEM. Fix it! Fixes: c263b4ef737e ("scsi: ufs: core: mcq: Configure resource regions") Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 852179e456f2..778df0a9c65e 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1701,7 +1701,7 @@ static int ufs_qcom_mcq_config_resource(struct ufs_hba *hba) if (!res->resource) { dev_info(hba->dev, "Resource %s not provided\n", res->name); if (i == RES_UFS) - return -ENOMEM; + return -ENODEV; continue; } else if (i == RES_UFS) { res_mem = res->resource; From patchwork Fri Dec 8 06:58:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751687 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="thNME0t4" Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4769A199A for ; Thu, 7 Dec 2023 22:59:36 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id d9443c01a7336-1d08a924fcfso16144165ad.2 for ; Thu, 07 Dec 2023 22:59:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018776; x=1702623576; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=s/bMqCyLLdfMkDU85bt2E75wE3lerFemV/MhNkgYmEE=; b=thNME0t4ywjX5IyZcUIUWlWrFK44+snjghh1r3LwEEFBw5VAZxwUDPsghxhja6JMPO qffRlDremEfzOg3mzkkvoKHj97zYHqwj4TI7gjWTNRy+OdnC1CKi5y/hSMDL8qlNUvL6 +TH3irKNr3Z3Va7EsnoUoK3a0cSJyDL4W/X94IhR29RI0VtjGhXEpbTM0iA19LuM/MrQ TCj5IIGr+7A/Af3YnFbypgPAzIuQhltirheSYbKKVcUD9KZLT1w6aY5jxSPZlvA4NkWL kuAeuk4+UIUuyZuN0BqgwDKVH2JNlARdTPj+mI9FSq393bgTiE8gVS+s3xIPZywkov9W tftw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018776; x=1702623576; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=s/bMqCyLLdfMkDU85bt2E75wE3lerFemV/MhNkgYmEE=; b=rh7Iot5Y7Nmt7ANP/cCbJkORYQBAr3Og4C8pb3cI7QxMd9orD5WmpIYJj0eFeeI2+R MAgrlNQmPy+XtIuLIXhMMY1FL4b4Ytdt4HDjeiRmrYw6pqwj9HLOu9+oTV+7lQ1Clv17 QYc4AYxsxIsP6GgPtr8Srv2poaPIjnIOUyqMo6zv6tm3h9x1QjQTrBk+MdN1jkN2gMV2 2dk+VxZMkrDfwtsePkuqcO9mjf/5WpM6Jnht/39rXIMIJ1BMS2LyhH/UzBefl3kiy4PF jW5Ny1zoDb0sdqWsBADvCJN8RW1sYdQsoaCHeC3Wr/KjCxNLJQtMrFb8HC57r06h5MsB ZsAw== X-Gm-Message-State: AOJu0Yy2FRm18fHgUsm8yp+Lr71NygecIlKk1uLy0PQBSSPrUFkONTaE 15pMC5QUXsO08NK3xkYXIoHU X-Google-Smtp-Source: AGHT+IHdRf8hSF3MUhiCDn1Qa06CDosVbrjd15lsXlxGB6/Ryg4WbtmLcO7jnw0BZs30130/5cIHYQ== X-Received: by 2002:a17:903:22cf:b0:1d0:ab0e:9154 with SMTP id y15-20020a17090322cf00b001d0ab0e9154mr4514103plg.125.1702018775695; Thu, 07 Dec 2023 22:59:35 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:35 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 04/17] scsi: ufs: qcom: Remove superfluous variable assignments Date: Fri, 8 Dec 2023 12:28:49 +0530 Message-Id: <20231208065902.11006-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 There are many instances where the variable assignments are not needed. Remove them. Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 778df0a9c65e..dc93b1c5ca74 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -219,7 +219,7 @@ static int ufs_qcom_enable_lane_clks(struct ufs_qcom_host *host) static int ufs_qcom_init_lane_clks(struct ufs_qcom_host *host) { - int err = 0; + int err; struct device *dev = host->hba->dev; if (has_acpi_companion(dev)) @@ -237,7 +237,7 @@ static int ufs_qcom_init_lane_clks(struct ufs_qcom_host *host) static int ufs_qcom_check_hibern8(struct ufs_hba *hba) { int err; - u32 tx_fsm_val = 0; + u32 tx_fsm_val; unsigned long timeout = jiffies + msecs_to_jiffies(HBRN8_POLL_TOUT_MS); do { @@ -292,9 +292,9 @@ static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host) */ static int ufs_qcom_host_reset(struct ufs_hba *hba) { - int ret = 0; + int ret; struct ufs_qcom_host *host = ufshcd_get_variant(hba); - bool reenable_intr = false; + bool reenable_intr; if (!host->core_reset) { dev_warn(hba->dev, "%s: reset control not set\n", __func__); @@ -417,7 +417,7 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, enum ufs_notify_change_status status) { struct ufs_qcom_host *host = ufshcd_get_variant(hba); - int err = 0; + int err; switch (status) { case PRE_CHANGE: @@ -463,7 +463,7 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, u32 core_clk_period_in_ns; u32 tx_clk_cycles_per_us = 0; unsigned long core_clk_rate = 0; - u32 core_clk_cycles_per_us = 0; + u32 core_clk_cycles_per_us; static u32 pwm_fr_table[][2] = { {UFS_PWM_G1, 0x1}, @@ -1418,7 +1418,7 @@ static int ufs_qcom_clk_scale_notify(struct ufs_hba *hba, bool scale_up, enum ufs_notify_change_status status) { struct ufs_qcom_host *host = ufshcd_get_variant(hba); - int err = 0; + int err; /* check the host controller state before sending hibern8 cmd */ if (!ufshcd_is_hba_active(hba)) @@ -1689,7 +1689,7 @@ static int ufs_qcom_mcq_config_resource(struct ufs_hba *hba) struct platform_device *pdev = to_platform_device(hba->dev); struct ufshcd_res_info *res; struct resource *res_mem, *res_mcq; - int i, ret = 0; + int i, ret; memcpy(hba->res, ufs_res_info, sizeof(ufs_res_info)); From patchwork Fri Dec 8 06:58:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752342 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="bIuWUZwD" Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D66B1199A for ; Thu, 7 Dec 2023 22:59:41 -0800 (PST) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-6ce72faf1e8so1276630b3a.0 for ; Thu, 07 Dec 2023 22:59:41 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018781; x=1702623581; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; 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Thu, 07 Dec 2023 22:59:41 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:40 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 05/17] scsi: ufs: qcom: Remove the warning message when core_reset is not available Date: Fri, 8 Dec 2023 12:28:50 +0530 Message-Id: <20231208065902.11006-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 core_reset is optional, so there is no need to warn the user if it is not available. Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index dc93b1c5ca74..d474de0739e4 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -296,10 +296,8 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba) struct ufs_qcom_host *host = ufshcd_get_variant(hba); bool reenable_intr; - if (!host->core_reset) { - dev_warn(hba->dev, "%s: reset control not set\n", __func__); + if (!host->core_reset) return 0; - } reenable_intr = hba->is_irq_enabled; disable_irq(hba->irq); From patchwork Fri Dec 8 06:58:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751686 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="Lkg2FT/q" Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 645C219A8 for ; Thu, 7 Dec 2023 22:59:47 -0800 (PST) Received: by mail-pg1-x530.google.com with SMTP id 41be03b00d2f7-5c2066accc5so1275352a12.3 for ; Thu, 07 Dec 2023 22:59:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018787; x=1702623587; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Dw1HiXXVLe/1lHZEEZF1Ot3Ar80Z2/bXxftivhX5tWk=; b=Lkg2FT/qLKmsXBe+tGnDvhLGNWWYSkFcrXDJSF/Zqy5stxddekXqvDiUHbbCs7/cdu tt5tLKXySVez3GwIu3HVzPFf/aUbVtNDkJkot2MmUhabP0L/xZnjLx2KM+hIWx71AZF7 QKcf+klR1XDnGGaaa59bcRRK7R6sBQFW+aD9KYXu4fVwm4D3VlHz6OTtpAPWQz3ClmeD Ac+2b6bfkYFqU7L2HmlcGGgqJlVOh1V7duAR9f/m7lbrOuV89vM9aLX4WnIm53ERY+// JakUIJTK/V3iyal/h3g32iGQr4oDDS7lWj4uxVDjKFTFn2nRpnajPPxZ515eutkjtQMK 0Akg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018787; x=1702623587; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Dw1HiXXVLe/1lHZEEZF1Ot3Ar80Z2/bXxftivhX5tWk=; b=PwHPhe7zaz+FgOmhald+ilax3MQd5N6qV9ftN+FobwiKj3EmylDn8iwKvhJjSSlSoq lvX6gZB/M4IrKP+P5ZB1FvqUJSONsr2j1H/ektPMr1y1m8fFPUNlfBQHa8HyEphzQAbu JpFxRrmEcpVFWrAuzncE4HpDeIRwntEECkmUiq1lRqihOZmMe4jOs+MjqTtaDHXGxJcn jvaVqbCAldE3idHUP2fU0sESGlCsVnA3KQaORRs6zQKic/mI+r4UX/NPjjW2gt5efQB/ yG5V9T6hyMX19yYHrk6rLIsfO8iK9vOwOeXktRYibjL+uQWjWe1tnGgtYZqdLs4XOO8f t80Q== X-Gm-Message-State: AOJu0Yx4v5qrVx3GjAgR6BXo2Bx4klXygKT9qVKnpUDIL12/MaD/q2Wv miGra6mUPFuAkoZcJDMvilaB X-Google-Smtp-Source: AGHT+IFlANwUDSGd5XPpy2qZbzYDd6htcTyx/Nw7NjuSSv96jvDu+tD5S18+TtoeaDp8BF0BsIsOLA== X-Received: by 2002:a05:6a20:6e22:b0:18f:97c:4f4b with SMTP id go34-20020a056a206e2200b0018f097c4f4bmr2292930pzb.87.1702018786881; Thu, 07 Dec 2023 22:59:46 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:46 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam , Bart Van Assche Subject: [PATCH v2 06/17] scsi: ufs: qcom: Export ufshcd_{enable/disable}_irq helpers and make use of them Date: Fri, 8 Dec 2023 12:28:51 +0530 Message-Id: <20231208065902.11006-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Instead of duplicating the enable/disable IRQ part, let's export the helpers available in ufshcd driver and make use of them. This also fixes the possible redundant IRQ disable before asserting reset (when IRQ was already disabled). Fixes: 4a791574a0cc ("scsi: ufs: ufs-qcom: Disable interrupt in reset path") Reviewed-by: Bart Van Assche Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/core/ufshcd.c | 6 ++++-- drivers/ufs/host/ufs-qcom.c | 9 +++------ include/ufs/ufshcd.h | 2 ++ 3 files changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/ufs/core/ufshcd.c b/drivers/ufs/core/ufshcd.c index 8b1031fb0a44..671facc73921 100644 --- a/drivers/ufs/core/ufshcd.c +++ b/drivers/ufs/core/ufshcd.c @@ -289,21 +289,23 @@ static void ufshcd_wb_toggle_buf_flush_during_h8(struct ufs_hba *hba, static void ufshcd_hba_vreg_set_lpm(struct ufs_hba *hba); static void ufshcd_hba_vreg_set_hpm(struct ufs_hba *hba); -static inline void ufshcd_enable_irq(struct ufs_hba *hba) +void ufshcd_enable_irq(struct ufs_hba *hba) { if (!hba->is_irq_enabled) { enable_irq(hba->irq); hba->is_irq_enabled = true; } } +EXPORT_SYMBOL_GPL(ufshcd_enable_irq); -static inline void ufshcd_disable_irq(struct ufs_hba *hba) +void ufshcd_disable_irq(struct ufs_hba *hba) { if (hba->is_irq_enabled) { disable_irq(hba->irq); hba->is_irq_enabled = false; } } +EXPORT_SYMBOL_GPL(ufshcd_disable_irq); static void ufshcd_configure_wb(struct ufs_hba *hba) { diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index d474de0739e4..604273a22afd 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -300,8 +300,7 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba) return 0; reenable_intr = hba->is_irq_enabled; - disable_irq(hba->irq); - hba->is_irq_enabled = false; + ufshcd_disable_irq(hba); ret = reset_control_assert(host->core_reset); if (ret) { @@ -324,10 +323,8 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba) usleep_range(1000, 1100); - if (reenable_intr) { - enable_irq(hba->irq); - hba->is_irq_enabled = true; - } + if (reenable_intr) + ufshcd_enable_irq(hba); return 0; } diff --git a/include/ufs/ufshcd.h b/include/ufs/ufshcd.h index 7f0b2c5599cd..f1fc16ac6af2 100644 --- a/include/ufs/ufshcd.h +++ b/include/ufs/ufshcd.h @@ -1231,6 +1231,8 @@ static inline void ufshcd_rmwl(struct ufs_hba *hba, u32 mask, u32 val, u32 reg) ufshcd_writel(hba, tmp, reg); } +void ufshcd_enable_irq(struct ufs_hba *hba); +void ufshcd_disable_irq(struct ufs_hba *hba); int ufshcd_alloc_host(struct device *, struct ufs_hba **); void ufshcd_dealloc_host(struct ufs_hba *); int ufshcd_hba_enable(struct ufs_hba *hba); From patchwork Fri Dec 8 06:58:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752341 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="wmE7sC40" Received: from mail-pl1-x635.google.com (mail-pl1-x635.google.com [IPv6:2607:f8b0:4864:20::635]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B0F91981 for ; Thu, 7 Dec 2023 22:59:52 -0800 (PST) Received: by mail-pl1-x635.google.com with SMTP id d9443c01a7336-1d0538d9bbcso16074955ad.3 for ; Thu, 07 Dec 2023 22:59:52 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018791; 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Thu, 07 Dec 2023 22:59:51 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:51 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 07/17] scsi: ufs: qcom: Fail ufs_qcom_power_up_sequence() when core_reset fails Date: Fri, 8 Dec 2023 12:28:52 +0530 Message-Id: <20231208065902.11006-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Even though core_reset is optional, a failure during assert/deassert should be considered fatal, if core_reset is available. So fail ufs_qcom_power_up_sequence() if an error happens during reset and also get rid of the redundant warning as the ufs_qcom_host_reset() function itself prints error messages. Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 604273a22afd..365a61dbf7ea 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -317,9 +317,11 @@ static int ufs_qcom_host_reset(struct ufs_hba *hba) usleep_range(200, 210); ret = reset_control_deassert(host->core_reset); - if (ret) + if (ret) { dev_err(hba->dev, "%s: core_reset deassert failed, err = %d\n", __func__, ret); + return ret; + } usleep_range(1000, 1100); @@ -359,8 +361,7 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba) /* Reset UFS Host Controller and PHY */ ret = ufs_qcom_host_reset(hba); if (ret) - dev_warn(hba->dev, "%s: host reset returned %d\n", - __func__, ret); + return ret; /* phy initialization - calibrate the phy */ ret = phy_init(phy); From patchwork Fri Dec 8 06:58:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751685 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="ZBAeNsBY" Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8E0511732 for ; Thu, 7 Dec 2023 22:59:57 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id d9443c01a7336-1d0538d9bbcso16075335ad.3 for ; Thu, 07 Dec 2023 22:59:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018797; x=1702623597; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IYI4r4XUuz71I8vtap69MBMVnAez8i9Yk5eIAeppyug=; b=ZBAeNsBYKFU6yv7U6js/AeSEAZxZd4Sb7ZMu8QoIGbq2AirNBiX6RdLDNMBi7cL0Ys JjOmpWWcJNU0AZptgaBLjNDy0ZyFvE/jE0lNjwhvOSh5KOfOyaB6zTrFjtMWv1UVVNit UCrbsMbSIqWtJnQLWrhkAVNHJYGJPKQVor8+wbfeE6k9da2YxD0R1KFE67g+Tkwf5IzT Yefa9zgu96kGnSlXiy2pQMd/+IP5BkSKvFdI4O3UHfYF9AvCis4fw5noOf44RxYDcfrI bpdV6jaPr0xhv6u14efok+aUeYTQUJjV+hvd7u9bF+nPpn4frnWrg8gKI5MqkjC+5W53 qdCA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018797; x=1702623597; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IYI4r4XUuz71I8vtap69MBMVnAez8i9Yk5eIAeppyug=; b=uG/c964dXKtW2PdPF/QA6S2NgxHm+7XpUjjOWSktlU2UPNP9NZDOOWr0FXiEg57kyw 7URWayaIka6ZTfmNRI1Z5U/Gj/UlTIXMb/KpIFfMW2pZtmKklTywcB8XvI7lZpGDdsBd fMzvEOXMiKaAw1czAXRQ+MUFArxtnIZ7kqnYDTZNDmCU41xMElAIzpvEVIGXaLDFd2bu 6bf60cU+7p3mt5aQpFbRu9moB8h34pSvuev+yaLCtY4DOgchWX4sgRplgEPGQmCxVtLt dokbdzvDSrHWYyc+zdPAEPYnEKX3TdhRw5hyr3C2ST2Crn65iMQWwHtR9oictBQr5HnY DUUw== X-Gm-Message-State: AOJu0YwVdvuY/x7WqNbXi0NgIQvryg6RZC/IQFGFL3JEr9K0AaZTKHQp 2baTtGbIeIfU9YkSbNbyjaBk X-Google-Smtp-Source: AGHT+IHEh7rNunBQCv1jB1S67MBGsxYjecPohm97PlMerUQDMElKauhE5n0VNoRMjq4XB4hV8cNaCQ== X-Received: by 2002:a17:903:11d1:b0:1d0:8c04:85fe with SMTP id q17-20020a17090311d100b001d08c0485femr4011908plh.12.1702018797069; Thu, 07 Dec 2023 22:59:57 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 22:59:56 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 08/17] scsi: ufs: qcom: Check the return value of ufs_qcom_power_up_sequence() Date: Fri, 8 Dec 2023 12:28:53 +0530 Message-Id: <20231208065902.11006-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 If ufs_qcom_power_up_sequence() fails, then it makes no sense to enable the lane clocks and continue ufshcd_hba_enable(). So let's check the return value of ufs_qcom_power_up_sequence(). Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 365a61dbf7ea..b141dd2a9346 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -417,7 +417,10 @@ static int ufs_qcom_hce_enable_notify(struct ufs_hba *hba, switch (status) { case PRE_CHANGE: - ufs_qcom_power_up_sequence(hba); + err = ufs_qcom_power_up_sequence(hba); + if (err) + return err; + /* * The PHY PLL output is the source of tx/rx lane symbol * clocks, hence, enable the lane clocks only after PHY From patchwork Fri Dec 8 06:58:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752340 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="w17CAwjn" Received: from mail-pl1-x62c.google.com (mail-pl1-x62c.google.com [IPv6:2607:f8b0:4864:20::62c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4D9631989 for ; Thu, 7 Dec 2023 23:00:02 -0800 (PST) Received: by mail-pl1-x62c.google.com with SMTP id d9443c01a7336-1d0538d9bbcso16075695ad.3 for ; Thu, 07 Dec 2023 23:00:02 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018802; x=1702623602; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ZMlhD8WS0RVtXNWZq8+Ekz+zAl7Mbew6ctHcI4T3R2A=; b=w17CAwjnBiSA5PJez0PVyJiJdKr/bj+JBOG20onw+6Kv5mV1jQX9kB9ucvfRm1QHs/ c2jwDB3MqsglMdnhWbqWuVqvbrVeQDGTlTDVBigWMpryNNVx3vhS39gDjuuYbyj5c21y QwyephmqTeaTT4CfzzCZ41c7fNJfP3LTVWWvLKXlxQnlBA+0NWY+ZTUdV6b8TOnMzk4T Cpc3d7vOH+etmycLfQrfGZIq8xioTBmpi/zHcLTL+1KbcWybspNc6wNRzGty9KJxe3yF oW8pr+uHjJbTuEO66KtKGY/qFPGm1xz9XXxvboOb5DgLmoGAGnfKvB2JalZ8VVqWecKG Yfmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018802; x=1702623602; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ZMlhD8WS0RVtXNWZq8+Ekz+zAl7Mbew6ctHcI4T3R2A=; b=OrnQtMaTE/9TVuC5MtWaSoWhELDa0np5wOpvDlWXooyQa8HqHJhqQPlSVRgFaSlh3q A6tGbXb65r0ElbMkmYHDJAm8/ij8GvqmpSig2vS0lT+9vYC/W0PuCqyieJVW4lzii0hD mCBzh1Et7QgcEKJJy2sCTXlkF7wOiDm6flYW+YkKW8LVMFp9Hcmqi1E4S6sXDSxGP61Y C/QS/RRiWUA1fWgjvwu3bNaPY1E9dgUaHeDpK8LcKzFd1BoJZhF9uwSI87Od6imc8CZ2 ijCfxxZxThbDE8KphM0ar9Yp7Ox+HJvAnslHgvCjIVSHnLQgItaHOAp+5u5KPhnwB4Hv 17Vg== X-Gm-Message-State: AOJu0YyFSPCUmKB95kzMOaslrY67kpzW1vUtMtSAKH1i1L78/BC9iRL6 gogdatIkuiWPeW8Iah5nzt4c X-Google-Smtp-Source: AGHT+IHccpHpLogCcC55e3YdRrf5zzuYzDmRVH4d9uufAv8PswsFT4A1IbRSAb8WkK22n3+dGsOP0g== X-Received: by 2002:a17:902:f68e:b0:1cf:ad5f:20ab with SMTP id l14-20020a170902f68e00b001cfad5f20abmr4410627plg.19.1702018801803; Thu, 07 Dec 2023 23:00:01 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.22.59.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:01 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 09/17] scsi: ufs: qcom: Remove redundant error print for devm_kzalloc() failure Date: Fri, 8 Dec 2023 12:28:54 +0530 Message-Id: <20231208065902.11006-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 devm_kzalloc() will itself print the error message on failure. So let's get rid of the redundant error message in ufs_qcom_init(). Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index b141dd2a9346..05a9a25bc34c 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1109,10 +1109,8 @@ static int ufs_qcom_init(struct ufs_hba *hba) struct ufs_clk_info *clki; host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); - if (!host) { - dev_err(dev, "%s: no memory for qcom ufs host\n", __func__); + if (!host) return -ENOMEM; - } /* Make a two way bind between the qcom host and the hba */ host->hba = hba; From patchwork Fri Dec 8 06:58:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751684 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="KwCmZLtz" Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 58C4D1733 for ; Thu, 7 Dec 2023 23:00:07 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1d053c45897so15930945ad.2 for ; Thu, 07 Dec 2023 23:00:07 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018807; x=1702623607; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=HoOVNeTfZvxRIC3uL7kjE8KmflrgcfElV/ugTIZ3BFU=; b=KwCmZLtzfSCH+x9hWctFcR/nNTj+bpNObKtuFEb3EGFPHCMpr9jV9m+WJQmAeTKd4y tagRMoCVcQEjRlSbvbyeL6lpIhUUi0NsydWMTPVuP+7ghJuICuzcPkyT+MH8Vc70ZN5H cKWV8cop1/h6bljcUrVk1vIQJ9XxSGXxGgjOjToYJsz8nTxG5pkCvvj/pz0oZ/SL6DXr OEEPbHxOrpJPPWxy4aSWPMgX7ssCMeon2UIHRC93lRvRCGRwVWQO8kNo3t7FYdDinA1c KzVEDmG70NT8VYjI69Dc0iinNp0xr1wJsuNMO2o2P5YtNI4eTLTb3gBlXuHNv7qu9VBp LWGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018807; x=1702623607; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=HoOVNeTfZvxRIC3uL7kjE8KmflrgcfElV/ugTIZ3BFU=; b=FUwYEJx7ZT6XA9ndcVq+Ab1SXyoJmrJkUe/L/0mS/LriRpsj+D9q5/5aLKBZH4xQb6 ET6ql8GO/rvaBzjpSEPT9u6P8yH4IN+DLL2c1ecCCwp4zc5VkaUE9zdaPACVdkY9Ty83 WLKtOBaVWSqpqkxwd5459SvLm2Pdk1xqxdqPjxtkiZHML+oX40rwN/+JkCmL13uH7TA/ h8ikpYdILP+f0qfc3IA0FruMav3CDChud1F3sS0efIGpXEfCdsRKl1VswTdtq4kM6/U6 yRD8bpIBe/wSKfgRRounYTx2FJT+DRBsvj3GDOyV4PWYCrV3M/8kJaBlPMYvmXpmCwlw Xd3g== X-Gm-Message-State: AOJu0YwhF/KITTYkCx8XkN8jEHG2oM7vC2p5aZrmIBLs8ecSacxkZvrr Fz8bZql9HDPSZgCAlE9v/vvh X-Google-Smtp-Source: AGHT+IFHXjjSzEnbJQ69uJyZLTm7fPUJl9zwEdBx4rjFX7xj02p474j1v153Jofqvy+9awTQ2dmKgg== X-Received: by 2002:a17:902:d2cd:b0:1d0:6ffd:9e22 with SMTP id n13-20020a170902d2cd00b001d06ffd9e22mr4168124plc.116.1702018806680; Thu, 07 Dec 2023 23:00:06 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.23.00.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:06 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 10/17] scsi: ufs: qcom: Use dev_err_probe() to simplify error handling of devm_gpiod_get_optional() Date: Fri, 8 Dec 2023 12:28:55 +0530 Message-Id: <20231208065902.11006-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 As done in other places, let's use dev_err_probe() to simplify the error handling while acquiring the device reset gpio using devm_gpiod_get_optional(). While at it, let's reword the error message to make it clear that the failure is due to acquiring "device reset gpio". Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 05a9a25bc34c..ae9fafa49ded 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1148,9 +1148,8 @@ static int ufs_qcom_init(struct ufs_hba *hba) host->device_reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); if (IS_ERR(host->device_reset)) { - err = PTR_ERR(host->device_reset); - if (err != -EPROBE_DEFER) - dev_err(dev, "failed to acquire reset gpio: %d\n", err); + err = dev_err_probe(dev, PTR_ERR(host->device_reset), + "Failed to acquire device reset gpio\n"); goto out_variant_clear; } From patchwork Fri Dec 8 06:58:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752339 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="i0ARUHZI" Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BBB0B173C for ; Thu, 7 Dec 2023 23:00:12 -0800 (PST) Received: by mail-pl1-x629.google.com with SMTP id d9443c01a7336-1d0ccda19eeso14900815ad.1 for ; Thu, 07 Dec 2023 23:00:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018812; x=1702623612; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=vdbM2PfYii852DpHOsW1XBn04AhqRFyeEuBtlshPQPM=; b=i0ARUHZIMZo3TUvm3DwNHIDr/NbD045vDQfkr+NwCagtWvBDh+YCk7qXGqv1vasn33 169Y9Kf9/+7TqODM+Gfc6eCXo1ik3h221iInYdO/xD3BTc/YR4m2VILeMSyvp9tktLuq EI6pNvaJ+bKijhMCWbqyZUmGZLSieTm1DIlJfnLsOxxBwaXIARaH1kcfzeAW5PkeQmB4 ApHH2FICEypauGNsRCEmzu28k6ydo4HLH7lDCBXwGxu+xq3UWk+IzJgVn4dnfPLytKnZ y0ILhJtutPFvAgf5SDeGCHzMmYPZsa9mM4nbTjyCDeaS62kFYAWs/knyxaFYiMaE/znw NQ1g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018812; x=1702623612; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vdbM2PfYii852DpHOsW1XBn04AhqRFyeEuBtlshPQPM=; b=mMtsheWdEbEIfey/ZYcbQXurhq2nyrcKqUmoqPZKX81+W0zXMMqr3nyvayaaQwadAi RrZ61pnQjbWyTrCCol8SBtlw0W9TIGs3PU2v1VkwFYYJFZmXyqfihGUamchsiE+C7sis vx/eRCoJZW6cCfOk1jyy/Dd0lem/cSa+m8TT8FHXf2i3DCcPYIkiaQxHRtNT/YMu2uo3 PondZv5xRBF3/eCUNq0nXZWrQ6v97++4b6TtwG+obmVS4oaa3lV3tBvLY1qoP25CEXNi LfySMaektYIoIGquPZWD6iNqITFRufa/p63abNBXkRWuJPMlDxWPgFuOmPBW9byxgozD qoXw== X-Gm-Message-State: AOJu0YyqXJ1WHkRKyijj9Wsmk0qJKFja1XnEfACyhHbw2KJuYWIGmUjo 9vAHu+o0DOb6rBw46PAGarpFMy4zaA98Ke3ZpQ== X-Google-Smtp-Source: AGHT+IGv+GAPa6Ypg344o0UlsXWILp6Hb3RQcQuHpl5BD9CYuBn23Qp5TZa5x8eqFhl33IaLmcYJxg== X-Received: by 2002:a17:903:2115:b0:1d0:a0dd:7d3b with SMTP id o21-20020a170903211500b001d0a0dd7d3bmr2951714ple.65.1702018811863; Thu, 07 Dec 2023 23:00:11 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.23.00.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:11 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 11/17] scsi: ufs: qcom: Remove unused ufs_qcom_hosts struct array Date: Fri, 8 Dec 2023 12:28:56 +0530 Message-Id: <20231208065902.11006-12-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 ufs_qcom_hosts array is assigned, but not used anywhere. So let's remove it. Reviewed-by: Andrew Halaney Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 5 ----- drivers/ufs/host/ufs-qcom.h | 1 - 2 files changed, 6 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index ae9fafa49ded..18ea41f5bae9 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -90,8 +90,6 @@ static const struct __ufs_qcom_bw_table { [MODE_MAX][0][0] = { 7643136, 307200 }, }; -static struct ufs_qcom_host *ufs_qcom_hosts[MAX_UFS_QCOM_HOSTS]; - static void ufs_qcom_get_default_testbus_cfg(struct ufs_qcom_host *host); static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up); @@ -1194,9 +1192,6 @@ static int ufs_qcom_init(struct ufs_hba *hba) ufs_qcom_setup_clocks(hba, true, POST_CHANGE); - if (hba->dev->id < MAX_UFS_QCOM_HOSTS) - ufs_qcom_hosts[hba->dev->id] = host; - ufs_qcom_get_default_testbus_cfg(host); err = ufs_qcom_testbus_config(host); if (err) diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index e2df4c528a2a..53db424a0bcb 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -10,7 +10,6 @@ #include #include -#define MAX_UFS_QCOM_HOSTS 1 #define MAX_U32 (~(u32)0) #define MPHY_TX_FSM_STATE 0x41 #define TX_FSM_HIBERN8 0x1 From patchwork Fri Dec 8 06:58:57 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751683 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TcHOM3b8" Received: from mail-pf1-x42e.google.com (mail-pf1-x42e.google.com [IPv6:2607:f8b0:4864:20::42e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1A8CE172D for ; Thu, 7 Dec 2023 23:00:17 -0800 (PST) Received: by mail-pf1-x42e.google.com with SMTP id d2e1a72fcca58-6ceb27ec331so1191358b3a.1 for ; Thu, 07 Dec 2023 23:00:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018816; x=1702623616; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=K6ZqhhOHk2iNfWUUPqiv/O7Z6HQrUwIXBT8R8ig4LQ0=; b=TcHOM3b8w6bUNscJUzlIR2LKRSMxUkzNx+FmyjKZRgrwr0+tmAMBrnKTamikcxoaIQ oBBelnXaUJQC1JDVRBQmkTej2FaMoE5srNZ+6PVdPVYdozpMqYvS8D1qux6xRtsxChVA sGxFZmR8MnqW7ogOcf6365wzn+9mBQ0S0nhCRuBk7NMrdY+WeZlGdSLEiuqNajiMU7MB OKz6l/HmoHy14HAZXokfk7R2vmGRe7KlDJ20JwHpfc5vUTSWJ3F4BvYDIRRgJ4/kEZa1 8NZEHdP6J/HqDdchbgZ9qN+ZieTKGHDTFYr5o9jrwpd4Io2tzKoGpm7iFAACwLERmDVQ 6a4Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018816; x=1702623616; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=K6ZqhhOHk2iNfWUUPqiv/O7Z6HQrUwIXBT8R8ig4LQ0=; b=dZ9mAFb7gJtFtLTTbHJlHuALo7l3m3ND4ZzlD3o/S2PnAqDNL+e/EOlsT7kY3fIk6a fNL14qwtEiaCWJfxYku7vN86M7FbdC59N1NdZnTxavjLZFDxukVAdIz6FgxtKhpmGLMQ uHeP1+Wm5Sr/UsP2+RIDcm8eCNQyoQPwM4r42cSP1OaoP5je75IJj+7co/739oNTsBfY GXQzELzzuW0vgaNKL1y/bd4VkN+Sw1VHEBdMua/sA9JdGvAuEAxyjM+R4uufcqafpZ1r gIzH3zAv8ffdMYG34FBM3nmy2Nv6HwpEdJVTF+Wt4SauM2q9j8jJgm43Hi4KEZwZ5ZAZ K5cg== X-Gm-Message-State: AOJu0Yz6Xfx5L5e+1/cMta1rNWf0xElaiCkdzWde5u4sV48BXwoQnoAt LfC0lqTmaqg5JzbNRzMZpKfL X-Google-Smtp-Source: AGHT+IHGJSyyR4qnCzZSWOR7Wvf2gGJRyDqvdyimicieitTIKsqODVDkpz0nWgn3k5ddWRH7obqebA== X-Received: by 2002:a05:6a20:8f05:b0:190:20d:5b94 with SMTP id b5-20020a056a208f0500b00190020d5b94mr2195421pzk.27.1702018816569; Thu, 07 Dec 2023 23:00:16 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.23.00.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:16 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 12/17] scsi: ufs: qcom: Sort includes alphabetically Date: Fri, 8 Dec 2023 12:28:57 +0530 Message-Id: <20231208065902.11006-13-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Sort includes alphabetically. Reviewed-by: Nitin Rawat Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 18ea41f5bae9..7fbd35a3eb81 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -4,26 +4,26 @@ */ #include -#include #include #include +#include +#include #include #include #include -#include #include -#include +#include #include -#include +#include #include #include -#include "ufshcd-pltfrm.h" -#include -#include "ufs-qcom.h" #include #include +#include +#include "ufshcd-pltfrm.h" +#include "ufs-qcom.h" #define MCQ_QCFGPTR_MASK GENMASK(7, 0) #define MCQ_QCFGPTR_UNIT 0x200 From patchwork Fri Dec 8 06:58:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752338 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="YeyAgzSG" Received: from mail-pl1-x62f.google.com (mail-pl1-x62f.google.com [IPv6:2607:f8b0:4864:20::62f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0033BD54 for ; Thu, 7 Dec 2023 23:00:21 -0800 (PST) Received: by mail-pl1-x62f.google.com with SMTP id d9443c01a7336-1d2eb06ab11so3998835ad.1 for ; Thu, 07 Dec 2023 23:00:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018821; x=1702623621; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LGLbsXXGOS5hXbJdfbXpRGohhCcqKUKVxgEMXEAy08s=; b=YeyAgzSGcDH+2e7mqUPgeHxqYUjbbNguQ3NgSgLy8KXb37NZm2krkB/+f9OXYjUqMK sEXsPwQzfm+uGCGugVgye7qgyHpoIzFi30oGTubgjjR0Zb8aaZ0KMwJR9dGmm56SqqUu /PAijbv9nP/ZhIk4Lz2utUCTppKLSyXOX3Vnk/nIBpa1NGVPbMrBA04ecUlpVuXFjhHu JP2mo+qGTG4ljzQyXS279N6RjvkcSP+2IErsnn6ErgYnFc0H6HHYA/3SWJpTgMVMB9qP 8o0frzK1OfXLKkrwI4GsYdojndt1+IH2U3HGknpFhmBlzlG6oo39RQvQXbx2z2mqXxsT 73cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018821; x=1702623621; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LGLbsXXGOS5hXbJdfbXpRGohhCcqKUKVxgEMXEAy08s=; b=B6sORf320PXtlkEEDBq3RgF52ClyOBm55T4PzmGJoyw/0rD1ziWa7saKHJEDRWDpaK C3hCrMkQcaW/8W3MoIGj/e87OauCs+xPm4In5jI79DtSgZZ4pIAdSdypqNRoNiIUcQwx TFaKwXUbDGMwtMgeODChFY+OXxCYw51QmXDMNpCtAn45Qbpac2Z57wdjKTSph7abAzpb 9JB9gu1aFOagLjo35JGp7rQ4Dkmo4wHoUGPIth8rRF5Wf8aMEqfBAVWUxE78nwWd6ILY hO1wYQrz+nhXqg2DbbFvkla4NL/8TuvmwJv+i/zJPgpdlRJIoKEnoJdhVdZbm3fFmC4n CcUA== X-Gm-Message-State: AOJu0YzLbX/AhywJXjzXaREQf6EQCKJIfAjx/FaIjfEq8DFQCqBAocz9 7rvDR7JDt7m9pIoVm3j7ZWv8 X-Google-Smtp-Source: AGHT+IFVUyG4dUS2LcbHQXN+dYuFi0KCByDG/dbfAzTMOhqxdP9LZSqbkTlmoGdGcQDFMbhwvqbFcw== X-Received: by 2002:a17:902:b70d:b0:1d0:8c3c:a123 with SMTP id d13-20020a170902b70d00b001d08c3ca123mr3278106pls.38.1702018821392; Thu, 07 Dec 2023 23:00:21 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.23.00.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:20 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 13/17] scsi: ufs: qcom: Initialize cycles_in_1us variable in ufs_qcom_set_core_clk_ctrl() Date: Fri, 8 Dec 2023 12:28:58 +0530 Message-Id: <20231208065902.11006-14-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In case the "core_clk_unipro" clock is not provided, "cycles_in_1us" variable will be used as uninitialized. So initialize it with 0. Issue reported by Smatch tool: drivers/ufs/host/ufs-qcom.c:1336 ufs_qcom_set_core_clk_ctrl() error: uninitialized symbol 'cycles_in_1us'. drivers/ufs/host/ufs-qcom.c:1341 ufs_qcom_set_core_clk_ctrl() error: uninitialized symbol 'cycles_in_1us'. Reviewed-by: Nitin Rawat Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 7fbd35a3eb81..9b3d6d3609c9 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1298,7 +1298,7 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up) struct ufs_qcom_host *host = ufshcd_get_variant(hba); struct list_head *head = &hba->clk_list_head; struct ufs_clk_info *clki; - u32 cycles_in_1us; + u32 cycles_in_1us = 0; u32 core_clk_ctrl_reg; int err; From patchwork Fri Dec 8 06:58:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751682 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="rHOy/IwR" Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2ED23198E for ; Thu, 7 Dec 2023 23:00:27 -0800 (PST) Received: by mail-pl1-x632.google.com with SMTP id d9443c01a7336-1d03bcf27e9so14975225ad.0 for ; Thu, 07 Dec 2023 23:00:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018826; x=1702623626; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=jL9z1/vZzZLZROJW1gRidiD4hf3DEiFp/UIXcZDRkcc=; b=rHOy/IwRDg2AySpVozsj22bhZyCdt7kqO7MXbP6bnYQMYOHMoYzuZXLUoERX3N0mN7 IurNclhZJEo6Rx3L6ew9ak6HgTinNzyX+272zGGaaqYrd0JDwTuZDD75PTr3/bZt78kD Pd3t8zhHPefB8BXvX0SyTThkwDW1uPSmkOUkCjX/XhcOQJTjQ7owj8ThMJcS8Vx4uZPy eUiL6oXivScdDyPps+PY/mw4Yr4YKERvxSUZddPzeNxF9oE7ibC9sdO71XmE/F0Z64kM WCCI//5VF7+TzTOBFWX8FnoWSMfgolWNp5JS3DE5+09LBd2CMpuKUtpWx383EEbaNblE cDUQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018826; x=1702623626; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=jL9z1/vZzZLZROJW1gRidiD4hf3DEiFp/UIXcZDRkcc=; b=gDgFusj2+1bQCEd6vJQYwrXPT9DPUQYD5bCSrZg5IBl5Ioqne0FDSA+S3K8gAhk9jJ m6sY9WFqleJahvBFcukjwbKFapuQ9TGT+lAN/uTpSWm/7R2Qd0p8xrA22Ko58yqe0ffx gqXS6wMwuUQIgMSYdJIDhAyuz5uIvL723MfFg1u6fQRHJeT58hJsWYXaxHPnyd15FoVw 2/KDFCOvLpmYCDJKZ5a7lQGXSEa/31DdO6QGSbzs24oL5+GeDVZPFCbbjMx9qtkg5hCO 4JvWnozKIepbl8oFQAwDJ9J0c6s/1hapkVWbuptjH8t6bMQGKD8eL4ZvyGeOVYyU3Ipz LxVQ== X-Gm-Message-State: AOJu0YyKX5uwYncpeFsL5kXhyKxsR9pkYIn+A8xO4rlR4TAsfjf9d0U3 7zeKVPjJqhMiljX8Wkuj7rXD X-Google-Smtp-Source: AGHT+IGCvffDTxUFdEuyd5JIhFtq68gOkH/G7XBlHWwJltw1YgZE13vGTg+aS1+bHxo+EqtrQfQy/Q== X-Received: by 2002:a17:903:247:b0:1d0:5878:d4e3 with SMTP id j7-20020a170903024700b001d05878d4e3mr4024291plh.9.1702018826702; Thu, 07 Dec 2023 23:00:26 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.23.00.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:26 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 14/17] scsi: ufs: qcom: Simplify ufs_qcom_{assert/deassert}_reset Date: Fri, 8 Dec 2023 12:28:59 +0530 Message-Id: <20231208065902.11006-15-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In both the functions, UFS_PHY_SOFT_RESET contains the mask of the reset bit. So this can be passed directly as the value to be written for asserting the reset. For deasserting, 0 can be passed. This gets rid of the FIELD_PREP() inside these functions and also UFS_PHY_RESET_{ENABLE/DISABLE} definitions. Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.h | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 53db424a0bcb..a109d3359db4 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -92,9 +92,6 @@ enum { #define TEST_BUS_SEL GENMASK(22, 19) #define UFS_REG_TEST_BUS_EN BIT(30) -#define UFS_PHY_RESET_ENABLE 1 -#define UFS_PHY_RESET_DISABLE 0 - /* bit definitions for REG_UFS_CFG2 register */ #define UAWM_HW_CGC_EN BIT(0) #define UARM_HW_CGC_EN BIT(1) @@ -157,8 +154,7 @@ ufs_qcom_get_controller_revision(struct ufs_hba *hba, static inline void ufs_qcom_assert_reset(struct ufs_hba *hba) { - ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, FIELD_PREP(UFS_PHY_SOFT_RESET, UFS_PHY_RESET_ENABLE), - REG_UFS_CFG1); + ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, UFS_PHY_SOFT_RESET, REG_UFS_CFG1); /* * Make sure assertion of ufs phy reset is written to @@ -169,8 +165,7 @@ static inline void ufs_qcom_assert_reset(struct ufs_hba *hba) static inline void ufs_qcom_deassert_reset(struct ufs_hba *hba) { - ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, FIELD_PREP(UFS_PHY_SOFT_RESET, UFS_PHY_RESET_DISABLE), - REG_UFS_CFG1); + ufshcd_rmwl(hba, UFS_PHY_SOFT_RESET, 0, REG_UFS_CFG1); /* * Make sure de-assertion of ufs phy reset is written to From patchwork Fri Dec 8 06:59:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752337 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="y1wpfN8C" Received: from mail-pl1-x62e.google.com (mail-pl1-x62e.google.com [IPv6:2607:f8b0:4864:20::62e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E37C11999 for ; Thu, 7 Dec 2023 23:00:32 -0800 (PST) Received: by mail-pl1-x62e.google.com with SMTP id d9443c01a7336-1d05e4a94c3so15944005ad.1 for ; Thu, 07 Dec 2023 23:00:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702018832; x=1702623632; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=dEBpfCrqRZnjYKfTxZcI34SwwVZWbBFa1yYCM6JT/u4=; b=y1wpfN8C95UxqmktKm7G2HLFr+GqES9CpsCdyGG5CadxzSdPy5AP9GbpC8Qe36UWqS Th0Egq46rflVtSIpgbeX+JGMcSbw4p2Z9aoZLKrdMmUbOI4UToXAnaa5tx7KenmRQ7w/ hMvIbCHpwzapxIyMXVKV+SwBnyTNEoeBv+Tlg82lYezLQHyNRfuCbXPzX2LDli2WUnEz ASOTg2uC7PTdpp7FLeXTb9gCiRPo/ovN6eRn/RjK5XR3KM2iQxfEUddUlPvR33iK65TE AwpLytyRcydOEFBU65x5r8JecY9Ba8rlv9vG+MTlq1ME2+WOseB9dcgjf5a28r7dKIWE xxyQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702018832; x=1702623632; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=dEBpfCrqRZnjYKfTxZcI34SwwVZWbBFa1yYCM6JT/u4=; b=aBoIZyX/XRZggIW0Y5NtdrqgABV7HAz1QVIDutM9iG5/jKqVjEjX/OMC8qH2Q2MRDf EmiusGqbS5cGNY0i6qcPM8hxYlVTHOe0QD9SpdNP2uF56fQq3kvoHf5aQ+2iCNlhKioX 4bOUr/NsQxlof1jWT3FH0Bu2hZSoXaa4qaXe4b3VaemEjNCVOtSf2zP+pYoLBDp6AL/S I8cpDEgDulxuMk7/tj5lGUGLLbcja9KOF6v3MaoGW1AWkF2ZcvqI4w5OC8de0ZG5i6uo X2BQlVdRvR/V+owtUAPpmfu0suUXUfaSwvqZ6W7haT8nliim12fEE73tq8fsZKRqLwph PV4A== X-Gm-Message-State: AOJu0Yxz8VVgg4hxW8RJpH61FU4HyPORhv0i7zm6Y1nfzVRdygnZ9LnZ c5iqrhWPYY7c8HD4ZqIkcKYP X-Google-Smtp-Source: AGHT+IHsPFGuGIcIX1P6q3HX0uLqAF+K1SKij2Se88dzPjPrLccO1PEACetl/ZR8Xty6jgQ27rgMBQ== X-Received: by 2002:a17:903:2290:b0:1b8:90bd:d157 with SMTP id b16-20020a170903229000b001b890bdd157mr4567792plh.26.1702018832382; Thu, 07 Dec 2023 23:00:32 -0800 (PST) Received: from localhost.localdomain ([117.216.123.142]) by smtp.gmail.com with ESMTPSA id n8-20020a170902e54800b001b03f208323sm934263plf.64.2023.12.07.23.00.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Dec 2023 23:00:31 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 15/17] scsi: ufs: qcom: Remove support for host controllers older than v2.0 Date: Fri, 8 Dec 2023 12:29:00 +0530 Message-Id: <20231208065902.11006-16-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The legacy platforms making use of host controllers older than version 2.0 are not supported in upstream. So there is no need to carry code to support them. Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 196 ++---------------------------------- drivers/ufs/host/ufs-qcom.h | 27 ----- 2 files changed, 11 insertions(+), 212 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 9b3d6d3609c9..26aa8904c823 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -274,9 +274,7 @@ static int ufs_qcom_check_hibern8(struct ufs_hba *hba) static void ufs_qcom_select_unipro_mode(struct ufs_qcom_host *host) { - ufshcd_rmwl(host->hba, QUNIPRO_SEL, - ufs_qcom_cap_qunipro(host) ? QUNIPRO_SEL : 0, - REG_UFS_CFG1); + ufshcd_rmwl(host->hba, QUNIPRO_SEL, QUNIPRO_SEL, REG_UFS_CFG1); if (host->hw_ver.major >= 0x05) ufshcd_rmwl(host->hba, QUNIPRO_G4_SEL, 0, REG_UFS_CFG0); @@ -333,18 +331,8 @@ static u32 ufs_qcom_get_hs_gear(struct ufs_hba *hba) { struct ufs_qcom_host *host = ufshcd_get_variant(hba); - if (host->hw_ver.major == 0x1) { - /* - * HS-G3 operations may not reliably work on legacy QCOM - * UFS host controller hardware even though capability - * exchange during link startup phase may end up - * negotiating maximum supported gear as G3. - * Hence downgrade the maximum supported gear to HS-G2. - */ - return UFS_HS_G2; - } else if (host->hw_ver.major >= 0x4) { + if (host->hw_ver.major >= 0x4) return UFS_QCOM_MAX_GEAR(ufshcd_readl(hba, REG_UFS_PARAM0)); - } /* Default is HS-G3 */ return UFS_HS_G3; @@ -457,41 +445,16 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, { struct ufs_qcom_host *host = ufshcd_get_variant(hba); struct ufs_clk_info *clki; - u32 core_clk_period_in_ns; - u32 tx_clk_cycles_per_us = 0; unsigned long core_clk_rate = 0; u32 core_clk_cycles_per_us; - static u32 pwm_fr_table[][2] = { - {UFS_PWM_G1, 0x1}, - {UFS_PWM_G2, 0x1}, - {UFS_PWM_G3, 0x1}, - {UFS_PWM_G4, 0x1}, - }; - - static u32 hs_fr_table_rA[][2] = { - {UFS_HS_G1, 0x1F}, - {UFS_HS_G2, 0x3e}, - {UFS_HS_G3, 0x7D}, - }; - - static u32 hs_fr_table_rB[][2] = { - {UFS_HS_G1, 0x24}, - {UFS_HS_G2, 0x49}, - {UFS_HS_G3, 0x92}, - }; - /* - * The Qunipro controller does not use following registers: - * SYS1CLK_1US_REG, TX_SYMBOL_CLK_1US_REG, CLK_NS_REG & - * UFS_REG_PA_LINK_STARTUP_TIMER. - * However UTP controller uses SYS1CLK_1US_REG register for Interrupt + * UTP controller uses SYS1CLK_1US_REG register for Interrupt * Aggregation logic. * It is mandatory to write SYS1CLK_1US_REG register on UFS host * controller V4.0.0 onwards. */ - if (host->hw_ver.major < 4 && ufs_qcom_cap_qunipro(host) && - !ufshcd_is_intr_aggr_allowed(hba)) + if (host->hw_ver.major < 4 && !ufshcd_is_intr_aggr_allowed(hba)) return 0; if (gear == 0) { @@ -524,79 +487,6 @@ static int ufs_qcom_cfg_timers(struct ufs_hba *hba, u32 gear, mb(); } - if (ufs_qcom_cap_qunipro(host)) - return 0; - - core_clk_period_in_ns = NSEC_PER_SEC / core_clk_rate; - core_clk_period_in_ns <<= OFFSET_CLK_NS_REG; - core_clk_period_in_ns &= MASK_CLK_NS_REG; - - switch (hs) { - case FASTAUTO_MODE: - case FAST_MODE: - if (rate == PA_HS_MODE_A) { - if (gear > ARRAY_SIZE(hs_fr_table_rA)) { - dev_err(hba->dev, - "%s: index %d exceeds table size %zu\n", - __func__, gear, - ARRAY_SIZE(hs_fr_table_rA)); - return -EINVAL; - } - tx_clk_cycles_per_us = hs_fr_table_rA[gear-1][1]; - } else if (rate == PA_HS_MODE_B) { - if (gear > ARRAY_SIZE(hs_fr_table_rB)) { - dev_err(hba->dev, - "%s: index %d exceeds table size %zu\n", - __func__, gear, - ARRAY_SIZE(hs_fr_table_rB)); - return -EINVAL; - } - tx_clk_cycles_per_us = hs_fr_table_rB[gear-1][1]; - } else { - dev_err(hba->dev, "%s: invalid rate = %d\n", - __func__, rate); - return -EINVAL; - } - break; - case SLOWAUTO_MODE: - case SLOW_MODE: - if (gear > ARRAY_SIZE(pwm_fr_table)) { - dev_err(hba->dev, - "%s: index %d exceeds table size %zu\n", - __func__, gear, - ARRAY_SIZE(pwm_fr_table)); - return -EINVAL; - } - tx_clk_cycles_per_us = pwm_fr_table[gear-1][1]; - break; - case UNCHANGED: - default: - dev_err(hba->dev, "%s: invalid mode = %d\n", __func__, hs); - return -EINVAL; - } - - if (ufshcd_readl(hba, REG_UFS_TX_SYMBOL_CLK_NS_US) != - (core_clk_period_in_ns | tx_clk_cycles_per_us)) { - /* this register 2 fields shall be written at once */ - ufshcd_writel(hba, core_clk_period_in_ns | tx_clk_cycles_per_us, - REG_UFS_TX_SYMBOL_CLK_NS_US); - /* - * make sure above write gets applied before we return from - * this function. - */ - mb(); - } - - if (update_link_startup_timer && host->hw_ver.major != 0x5) { - ufshcd_writel(hba, ((core_clk_rate / MSEC_PER_SEC) * 100), - REG_UFS_CFG0); - /* - * make sure that this configuration is applied before - * we return - */ - mb(); - } - return 0; } @@ -604,7 +494,6 @@ static int ufs_qcom_link_startup_notify(struct ufs_hba *hba, enum ufs_notify_change_status status) { int err = 0; - struct ufs_qcom_host *host = ufshcd_get_variant(hba); switch (status) { case PRE_CHANGE: @@ -615,11 +504,9 @@ static int ufs_qcom_link_startup_notify(struct ufs_hba *hba, return -EINVAL; } - if (ufs_qcom_cap_qunipro(host)) { - err = ufs_qcom_set_core_clk_ctrl(hba, true); - if (err) - dev_err(hba->dev, "cfg core clk ctrl failed\n"); - } + err = ufs_qcom_set_core_clk_ctrl(hba, true); + if (err) + dev_err(hba->dev, "cfg core clk ctrl failed\n"); /* * Some UFS devices (and may be host) have issues if LCC is * enabled. So we are setting PA_Local_TX_LCC_Enable to 0 @@ -918,12 +805,7 @@ static int ufs_qcom_apply_dev_quirks(struct ufs_hba *hba) static u32 ufs_qcom_get_ufs_hci_version(struct ufs_hba *hba) { - struct ufs_qcom_host *host = ufshcd_get_variant(hba); - - if (host->hw_ver.major == 0x1) - return ufshci_version(1, 1); - else - return ufshci_version(2, 0); + return ufshci_version(2, 0); } /** @@ -939,46 +821,21 @@ static void ufs_qcom_advertise_quirks(struct ufs_hba *hba) { struct ufs_qcom_host *host = ufshcd_get_variant(hba); - if (host->hw_ver.major == 0x01) { - hba->quirks |= UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS - | UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP - | UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE; - - if (host->hw_ver.minor == 0x0001 && host->hw_ver.step == 0x0001) - hba->quirks |= UFSHCD_QUIRK_BROKEN_INTR_AGGR; - - hba->quirks |= UFSHCD_QUIRK_BROKEN_LCC; - } - - if (host->hw_ver.major == 0x2) { + if (host->hw_ver.major == 0x2) hba->quirks |= UFSHCD_QUIRK_BROKEN_UFS_HCI_VERSION; - if (!ufs_qcom_cap_qunipro(host)) - /* Legacy UniPro mode still need following quirks */ - hba->quirks |= (UFSHCD_QUIRK_DELAY_BEFORE_DME_CMDS - | UFSHCD_QUIRK_DME_PEER_ACCESS_AUTO_MODE - | UFSHCD_QUIRK_BROKEN_PA_RXHSUNTERMCAP); - } - if (host->hw_ver.major > 0x3) hba->quirks |= UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH; } static void ufs_qcom_set_caps(struct ufs_hba *hba) { - struct ufs_qcom_host *host = ufshcd_get_variant(hba); - hba->caps |= UFSHCD_CAP_CLK_GATING | UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; hba->caps |= UFSHCD_CAP_CLK_SCALING | UFSHCD_CAP_WB_WITH_CLK_SCALING; hba->caps |= UFSHCD_CAP_AUTO_BKOPS_SUSPEND; hba->caps |= UFSHCD_CAP_WB_EN; hba->caps |= UFSHCD_CAP_AGGR_POWER_COLLAPSE; hba->caps |= UFSHCD_CAP_RPM_AUTOSUSPEND; - - if (host->hw_ver.major >= 0x2) { - host->caps = UFS_QCOM_CAP_QUNIPRO | - UFS_QCOM_CAP_RETAIN_SEC_CFG_AFTER_PWR_COLLAPSE; - } } /** @@ -1101,9 +958,7 @@ static int ufs_qcom_init(struct ufs_hba *hba) { int err; struct device *dev = hba->dev; - struct platform_device *pdev = to_platform_device(dev); struct ufs_qcom_host *host; - struct resource *res; struct ufs_clk_info *clki; host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); @@ -1154,25 +1009,8 @@ static int ufs_qcom_init(struct ufs_hba *hba) ufs_qcom_get_controller_revision(hba, &host->hw_ver.major, &host->hw_ver.minor, &host->hw_ver.step); - /* - * for newer controllers, device reference clock control bit has - * moved inside UFS controller register address space itself. - */ - if (host->hw_ver.major >= 0x02) { - host->dev_ref_clk_ctrl_mmio = hba->mmio_base + REG_UFS_CFG1; - host->dev_ref_clk_en_mask = BIT(26); - } else { - /* "dev_ref_clk_ctrl_mem" is optional resource */ - res = platform_get_resource_byname(pdev, IORESOURCE_MEM, - "dev_ref_clk_ctrl_mem"); - if (res) { - host->dev_ref_clk_ctrl_mmio = - devm_ioremap_resource(dev, res); - if (IS_ERR(host->dev_ref_clk_ctrl_mmio)) - host->dev_ref_clk_ctrl_mmio = NULL; - host->dev_ref_clk_en_mask = BIT(5); - } - } + host->dev_ref_clk_ctrl_mmio = hba->mmio_base + REG_UFS_CFG1; + host->dev_ref_clk_en_mask = BIT(26); list_for_each_entry(clki, &hba->clk_list_head, list) { if (!strcmp(clki->name, "core_clk_unipro")) @@ -1351,9 +1189,6 @@ static int ufs_qcom_clk_scale_up_pre_change(struct ufs_hba *hba) struct ufs_pa_layer_attr *attr = &host->dev_req_params; int ret; - if (!ufs_qcom_cap_qunipro(host)) - return 0; - ret = ufs_qcom_cfg_timers(hba, attr->gear_rx, attr->pwr_rx, attr->hs_rate, false, true); if (ret) { @@ -1371,13 +1206,9 @@ static int ufs_qcom_clk_scale_up_post_change(struct ufs_hba *hba) static int ufs_qcom_clk_scale_down_pre_change(struct ufs_hba *hba) { - struct ufs_qcom_host *host = ufshcd_get_variant(hba); int err; u32 core_clk_ctrl_reg; - if (!ufs_qcom_cap_qunipro(host)) - return 0; - err = ufshcd_dme_get(hba, UIC_ARG_MIB(DME_VS_CORE_CLK_CTRL), &core_clk_ctrl_reg); @@ -1396,11 +1227,6 @@ static int ufs_qcom_clk_scale_down_pre_change(struct ufs_hba *hba) static int ufs_qcom_clk_scale_down_post_change(struct ufs_hba *hba) { - struct ufs_qcom_host *host = ufshcd_get_variant(hba); - - if (!ufs_qcom_cap_qunipro(host)) - return 0; - /* set unipro core clock attributes and clear clock divider */ return ufs_qcom_set_core_clk_ctrl(hba, false); } diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index a109d3359db4..385480499e71 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -114,13 +114,6 @@ enum { DFC_HW_CGC_EN | TRLUT_HW_CGC_EN |\ TMRLUT_HW_CGC_EN | OCSC_HW_CGC_EN) -/* bit offset */ -#define OFFSET_CLK_NS_REG 0xa - -/* bit masks */ -#define MASK_TX_SYMBOL_CLK_1US_REG GENMASK(9, 0) -#define MASK_CLK_NS_REG GENMASK(23, 10) - /* QUniPro Vendor specific attributes */ #define PA_VS_CONFIG_REG1 0x9000 #define DME_VS_CORE_CLK_CTRL 0xD002 @@ -189,21 +182,6 @@ struct ufs_qcom_testbus { struct gpio_desc; struct ufs_qcom_host { - /* - * Set this capability if host controller supports the QUniPro mode - * and if driver wants the Host controller to operate in QUniPro mode. - * Note: By default this capability will be kept enabled if host - * controller supports the QUniPro mode. - */ - #define UFS_QCOM_CAP_QUNIPRO 0x1 - - /* - * Set this capability if host controller can retain the secure - * configuration even after UFS controller core power collapse. - */ - #define UFS_QCOM_CAP_RETAIN_SEC_CFG_AFTER_PWR_COLLAPSE 0x2 - u32 caps; - struct phy *generic_phy; struct ufs_hba *hba; struct ufs_pa_layer_attr dev_req_params; @@ -253,9 +231,4 @@ ufs_qcom_get_debug_reg_offset(struct ufs_qcom_host *host, u32 reg) int ufs_qcom_testbus_config(struct ufs_qcom_host *host); -static inline bool ufs_qcom_cap_qunipro(struct ufs_qcom_host *host) -{ - return host->caps & UFS_QCOM_CAP_QUNIPRO; -} - #endif /* UFS_QCOM_H_ */ From patchwork Fri Dec 8 06:59:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 751681 Authentication-Results: smtp.subspace.kernel.org; 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Thu, 07 Dec 2023 23:00:36 -0800 (PST) From: Manivannan Sadhasivam To: martin.petersen@oracle.com, jejb@linux.ibm.com Cc: andersson@kernel.org, konrad.dybcio@linaro.org, linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, ahalaney@redhat.com, quic_nitirawa@quicinc.com, Manivannan Sadhasivam Subject: [PATCH v2 16/17] scsi: ufs: qcom: Use ufshcd_rmwl() where applicable Date: Fri, 8 Dec 2023 12:29:01 +0530 Message-Id: <20231208065902.11006-17-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> References: <20231208065902.11006-1-manivannan.sadhasivam@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Instead of using both ufshcd_readl() and ufshcd_writel() to read/modify/ write a register, let's make use of the existing helper. Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 12 ++++-------- drivers/ufs/host/ufs-qcom.h | 3 +++ 2 files changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 26aa8904c823..549a08645391 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -387,9 +387,8 @@ static int ufs_qcom_power_up_sequence(struct ufs_hba *hba) */ static void ufs_qcom_enable_hw_clk_gating(struct ufs_hba *hba) { - ufshcd_writel(hba, - ufshcd_readl(hba, REG_UFS_CFG2) | REG_UFS_CFG2_CGC_EN_ALL, - REG_UFS_CFG2); + ufshcd_rmwl(hba, REG_UFS_CFG2_CGC_EN_ALL, REG_UFS_CFG2_CGC_EN_ALL, + REG_UFS_CFG2); /* Ensure that HW clock gating is enabled before next operations */ mb(); @@ -1689,11 +1688,8 @@ static int ufs_qcom_config_esi(struct ufs_hba *hba) platform_msi_domain_free_irqs(hba->dev); } else { if (host->hw_ver.major == 6 && host->hw_ver.minor == 0 && - host->hw_ver.step == 0) { - ufshcd_writel(hba, - ufshcd_readl(hba, REG_UFS_CFG3) | 0x1F000, - REG_UFS_CFG3); - } + host->hw_ver.step == 0) + ufshcd_rmwl(hba, ESI_VEC_MASK, 0x1f00, REG_UFS_CFG3); ufshcd_mcq_enable_esi(hba); } diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 385480499e71..2ce63a1c7f2f 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -102,6 +102,9 @@ enum { #define TMRLUT_HW_CGC_EN BIT(6) #define OCSC_HW_CGC_EN BIT(7) +/* bit definitions for REG_UFS_CFG3 register */ +#define ESI_VEC_MASK GENMASK(22, 12) + /* bit definitions for REG_UFS_PARAM0 */ #define MAX_HS_GEAR_MASK GENMASK(6, 4) #define UFS_QCOM_MAX_GEAR(x) FIELD_GET(MAX_HS_GEAR_MASK, (x)) From patchwork Fri Dec 8 06:59:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 752336 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="fryJCTfQ" Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 079861984 for ; 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Signed-off-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.h b/drivers/ufs/host/ufs-qcom.h index 2ce63a1c7f2f..cdceeb795e70 100644 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@ -10,22 +10,16 @@ #include #include -#define MAX_U32 (~(u32)0) #define MPHY_TX_FSM_STATE 0x41 #define TX_FSM_HIBERN8 0x1 #define HBRN8_POLL_TOUT_MS 100 #define DEFAULT_CLK_RATE_HZ 1000000 -#define BUS_VECTOR_NAME_LEN 32 #define MAX_SUPP_MAC 64 #define UFS_HW_VER_MAJOR_MASK GENMASK(31, 28) #define UFS_HW_VER_MINOR_MASK GENMASK(27, 16) #define UFS_HW_VER_STEP_MASK GENMASK(15, 0) -/* vendor specific pre-defined parameters */ -#define SLOW 1 -#define FAST 2 - #define UFS_QCOM_LIMIT_HS_RATE PA_HS_MODE_B /* QCOM UFS host controller vendor specific registers */