From patchwork Sat Dec 16 16:26:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 755137 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DB91730355 for ; Sat, 16 Dec 2023 16:27:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="xuJ8Bt8C" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-50bf898c43cso1717011e87.1 for ; Sat, 16 Dec 2023 08:27:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702744022; x=1703348822; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KElCPZfyJpQwk06b+Z31JKlsF2IDE8giU5N99VUu5rY=; b=xuJ8Bt8Czionx8BwbeUV4Z1qqMeu02K9CP18usDetznTpL3NoJjv8GhuIBtVdXCmpN 5WFwTXZH2fj2TaKGTfbdvfTedKp6jcYq6wYr16Q/BwYkO1uGFY3k7LqD6myTqFw5FvOP HZvk3gPW64PL/J8SNr79da2+fvPZip8xva1YhMyP7n+NE29hTDlLzY7jX+o5N8ulD6dQ O3A2boIc2bAXtgV5jNZoKg8wKB0xZlrDmbqGzTqVVd6CmekWa3/+uGj828P6MKHq4Nah huhMEopWT186HRUZencxaXRzEVsdV++rc2kuur6CcgUIfxHXeJk7F3ICPm6S1RAeZLOp +jkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702744022; x=1703348822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KElCPZfyJpQwk06b+Z31JKlsF2IDE8giU5N99VUu5rY=; b=oVf9Px37iVzIGWmF/oEW/iTPa0TU/jaVENXfGCyW0T/IL5hB9xSOf9Bhw1ikpuDsY5 f1JpTTffsTQ0HQxMl39I0MBTBnwkMPULtOEplPEnuMnwWms7lTR+3UWPn+nzYZLlM+L7 sOIROOJAs7SUaZE5ncJBI1lROD7VqbsaxgmYRgQ0H9YoA7cQFyKufbYG5e1QDld6W/9J Wt8HYR4vN6ihpYUVLfg1ia25HgUfJ8KddQTgKGWZSsMWqv2ypQx2ht8snpGinlpfqA2r 3lovEXkkUQBty87lVvwYjPNBLR4SU+HWS1ZsiuiXijIZI33sP4K66zbNknh/7/MuFCSf rp0A== X-Gm-Message-State: AOJu0YzsHO4cZucyVZVCMzB3P9+7qkdK3FMS7+umqYCIiiB1GmcLWLU8 PpdDeAXddhBwoB9WRTe4dFUUkrRdXFwcNifOwS8glvoQ X-Google-Smtp-Source: AGHT+IHJ0WD5two5WbjiaiaYK7rXCoaQopzMhtPMoeu7xcYMpvb1BNyRBM+wF4ZNJogK8hSahkEFQA== X-Received: by 2002:ac2:4e8e:0:b0:50b:ea76:509f with SMTP id o14-20020ac24e8e000000b0050bea76509fmr3427264lfr.64.1702744021897; Sat, 16 Dec 2023 08:27:01 -0800 (PST) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id u19-20020a197913000000b0050e304d437dsm69229lfc.223.2023.12.16.08.27.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:27:01 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Konrad Dybcio , Joerg Roedel , Will Deacon , Robin Murphy Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, Russell King , Joerg Roedel Subject: [PATCH v2 1/3] iommu/msm-iommu: don't limit the driver too much Date: Sat, 16 Dec 2023 18:26:58 +0200 Message-Id: <20231216162700.863456-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231216162700.863456-1-dmitry.baryshkov@linaro.org> References: <20231216162700.863456-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 In preparation of dropping most of ARCH_QCOM subtypes, stop limiting the driver just to those machines. Allow it to be built for any 32-bit Qualcomm platform (ARCH_QCOM). Acked-by: Robin Murphy Acked-by: Joerg Roedel Signed-off-by: Dmitry Baryshkov --- drivers/iommu/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig index 9a29d742617e..0d6095290b6a 100644 --- a/drivers/iommu/Kconfig +++ b/drivers/iommu/Kconfig @@ -179,7 +179,7 @@ config FSL_PAMU config MSM_IOMMU bool "MSM IOMMU Support" depends on ARM - depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST + depends on ARCH_QCOM || COMPILE_TEST select IOMMU_API select IOMMU_IO_PGTABLE_ARMV7S help From patchwork Sat Dec 16 16:26:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 754875 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A60D30356 for ; Sat, 16 Dec 2023 16:27:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="FMZfUhgy" Received: by mail-lf1-f48.google.com with SMTP id 2adb3069b0e04-50e23c620e8so1141722e87.1 for ; Sat, 16 Dec 2023 08:27:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1702744022; x=1703348822; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=MXRZlAau+k7NGTbzeyPNFZOgIyK71YnKo+kgg/iWUAM=; b=FMZfUhgy6QGH2HgtShSxwsyxZ9T/gCgvZz6H3fBMN/7M/wnVxFrEZP0jcWaTKY3iTK uqCfosw6zXGEdQFFpirP2zD4LPVE5ZOrjgHV7RhnwtK0kybC1SLozV4lMO0Po+2k6sIf epaWENhiuiQa1VZ36vS4GDyE0Zrh9OY7Atwy/PBIzSK08CdDzL+G5b7Uu79MahtR8lEZ jpO0CJJ5nTi0iGrVixGqPM4gInBLns/63ZVmOcrsEmYCZYJz1I2P9mnOtoqhzO7g7k79 qePUEFDOfbgv35I9wuLr999kIETd3ToZhyTWTdkVeXBRuWvn5gx1AddyB79TELcB4Z2c Q28w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1702744022; x=1703348822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=MXRZlAau+k7NGTbzeyPNFZOgIyK71YnKo+kgg/iWUAM=; b=PT89ISHqNHdfW/O/h0IMsVZLBs/KSr2HOvQ5JwpEjJJrzK61rtld15GV0qgj7FwxOR 6KRoqVveSoUvh/UkeD/68mkCbsnLtEgTmbj0U2UBnxa3bPOtXUzkVrs6u+vWNL8mO//s LGSWetQ2U/YRTalfShGKBuvAkoBIvb9NCUMXcLQGKQRWpaNjpFgL0PswFuoZz2Dn6/wR Fef78knBmi9D+EugHF5DZsez76dKrgVCgslrH1jHFvTLyGC1rlBu8AUM6FPFITvoo2jK yZR194df7sxUtG0roAgAfBsB7PS3Cs4XSqYY5Q4n/TBtJwj+I6VYeXWRGklr6ef7EkpU PKvg== X-Gm-Message-State: AOJu0YxDBxgL3FdJ+YJ03DHTe9Vz5To1KtsOVVJDk1Na9Gymz9qDUsBi heOLYW+SpteSHk+sk7+rhLp1AQ== X-Google-Smtp-Source: AGHT+IE/jFD3yOHsP0n5a7l283VLf8+ombeu8GqYWfjwZgT22dw0ahGoGVYCJQsfdwyPuBgkZcjp/g== X-Received: by 2002:a19:f70b:0:b0:50c:17d6:fff6 with SMTP id z11-20020a19f70b000000b0050c17d6fff6mr5574410lfe.1.1702744022620; Sat, 16 Dec 2023 08:27:02 -0800 (PST) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id u19-20020a197913000000b0050e304d437dsm69229lfc.223.2023.12.16.08.27.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:27:02 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Konrad Dybcio , Joerg Roedel , Will Deacon , Robin Murphy Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, Russell King Subject: [PATCH v2 2/3] ARM: qcom: drop most of 32-bit ARCH_QCOM subtypes Date: Sat, 16 Dec 2023 18:26:59 +0200 Message-Id: <20231216162700.863456-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231216162700.863456-1-dmitry.baryshkov@linaro.org> References: <20231216162700.863456-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Historically we had several subtypes of 32-bit Qualcomm platforms. Nowadays they became just useless symbols in Kconfig. Drop them and pull corresponding clocksource entries towards top-level ARCH_QCOM entry. Note, I've left ARCH_IPQ40XX, ARCH_MSM8x60 and ARCH_MSM8960 in place, since they have special TEXT_OFFSET handling, which can be sorted out separately. Signed-off-by: Dmitry Baryshkov Acked-by: Konrad Dybcio --- arch/arm/mach-qcom/Kconfig | 30 ++++-------------------------- 1 file changed, 4 insertions(+), 26 deletions(-) diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig index 12a812e61c16..27d5ca0043be 100644 --- a/arch/arm/mach-qcom/Kconfig +++ b/arch/arm/mach-qcom/Kconfig @@ -4,46 +4,24 @@ menuconfig ARCH_QCOM depends on ARCH_MULTI_V7 select ARM_GIC select ARM_AMBA + select CLKSRC_QCOM + select HAVE_ARM_ARCH_TIMER select PINCTRL select QCOM_SCM if SMP help Support for Qualcomm's devicetree based systems. + This includes support for a few devices with ARM64 SoC, that have + ARM32 signed firmware that does not allow booting ARM64 kernels. if ARCH_QCOM config ARCH_IPQ40XX bool "Enable support for IPQ40XX" - select CLKSRC_QCOM - select HAVE_ARM_ARCH_TIMER config ARCH_MSM8X60 bool "Enable support for MSM8X60" - select CLKSRC_QCOM - -config ARCH_MSM8909 - bool "Enable support for MSM8909" - select HAVE_ARM_ARCH_TIMER - -config ARCH_MSM8916 - bool "Enable support for MSM8916" - select HAVE_ARM_ARCH_TIMER - help - Enable support for the Qualcomm Snapdragon 410 (MSM8916/APQ8016). - - Note that ARM64 is the main supported architecture for MSM8916. - The ARM32 option is intended for a few devices with signed firmware - that does not allow booting ARM64 kernels. config ARCH_MSM8960 bool "Enable support for MSM8960" - select CLKSRC_QCOM - -config ARCH_MSM8974 - bool "Enable support for MSM8974" - select HAVE_ARM_ARCH_TIMER - -config ARCH_MDM9615 - bool "Enable support for MDM9615" - select CLKSRC_QCOM endif From patchwork Sat Dec 16 16:27:00 2023 Content-Type: text/plain; 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Sat, 16 Dec 2023 08:27:03 -0800 (PST) Received: from umbar.unikie.fi ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id u19-20020a197913000000b0050e304d437dsm69229lfc.223.2023.12.16.08.27.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 16 Dec 2023 08:27:02 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Konrad Dybcio , Joerg Roedel , Will Deacon , Robin Murphy Cc: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, iommu@lists.linux.dev, Russell King Subject: [PATCH v2 3/3] ARM: qcom: merge remaining subplatforms into sensible Kconfig entry Date: Sat, 16 Dec 2023 18:27:00 +0200 Message-Id: <20231216162700.863456-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20231216162700.863456-1-dmitry.baryshkov@linaro.org> References: <20231216162700.863456-1-dmitry.baryshkov@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Three remaining Qualcomm platforms have special handling of the TEXT_OFFSET to reserve the memory at the beginnig of the system RAM, see the commit 9e775ad19f52 ("ARM: 7012/1: Set proper TEXT_OFFSET for newer MSMs"). This is required for older platforms like IPQ40xx, MSM8x60, MSM8960 and APQ8064 and is compatible with other 32-bit Qualcomm platforms. Signed-off-by: Dmitry Baryshkov --- arch/arm/Makefile | 4 +--- arch/arm/mach-qcom/Kconfig | 13 +++++-------- 2 files changed, 6 insertions(+), 11 deletions(-) diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 5ba42f69f8ce..95216a508d80 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -158,9 +158,7 @@ textofs-$(CONFIG_ARCH_REALTEK) := 0x00108000 ifeq ($(CONFIG_ARCH_SA1100),y) textofs-$(CONFIG_SA1111) := 0x00208000 endif -textofs-$(CONFIG_ARCH_IPQ40XX) := 0x00208000 -textofs-$(CONFIG_ARCH_MSM8X60) := 0x00208000 -textofs-$(CONFIG_ARCH_MSM8960) := 0x00208000 +textofs-$(CONFIG_ARCH_QCOM_RESERVE_SMEM) := 0x00208000 textofs-$(CONFIG_ARCH_MESON) := 0x00208000 textofs-$(CONFIG_ARCH_AXXIA) := 0x00308000 diff --git a/arch/arm/mach-qcom/Kconfig b/arch/arm/mach-qcom/Kconfig index 27d5ca0043be..f4765be1b2a0 100644 --- a/arch/arm/mach-qcom/Kconfig +++ b/arch/arm/mach-qcom/Kconfig @@ -15,13 +15,10 @@ menuconfig ARCH_QCOM if ARCH_QCOM -config ARCH_IPQ40XX - bool "Enable support for IPQ40XX" - -config ARCH_MSM8X60 - bool "Enable support for MSM8X60" - -config ARCH_MSM8960 - bool "Enable support for MSM8960" +config ARCH_QCOM_RESERVE_SMEM + bool "Reserve SMEM at the beginning of RAM" + help + Reserve 2MB at the beginning of the System RAM for shared mem. + This is required on IPQ40xx, MSM8x60 and MSM8960 platforms. endif