From patchwork Sun Dec 31 00:43:48 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759099 Received: from mail-lf1-f46.google.com (mail-lf1-f46.google.com [209.85.167.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1DAE4659 for ; Sun, 31 Dec 2023 00:43:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="J4tFG5hD" Received: by mail-lf1-f46.google.com with SMTP id 2adb3069b0e04-50e7e55c0f6so4730417e87.0 for ; Sat, 30 Dec 2023 16:43:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703983437; x=1704588237; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=3oS3e08i9+4napyM4Cx2ITHLfZ0NtaHlzp9IZJ5e4DI=; b=J4tFG5hDkIIgMRqed0eieItsrFCluczCXS5hXla+8gHCEdK301Ll6fPlym58lXL65m 3HQSzUWIgKT1X6Uj+xvj95zviGSd07Ymz4sfPtEx+wPb6KsxsJEoIKmdka90YXPhefme pUQR5y9IqS6mIletEkL0yBt1dw7ElbM5TfrxiX4KBHtd9jsVyHffRs3zphBCHHMiT+5u j6tJvROXTwsVMHm6zmomngiWQnQXG54sRDx0AvtNWWvTvNPot6XoVrCIDcoHAE5cGwpL nSsZKh4iu9OBajcBlgEhaWiiMKNkbcngsS5sjX1cIvUSU0ANtwBu/wHpjJBiZ9h7xwwi xqfw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703983437; x=1704588237; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=3oS3e08i9+4napyM4Cx2ITHLfZ0NtaHlzp9IZJ5e4DI=; b=ObLnbQZntQ91+o06CwQwmf7rct7JMOpcP2UBh88rhTvxR6fhM4dj4VILK0vCMdv4UA w8IxQAzQISocdMuNAtqRpfZKZrH3yATQTWZY+37mS+sNbsD1tRtoJnSJZZplVTIc+pvf Ey1dDpJCSQoWfRaJ/vk6cmFEsGlzfT3zD3F5by0Hf7ZAQ3Z8UhEyIiAtUYKs3SEmTKK3 +E1tva6crpHdW4KYV5qYDVKuWqkTg8ZXS+nQuqe5orFWs+IZyar788WeerLfzPA/rW2J j4WYBCk7r5v3gmevxY2HDPGeusrl2hHitiNchIx+bGpdYKgaGia8IGOswMo29LK0EjMB gpjA== X-Gm-Message-State: AOJu0Yxhn2V0BQc/AgDtmBFJF2FklQu0jPiCIFNlgw2k1FQvb6cif6yK L3qRZbpo1hukXGe5fcrmygpRa0jRF+FOwA== X-Google-Smtp-Source: AGHT+IG/BQ6GApy4H/SeCJffIMC1S1kURQGtN4k5+GaCdaX81KwQ4RajZwmthCVAOZU1lksWe59Oag== X-Received: by 2002:ac2:4245:0:b0:50e:7e38:6e09 with SMTP id m5-20020ac24245000000b0050e7e386e09mr1639786lfl.192.1703983437145; Sat, 30 Dec 2023 16:43:57 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n13-20020a05651203ed00b0050e84be8127sm1295995lfq.101.2023.12.30.16.43.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Dec 2023 16:43:56 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:48 +0200 Subject: [PATCH v2 01/15] drm/msm/dp: drop unused parser definitions Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-1-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2918; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=yVyRmmNda9mfXwPWksVdLkO9SsjdUAzlZBACGcKQbRg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlJxDusX/Mwxoi5Za1T0xN6tZBtKSS46fvKj rES0TQ+n66JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SQAKCRCLPIo+Aiko 1eZ3B/wPO1Rh++PAEXQawRFR2VwvctoM9Rzvn8dCISWUeFJz1zWbzPN/xFw3qtzU4v+syJ+ZZjK GLjFkyYfL1j2TrBpYuu6UywJJmAqy1TXzY1d6osF9ioPaRNW43UHcAvMMm/KfmDDAvfnlmiSif5 qHdFbNcbL9gQd71SnrA6uy1QBI2deU8TBfW4Z9YJveUBH1AeXOFqAPPD2YxiiF+Lb020lRdvE6p lohRtzNcD+QBHk3rIxFfGEo405nZAfCDoNUKw/Roec/DWv3FtmngQl3n9CnWrUO36w4X8EOUHgv XCjLDS3RNZdTTFGzTKHpBoJ/k4cjTriRR3ZbJN6s8YwmgoYM X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Drop several unused and obsolete definitions from the dp_parser module. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_parser.h | 46 -------------------------------------- 1 file changed, 46 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 1f068626d445..90a2cdbbe344 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -12,7 +12,6 @@ #include "msm_drv.h" -#define DP_LABEL "MDSS DP DISPLAY" #define DP_MAX_PIXEL_CLK_KHZ 675000 #define DP_MAX_NUM_DP_LANES 4 #define DP_LINK_RATE_HBR2 540000 /* kbytes */ @@ -21,7 +20,6 @@ enum dp_pm_type { DP_CORE_PM, DP_CTRL_PM, DP_STREAM_PM, - DP_PHY_PM, DP_MAX_PM }; @@ -43,28 +41,10 @@ static inline const char *dp_parser_pm_name(enum dp_pm_type module) case DP_CORE_PM: return "DP_CORE_PM"; case DP_CTRL_PM: return "DP_CTRL_PM"; case DP_STREAM_PM: return "DP_STREAM_PM"; - case DP_PHY_PM: return "DP_PHY_PM"; default: return "???"; } } -/** - * struct dp_display_data - display related device tree data. - * - * @ctrl_node: referece to controller device - * @phy_node: reference to phy device - * @is_active: is the controller currently active - * @name: name of the display - * @display_type: type of the display - */ -struct dp_display_data { - struct device_node *ctrl_node; - struct device_node *phy_node; - bool is_active; - const char *name; - const char *display_type; -}; - /** * struct dp_ctrl_resource - controller's IO related data * @@ -77,28 +57,6 @@ struct dp_io { union phy_configure_opts phy_opts; }; -/** - * struct dp_pinctrl - DP's pin control - * - * @pin: pin-controller's instance - * @state_active: active state pin control - * @state_hpd_active: hpd active state pin control - * @state_suspend: suspend state pin control - */ -struct dp_pinctrl { - struct pinctrl *pin; - struct pinctrl_state *state_active; - struct pinctrl_state *state_hpd_active; - struct pinctrl_state *state_suspend; -}; - -/* Regulators for DP devices */ -struct dp_reg_entry { - char name[32]; - int enable_load; - int disable_load; -}; - struct dss_module_power { unsigned int num_clk; struct clk_bulk_data *clocks; @@ -109,16 +67,12 @@ struct dss_module_power { * * @pdev: platform data of the client * @mp: gpio, regulator and clock related data - * @pinctrl: pin-control related data - * @disp_data: controller's display related data * @parse: function to be called by client to parse device tree. */ struct dp_parser { struct platform_device *pdev; struct dss_module_power mp[DP_MAX_PM]; - struct dp_pinctrl pinctrl; struct dp_io io; - struct dp_display_data disp_data; u32 max_dp_lanes; u32 max_dp_link_rate; struct drm_bridge *next_bridge; From patchwork Sun Dec 31 00:43:49 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759098 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E82EC639 for ; Sun, 31 Dec 2023 00:43:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="rgjmsqHy" Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-50e7d6565b5so4946725e87.0 for ; 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Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_power.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_power.c b/drivers/gpu/drm/msm/dp/dp_power.c index c4843dd69f47..b095a5b47c8b 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.c +++ b/drivers/gpu/drm/msm/dp/dp_power.c @@ -16,9 +16,6 @@ struct dp_power_private { struct dp_parser *parser; struct device *dev; struct drm_device *drm_dev; - struct clk *link_clk_src; - struct clk *pixel_provider; - struct clk *link_provider; struct dp_power dp_power; }; From patchwork Sun Dec 31 00:43:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759256 Received: from mail-lj1-f179.google.com (mail-lj1-f179.google.com [209.85.208.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE08C818 for ; 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Sat, 30 Dec 2023 16:43:58 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:50 +0200 Subject: [PATCH v2 03/15] drm/msm/dp: parse DT from dp_parser_get Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-3-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2495; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=nbI6O2jVJmJKDcIwmvwKvAtsadxXm7JZt5ZEib+SKuc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlJot5ruSYBM2dWO8mK76xKYFScuAQwatTME 7msN1ztCbWJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SQAKCRCLPIo+Aiko 1dYyCACxhk++LQcxDQ33qtIafnZZqojTBqhcEN2pKX+xCPd8oJKgD3bGBJJQ5a1M4SMe1M4DrIt dcQ0IkcShE23vffDIpoSXXDrtFrpGbvdr754m/ww+7sQMfED1+rTwJYGRnytelca4chMBl6tqDk tgaqxO2tv0F2K3u1QLwVX7LTJm1lxVrC8iLnOzDECksGyBiO9M+bC8FDb1KgOdXx1SPUh8oJbQA gizgtfGN7nobo+ExnWNlp0Phq1I34yTyXgn1L5SZ9ndk5/M/tZdPzSJIxApqxfM8r5U1gW+Id/4 vCOmsAY4+Qdf/fS+5FdcV5po+maMzR6scUT74maLvy6myLka X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A It makes little sense to split the submodule get and actual DT parsing. Call dp_parser_parse() directly from dp_parser_get(), so that the parser data is fully initialised once it is returned to the caller. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 6 ------ drivers/gpu/drm/msm/dp/dp_parser.c | 8 +++++++- drivers/gpu/drm/msm/dp/dp_parser.h | 3 --- 3 files changed, 7 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index d37d599aec27..67b48f0a6c83 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1266,12 +1266,6 @@ static int dp_display_probe(struct platform_device *pdev) return -EPROBE_DEFER; } - rc = dp->parser->parse(dp->parser); - if (rc) { - DRM_ERROR("device tree parsing failed\n"); - goto err; - } - rc = dp_power_client_init(dp->power); if (rc) { DRM_ERROR("Power client create failed\n"); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 7032dcc8842b..2d9d126c119b 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -315,13 +315,19 @@ static int dp_parser_parse(struct dp_parser *parser) struct dp_parser *dp_parser_get(struct platform_device *pdev) { struct dp_parser *parser; + int ret; parser = devm_kzalloc(&pdev->dev, sizeof(*parser), GFP_KERNEL); if (!parser) return ERR_PTR(-ENOMEM); - parser->parse = dp_parser_parse; parser->pdev = pdev; + ret = dp_parser_parse(parser); + if (ret) { + dev_err(&pdev->dev, "device tree parsing failed\n"); + return ERR_PTR(ret); + } + return parser; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 90a2cdbbe344..4ccc432b4142 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -67,7 +67,6 @@ struct dss_module_power { * * @pdev: platform data of the client * @mp: gpio, regulator and clock related data - * @parse: function to be called by client to parse device tree. */ struct dp_parser { struct platform_device *pdev; @@ -76,8 +75,6 @@ struct dp_parser { u32 max_dp_lanes; u32 max_dp_link_rate; struct drm_bridge *next_bridge; - - int (*parse)(struct dp_parser *parser); }; /** From patchwork Sun Dec 31 00:43:51 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759097 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5DCA1A31 for ; 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Sat, 30 Dec 2023 16:43:59 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n13-20020a05651203ed00b0050e84be8127sm1295995lfq.101.2023.12.30.16.43.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Dec 2023 16:43:59 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:51 +0200 Subject: [PATCH v2 04/15] drm/msm/dp: inline dp_power_(de)init Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-4-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=2942; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=0tPYPq9OqCyaK2qdciiqePf9VS3u8McIRcRAIy4vqEY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlJ2ZPFfupZiPqo8YG7EvZ0wKX1rP2V88/pF PtnI/yKXByJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SQAKCRCLPIo+Aiko 1d+JB/9IA31potJBGv1YIX+5583YFgZ/0CkpvfUD7xcDfFN2l+wTelr5+rYEHo0nlmZ2QXwAZQw Npr5xIAelyEYrBLOZESwNlhbjVs3i7cyF2XjCx2NgcEOp80ify0G5Iy7aj+oSsuwBdSGndJADX0 vOVttfATA53O6PnEcIure4bdPg22urOYUkDpkYPTYC94Ut834MnF1My5YvThanS3CVOH/B4Nnc3 d2oR5M0RPGPUCUhiThF0FmsO2kkUDCXok/PUBV5caR6z8bBV74OQSvP2X7o7HWFiWxJVgOrsDk/ fJR8MOO7fVL2Sa877BkPq2Hjt9dgrJnoeL2/HUSoqu++DFEs X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A In preparation to cleanup of the dp_power module, inline dp_power_init() and dp_power_deinit() functions, which are now just turning the clocks on and off. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 4 ++-- drivers/gpu/drm/msm/dp/dp_power.c | 10 ---------- drivers/gpu/drm/msm/dp/dp_power.h | 21 --------------------- 3 files changed, 2 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 67b48f0a6c83..8cd18705740f 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -434,7 +434,7 @@ static void dp_display_host_init(struct dp_display_private *dp) dp->dp_display.connector_type, dp->core_initialized, dp->phy_initialized); - dp_power_init(dp->power); + dp_power_clk_enable(dp->power, DP_CORE_PM, true); dp_ctrl_reset_irq_ctrl(dp->ctrl, true); dp_aux_init(dp->aux); dp->core_initialized = true; @@ -448,7 +448,7 @@ static void dp_display_host_deinit(struct dp_display_private *dp) dp_ctrl_reset_irq_ctrl(dp->ctrl, false); dp_aux_deinit(dp->aux); - dp_power_deinit(dp->power); + dp_power_clk_enable(dp->power, DP_CORE_PM, false); dp->core_initialized = false; } diff --git a/drivers/gpu/drm/msm/dp/dp_power.c b/drivers/gpu/drm/msm/dp/dp_power.c index b095a5b47c8b..f49e3aede308 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.c +++ b/drivers/gpu/drm/msm/dp/dp_power.c @@ -152,16 +152,6 @@ int dp_power_client_init(struct dp_power *dp_power) return dp_power_clk_init(power); } -int dp_power_init(struct dp_power *dp_power) -{ - return dp_power_clk_enable(dp_power, DP_CORE_PM, true); -} - -int dp_power_deinit(struct dp_power *dp_power) -{ - return dp_power_clk_enable(dp_power, DP_CORE_PM, false); -} - struct dp_power *dp_power_get(struct device *dev, struct dp_parser *parser) { struct dp_power_private *power; diff --git a/drivers/gpu/drm/msm/dp/dp_power.h b/drivers/gpu/drm/msm/dp/dp_power.h index 55ada51edb57..eb836b5aa24a 100644 --- a/drivers/gpu/drm/msm/dp/dp_power.h +++ b/drivers/gpu/drm/msm/dp/dp_power.h @@ -22,27 +22,6 @@ struct dp_power { bool stream_clks_on; }; -/** - * dp_power_init() - enable power supplies for display controller - * - * @power: instance of power module - * return: 0 if success or error if failure. - * - * This API will turn on the regulators and configures gpio's - * aux/hpd. - */ -int dp_power_init(struct dp_power *power); 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Sat, 30 Dec 2023 16:43:59 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:52 +0200 Subject: [PATCH v2 05/15] drm/msm/dp: fold dp_power into dp_ctrl module Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-5-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=20838; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=dCw0JTAvwTm3wGka2zU3RC0fLmOOYChcuRvVrtRzN5I=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ+qEnV5bVM9rrqz4q7BAvM9P7ngLk3P/HUEFZ3uVF1zGz 3oai/Q6GY1ZGBi5GGTFFFl8ClqmxmxKDvuwY2o9zCBWJpApDFycAjCR4tXsf2VzjA6VblbuiHcR tMlubOaN/h/lZPA5bNW8XRpbxV2ZvF9H3uL51N/Tf3/PayODjRqpS+fbM6YXnPzp2pFg3xgQcMn J4wqf4vcopfvssdu6szmtlsyOmnHM3uDAjxOVUsHWZxcdKjvJUfY11zPWx3yh87r6BboL2mWULx TpWm+a35RuKvmG69L7SZvsftQm7dqfGrjxmNN65os2mjU632T8PUoWntPPmbWb1y5hz9b8JQtSo kp8yoJyVz3ksuExZD/hfeyK2KEpjHyaE/Y19x3dwBEqUfwnv8Bghuvz2Tp5tTNXH3rBuUr2wvHT P68/PX2v+ZbI/DnRoSFbBXOmbPfvnWBzfHrKBOXOV02rAQ== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The dp_power submodule is limited to handling the clocks only following previous cleanups. Fold it into the dp_ctrl submodule, removing one unnecessary level of indirection. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/dp/dp_ctrl.c | 150 +++++++++++++++++++++++++++---- drivers/gpu/drm/msm/dp/dp_ctrl.h | 6 +- drivers/gpu/drm/msm/dp/dp_display.c | 24 +---- drivers/gpu/drm/msm/dp/dp_power.c | 170 ------------------------------------ drivers/gpu/drm/msm/dp/dp_power.h | 74 ---------------- 6 files changed, 142 insertions(+), 283 deletions(-) diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index b1173128b5b9..8dbdf3fba69e 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -128,7 +128,6 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ dp/dp_link.o \ dp/dp_panel.o \ dp/dp_parser.o \ - dp/dp_power.o \ dp/dp_audio.o msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 77a8d9366ed7..da29281c575b 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -76,13 +76,16 @@ struct dp_ctrl_private { struct drm_dp_aux *aux; struct dp_panel *panel; struct dp_link *link; - struct dp_power *power; struct dp_parser *parser; struct dp_catalog *catalog; struct completion idle_comp; struct completion psr_op_comp; struct completion video_comp; + + bool core_clks_on; + bool link_clks_on; + bool stream_clks_on; }; static int dp_aux_link_configure(struct drm_dp_aux *aux, @@ -1338,6 +1341,83 @@ static void dp_ctrl_set_clock_rate(struct dp_ctrl_private *ctrl, name, rate); } +int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, + enum dp_pm_type pm_type, bool enable) +{ + struct dp_ctrl_private *ctrl; + struct dss_module_power *mp; + int ret = 0; + + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + + if (pm_type != DP_CORE_PM && + pm_type != DP_CTRL_PM && + pm_type != DP_STREAM_PM) { + DRM_ERROR("unsupported ctrl module: %s\n", + dp_parser_pm_name(pm_type)); + return -EINVAL; + } + + if (enable) { + if (pm_type == DP_CORE_PM && ctrl->core_clks_on) { + drm_dbg_dp(ctrl->drm_dev, + "core clks already enabled\n"); + return 0; + } + + if (pm_type == DP_CTRL_PM && ctrl->link_clks_on) { + drm_dbg_dp(ctrl->drm_dev, + "links clks already enabled\n"); + return 0; + } + + if (pm_type == DP_STREAM_PM && ctrl->stream_clks_on) { + drm_dbg_dp(ctrl->drm_dev, + "pixel clks already enabled\n"); + return 0; + } + + if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) { + drm_dbg_dp(ctrl->drm_dev, + "Enable core clks before link clks\n"); + mp = &ctrl->parser->mp[DP_CORE_PM]; + + ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); + if (ret) + return ret; + + ctrl->core_clks_on = true; + } + } + + mp = &ctrl->parser->mp[pm_type]; + if (enable) { + ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); + if (ret) + return ret; + } else { + clk_bulk_disable_unprepare(mp->num_clk, mp->clocks); + } + + if (pm_type == DP_CORE_PM) + ctrl->core_clks_on = enable; + else if (pm_type == DP_STREAM_PM) + ctrl->stream_clks_on = enable; + else + ctrl->link_clks_on = enable; + + drm_dbg_dp(ctrl->drm_dev, "%s clocks for %s\n", + enable ? "enable" : "disable", + dp_parser_pm_name(pm_type)); + drm_dbg_dp(ctrl->drm_dev, + "stream_clks:%s link_clks:%s core_clks:%s\n", + ctrl->stream_clks_on ? "on" : "off", + ctrl->link_clks_on ? "on" : "off", + ctrl->core_clks_on ? "on" : "off"); + + return 0; +} + static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) { int ret = 0; @@ -1354,7 +1434,7 @@ static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) phy_power_on(phy); dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, true); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, true); if (ret) DRM_ERROR("Unable to start link clocks. ret=%d\n", ret); @@ -1502,7 +1582,7 @@ static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl) * link maintenance. */ dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); if (ret) { DRM_ERROR("Failed to disable clocks. ret=%d\n", ret); return ret; @@ -1534,7 +1614,7 @@ static int dp_ctrl_deinitialize_mainlink(struct dp_ctrl_private *ctrl) dp_catalog_ctrl_reset(ctrl->catalog); dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); if (ret) { DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); } @@ -1656,7 +1736,7 @@ static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; dp_ctrl_set_clock_rate(ctrl, DP_STREAM_PM, "stream_pixel", pixel_rate * 1000); - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, true); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, true); if (ret) { DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); return ret; @@ -1752,7 +1832,7 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) rate = ctrl->panel->link_info.rate; pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; - dp_power_clk_enable(ctrl->power, DP_CORE_PM, true); + dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CORE_PM, true); if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { drm_dbg_dp(ctrl->drm_dev, @@ -1885,7 +1965,11 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) ctrl->link->link_params.rate, ctrl->link->link_params.num_lanes, pixel_rate); - if (!dp_power_clk_status(ctrl->power, DP_CTRL_PM)) { /* link clk is off */ + drm_dbg_dp(ctrl->drm_dev, + "core_clk_on=%d link_clk_on=%d stream_clk_on=%d\n", + ctrl->core_clks_on, ctrl->link_clks_on, ctrl->stream_clks_on); + + if (!ctrl->link_clks_on) { /* link clk is off */ ret = dp_ctrl_enable_mainlink_clocks(ctrl); if (ret) { DRM_ERROR("Failed to start link clocks. ret=%d\n", ret); @@ -1895,7 +1979,7 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) dp_ctrl_set_clock_rate(ctrl, DP_STREAM_PM, "stream_pixel", pixel_rate * 1000); - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, true); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, true); if (ret) { DRM_ERROR("Unable to start pixel clocks. ret=%d\n", ret); goto end; @@ -1951,8 +2035,8 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); - if (dp_power_clk_status(ctrl->power, DP_STREAM_PM)) { - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false); + if (ctrl->stream_clks_on) { + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, false); if (ret) { DRM_ERROR("Failed to disable pclk. ret=%d\n", ret); return ret; @@ -1960,7 +2044,7 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) } dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); if (ret) { DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); return ret; @@ -1990,7 +2074,7 @@ int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); if (ret) { DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); } @@ -2024,12 +2108,12 @@ int dp_ctrl_off(struct dp_ctrl *dp_ctrl) dp_catalog_ctrl_reset(ctrl->catalog); - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, false); if (ret) DRM_ERROR("Failed to disable pixel clocks. ret=%d\n", ret); dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); if (ret) { DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); } @@ -2086,9 +2170,38 @@ irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl) return ret; } +static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) +{ + struct dp_ctrl_private *ctrl_private; + int rc = 0; + struct dss_module_power *core, *ctrl, *stream; + struct device *dev; + + ctrl_private = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + dev = ctrl_private->dev; + + core = &ctrl_private->parser->mp[DP_CORE_PM]; + ctrl = &ctrl_private->parser->mp[DP_CTRL_PM]; + stream = &ctrl_private->parser->mp[DP_STREAM_PM]; + + rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); + if (rc) + return rc; + + rc = devm_clk_bulk_get(dev, ctrl->num_clk, ctrl->clocks); + if (rc) + return -ENODEV; + + rc = devm_clk_bulk_get(dev, stream->num_clk, stream->clocks); + if (rc) + return -ENODEV; + + return 0; +} + struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, struct dp_panel *panel, struct drm_dp_aux *aux, - struct dp_power *power, struct dp_catalog *catalog, + struct dp_catalog *catalog, struct dp_parser *parser) { struct dp_ctrl_private *ctrl; @@ -2125,11 +2238,16 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, /* in parameters */ ctrl->parser = parser; ctrl->panel = panel; - ctrl->power = power; ctrl->aux = aux; ctrl->link = link; ctrl->catalog = catalog; ctrl->dev = dev; + ret = dp_ctrl_clk_init(&ctrl->dp_ctrl); + if (ret) { + dev_err(dev, "failed to init clocks\n"); + return ERR_PTR(ret); + } + return &ctrl->dp_ctrl; } diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h index b2c27d3532bf..85da5a7e5307 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -10,7 +10,6 @@ #include "dp_panel.h" #include "dp_link.h" #include "dp_parser.h" -#include "dp_power.h" #include "dp_catalog.h" struct dp_ctrl { @@ -28,7 +27,7 @@ irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl); void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl); struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, struct dp_panel *panel, struct drm_dp_aux *aux, - struct dp_power *power, struct dp_catalog *catalog, + struct dp_catalog *catalog, struct dp_parser *parser); void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl, bool enable); @@ -39,4 +38,7 @@ void dp_ctrl_irq_phy_exit(struct dp_ctrl *dp_ctrl); void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enable); void dp_ctrl_config_psr(struct dp_ctrl *dp_ctrl); +int dp_ctrl_clk_enable(struct dp_ctrl *ctrl, enum dp_pm_type pm_type, + bool enable); + #endif /* _DP_CTRL_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 8cd18705740f..33e9d7deb3f8 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -15,13 +15,12 @@ #include "msm_drv.h" #include "msm_kms.h" #include "dp_parser.h" -#include "dp_power.h" +#include "dp_ctrl.h" #include "dp_catalog.h" #include "dp_aux.h" #include "dp_reg.h" #include "dp_link.h" #include "dp_panel.h" -#include "dp_ctrl.h" #include "dp_display.h" #include "dp_drm.h" #include "dp_audio.h" @@ -89,7 +88,6 @@ struct dp_display_private { struct dentry *root; struct dp_parser *parser; - struct dp_power *power; struct dp_catalog *catalog; struct drm_dp_aux *aux; struct dp_link *link; @@ -434,7 +432,7 @@ static void dp_display_host_init(struct dp_display_private *dp) dp->dp_display.connector_type, dp->core_initialized, dp->phy_initialized); - dp_power_clk_enable(dp->power, DP_CORE_PM, true); + dp_ctrl_clk_enable(dp->ctrl, DP_CORE_PM, true); dp_ctrl_reset_irq_ctrl(dp->ctrl, true); dp_aux_init(dp->aux); dp->core_initialized = true; @@ -448,7 +446,7 @@ static void dp_display_host_deinit(struct dp_display_private *dp) dp_ctrl_reset_irq_ctrl(dp->ctrl, false); dp_aux_deinit(dp->aux); - dp_power_clk_enable(dp->power, DP_CORE_PM, false); + dp_ctrl_clk_enable(dp->ctrl, DP_CORE_PM, false); dp->core_initialized = false; } @@ -731,14 +729,6 @@ static int dp_init_sub_modules(struct dp_display_private *dp) goto error; } - dp->power = dp_power_get(dev, dp->parser); - if (IS_ERR(dp->power)) { - rc = PTR_ERR(dp->power); - DRM_ERROR("failed to initialize power, rc = %d\n", rc); - dp->power = NULL; - goto error; - } - dp->aux = dp_aux_get(dev, dp->catalog, dp->dp_display.is_edp); if (IS_ERR(dp->aux)) { rc = PTR_ERR(dp->aux); @@ -768,7 +758,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) } dp->ctrl = dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, - dp->power, dp->catalog, dp->parser); + dp->catalog, dp->parser); if (IS_ERR(dp->ctrl)) { rc = PTR_ERR(dp->ctrl); DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); @@ -1266,12 +1256,6 @@ static int dp_display_probe(struct platform_device *pdev) return -EPROBE_DEFER; } - rc = dp_power_client_init(dp->power); - if (rc) { - DRM_ERROR("Power client create failed\n"); - goto err; - } - /* setup event q */ mutex_init(&dp->event_mutex); init_waitqueue_head(&dp->event_q); diff --git a/drivers/gpu/drm/msm/dp/dp_power.c b/drivers/gpu/drm/msm/dp/dp_power.c deleted file mode 100644 index f49e3aede308..000000000000 --- a/drivers/gpu/drm/msm/dp/dp_power.c +++ /dev/null @@ -1,170 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. - */ - -#define pr_fmt(fmt) "[drm-dp] %s: " fmt, __func__ - -#include -#include -#include -#include -#include "dp_power.h" -#include "msm_drv.h" - -struct dp_power_private { - struct dp_parser *parser; - struct device *dev; - struct drm_device *drm_dev; - - struct dp_power dp_power; -}; - -static int dp_power_clk_init(struct dp_power_private *power) -{ - int rc = 0; - struct dss_module_power *core, *ctrl, *stream; - struct device *dev = power->dev; - - core = &power->parser->mp[DP_CORE_PM]; - ctrl = &power->parser->mp[DP_CTRL_PM]; - stream = &power->parser->mp[DP_STREAM_PM]; - - rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); - if (rc) - return rc; - - rc = devm_clk_bulk_get(dev, ctrl->num_clk, ctrl->clocks); - if (rc) - return -ENODEV; - - rc = devm_clk_bulk_get(dev, stream->num_clk, stream->clocks); - if (rc) - return -ENODEV; - - return 0; -} - -int dp_power_clk_status(struct dp_power *dp_power, enum dp_pm_type pm_type) -{ - struct dp_power_private *power; - - power = container_of(dp_power, struct dp_power_private, dp_power); - - drm_dbg_dp(power->drm_dev, - "core_clk_on=%d link_clk_on=%d stream_clk_on=%d\n", - dp_power->core_clks_on, dp_power->link_clks_on, dp_power->stream_clks_on); - - if (pm_type == DP_CORE_PM) - return dp_power->core_clks_on; - - if (pm_type == DP_CTRL_PM) - return dp_power->link_clks_on; - - if (pm_type == DP_STREAM_PM) - return dp_power->stream_clks_on; - - return 0; -} - -int dp_power_clk_enable(struct dp_power *dp_power, - enum dp_pm_type pm_type, bool enable) -{ - int rc = 0; - struct dp_power_private *power; - struct dss_module_power *mp; - - power = container_of(dp_power, struct dp_power_private, dp_power); - - if (pm_type != DP_CORE_PM && pm_type != DP_CTRL_PM && - pm_type != DP_STREAM_PM) { - DRM_ERROR("unsupported power module: %s\n", - dp_parser_pm_name(pm_type)); - return -EINVAL; - } - - if (enable) { - if (pm_type == DP_CORE_PM && dp_power->core_clks_on) { - drm_dbg_dp(power->drm_dev, - "core clks already enabled\n"); - return 0; - } - - if (pm_type == DP_CTRL_PM && dp_power->link_clks_on) { - drm_dbg_dp(power->drm_dev, - "links clks already enabled\n"); - return 0; - } - - if (pm_type == DP_STREAM_PM && dp_power->stream_clks_on) { - drm_dbg_dp(power->drm_dev, - "pixel clks already enabled\n"); - return 0; - } - - if ((pm_type == DP_CTRL_PM) && (!dp_power->core_clks_on)) { - drm_dbg_dp(power->drm_dev, - "Enable core clks before link clks\n"); - mp = &power->parser->mp[DP_CORE_PM]; - - rc = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); - if (rc) - return rc; - - dp_power->core_clks_on = true; - } - } - - mp = &power->parser->mp[pm_type]; - if (enable) { - rc = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); - if (rc) - return rc; - } else { - clk_bulk_disable_unprepare(mp->num_clk, mp->clocks); - } - - if (pm_type == DP_CORE_PM) - dp_power->core_clks_on = enable; - else if (pm_type == DP_STREAM_PM) - dp_power->stream_clks_on = enable; - else - dp_power->link_clks_on = enable; - - drm_dbg_dp(power->drm_dev, "%s clocks for %s\n", - enable ? "enable" : "disable", - dp_parser_pm_name(pm_type)); - drm_dbg_dp(power->drm_dev, - "strem_clks:%s link_clks:%s core_clks:%s\n", - dp_power->stream_clks_on ? "on" : "off", - dp_power->link_clks_on ? "on" : "off", - dp_power->core_clks_on ? "on" : "off"); - - return 0; -} - -int dp_power_client_init(struct dp_power *dp_power) -{ - struct dp_power_private *power; - - power = container_of(dp_power, struct dp_power_private, dp_power); - - return dp_power_clk_init(power); -} - -struct dp_power *dp_power_get(struct device *dev, struct dp_parser *parser) -{ - struct dp_power_private *power; - struct dp_power *dp_power; - - power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); - if (!power) - return ERR_PTR(-ENOMEM); - - power->parser = parser; - power->dev = dev; - - dp_power = &power->dp_power; - - return dp_power; -} diff --git a/drivers/gpu/drm/msm/dp/dp_power.h b/drivers/gpu/drm/msm/dp/dp_power.h deleted file mode 100644 index eb836b5aa24a..000000000000 --- a/drivers/gpu/drm/msm/dp/dp_power.h +++ /dev/null @@ -1,74 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. - */ - -#ifndef _DP_POWER_H_ -#define _DP_POWER_H_ - -#include "dp_parser.h" - -/** - * sruct dp_power - DisplayPort's power related data - * - * @init: initializes the regulators/core clocks/GPIOs/pinctrl - * @deinit: turns off the regulators/core clocks/GPIOs/pinctrl - * @clk_enable: enable/disable the DP clocks - * @set_pixel_clk_parent: set the parent of DP pixel clock - */ -struct dp_power { - bool core_clks_on; - bool link_clks_on; - bool stream_clks_on; -}; - -/** - * dp_power_clk_status() - display controller clocks status - * - * @power: instance of power module - * @pm_type: type of pm, core/ctrl/phy - * return: status of power clocks - * - * This API return status of DP clocks - */ - -int dp_power_clk_status(struct dp_power *dp_power, enum dp_pm_type pm_type); - -/** - * dp_power_clk_enable() - enable display controller clocks - * - * @power: instance of power module - * @pm_type: type of pm, core/ctrl/phy - * @enable: enables or disables - * return: pointer to allocated power module data - * - * This API will call setrate and enable for DP clocks - */ - -int dp_power_clk_enable(struct dp_power *power, enum dp_pm_type pm_type, - bool enable); - -/** - * dp_power_client_init() - initialize clock and regulator modules - * - * @power: instance of power module - * return: 0 for success, error for failure. - * - * This API will configure the DisplayPort's clocks and regulator - * modules. - */ -int dp_power_client_init(struct dp_power *power); - -/** - * dp_power_get() - configure and get the DisplayPort power module data - * - * @parser: instance of parser module - * return: pointer to allocated power module data - * - * This API will configure the DisplayPort's power module and provides - * methods to be called by the client to configure the power related - * modules. - */ -struct dp_power *dp_power_get(struct device *dev, struct dp_parser *parser); - -#endif /* _DP_POWER_H_ */ From patchwork Sun Dec 31 00:43:53 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759096 Received: from mail-lf1-f53.google.com (mail-lf1-f53.google.com [209.85.167.53]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E478710EA for ; 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Sat, 30 Dec 2023 16:44:01 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n13-20020a05651203ed00b0050e84be8127sm1295995lfq.101.2023.12.30.16.44.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Dec 2023 16:44:00 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:53 +0200 Subject: [PATCH v2 06/15] drm/msm/dp: simplify stream clocks handling Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-6-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=10486; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=hNPMvZ0gaSY5MPKRR/EBckDQolNgLCvX0skn+OxZNXs=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlKyJwE9kbx2m5jIaXScnlda8Tcu+A1MexiL sMPKNRNOvaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SgAKCRCLPIo+Aiko 1aQUB/9HlGuZ1ew9NkmC1q95mi79bxIbjS4y5ZAsgaZru0Aeqh0KAE+7JTC/6a/cBDm2V/mAzLG gdi0Jgl7xJgmFfkGeSaAD7mV/ddkgAcNSAFypdowj0SmbiC+P673Ulc/RKY5aaSzQiAKNj55cK4 OprL4YaH/HnkeaUu2uJLJZKRsVAnZ6qSFBQ41l9qmkgUv9UCvHtwz/NeoGzGB2EhI588V0K/nGQ kAu38pgK1wh6MMQCKTjVxKV+EnFBIseQgfzpJ2pu2oi6AVK0pJZ6xqy80l91PXo8gp6ZU6VsOAE W6DAWZFKgbEvMas757mewE7pu9NvcXirCoJR8tMRFYX9V0IH X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is only a single DP_STREAM_PM clock, stream_pixel. Instead of using a separate dss_module_power instance for this single clock, handle this clock directly. This allows us to drop several wrapping functions. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 91 ++++++++++++++++---------------------- drivers/gpu/drm/msm/dp/dp_parser.c | 41 ++++------------- drivers/gpu/drm/msm/dp/dp_parser.h | 2 - 3 files changed, 47 insertions(+), 87 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index da29281c575b..56a424a82a1b 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -79,6 +79,8 @@ struct dp_ctrl_private { struct dp_parser *parser; struct dp_catalog *catalog; + struct clk *pixel_clk; + struct completion idle_comp; struct completion psr_op_comp; struct completion video_comp; @@ -1320,27 +1322,6 @@ static int dp_ctrl_setup_main_link(struct dp_ctrl_private *ctrl, return ret; } -static void dp_ctrl_set_clock_rate(struct dp_ctrl_private *ctrl, - enum dp_pm_type module, char *name, unsigned long rate) -{ - u32 num = ctrl->parser->mp[module].num_clk; - struct clk_bulk_data *cfg = ctrl->parser->mp[module].clocks; - - while (num && strcmp(cfg->id, name)) { - num--; - cfg++; - } - - drm_dbg_dp(ctrl->drm_dev, "setting rate=%lu on clk=%s\n", - rate, name); - - if (num) - clk_set_rate(cfg->clk, rate); - else - DRM_ERROR("%s clock doesn't exit to set rate %lu\n", - name, rate); -} - int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, enum dp_pm_type pm_type, bool enable) { @@ -1351,8 +1332,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); if (pm_type != DP_CORE_PM && - pm_type != DP_CTRL_PM && - pm_type != DP_STREAM_PM) { + pm_type != DP_CTRL_PM) { DRM_ERROR("unsupported ctrl module: %s\n", dp_parser_pm_name(pm_type)); return -EINVAL; @@ -1371,12 +1351,6 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, return 0; } - if (pm_type == DP_STREAM_PM && ctrl->stream_clks_on) { - drm_dbg_dp(ctrl->drm_dev, - "pixel clks already enabled\n"); - return 0; - } - if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) { drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n"); @@ -1401,8 +1375,6 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, if (pm_type == DP_CORE_PM) ctrl->core_clks_on = enable; - else if (pm_type == DP_STREAM_PM) - ctrl->stream_clks_on = enable; else ctrl->link_clks_on = enable; @@ -1734,14 +1706,23 @@ static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) } pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; - dp_ctrl_set_clock_rate(ctrl, DP_STREAM_PM, "stream_pixel", pixel_rate * 1000); - - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, true); + ret = clk_set_rate(ctrl->pixel_clk, pixel_rate * 1000); if (ret) { - DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); + DRM_ERROR("Failed to set pixel clock rate. ret=%d\n", ret); return ret; } + if (ctrl->stream_clks_on) { + drm_dbg_dp(ctrl->drm_dev, "pixel clks already enabled\n"); + } else { + ret = clk_prepare_enable(ctrl->pixel_clk); + if (ret) { + DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); + return ret; + } + ctrl->stream_clks_on = true; + } + dp_ctrl_send_phy_test_pattern(ctrl); return 0; @@ -1977,14 +1958,23 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) } } - dp_ctrl_set_clock_rate(ctrl, DP_STREAM_PM, "stream_pixel", pixel_rate * 1000); - - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, true); + ret = clk_set_rate(ctrl->pixel_clk, pixel_rate * 1000); if (ret) { - DRM_ERROR("Unable to start pixel clocks. ret=%d\n", ret); + DRM_ERROR("Failed to set pixel clock rate. ret=%d\n", ret); goto end; } + if (ctrl->stream_clks_on) { + drm_dbg_dp(ctrl->drm_dev, "pixel clks already enabled\n"); + } else { + ret = clk_prepare_enable(ctrl->pixel_clk); + if (ret) { + DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); + goto end; + } + ctrl->stream_clks_on = true; + } + if (force_link_train || !dp_ctrl_channel_eq_ok(ctrl)) dp_ctrl_link_retrain(ctrl); @@ -2036,11 +2026,8 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); if (ctrl->stream_clks_on) { - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, false); - if (ret) { - DRM_ERROR("Failed to disable pclk. ret=%d\n", ret); - return ret; - } + clk_disable_unprepare(ctrl->pixel_clk); + ctrl->stream_clks_on = false; } dev_pm_opp_set_rate(ctrl->dev, 0); @@ -2108,9 +2095,10 @@ int dp_ctrl_off(struct dp_ctrl *dp_ctrl) dp_catalog_ctrl_reset(ctrl->catalog); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, false); - if (ret) - DRM_ERROR("Failed to disable pixel clocks. ret=%d\n", ret); + if (ctrl->stream_clks_on) { + clk_disable_unprepare(ctrl->pixel_clk); + ctrl->stream_clks_on = false; + } dev_pm_opp_set_rate(ctrl->dev, 0); ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); @@ -2174,7 +2162,7 @@ static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl_private; int rc = 0; - struct dss_module_power *core, *ctrl, *stream; + struct dss_module_power *core, *ctrl; struct device *dev; ctrl_private = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); @@ -2182,7 +2170,6 @@ static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) core = &ctrl_private->parser->mp[DP_CORE_PM]; ctrl = &ctrl_private->parser->mp[DP_CTRL_PM]; - stream = &ctrl_private->parser->mp[DP_STREAM_PM]; rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); if (rc) @@ -2192,9 +2179,9 @@ static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) if (rc) return -ENODEV; - rc = devm_clk_bulk_get(dev, stream->num_clk, stream->clocks); - if (rc) - return -ENODEV; + ctrl_private->pixel_clk = devm_clk_get(dev, "stream_pixel"); + if (IS_ERR(ctrl_private->pixel_clk)) + return PTR_ERR(ctrl_private->pixel_clk); return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 2d9d126c119b..fe2b75f7555a 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -150,12 +150,11 @@ static inline bool dp_parser_check_prefix(const char *clk_prefix, static int dp_parser_init_clk_data(struct dp_parser *parser) { int num_clk, i, rc; - int core_clk_count = 0, ctrl_clk_count = 0, stream_clk_count = 0; + int core_clk_count = 0, ctrl_clk_count = 0; const char *clk_name; struct device *dev = &parser->pdev->dev; struct dss_module_power *core_power = &parser->mp[DP_CORE_PM]; struct dss_module_power *ctrl_power = &parser->mp[DP_CTRL_PM]; - struct dss_module_power *stream_power = &parser->mp[DP_STREAM_PM]; num_clk = of_property_count_strings(dev->of_node, "clock-names"); if (num_clk <= 0) { @@ -174,9 +173,6 @@ static int dp_parser_init_clk_data(struct dp_parser *parser) if (dp_parser_check_prefix("ctrl", clk_name)) ctrl_clk_count++; - - if (dp_parser_check_prefix("stream", clk_name)) - stream_clk_count++; } /* Initialize the CORE power module */ @@ -207,47 +203,30 @@ static int dp_parser_init_clk_data(struct dp_parser *parser) return -ENOMEM; } - /* Initialize the STREAM power module */ - if (stream_clk_count == 0) { - DRM_ERROR("no stream (pixel) clocks are defined\n"); - return -EINVAL; - } - - stream_power->num_clk = stream_clk_count; - stream_power->clocks = devm_kcalloc(dev, - stream_power->num_clk, sizeof(struct clk_bulk_data), - GFP_KERNEL); - if (!stream_power->clocks) { - stream_power->num_clk = 0; - return -ENOMEM; - } - - return 0; + return num_clk; } static int dp_parser_clock(struct dp_parser *parser) { int rc = 0, i = 0; int num_clk = 0; - int core_clk_index = 0, ctrl_clk_index = 0, stream_clk_index = 0; - int core_clk_count = 0, ctrl_clk_count = 0, stream_clk_count = 0; + int core_clk_index = 0, ctrl_clk_index = 0; + int core_clk_count = 0, ctrl_clk_count = 0; const char *clk_name; struct device *dev = &parser->pdev->dev; struct dss_module_power *core_power = &parser->mp[DP_CORE_PM]; struct dss_module_power *ctrl_power = &parser->mp[DP_CTRL_PM]; - struct dss_module_power *stream_power = &parser->mp[DP_STREAM_PM]; rc = dp_parser_init_clk_data(parser); - if (rc) { + if (rc < 0) { DRM_ERROR("failed to initialize power data %d\n", rc); - return -EINVAL; + return rc; } + num_clk = rc; + core_clk_count = core_power->num_clk; ctrl_clk_count = ctrl_power->num_clk; - stream_clk_count = stream_power->num_clk; - - num_clk = core_clk_count + ctrl_clk_count + stream_clk_count; for (i = 0; i < num_clk; i++) { rc = of_property_read_string_index(dev->of_node, "clock-names", @@ -260,10 +239,6 @@ static int dp_parser_clock(struct dp_parser *parser) core_clk_index < core_clk_count) { core_power->clocks[core_clk_index].id = devm_kstrdup(dev, clk_name, GFP_KERNEL); core_clk_index++; - } else if (dp_parser_check_prefix("stream", clk_name) && - stream_clk_index < stream_clk_count) { - stream_power->clocks[stream_clk_index].id = devm_kstrdup(dev, clk_name, GFP_KERNEL); - stream_clk_index++; } else if (dp_parser_check_prefix("ctrl", clk_name) && ctrl_clk_index < ctrl_clk_count) { ctrl_power->clocks[ctrl_clk_index].id = devm_kstrdup(dev, clk_name, GFP_KERNEL); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 4ccc432b4142..c6fe26602e07 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -19,7 +19,6 @@ enum dp_pm_type { DP_CORE_PM, DP_CTRL_PM, - DP_STREAM_PM, DP_MAX_PM }; @@ -40,7 +39,6 @@ static inline const char *dp_parser_pm_name(enum dp_pm_type module) switch (module) { case DP_CORE_PM: return "DP_CORE_PM"; case DP_CTRL_PM: return "DP_CTRL_PM"; - case DP_STREAM_PM: return "DP_STREAM_PM"; default: return "???"; } } From patchwork Sun Dec 31 00:43:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759254 Received: from mail-lj1-f177.google.com (mail-lj1-f177.google.com [209.85.208.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 081CB138A for ; Sun, 31 Dec 2023 00:44:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="lsFn3ZsC" Received: by mail-lj1-f177.google.com with SMTP id 38308e7fff4ca-2ccc7d7e399so47862451fa.0 for ; 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a=openpgp-sha256; l=10440; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=jlCbwCtXmASgMzTIlxwNTO3EoGrFovMlywq9Nb9Ul3Y=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlKuagVnMFZ+Evay3GENhbTJx3ItS0d/VlwT g8v0m4RPnmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SgAKCRCLPIo+Aiko 1R2wB/4rvRbGn+fpsULl0PZGNxZVrchMDAQyPGPGtAHy4Q/BcpEwMUJLvtagykdSRrIZ7Yephbj uTWZPwI9dqihub0ntIsf8oaC+1v7oFqj94xwcaLrNlzkf+6B7pRbg1SXrDxVEYajrXSRqAFTnAl 8qWHbV9qtK/8WoA6GGRUOa/U3+GP6qXZ4OJM281Ks4PFavjwnh3n5uzhTf1TZpNskQg4Zxje1df CdR4fDkmL71w+5XhLKQ5m9gDH79nX3/OTMLjNqxZPe7hsozHYIQ+2yhMXfA3RtJl7eGr4GNUnH1 wC5QAr4X7VWFy3rUHXb3vlbZmGQM12Lclj6oZzVvnJTxTRkQ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A All supported platforms use the same clocks configuration. Instead of parsing names from DT in a pretty complex manner, use the static configuration. If at some point newer (or older) platforms have different clock configuration, this clock config can be moved to the device data. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 73 ++++++++++++++++++------ drivers/gpu/drm/msm/dp/dp_ctrl.h | 6 ++ drivers/gpu/drm/msm/dp/dp_parser.c | 112 ------------------------------------- drivers/gpu/drm/msm/dp/dp_parser.h | 22 -------- 4 files changed, 63 insertions(+), 150 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 56a424a82a1b..cfcf6136ffa6 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -69,6 +69,11 @@ struct dp_vc_tu_mapping_table { u8 tu_size_minus1; }; +struct dss_module_power { + unsigned int num_clk; + struct clk_bulk_data *clocks; +}; + struct dp_ctrl_private { struct dp_ctrl dp_ctrl; struct drm_device *drm_dev; @@ -79,6 +84,7 @@ struct dp_ctrl_private { struct dp_parser *parser; struct dp_catalog *catalog; + struct dss_module_power mp[DP_MAX_PM]; struct clk *pixel_clk; struct completion idle_comp; @@ -90,6 +96,15 @@ struct dp_ctrl_private { bool stream_clks_on; }; +static inline const char *dp_pm_name(enum dp_pm_type module) +{ + switch (module) { + case DP_CORE_PM: return "DP_CORE_PM"; + case DP_CTRL_PM: return "DP_CTRL_PM"; + default: return "???"; + } +} + static int dp_aux_link_configure(struct drm_dp_aux *aux, struct dp_link_info *link) { @@ -1334,7 +1349,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, if (pm_type != DP_CORE_PM && pm_type != DP_CTRL_PM) { DRM_ERROR("unsupported ctrl module: %s\n", - dp_parser_pm_name(pm_type)); + dp_pm_name(pm_type)); return -EINVAL; } @@ -1354,7 +1369,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) { drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n"); - mp = &ctrl->parser->mp[DP_CORE_PM]; + mp = &ctrl->mp[DP_CORE_PM]; ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); if (ret) @@ -1364,7 +1379,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, } } - mp = &ctrl->parser->mp[pm_type]; + mp = &ctrl->mp[pm_type]; if (enable) { ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); if (ret) @@ -1380,7 +1395,7 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, drm_dbg_dp(ctrl->drm_dev, "%s clocks for %s\n", enable ? "enable" : "disable", - dp_parser_pm_name(pm_type)); + dp_pm_name(pm_type)); drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", ctrl->stream_clks_on ? "on" : "off", @@ -2158,30 +2173,56 @@ irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl) return ret; } +static const char *core_clks[] = { + "core_iface", + "core_aux", +}; + +static const char *ctrl_clks[] = { + "ctrl_link", + "ctrl_link_iface", +}; + static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) { - struct dp_ctrl_private *ctrl_private; - int rc = 0; - struct dss_module_power *core, *ctrl; + struct dp_ctrl_private *ctrl; + struct dss_module_power *core, *link; struct device *dev; + int i, rc; + + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + dev = ctrl->dev; - ctrl_private = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - dev = ctrl_private->dev; + core = &ctrl->mp[DP_CORE_PM]; + link = &ctrl->mp[DP_CTRL_PM]; - core = &ctrl_private->parser->mp[DP_CORE_PM]; - ctrl = &ctrl_private->parser->mp[DP_CTRL_PM]; + core->num_clk = ARRAY_SIZE(core_clks); + core->clocks = devm_kcalloc(dev, core->num_clk, sizeof(*core->clocks), GFP_KERNEL); + if (!core->clocks) + return -ENOMEM; + + for (i = 0; i < core->num_clk; i++) + core->clocks[i].id = core_clks[i]; rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); if (rc) return rc; - rc = devm_clk_bulk_get(dev, ctrl->num_clk, ctrl->clocks); + link->num_clk = ARRAY_SIZE(ctrl_clks); + link->clocks = devm_kcalloc(dev, link->num_clk, sizeof(*link->clocks), GFP_KERNEL); + if (!link->clocks) + return -ENOMEM; + + for (i = 0; i < link->num_clk; i++) + link->clocks[i].id = ctrl_clks[i]; + + rc = devm_clk_bulk_get(dev, link->num_clk, link->clocks); if (rc) - return -ENODEV; + return rc; - ctrl_private->pixel_clk = devm_clk_get(dev, "stream_pixel"); - if (IS_ERR(ctrl_private->pixel_clk)) - return PTR_ERR(ctrl_private->pixel_clk); + ctrl->pixel_clk = devm_clk_get(dev, "stream_pixel"); + if (IS_ERR(ctrl->pixel_clk)) + return PTR_ERR(ctrl->pixel_clk); return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h index 85da5a7e5307..d8007a9d8260 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -17,6 +17,12 @@ struct dp_ctrl { bool wide_bus_en; }; +enum dp_pm_type { + DP_CORE_PM, + DP_CTRL_PM, + DP_MAX_PM +}; + int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl); int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train); int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index fe2b75f7555a..de7cfc340f0c 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -141,114 +141,6 @@ static int dp_parser_misc(struct dp_parser *parser) return 0; } -static inline bool dp_parser_check_prefix(const char *clk_prefix, - const char *clk_name) -{ - return !strncmp(clk_prefix, clk_name, strlen(clk_prefix)); -} - -static int dp_parser_init_clk_data(struct dp_parser *parser) -{ - int num_clk, i, rc; - int core_clk_count = 0, ctrl_clk_count = 0; - const char *clk_name; - struct device *dev = &parser->pdev->dev; - struct dss_module_power *core_power = &parser->mp[DP_CORE_PM]; - struct dss_module_power *ctrl_power = &parser->mp[DP_CTRL_PM]; - - num_clk = of_property_count_strings(dev->of_node, "clock-names"); - if (num_clk <= 0) { - DRM_ERROR("no clocks are defined\n"); - return -EINVAL; - } - - for (i = 0; i < num_clk; i++) { - rc = of_property_read_string_index(dev->of_node, - "clock-names", i, &clk_name); - if (rc < 0) - return rc; - - if (dp_parser_check_prefix("core", clk_name)) - core_clk_count++; - - if (dp_parser_check_prefix("ctrl", clk_name)) - ctrl_clk_count++; - } - - /* Initialize the CORE power module */ - if (core_clk_count == 0) { - DRM_ERROR("no core clocks are defined\n"); - return -EINVAL; - } - - core_power->num_clk = core_clk_count; - core_power->clocks = devm_kcalloc(dev, - core_power->num_clk, sizeof(struct clk_bulk_data), - GFP_KERNEL); - if (!core_power->clocks) - return -ENOMEM; - - /* Initialize the CTRL power module */ - if (ctrl_clk_count == 0) { - DRM_ERROR("no ctrl clocks are defined\n"); - return -EINVAL; - } - - ctrl_power->num_clk = ctrl_clk_count; - ctrl_power->clocks = devm_kcalloc(dev, - ctrl_power->num_clk, sizeof(struct clk_bulk_data), - GFP_KERNEL); - if (!ctrl_power->clocks) { - ctrl_power->num_clk = 0; - return -ENOMEM; - } - - return num_clk; -} - -static int dp_parser_clock(struct dp_parser *parser) -{ - int rc = 0, i = 0; - int num_clk = 0; - int core_clk_index = 0, ctrl_clk_index = 0; - int core_clk_count = 0, ctrl_clk_count = 0; - const char *clk_name; - struct device *dev = &parser->pdev->dev; - struct dss_module_power *core_power = &parser->mp[DP_CORE_PM]; - struct dss_module_power *ctrl_power = &parser->mp[DP_CTRL_PM]; - - rc = dp_parser_init_clk_data(parser); - if (rc < 0) { - DRM_ERROR("failed to initialize power data %d\n", rc); - return rc; - } - - num_clk = rc; - - core_clk_count = core_power->num_clk; - ctrl_clk_count = ctrl_power->num_clk; - - for (i = 0; i < num_clk; i++) { - rc = of_property_read_string_index(dev->of_node, "clock-names", - i, &clk_name); - if (rc) { - DRM_ERROR("error reading clock-names %d\n", rc); - return rc; - } - if (dp_parser_check_prefix("core", clk_name) && - core_clk_index < core_clk_count) { - core_power->clocks[core_clk_index].id = devm_kstrdup(dev, clk_name, GFP_KERNEL); - core_clk_index++; - } else if (dp_parser_check_prefix("ctrl", clk_name) && - ctrl_clk_index < ctrl_clk_count) { - ctrl_power->clocks[ctrl_clk_index].id = devm_kstrdup(dev, clk_name, GFP_KERNEL); - ctrl_clk_index++; - } - } - - return 0; -} - int devm_dp_parser_find_next_bridge(struct device *dev, struct dp_parser *parser) { struct platform_device *pdev = parser->pdev; @@ -280,10 +172,6 @@ static int dp_parser_parse(struct dp_parser *parser) if (rc) return rc; - rc = dp_parser_clock(parser); - if (rc) - return rc; - return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index c6fe26602e07..cad82c4d07da 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -16,12 +16,6 @@ #define DP_MAX_NUM_DP_LANES 4 #define DP_LINK_RATE_HBR2 540000 /* kbytes */ -enum dp_pm_type { - DP_CORE_PM, - DP_CTRL_PM, - DP_MAX_PM -}; - struct dss_io_region { size_t len; void __iomem *base; @@ -34,15 +28,6 @@ struct dss_io_data { struct dss_io_region p0; }; -static inline const char *dp_parser_pm_name(enum dp_pm_type module) -{ - switch (module) { - case DP_CORE_PM: return "DP_CORE_PM"; - case DP_CTRL_PM: return "DP_CTRL_PM"; - default: return "???"; - } -} - /** * struct dp_ctrl_resource - controller's IO related data * @@ -55,20 +40,13 @@ struct dp_io { union phy_configure_opts phy_opts; }; -struct dss_module_power { - unsigned int num_clk; - struct clk_bulk_data *clocks; -}; - /** * struct dp_parser - DP parser's data exposed to clients * * @pdev: platform data of the client - * @mp: gpio, regulator and clock related data */ struct dp_parser { struct platform_device *pdev; - struct dss_module_power mp[DP_MAX_PM]; struct dp_io io; u32 max_dp_lanes; u32 max_dp_link_rate; From patchwork Sun Dec 31 00:43:55 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759095 Received: from mail-lj1-f179.google.com (mail-lj1-f179.google.com [209.85.208.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9B4615A7 for ; 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Sat, 30 Dec 2023 16:44:02 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:55 +0200 Subject: [PATCH v2 08/15] drm/msm/dp: split dp_ctrl_clk_enable into four functuions Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-8-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=15067; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=CuOUcUYoOW9aEzG7k566U8KJoISzql09wErRpuOUKaE=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlKDWR08VDjNPqcsHj2WrSBgWkR+IXxUx674 BPw4rD6KeqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SgAKCRCLPIo+Aiko 1dZpB/9dat5uBA0Spg0tVDJXyxWClaBN5J/ZM4mOIB5qnh+pmRjmX6tleUSYQcoeqCACFP2eq09 ikE3xEo3QIs7mk2UpgOwdtlx15x/8nEHvhOpLWkYTYgV4mKJfGnXqLIEIn3V6BoZK4OvZuAxn12 eK9ihmVb1k/2ZEAtPmmueRqSRYzSyevG+KbokiXyfCBJELNJZFwBRbNbN4F6f0YoXf65nKknG+H +XD/6NQYCs73KYLHyaPmiqQW962RvY/75xQs7lgmS+VqKO9Zt5sjXSZJZDsI9WbBAKge6Bcl3YQ OlndYqbUTvz/z0T3KElzOxImaQVjWhRKVRZaufolgIJzRR8L X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Split the dp_ctrl_clk_enable() beast into four functions, each of them doing just a single item: enabling or disabling core or link clocks. This allows us to cleanup the dss_module_power structure and makes several dp_ctrl functions return void. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 220 +++++++++++++++++------------------- drivers/gpu/drm/msm/dp/dp_ctrl.h | 16 +-- drivers/gpu/drm/msm/dp/dp_display.c | 4 +- 3 files changed, 108 insertions(+), 132 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index cfcf6136ffa6..e367eb8e5bea 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -69,11 +69,6 @@ struct dp_vc_tu_mapping_table { u8 tu_size_minus1; }; -struct dss_module_power { - unsigned int num_clk; - struct clk_bulk_data *clocks; -}; - struct dp_ctrl_private { struct dp_ctrl dp_ctrl; struct drm_device *drm_dev; @@ -84,7 +79,12 @@ struct dp_ctrl_private { struct dp_parser *parser; struct dp_catalog *catalog; - struct dss_module_power mp[DP_MAX_PM]; + unsigned int num_core_clks; + struct clk_bulk_data *core_clks; + + unsigned int num_link_clks; + struct clk_bulk_data *link_clks; + struct clk *pixel_clk; struct completion idle_comp; @@ -96,15 +96,6 @@ struct dp_ctrl_private { bool stream_clks_on; }; -static inline const char *dp_pm_name(enum dp_pm_type module) -{ - switch (module) { - case DP_CORE_PM: return "DP_CORE_PM"; - case DP_CTRL_PM: return "DP_CTRL_PM"; - default: return "???"; - } -} - static int dp_aux_link_configure(struct drm_dp_aux *aux, struct dp_link_info *link) { @@ -1337,67 +1328,76 @@ static int dp_ctrl_setup_main_link(struct dp_ctrl_private *ctrl, return ret; } -int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, - enum dp_pm_type pm_type, bool enable) +int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dss_module_power *mp; int ret = 0; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - if (pm_type != DP_CORE_PM && - pm_type != DP_CTRL_PM) { - DRM_ERROR("unsupported ctrl module: %s\n", - dp_pm_name(pm_type)); - return -EINVAL; + if (ctrl->core_clks_on) { + drm_dbg_dp(ctrl->drm_dev, "core clks already enabled\n"); + return 0; } - if (enable) { - if (pm_type == DP_CORE_PM && ctrl->core_clks_on) { - drm_dbg_dp(ctrl->drm_dev, - "core clks already enabled\n"); - return 0; - } + ret = clk_bulk_prepare_enable(ctrl->num_core_clks, ctrl->core_clks); + if (ret) + return ret; - if (pm_type == DP_CTRL_PM && ctrl->link_clks_on) { - drm_dbg_dp(ctrl->drm_dev, - "links clks already enabled\n"); - return 0; - } + ctrl->core_clks_on = true; - if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) { - drm_dbg_dp(ctrl->drm_dev, - "Enable core clks before link clks\n"); - mp = &ctrl->mp[DP_CORE_PM]; + drm_dbg_dp(ctrl->drm_dev, "enable core clocks \n"); + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", + ctrl->stream_clks_on ? "on" : "off", + ctrl->link_clks_on ? "on" : "off", + ctrl->core_clks_on ? "on" : "off"); - ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); - if (ret) - return ret; + return 0; +} - ctrl->core_clks_on = true; - } +void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ctrl) +{ + struct dp_ctrl_private *ctrl; + + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + + clk_bulk_disable_unprepare(ctrl->num_core_clks, ctrl->core_clks); + + ctrl->core_clks_on = false; + + drm_dbg_dp(ctrl->drm_dev, "disable core clocks \n"); + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", + ctrl->stream_clks_on ? "on" : "off", + ctrl->link_clks_on ? "on" : "off", + ctrl->core_clks_on ? "on" : "off"); +} + +static int dp_ctrl_link_clk_enable(struct dp_ctrl *dp_ctrl) +{ + struct dp_ctrl_private *ctrl; + int ret = 0; + + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + + if (ctrl->link_clks_on) { + drm_dbg_dp(ctrl->drm_dev, "links clks already enabled\n"); + return 0; } - mp = &ctrl->mp[pm_type]; - if (enable) { - ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); - if (ret) - return ret; - } else { - clk_bulk_disable_unprepare(mp->num_clk, mp->clocks); + if (!ctrl->core_clks_on) { + drm_dbg_dp(ctrl->drm_dev, "Enable core clks before link clks\n"); + + dp_ctrl_core_clk_enable(dp_ctrl); } - if (pm_type == DP_CORE_PM) - ctrl->core_clks_on = enable; - else - ctrl->link_clks_on = enable; + ret = clk_bulk_prepare_enable(ctrl->num_link_clks, ctrl->link_clks); + if (ret) + return ret; - drm_dbg_dp(ctrl->drm_dev, "%s clocks for %s\n", - enable ? "enable" : "disable", - dp_pm_name(pm_type)); - drm_dbg_dp(ctrl->drm_dev, - "stream_clks:%s link_clks:%s core_clks:%s\n", + ctrl->link_clks_on = true; + + drm_dbg_dp(ctrl->drm_dev, "enale link clocks\n"); + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", ctrl->stream_clks_on ? "on" : "off", ctrl->link_clks_on ? "on" : "off", ctrl->core_clks_on ? "on" : "off"); @@ -1405,6 +1405,23 @@ int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, return 0; } +static void dp_ctrl_link_clk_disable(struct dp_ctrl *dp_ctrl) +{ + struct dp_ctrl_private *ctrl; + + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); + + clk_bulk_disable_unprepare(ctrl->num_link_clks, ctrl->link_clks); + + ctrl->link_clks_on = false; + + drm_dbg_dp(ctrl->drm_dev, "disabled link clocks\n"); + drm_dbg_dp(ctrl->drm_dev, "stream_clks:%s link_clks:%s core_clks:%s\n", + ctrl->stream_clks_on ? "on" : "off", + ctrl->link_clks_on ? "on" : "off", + ctrl->core_clks_on ? "on" : "off"); +} + static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) { int ret = 0; @@ -1421,7 +1438,7 @@ static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) phy_power_on(phy); dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, true); + ret = dp_ctrl_link_clk_enable(&ctrl->dp_ctrl); if (ret) DRM_ERROR("Unable to start link clocks. ret=%d\n", ret); @@ -1569,11 +1586,9 @@ static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl) * link maintenance. */ dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); - if (ret) { - DRM_ERROR("Failed to disable clocks. ret=%d\n", ret); - return ret; - } + + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); + phy_power_off(phy); /* hw recommended delay before re-enabling clocks */ msleep(20); @@ -1591,7 +1606,6 @@ static int dp_ctrl_deinitialize_mainlink(struct dp_ctrl_private *ctrl) { struct dp_io *dp_io; struct phy *phy; - int ret; dp_io = &ctrl->parser->io; phy = dp_io->phy; @@ -1601,10 +1615,7 @@ static int dp_ctrl_deinitialize_mainlink(struct dp_ctrl_private *ctrl) dp_catalog_ctrl_reset(ctrl->catalog); dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); - if (ret) { - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); - } + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); phy_power_off(phy); @@ -1708,11 +1719,7 @@ static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) * running. Add the global reset just before disabling the * link clocks and core clocks. */ - ret = dp_ctrl_off(&ctrl->dp_ctrl); - if (ret) { - DRM_ERROR("failed to disable DP controller\n"); - return ret; - } + dp_ctrl_off(&ctrl->dp_ctrl); ret = dp_ctrl_on_link(&ctrl->dp_ctrl); if (ret) { @@ -1828,7 +1835,7 @@ int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl) rate = ctrl->panel->link_info.rate; pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; - dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CORE_PM, true); + dp_ctrl_core_clk_enable(&ctrl->dp_ctrl); if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { drm_dbg_dp(ctrl->drm_dev, @@ -2024,12 +2031,11 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) return ret; } -int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) +void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; struct dp_io *dp_io; struct phy *phy; - int ret; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); dp_io = &ctrl->parser->io; @@ -2046,11 +2052,7 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) } dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); - if (ret) { - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); - return ret; - } + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); phy_power_off(phy); @@ -2060,15 +2062,13 @@ int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", phy, phy->init_count, phy->power_count); - return ret; } -int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) +void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; struct dp_io *dp_io; struct phy *phy; - int ret; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); dp_io = &ctrl->parser->io; @@ -2076,10 +2076,7 @@ int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); - if (ret) { - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); - } + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); DRM_DEBUG_DP("Before, phy=%p init_count=%d power_on=%d\n", phy, phy->init_count, phy->power_count); @@ -2088,19 +2085,13 @@ int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) DRM_DEBUG_DP("After, phy=%p init_count=%d power_on=%d\n", phy, phy->init_count, phy->power_count); - - return ret; } -int dp_ctrl_off(struct dp_ctrl *dp_ctrl) +void dp_ctrl_off(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; struct dp_io *dp_io; struct phy *phy; - int ret = 0; - - if (!dp_ctrl) - return -EINVAL; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); dp_io = &ctrl->parser->io; @@ -2116,16 +2107,11 @@ int dp_ctrl_off(struct dp_ctrl *dp_ctrl) } dev_pm_opp_set_rate(ctrl->dev, 0); - ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); - if (ret) { - DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); - } + dp_ctrl_link_clk_disable(&ctrl->dp_ctrl); phy_power_off(phy); drm_dbg_dp(ctrl->drm_dev, "phy=%p init=%d power_on=%d\n", phy, phy->init_count, phy->power_count); - - return ret; } irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl) @@ -2186,37 +2172,33 @@ static const char *ctrl_clks[] = { static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dss_module_power *core, *link; struct device *dev; int i, rc; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); dev = ctrl->dev; - core = &ctrl->mp[DP_CORE_PM]; - link = &ctrl->mp[DP_CTRL_PM]; - - core->num_clk = ARRAY_SIZE(core_clks); - core->clocks = devm_kcalloc(dev, core->num_clk, sizeof(*core->clocks), GFP_KERNEL); - if (!core->clocks) + ctrl->num_core_clks = ARRAY_SIZE(core_clks); + ctrl->core_clks = devm_kcalloc(dev, ctrl->num_core_clks, sizeof(*ctrl->core_clks), GFP_KERNEL); + if (!ctrl->core_clks) return -ENOMEM; - for (i = 0; i < core->num_clk; i++) - core->clocks[i].id = core_clks[i]; + for (i = 0; i < ctrl->num_core_clks; i++) + ctrl->core_clks[i].id = core_clks[i]; - rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); + rc = devm_clk_bulk_get(dev, ctrl->num_core_clks, ctrl->core_clks); if (rc) return rc; - link->num_clk = ARRAY_SIZE(ctrl_clks); - link->clocks = devm_kcalloc(dev, link->num_clk, sizeof(*link->clocks), GFP_KERNEL); - if (!link->clocks) + ctrl->num_link_clks = ARRAY_SIZE(ctrl_clks); + ctrl->link_clks = devm_kcalloc(dev, ctrl->num_link_clks, sizeof(*ctrl->link_clks), GFP_KERNEL); + if (!ctrl->link_clks) return -ENOMEM; - for (i = 0; i < link->num_clk; i++) - link->clocks[i].id = ctrl_clks[i]; + for (i = 0; i < ctrl->num_link_clks; i++) + ctrl->link_clks[i].id = ctrl_clks[i]; - rc = devm_clk_bulk_get(dev, link->num_clk, link->clocks); + rc = devm_clk_bulk_get(dev, ctrl->num_link_clks, ctrl->link_clks); if (rc) return rc; diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h index d8007a9d8260..023f14d0b021 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -17,17 +17,11 @@ struct dp_ctrl { bool wide_bus_en; }; -enum dp_pm_type { - DP_CORE_PM, - DP_CTRL_PM, - DP_MAX_PM -}; - int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl); int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train); -int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); -int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl); -int dp_ctrl_off(struct dp_ctrl *dp_ctrl); +void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); +void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl); +void dp_ctrl_off(struct dp_ctrl *dp_ctrl); void dp_ctrl_push_idle(struct dp_ctrl *dp_ctrl); irqreturn_t dp_ctrl_isr(struct dp_ctrl *dp_ctrl); void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl); @@ -44,7 +38,7 @@ void dp_ctrl_irq_phy_exit(struct dp_ctrl *dp_ctrl); void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enable); void dp_ctrl_config_psr(struct dp_ctrl *dp_ctrl); -int dp_ctrl_clk_enable(struct dp_ctrl *ctrl, enum dp_pm_type pm_type, - bool enable); +int dp_ctrl_core_clk_enable(struct dp_ctrl *dp_ctrl); +void dp_ctrl_core_clk_disable(struct dp_ctrl *dp_ctrl); #endif /* _DP_CTRL_H_ */ diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 33e9d7deb3f8..6fbbd0f93d13 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -432,7 +432,7 @@ static void dp_display_host_init(struct dp_display_private *dp) dp->dp_display.connector_type, dp->core_initialized, dp->phy_initialized); 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Sat, 30 Dec 2023 16:44:03 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:56 +0200 Subject: [PATCH v2 09/15] drm/msm/dp: move phy_configure_opts to dp_ctrl Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-9-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6449; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=JHMCbSPE7gZXRzZ8Yh8uYk+Fdg3YzXkUqA/+AlXGaYM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlKHK7IATSmw6bh0J/WgmalOpsadKPT+lVOo 2Vd8ZEHEHiJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SgAKCRCLPIo+Aiko 1SRKB/9OTjUhJi3PtlZUs+9HvdLVY9H3o+ZsUSwd2PWuq81ipwfpsICrlCdZqQ+2jZ8qd2gcQM7 c3ihVMqCs73XElAlVBbKBSwswP1XVM63TyKnQs3K2IKaFTrDQ1ON3/FSATz05djdq5mJGvWWMT3 WK4upsYVckKgMKxQHkQumi+XeiXA5YXPPoEbpRwuzIy/LvkdbqIGpo6roRLAQldSZYU20wy6BjI ei0xAr1UKWaKOabbV5hZjFuooMDMDSvDj81ZDrzgkut7eb266e/FU/nM3ncscRUGHrfsVQfoOg1 VzGFcy6i8Laa2y6V5A+YfYi9TcWuihF+8/tbQ3/bqukO1N2J X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is little point in sharing phy configuration structure between several modules. Move it to dp_ctrl, which becomes the only submodule re-configuring the PHY. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/dp/dp_catalog.c | 19 ----------------- drivers/gpu/drm/msm/dp/dp_catalog.h | 2 -- drivers/gpu/drm/msm/dp/dp_ctrl.c | 41 ++++++++++++++++++++++++------------- drivers/gpu/drm/msm/dp/dp_parser.h | 3 --- 4 files changed, 27 insertions(+), 38 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index 5142aeb705a4..e07651768805 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -765,25 +765,6 @@ void dp_catalog_ctrl_phy_reset(struct dp_catalog *dp_catalog) dp_write_ahb(catalog, REG_DP_PHY_CTRL, 0x0); } -int dp_catalog_ctrl_update_vx_px(struct dp_catalog *dp_catalog, - u8 v_level, u8 p_level) -{ - struct dp_catalog_private *catalog = container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); - struct dp_io *dp_io = catalog->io; - struct phy *phy = dp_io->phy; - struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp; - - /* TODO: Update for all lanes instead of just first one */ - opts_dp->voltage[0] = v_level; - opts_dp->pre[0] = p_level; - opts_dp->set_voltages = 1; - phy_configure(phy, &dp_io->phy_opts); - opts_dp->set_voltages = 0; - - return 0; -} - void dp_catalog_ctrl_send_phy_pattern(struct dp_catalog *dp_catalog, u32 pattern) { diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index 38786e855b51..ba7c62ba7ca3 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -111,8 +111,6 @@ void dp_catalog_ctrl_set_psr(struct dp_catalog *dp_catalog, bool enter); u32 dp_catalog_link_is_connected(struct dp_catalog *dp_catalog); u32 dp_catalog_hpd_get_intr_status(struct dp_catalog *dp_catalog); void dp_catalog_ctrl_phy_reset(struct dp_catalog *dp_catalog); -int dp_catalog_ctrl_update_vx_px(struct dp_catalog *dp_catalog, u8 v_level, - u8 p_level); int dp_catalog_ctrl_get_interrupt(struct dp_catalog *dp_catalog); u32 dp_catalog_ctrl_read_psr_interrupt_status(struct dp_catalog *dp_catalog); void dp_catalog_ctrl_update_transfer_unit(struct dp_catalog *dp_catalog, diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index e367eb8e5bea..4aea72a2b8e8 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -87,6 +87,8 @@ struct dp_ctrl_private { struct clk *pixel_clk; + union phy_configure_opts phy_opts; + struct completion idle_comp; struct completion psr_op_comp; struct completion video_comp; @@ -1017,6 +1019,21 @@ static int dp_ctrl_wait4video_ready(struct dp_ctrl_private *ctrl) return ret; } +static int dp_ctrl_set_vx_px(struct dp_ctrl_private *ctrl, + u8 v_level, u8 p_level) +{ + union phy_configure_opts *phy_opts = &ctrl->phy_opts; + + /* TODO: Update for all lanes instead of just first one */ + phy_opts->dp.voltage[0] = v_level; + phy_opts->dp.pre[0] = p_level; + phy_opts->dp.set_voltages = 1; + phy_configure(ctrl->parser->io.phy, phy_opts); + phy_opts->dp.set_voltages = 0; + + return 0; +} + static int dp_ctrl_update_vx_px(struct dp_ctrl_private *ctrl) { struct dp_link *link = ctrl->link; @@ -1029,7 +1046,7 @@ static int dp_ctrl_update_vx_px(struct dp_ctrl_private *ctrl) drm_dbg_dp(ctrl->drm_dev, "voltage level: %d emphasis level: %d\n", voltage_swing_level, pre_emphasis_level); - ret = dp_catalog_ctrl_update_vx_px(ctrl->catalog, + ret = dp_ctrl_set_vx_px(ctrl, voltage_swing_level, pre_emphasis_level); if (ret) @@ -1425,16 +1442,14 @@ static void dp_ctrl_link_clk_disable(struct dp_ctrl *dp_ctrl) static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) { int ret = 0; - struct dp_io *dp_io = &ctrl->parser->io; - struct phy *phy = dp_io->phy; - struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp; + struct phy *phy = ctrl->parser->io.phy; const u8 *dpcd = ctrl->panel->dpcd; - opts_dp->lanes = ctrl->link->link_params.num_lanes; - opts_dp->link_rate = ctrl->link->link_params.rate / 100; - opts_dp->ssc = drm_dp_max_downspread(dpcd); + ctrl->phy_opts.dp.lanes = ctrl->link->link_params.num_lanes; + ctrl->phy_opts.dp.link_rate = ctrl->link->link_params.rate / 100; + ctrl->phy_opts.dp.ssc = drm_dp_max_downspread(dpcd); - phy_configure(phy, &dp_io->phy_opts); + phy_configure(phy, &ctrl->phy_opts); phy_power_on(phy); dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); @@ -1572,14 +1587,12 @@ static bool dp_ctrl_use_fixed_nvid(struct dp_ctrl_private *ctrl) static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl) { + struct phy *phy = ctrl->parser->io.phy; int ret = 0; - struct dp_io *dp_io = &ctrl->parser->io; - struct phy *phy = dp_io->phy; - struct phy_configure_opts_dp *opts_dp = &dp_io->phy_opts.dp; dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); - opts_dp->lanes = ctrl->link->link_params.num_lanes; - phy_configure(phy, &dp_io->phy_opts); + ctrl->phy_opts.dp.lanes = ctrl->link->link_params.num_lanes; + phy_configure(phy, &ctrl->phy_opts); /* * Disable and re-enable the mainlink clock since the * link clock might have been adjusted as part of the @@ -1659,7 +1672,7 @@ static bool dp_ctrl_send_phy_test_pattern(struct dp_ctrl_private *ctrl) drm_dbg_dp(ctrl->drm_dev, "request: 0x%x\n", pattern_requested); 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Sat, 30 Dec 2023 16:44:04 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:57 +0200 Subject: [PATCH v2 10/15] drm/msm/dp: remove PHY handling from dp_catalog.c Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-10-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=4868; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=lj8fVAqF9xjHx1KrBL3A1/vTOxjI6sPTTzeJIEKTWus=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlKYtIjSUKrW19STyvBa5h1Xgv60wgPPKTjg /AtG1iv5PGJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SgAKCRCLPIo+Aiko 1RhFCACyezgIjytPk7U3WDOoF8PK48MbzZXjnp7nOLOpYWqQc/WJmWSTwNUc1NHw2foawFseq5D QXTzPmfQEgF3+ndIsvv/YwS7uQJMi/Poy+Q7Ae7qPWWJa3lFz4Gus1FdHjFG+hqyYlw2cZS/ADr xWJQ48r1AjorSSo3HLUygzx67QiRHOX4wjKNqsx1x/IzRdQ6aGFKQBQrcp2MpO2KNQFXXPgnYjk 7Rms6aUzD1nw5qBXu2CCmjBjTkF6R4i7US2KYrdDC96YPuY+PCY/wByDz2AFWI0/SvnH8/I2ZMd F+maun5E26iEgPc1qEVZ/9x03OnnFYWFEINw0IiemP259NKF X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Inline dp_catalog_aux_update_cfg() and call phy_calibrate() from dp_aux functions directly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/dp/dp_aux.c | 9 +++++++-- drivers/gpu/drm/msm/dp/dp_aux.h | 1 + drivers/gpu/drm/msm/dp/dp_catalog.c | 12 ------------ drivers/gpu/drm/msm/dp/dp_catalog.h | 1 - drivers/gpu/drm/msm/dp/dp_display.c | 4 +++- 5 files changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_aux.c b/drivers/gpu/drm/msm/dp/dp_aux.c index 03f4951c49f4..adbd5a367395 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.c +++ b/drivers/gpu/drm/msm/dp/dp_aux.c @@ -4,6 +4,7 @@ */ #include +#include #include #include "dp_reg.h" @@ -23,6 +24,8 @@ struct dp_aux_private { struct device *dev; struct dp_catalog *catalog; + struct phy *phy; + struct mutex mutex; struct completion comp; @@ -336,7 +339,7 @@ static ssize_t dp_aux_transfer(struct drm_dp_aux *dp_aux, if (aux->native) { aux->retry_cnt++; if (!(aux->retry_cnt % MAX_AUX_RETRIES)) - dp_catalog_aux_update_cfg(aux->catalog); + phy_calibrate(aux->phy); } /* reset aux if link is in connected state */ if (dp_catalog_link_is_connected(aux->catalog)) @@ -439,7 +442,7 @@ void dp_aux_reconfig(struct drm_dp_aux *dp_aux) aux = container_of(dp_aux, struct dp_aux_private, dp_aux); - dp_catalog_aux_update_cfg(aux->catalog); + phy_calibrate(aux->phy); dp_catalog_aux_reset(aux->catalog); } @@ -517,6 +520,7 @@ static int dp_wait_hpd_asserted(struct drm_dp_aux *dp_aux, } struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog, + struct phy *phy, bool is_edp) { struct dp_aux_private *aux; @@ -537,6 +541,7 @@ struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog, aux->dev = dev; aux->catalog = catalog; + aux->phy = phy; aux->retry_cnt = 0; /* diff --git a/drivers/gpu/drm/msm/dp/dp_aux.h b/drivers/gpu/drm/msm/dp/dp_aux.h index 511305da4f66..16d9b1758748 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.h +++ b/drivers/gpu/drm/msm/dp/dp_aux.h @@ -17,6 +17,7 @@ void dp_aux_deinit(struct drm_dp_aux *dp_aux); void dp_aux_reconfig(struct drm_dp_aux *dp_aux); struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog, + struct phy *phy, bool is_edp); void dp_aux_put(struct drm_dp_aux *aux); diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index e07651768805..4c6207797c99 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -7,8 +7,6 @@ #include #include -#include -#include #include #include #include @@ -243,16 +241,6 @@ void dp_catalog_aux_enable(struct dp_catalog *dp_catalog, bool enable) dp_write_aux(catalog, REG_DP_AUX_CTRL, aux_ctrl); } -void dp_catalog_aux_update_cfg(struct dp_catalog *dp_catalog) -{ - struct dp_catalog_private *catalog = container_of(dp_catalog, - struct dp_catalog_private, dp_catalog); - struct dp_io *dp_io = catalog->io; - struct phy *phy = dp_io->phy; - - phy_calibrate(phy); -} - int dp_catalog_aux_wait_for_hpd_connect_state(struct dp_catalog *dp_catalog) { u32 state; diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index ba7c62ba7ca3..1f3f58d4b8de 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -84,7 +84,6 @@ int dp_catalog_aux_clear_trans(struct dp_catalog *dp_catalog, bool read); int dp_catalog_aux_clear_hw_interrupts(struct dp_catalog *dp_catalog); void dp_catalog_aux_reset(struct dp_catalog *dp_catalog); void dp_catalog_aux_enable(struct dp_catalog *dp_catalog, bool enable); -void dp_catalog_aux_update_cfg(struct dp_catalog *dp_catalog); int dp_catalog_aux_wait_for_hpd_connect_state(struct dp_catalog *dp_catalog); u32 dp_catalog_aux_get_irq(struct dp_catalog *dp_catalog); diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 6fbbd0f93d13..c1a51c498e01 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -729,7 +729,9 @@ static int dp_init_sub_modules(struct dp_display_private *dp) goto error; } - dp->aux = dp_aux_get(dev, dp->catalog, dp->dp_display.is_edp); + dp->aux = dp_aux_get(dev, dp->catalog, + dp->parser->io.phy, + dp->dp_display.is_edp); if (IS_ERR(dp->aux)) { rc = PTR_ERR(dp->aux); DRM_ERROR("failed to initialize aux, rc = %d\n", rc); From patchwork Sun Dec 31 00:43:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759252 Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CFBAB1873 for ; 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Sat, 30 Dec 2023 16:44:05 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n13-20020a05651203ed00b0050e84be8127sm1295995lfq.101.2023.12.30.16.44.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Dec 2023 16:44:04 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:43:58 +0200 Subject: [PATCH v2 11/15] drm/msm/dp: handle PHY directly in dp_ctrl Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-11-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=6372; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=wVNyfHlk6qxMhT/7/ZVII3sNHgLBjpEAI4YnszPdTtw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlLVifYbvJJNcxQiZKcI3+qtmEV6O9DtsUYk r7DI63Vm9SJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SwAKCRCLPIo+Aiko 1b/zCACHOYolBtPtcPzNNvcL3ff2W1ynA8aJSDzoUn4Y3I9tTQcsXMPx5u4qZ3OMUcIEvYuASkb tU8NJ5g2CHpc3MqExkTiCUJwFfibdBYZqtPEGAdfb2HSIr0Qm13HB/jNRCCA9voTB9HVsqoTZhD ZBhccf/m1gvVLo1jGrc1kY6vf0tX+oPeYgvkDIX0nKVtsAqVFxBOumXgOBW9LIGt6p09sgblAX7 2L3GIwAprxU+xhQmphhzgI5M/PYdOzzRBe0Sl4rHoKQ4IBCGykQFURCdGZE1B76EWk9tcDw0c3/ cEWmtJAjYX7FEDJWpArDJ3RHgiC+xwNBDEU21A2LyUsXoo7i X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is little point in going trough dp_parser->io indirection each time the driver needs to access the PHY. Store the pointer directly in dp_ctrl_private. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 37 +++++++++++++------------------------ drivers/gpu/drm/msm/dp/dp_ctrl.h | 2 +- drivers/gpu/drm/msm/dp/dp_display.c | 3 ++- 3 files changed, 16 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index 4aea72a2b8e8..fc7ce315ae41 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -76,9 +76,10 @@ struct dp_ctrl_private { struct drm_dp_aux *aux; struct dp_panel *panel; struct dp_link *link; - struct dp_parser *parser; struct dp_catalog *catalog; + struct phy *phy; + unsigned int num_core_clks; struct clk_bulk_data *core_clks; @@ -1028,7 +1029,7 @@ static int dp_ctrl_set_vx_px(struct dp_ctrl_private *ctrl, phy_opts->dp.voltage[0] = v_level; phy_opts->dp.pre[0] = p_level; phy_opts->dp.set_voltages = 1; - phy_configure(ctrl->parser->io.phy, phy_opts); + phy_configure(ctrl->phy, phy_opts); phy_opts->dp.set_voltages = 0; return 0; @@ -1442,7 +1443,7 @@ static void dp_ctrl_link_clk_disable(struct dp_ctrl *dp_ctrl) static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) { int ret = 0; - struct phy *phy = ctrl->parser->io.phy; + struct phy *phy = ctrl->phy; const u8 *dpcd = ctrl->panel->dpcd; ctrl->phy_opts.dp.lanes = ctrl->link->link_params.num_lanes; @@ -1540,12 +1541,10 @@ void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enter) void dp_ctrl_phy_init(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dp_io *dp_io; struct phy *phy; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - dp_io = &ctrl->parser->io; - phy = dp_io->phy; + phy = ctrl->phy; dp_catalog_ctrl_phy_reset(ctrl->catalog); phy_init(phy); @@ -1557,12 +1556,10 @@ void dp_ctrl_phy_init(struct dp_ctrl *dp_ctrl) void dp_ctrl_phy_exit(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dp_io *dp_io; struct phy *phy; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - dp_io = &ctrl->parser->io; - phy = dp_io->phy; + phy = ctrl->phy; dp_catalog_ctrl_phy_reset(ctrl->catalog); phy_exit(phy); @@ -1587,7 +1584,7 @@ static bool dp_ctrl_use_fixed_nvid(struct dp_ctrl_private *ctrl) static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl) { - struct phy *phy = ctrl->parser->io.phy; + struct phy *phy = ctrl->phy; int ret = 0; dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); @@ -1617,11 +1614,9 @@ static int dp_ctrl_reinitialize_mainlink(struct dp_ctrl_private *ctrl) static int dp_ctrl_deinitialize_mainlink(struct dp_ctrl_private *ctrl) { - struct dp_io *dp_io; struct phy *phy; - dp_io = &ctrl->parser->io; - phy = dp_io->phy; + phy = ctrl->phy; dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); @@ -2047,12 +2042,10 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dp_io *dp_io; struct phy *phy; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - dp_io = &ctrl->parser->io; - phy = dp_io->phy; + phy = ctrl->phy; /* set dongle to D3 (power off) mode */ dp_link_psm_config(ctrl->link, &ctrl->panel->link_info, true); @@ -2080,12 +2073,10 @@ void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl) void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dp_io *dp_io; struct phy *phy; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - dp_io = &ctrl->parser->io; - phy = dp_io->phy; + phy = ctrl->phy; dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); @@ -2103,12 +2094,10 @@ void dp_ctrl_off_link(struct dp_ctrl *dp_ctrl) void dp_ctrl_off(struct dp_ctrl *dp_ctrl) { struct dp_ctrl_private *ctrl; - struct dp_io *dp_io; struct phy *phy; ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); - dp_io = &ctrl->parser->io; - phy = dp_io->phy; + phy = ctrl->phy; dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); @@ -2225,7 +2214,7 @@ static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, struct dp_panel *panel, struct drm_dp_aux *aux, struct dp_catalog *catalog, - struct dp_parser *parser) + struct phy *phy) { struct dp_ctrl_private *ctrl; int ret; @@ -2259,12 +2248,12 @@ struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, init_completion(&ctrl->video_comp); /* in parameters */ - ctrl->parser = parser; ctrl->panel = panel; ctrl->aux = aux; ctrl->link = link; ctrl->catalog = catalog; ctrl->dev = dev; + ctrl->phy = phy; ret = dp_ctrl_clk_init(&ctrl->dp_ctrl); if (ret) { diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h index 023f14d0b021..6e9f375b856a 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -28,7 +28,7 @@ void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl); struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, struct dp_panel *panel, struct drm_dp_aux *aux, struct dp_catalog *catalog, - struct dp_parser *parser); + struct phy *phy); void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl, bool enable); void dp_ctrl_phy_init(struct dp_ctrl *dp_ctrl); diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index c1a51c498e01..b8388e04bd0f 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -760,7 +760,8 @@ static int dp_init_sub_modules(struct dp_display_private *dp) } dp->ctrl = dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, - dp->catalog, dp->parser); + dp->catalog, + dp->parser->io.phy); if (IS_ERR(dp->ctrl)) { rc = PTR_ERR(dp->ctrl); DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); From patchwork Sun Dec 31 00:43:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759093 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9509C210B for ; Sun, 31 Dec 2023 00:44:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="N/1DbLeD" Received: by mail-lf1-f44.google.com with SMTP id 2adb3069b0e04-50e7c76897dso4881701e87.2 for ; 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a=openpgp-sha256; l=15739; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=RVLDduDFSJzfd6PjlCkfVWPfroslvd26lG+KLnLFDlQ=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlLGM1lApWygVwc8Xf0BjniwVqrXnrYByVZb 6aW7Tgzf1qJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SwAKCRCLPIo+Aiko 1XjxCACPKrT6b130Dg45+5/B8cAfCelVGPrGFk48gsTELt3am3OrhV0KxMGooqituZzc6SB+aia YcYWux989gSZgTuJjeaIE3k3Overx2bFryGML9FUviLDiPyFEKqzHztjBRBFcMlEyLow1HCWZqV OHCJLWXVeqFoAsgnzhqUB/4qcWywb5OWe3c3bAY4iX3vbdP/YEvIjUXllnyDjThSJ1ZM2yNjYZ3 OFXF3V7hQIeVEHQT0EQDT3P5IshpdoHA0iIhUcXcVVubM5kw7uczOEhNxPlnKGyBLaXzqt9ZZKQ kT09rt58f41GEmqSuELQrhKVYoAmzHrZqGaV35kYP5ToT6Cb X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Rather than parsing the I/O addresses from dp_parser and then passing them via a struct pointer to dp_catalog, handle I/O region parsing in dp_catalog and drop it from dp_parser. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_catalog.c | 125 ++++++++++++++++++++++++++++++------ drivers/gpu/drm/msm/dp/dp_catalog.h | 2 +- drivers/gpu/drm/msm/dp/dp_display.c | 6 +- drivers/gpu/drm/msm/dp/dp_parser.c | 73 +-------------------- drivers/gpu/drm/msm/dp/dp_parser.h | 27 +------- 5 files changed, 115 insertions(+), 118 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.c b/drivers/gpu/drm/msm/dp/dp_catalog.c index 4c6207797c99..541aac2cb246 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.c +++ b/drivers/gpu/drm/msm/dp/dp_catalog.c @@ -7,6 +7,7 @@ #include #include +#include #include #include #include @@ -53,10 +54,31 @@ (PSR_UPDATE_MASK | PSR_CAPTURE_MASK | PSR_EXIT_MASK | \ PSR_UPDATE_ERROR_MASK | PSR_WAKE_ERROR_MASK) +#define DP_DEFAULT_AHB_OFFSET 0x0000 +#define DP_DEFAULT_AHB_SIZE 0x0200 +#define DP_DEFAULT_AUX_OFFSET 0x0200 +#define DP_DEFAULT_AUX_SIZE 0x0200 +#define DP_DEFAULT_LINK_OFFSET 0x0400 +#define DP_DEFAULT_LINK_SIZE 0x0C00 +#define DP_DEFAULT_P0_OFFSET 0x1000 +#define DP_DEFAULT_P0_SIZE 0x0400 + +struct dss_io_region { + size_t len; + void __iomem *base; +}; + +struct dss_io_data { + struct dss_io_region ahb; + struct dss_io_region aux; + struct dss_io_region link; + struct dss_io_region p0; +}; + struct dp_catalog_private { struct device *dev; struct drm_device *drm_dev; - struct dp_io *io; + struct dss_io_data io; u32 (*audio_map)[DP_AUDIO_SDP_HEADER_MAX]; struct dp_catalog dp_catalog; u8 aux_lut_cfg_index[PHY_AUX_CFG_MAX]; @@ -66,7 +88,7 @@ void dp_catalog_snapshot(struct dp_catalog *dp_catalog, struct msm_disp_state *d { struct dp_catalog_private *catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog); - struct dss_io_data *dss = &catalog->io->dp_controller; + struct dss_io_data *dss = &catalog->io; msm_disp_snapshot_add_block(disp_state, dss->ahb.len, dss->ahb.base, "dp_ahb"); msm_disp_snapshot_add_block(disp_state, dss->aux.len, dss->aux.base, "dp_aux"); @@ -76,7 +98,7 @@ void dp_catalog_snapshot(struct dp_catalog *dp_catalog, struct msm_disp_state *d static inline u32 dp_read_aux(struct dp_catalog_private *catalog, u32 offset) { - return readl_relaxed(catalog->io->dp_controller.aux.base + offset); + return readl_relaxed(catalog->io.aux.base + offset); } static inline void dp_write_aux(struct dp_catalog_private *catalog, @@ -86,12 +108,12 @@ static inline void dp_write_aux(struct dp_catalog_private *catalog, * To make sure aux reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.aux.base + offset); + writel(data, catalog->io.aux.base + offset); } static inline u32 dp_read_ahb(const struct dp_catalog_private *catalog, u32 offset) { - return readl_relaxed(catalog->io->dp_controller.ahb.base + offset); + return readl_relaxed(catalog->io.ahb.base + offset); } static inline void dp_write_ahb(struct dp_catalog_private *catalog, @@ -101,7 +123,7 @@ static inline void dp_write_ahb(struct dp_catalog_private *catalog, * To make sure phy reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.ahb.base + offset); + writel(data, catalog->io.ahb.base + offset); } static inline void dp_write_p0(struct dp_catalog_private *catalog, @@ -111,7 +133,7 @@ static inline void dp_write_p0(struct dp_catalog_private *catalog, * To make sure interface reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.p0.base + offset); + writel(data, catalog->io.p0.base + offset); } static inline u32 dp_read_p0(struct dp_catalog_private *catalog, @@ -121,12 +143,12 @@ static inline u32 dp_read_p0(struct dp_catalog_private *catalog, * To make sure interface reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - return readl_relaxed(catalog->io->dp_controller.p0.base + offset); + return readl_relaxed(catalog->io.p0.base + offset); } static inline u32 dp_read_link(struct dp_catalog_private *catalog, u32 offset) { - return readl_relaxed(catalog->io->dp_controller.link.base + offset); + return readl_relaxed(catalog->io.link.base + offset); } static inline void dp_write_link(struct dp_catalog_private *catalog, @@ -136,7 +158,7 @@ static inline void dp_write_link(struct dp_catalog_private *catalog, * To make sure link reg writes happens before any other operation, * this function uses writel() instread of writel_relaxed() */ - writel(data, catalog->io->dp_controller.link.base + offset); + writel(data, catalog->io.link.base + offset); } /* aux related catalog functions */ @@ -248,7 +270,7 @@ int dp_catalog_aux_wait_for_hpd_connect_state(struct dp_catalog *dp_catalog) struct dp_catalog_private, dp_catalog); /* poll for hpd connected status every 2ms and timeout after 500ms */ - return readl_poll_timeout(catalog->io->dp_controller.aux.base + + return readl_poll_timeout(catalog->io.aux.base + REG_DP_DP_HPD_INT_STATUS, state, state & DP_DP_HPD_STATE_STATUS_CONNECTED, 2000, 500000); @@ -276,7 +298,7 @@ void dp_catalog_dump_regs(struct dp_catalog *dp_catalog) { struct dp_catalog_private *catalog = container_of(dp_catalog, struct dp_catalog_private, dp_catalog); - struct dss_io_data *io = &catalog->io->dp_controller; + struct dss_io_data *io = &catalog->io; pr_info("AHB regs\n"); dump_regs(io->ahb.base, io->ahb.len); @@ -500,7 +522,7 @@ int dp_catalog_ctrl_set_pattern_state_bit(struct dp_catalog *dp_catalog, bit = BIT(state_bit - 1) << DP_MAINLINK_READY_LINK_TRAINING_SHIFT; /* Poll for mainlink ready status */ - ret = readx_poll_timeout(readl, catalog->io->dp_controller.link.base + + ret = readx_poll_timeout(readl, catalog->io.link.base + REG_DP_MAINLINK_READY, data, data & bit, POLLING_SLEEP_US, POLLING_TIMEOUT_US); @@ -563,7 +585,7 @@ bool dp_catalog_ctrl_mainlink_ready(struct dp_catalog *dp_catalog) struct dp_catalog_private, dp_catalog); /* Poll for mainlink ready status */ - ret = readl_poll_timeout(catalog->io->dp_controller.link.base + + ret = readl_poll_timeout(catalog->io.link.base + REG_DP_MAINLINK_READY, data, data & DP_MAINLINK_READY_FOR_VIDEO, POLLING_SLEEP_US, POLLING_TIMEOUT_US); @@ -945,21 +967,84 @@ void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog) dp_write_p0(catalog, MMSS_DP_TIMING_ENGINE_EN, 0x0); } -struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io) +static void __iomem *dp_ioremap(struct platform_device *pdev, int idx, size_t *len) { - struct dp_catalog_private *catalog; + struct resource *res; + void __iomem *base; + + base = devm_platform_get_and_ioremap_resource(pdev, idx, &res); + if (!IS_ERR(base)) + *len = resource_size(res); + + return base; +} + +static int dp_catalog_get_io(struct dp_catalog_private *catalog) +{ + struct platform_device *pdev = to_platform_device(catalog->dev); + struct dss_io_data *dss = &catalog->io; + + dss->ahb.base = dp_ioremap(pdev, 0, &dss->ahb.len); + if (IS_ERR(dss->ahb.base)) + return PTR_ERR(dss->ahb.base); - if (!io) { - DRM_ERROR("invalid input\n"); - return ERR_PTR(-EINVAL); + dss->aux.base = dp_ioremap(pdev, 1, &dss->aux.len); + if (IS_ERR(dss->aux.base)) { + /* + * The initial binding had a single reg, but in order to + * support variation in the sub-region sizes this was split. + * dp_ioremap() will fail with -EINVAL here if only a single + * reg is specified, so fill in the sub-region offsets and + * lengths based on this single region. + */ + if (PTR_ERR(dss->aux.base) == -EINVAL) { + if (dss->ahb.len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { + DRM_ERROR("legacy memory region not large enough\n"); + return -EINVAL; + } + + dss->ahb.len = DP_DEFAULT_AHB_SIZE; + dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET; + dss->aux.len = DP_DEFAULT_AUX_SIZE; + dss->link.base = dss->ahb.base + DP_DEFAULT_LINK_OFFSET; + dss->link.len = DP_DEFAULT_LINK_SIZE; + dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET; + dss->p0.len = DP_DEFAULT_P0_SIZE; + } else { + DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base); + return PTR_ERR(dss->aux.base); + } + } else { + dss->link.base = dp_ioremap(pdev, 2, &dss->link.len); + if (IS_ERR(dss->link.base)) { + DRM_ERROR("unable to remap link region: %pe\n", dss->link.base); + return PTR_ERR(dss->link.base); + } + + dss->p0.base = dp_ioremap(pdev, 3, &dss->p0.len); + if (IS_ERR(dss->p0.base)) { + DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base); + return PTR_ERR(dss->p0.base); + } } + return 0; +} + +struct dp_catalog *dp_catalog_get(struct device *dev) +{ + struct dp_catalog_private *catalog; + int ret; + catalog = devm_kzalloc(dev, sizeof(*catalog), GFP_KERNEL); if (!catalog) return ERR_PTR(-ENOMEM); catalog->dev = dev; - catalog->io = io; + + ret = dp_catalog_get_io(catalog); + if (ret) + return ERR_PTR(ret); return &catalog->dp_catalog; } diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index 1f3f58d4b8de..989e4c4fd6fa 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -126,7 +126,7 @@ void dp_catalog_panel_tpg_enable(struct dp_catalog *dp_catalog, struct drm_display_mode *drm_mode); void dp_catalog_panel_tpg_disable(struct dp_catalog *dp_catalog); -struct dp_catalog *dp_catalog_get(struct device *dev, struct dp_io *io); +struct dp_catalog *dp_catalog_get(struct device *dev); /* DP Audio APIs */ void dp_catalog_audio_get_header(struct dp_catalog *catalog); diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index b8388e04bd0f..5ad96989c5f2 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -721,7 +721,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) goto error; } - dp->catalog = dp_catalog_get(dev, &dp->parser->io); + dp->catalog = dp_catalog_get(dev); if (IS_ERR(dp->catalog)) { rc = PTR_ERR(dp->catalog); DRM_ERROR("failed to initialize catalog, rc = %d\n", rc); @@ -730,7 +730,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) } dp->aux = dp_aux_get(dev, dp->catalog, - dp->parser->io.phy, + dp->parser->phy, dp->dp_display.is_edp); if (IS_ERR(dp->aux)) { rc = PTR_ERR(dp->aux); @@ -761,7 +761,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) dp->ctrl = dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, dp->catalog, - dp->parser->io.phy); + dp->parser->phy); if (IS_ERR(dp->ctrl)) { rc = PTR_ERR(dp->ctrl); DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index de7cfc340f0c..2d0dd4353cdf 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -13,80 +13,13 @@ #include "dp_parser.h" #include "dp_reg.h" -#define DP_DEFAULT_AHB_OFFSET 0x0000 -#define DP_DEFAULT_AHB_SIZE 0x0200 -#define DP_DEFAULT_AUX_OFFSET 0x0200 -#define DP_DEFAULT_AUX_SIZE 0x0200 -#define DP_DEFAULT_LINK_OFFSET 0x0400 -#define DP_DEFAULT_LINK_SIZE 0x0C00 -#define DP_DEFAULT_P0_OFFSET 0x1000 -#define DP_DEFAULT_P0_SIZE 0x0400 - -static void __iomem *dp_ioremap(struct platform_device *pdev, int idx, size_t *len) -{ - struct resource *res; - void __iomem *base; - - base = devm_platform_get_and_ioremap_resource(pdev, idx, &res); - if (!IS_ERR(base)) - *len = resource_size(res); - - return base; -} - static int dp_parser_ctrl_res(struct dp_parser *parser) { struct platform_device *pdev = parser->pdev; - struct dp_io *io = &parser->io; - struct dss_io_data *dss = &io->dp_controller; - - dss->ahb.base = dp_ioremap(pdev, 0, &dss->ahb.len); - if (IS_ERR(dss->ahb.base)) - return PTR_ERR(dss->ahb.base); - - dss->aux.base = dp_ioremap(pdev, 1, &dss->aux.len); - if (IS_ERR(dss->aux.base)) { - /* - * The initial binding had a single reg, but in order to - * support variation in the sub-region sizes this was split. - * dp_ioremap() will fail with -EINVAL here if only a single - * reg is specified, so fill in the sub-region offsets and - * lengths based on this single region. - */ - if (PTR_ERR(dss->aux.base) == -EINVAL) { - if (dss->ahb.len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) { - DRM_ERROR("legacy memory region not large enough\n"); - return -EINVAL; - } - - dss->ahb.len = DP_DEFAULT_AHB_SIZE; - dss->aux.base = dss->ahb.base + DP_DEFAULT_AUX_OFFSET; - dss->aux.len = DP_DEFAULT_AUX_SIZE; - dss->link.base = dss->ahb.base + DP_DEFAULT_LINK_OFFSET; - dss->link.len = DP_DEFAULT_LINK_SIZE; - dss->p0.base = dss->ahb.base + DP_DEFAULT_P0_OFFSET; - dss->p0.len = DP_DEFAULT_P0_SIZE; - } else { - DRM_ERROR("unable to remap aux region: %pe\n", dss->aux.base); - return PTR_ERR(dss->aux.base); - } - } else { - dss->link.base = dp_ioremap(pdev, 2, &dss->link.len); - if (IS_ERR(dss->link.base)) { - DRM_ERROR("unable to remap link region: %pe\n", dss->link.base); - return PTR_ERR(dss->link.base); - } - - dss->p0.base = dp_ioremap(pdev, 3, &dss->p0.len); - if (IS_ERR(dss->p0.base)) { - DRM_ERROR("unable to remap p0 region: %pe\n", dss->p0.base); - return PTR_ERR(dss->p0.base); - } - } - io->phy = devm_phy_get(&pdev->dev, "dp"); - if (IS_ERR(io->phy)) - return PTR_ERR(io->phy); + parser->phy = devm_phy_get(&pdev->dev, "dp"); + if (IS_ERR(parser->phy)) + return PTR_ERR(parser->phy); return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index b28052e87101..1e2ca4efb029 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -14,37 +14,16 @@ #define DP_MAX_NUM_DP_LANES 4 #define DP_LINK_RATE_HBR2 540000 /* kbytes */ -struct dss_io_region { - size_t len; - void __iomem *base; -}; - -struct dss_io_data { - struct dss_io_region ahb; - struct dss_io_region aux; - struct dss_io_region link; - struct dss_io_region p0; -}; - -/** - * struct dp_ctrl_resource - controller's IO related data - * - * @dp_controller: Display Port controller mapped memory address - * @phy_io: phy's mapped memory address - */ -struct dp_io { - struct dss_io_data dp_controller; - struct phy *phy; -}; - /** * struct dp_parser - DP parser's data exposed to clients * * @pdev: platform data of the client + * @io: Display Port controller mapped memory address + * @phy: PHY handle */ struct dp_parser { struct platform_device *pdev; - struct dp_io io; + struct phy *phy; u32 max_dp_lanes; u32 max_dp_link_rate; struct drm_bridge *next_bridge; From patchwork Sun Dec 31 00:44:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759251 Received: from mail-lf1-f42.google.com (mail-lf1-f42.google.com [209.85.167.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3438B23D5 for ; Sun, 31 Dec 2023 00:44:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="DaspcHan" Received: by mail-lf1-f42.google.com with SMTP id 2adb3069b0e04-50e7b51b0ceso4515926e87.1 for ; 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a=openpgp-sha256; l=7400; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=a/dqsh/DEIltXYPrbLQ9upGy63erTmReZAb/0kas5zo=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBlkLlLbKm4jpRfV1QaZHTjtUtMkgLsC0pnYhLWm EUxcOt3ekiJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZZC5SwAKCRCLPIo+Aiko 1R/VB/9TF7J/kg40388SB1VD/yMYThWvCMxBT2xUbF2kMh/J0NPG+kpNi73HlrsjblnchlXY4Dp xXcXftnoBrz+zEOrAg0PhyTD8AkR3F6c5LgtwzaH9OLv03yq6opWB6vJxWlc/vtrFr9iLswpxLe 6At8qRY6nKSvbVCWmBAMVloI6N/MxAjSnTjVbZWNufhPn5PZVDqCcluguDKaVwhNDhgkIOnJ72p kNHnwbmqi66Ej5JubjHA454QaNxIBFv3Ijs9d2xUYdSxTzCeG/ZElVPRkZBiHHV2cW0RgHQWfNK L1leUnonPCxtafmEO0hlc7O8sKQ9A6HIhu8fTBN4ivPgr+6K X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Instead of passing link properties through the separate struct, parse them directly in the dp_panel. Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/dp/dp_display.c | 8 ----- drivers/gpu/drm/msm/dp/dp_display.h | 1 - drivers/gpu/drm/msm/dp/dp_panel.c | 66 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/msm/dp/dp_parser.c | 54 ------------------------------ drivers/gpu/drm/msm/dp/dp_parser.h | 4 --- 5 files changed, 66 insertions(+), 67 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 5ad96989c5f2..f19cb8c7e8cb 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -356,12 +356,6 @@ static int dp_display_process_hpd_high(struct dp_display_private *dp) int rc = 0; struct edid *edid; - dp->panel->max_dp_lanes = dp->parser->max_dp_lanes; - dp->panel->max_dp_link_rate = dp->parser->max_dp_link_rate; - - drm_dbg_dp(dp->drm_dev, "max_lanes=%d max_link_rate=%d\n", - dp->panel->max_dp_lanes, dp->panel->max_dp_link_rate); - rc = dp_panel_read_sink_caps(dp->panel, dp->dp_display.connector); if (rc) goto end; @@ -381,8 +375,6 @@ static int dp_display_process_hpd_high(struct dp_display_private *dp) dp->audio_supported = drm_detect_monitor_audio(edid); dp_panel_handle_sink_request(dp->panel); - dp->dp_display.max_dp_lanes = dp->parser->max_dp_lanes; - /* * set sink to normal operation mode -- D0 * before dpcd read diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h index 102f3507d824..70759dd1bfd0 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.h +++ b/drivers/gpu/drm/msm/dp/dp_display.h @@ -28,7 +28,6 @@ struct msm_dp { bool wide_bus_en; - u32 max_dp_lanes; struct dp_audio *dp_audio; bool psr_supported; }; diff --git a/drivers/gpu/drm/msm/dp/dp_panel.c b/drivers/gpu/drm/msm/dp/dp_panel.c index 127f6af995cd..8242541a81b9 100644 --- a/drivers/gpu/drm/msm/dp/dp_panel.c +++ b/drivers/gpu/drm/msm/dp/dp_panel.c @@ -7,8 +7,12 @@ #include #include +#include #include +#define DP_MAX_NUM_DP_LANES 4 +#define DP_LINK_RATE_HBR2 540000 /* kbytes */ + struct dp_panel_private { struct device *dev; struct drm_device *drm_dev; @@ -138,6 +142,9 @@ int dp_panel_read_sink_caps(struct dp_panel *dp_panel, panel = container_of(dp_panel, struct dp_panel_private, dp_panel); + drm_dbg_dp(panel->drm_dev, "max_lanes=%d max_link_rate=%d\n", + dp_panel->max_dp_lanes, dp_panel->max_dp_link_rate); + rc = dp_panel_read_dpcd(dp_panel); if (rc) { DRM_ERROR("read dpcd failed %d\n", rc); @@ -386,10 +393,65 @@ int dp_panel_init_panel_info(struct dp_panel *dp_panel) return 0; } +static u32 dp_panel_link_frequencies(struct device_node *of_node) +{ + struct device_node *endpoint; + u64 frequency = 0; + int cnt; + + endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */ + if (!endpoint) + return 0; + + cnt = of_property_count_u64_elems(endpoint, "link-frequencies"); + + if (cnt > 0) + of_property_read_u64_index(endpoint, "link-frequencies", + cnt - 1, &frequency); + of_node_put(endpoint); + + do_div(frequency, + 10 * /* from symbol rate to link rate */ + 1000); /* kbytes */ + + return frequency; +} + +static int dp_panel_parse_dt(struct dp_panel *dp_panel) +{ + struct dp_panel_private *panel; + struct device_node *of_node; + int cnt; + + panel = container_of(dp_panel, struct dp_panel_private, dp_panel); + of_node = panel->dev->of_node; + + /* + * data-lanes is the property of dp_out endpoint + */ + cnt = drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LANES); + if (cnt < 0) { + /* legacy code, data-lanes is the property of mdss_dp node */ + cnt = drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES); + } + + if (cnt > 0) + dp_panel->max_dp_lanes = cnt; + else + dp_panel->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */ + + dp_panel->max_dp_link_rate = dp_panel_link_frequencies(of_node); + if (!dp_panel->max_dp_link_rate) + dp_panel->max_dp_link_rate = DP_LINK_RATE_HBR2; + + return 0; +} + struct dp_panel *dp_panel_get(struct dp_panel_in *in) { struct dp_panel_private *panel; struct dp_panel *dp_panel; + int ret; if (!in->dev || !in->catalog || !in->aux || !in->link) { DRM_ERROR("invalid input\n"); @@ -408,6 +470,10 @@ struct dp_panel *dp_panel_get(struct dp_panel_in *in) dp_panel = &panel->dp_panel; dp_panel->max_bw_code = DP_LINK_BW_8_1; + ret = dp_panel_parse_dt(dp_panel); + if (ret) + return ERR_PTR(ret); + return dp_panel; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index 2d0dd4353cdf..aa135d5cedbd 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -24,56 +24,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) return 0; } -static u32 dp_parser_link_frequencies(struct device_node *of_node) -{ - struct device_node *endpoint; - u64 frequency = 0; - int cnt; - - endpoint = of_graph_get_endpoint_by_regs(of_node, 1, 0); /* port@1 */ - if (!endpoint) - return 0; - - cnt = of_property_count_u64_elems(endpoint, "link-frequencies"); - - if (cnt > 0) - of_property_read_u64_index(endpoint, "link-frequencies", - cnt - 1, &frequency); - of_node_put(endpoint); - - do_div(frequency, - 10 * /* from symbol rate to link rate */ - 1000); /* kbytes */ - - return frequency; -} - -static int dp_parser_misc(struct dp_parser *parser) -{ - struct device_node *of_node = parser->pdev->dev.of_node; - int cnt; - - /* - * data-lanes is the property of dp_out endpoint - */ - cnt = drm_of_get_data_lanes_count_ep(of_node, 1, 0, 1, DP_MAX_NUM_DP_LANES); - if (cnt < 0) { - /* legacy code, data-lanes is the property of mdss_dp node */ - cnt = drm_of_get_data_lanes_count(of_node, 1, DP_MAX_NUM_DP_LANES); - } - - if (cnt > 0) - parser->max_dp_lanes = cnt; - else - parser->max_dp_lanes = DP_MAX_NUM_DP_LANES; /* 4 lanes */ - - parser->max_dp_link_rate = dp_parser_link_frequencies(of_node); - if (!parser->max_dp_link_rate) - parser->max_dp_link_rate = DP_LINK_RATE_HBR2; - - return 0; -} - int devm_dp_parser_find_next_bridge(struct device *dev, struct dp_parser *parser) { struct platform_device *pdev = parser->pdev; @@ -101,10 +51,6 @@ static int dp_parser_parse(struct dp_parser *parser) if (rc) return rc; - rc = dp_parser_misc(parser); - if (rc) - return rc; - return 0; } diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index 1e2ca4efb029..bc56e0e8c446 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -11,8 +11,6 @@ #include "msm_drv.h" #define DP_MAX_PIXEL_CLK_KHZ 675000 -#define DP_MAX_NUM_DP_LANES 4 -#define DP_LINK_RATE_HBR2 540000 /* kbytes */ /** * struct dp_parser - DP parser's data exposed to clients @@ -24,8 +22,6 @@ struct dp_parser { struct platform_device *pdev; struct phy *phy; - u32 max_dp_lanes; - u32 max_dp_link_rate; struct drm_bridge *next_bridge; }; From patchwork Sun Dec 31 00:44:01 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759092 Received: from mail-lf1-f41.google.com (mail-lf1-f41.google.com [209.85.167.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF6D5257B for ; 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Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/dp/dp_display.c | 42 ++++++++++++------------------------- drivers/gpu/drm/msm/dp/dp_parser.c | 14 ------------- drivers/gpu/drm/msm/dp/dp_parser.h | 14 ------------- 3 files changed, 13 insertions(+), 57 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index f19cb8c7e8cb..03e9c5c3bd46 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1195,16 +1195,24 @@ static const struct msm_dp_desc *dp_display_get_desc(struct platform_device *pde return NULL; } -static int dp_display_get_next_bridge(struct msm_dp *dp); - static int dp_display_probe_tail(struct device *dev) { struct msm_dp *dp = dev_get_drvdata(dev); int ret; - ret = dp_display_get_next_bridge(dp); - if (ret) - return ret; + /* + * External bridges are mandatory for eDP interfaces: one has to + * provide at least an eDP panel (which gets wrapped into panel-bridge). + * + * For DisplayPort interfaces external bridges are optional, so + * silently ignore an error if one is not present (-ENODEV). + */ + dp->next_bridge = devm_drm_of_get_bridge(&dp->pdev->dev, dp->pdev->dev.of_node, 1, 0); + if (IS_ERR(dp->next_bridge)) { + ret = PTR_ERR(dp->next_bridge); + if (dp->is_edp || ret != -ENODEV) + return ret; + } ret = component_add(dev, &dp_display_comp_ops); if (ret) @@ -1397,30 +1405,6 @@ void dp_display_debugfs_init(struct msm_dp *dp_display, struct dentry *root, boo } } -static int dp_display_get_next_bridge(struct msm_dp *dp) -{ - int rc; - struct dp_display_private *dp_priv; - - dp_priv = container_of(dp, struct dp_display_private, dp_display); - - /* - * External bridges are mandatory for eDP interfaces: one has to - * provide at least an eDP panel (which gets wrapped into panel-bridge). - * - * For DisplayPort interfaces external bridges are optional, so - * silently ignore an error if one is not present (-ENODEV). - */ - rc = devm_dp_parser_find_next_bridge(&dp->pdev->dev, dp_priv->parser); - if (!dp->is_edp && rc == -ENODEV) - return 0; - - if (!rc) - dp->next_bridge = dp_priv->parser->next_bridge; - - return rc; -} - int msm_dp_modeset_init(struct msm_dp *dp_display, struct drm_device *dev, struct drm_encoder *encoder) { diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c index aa135d5cedbd..f95ab3c5c72c 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ b/drivers/gpu/drm/msm/dp/dp_parser.c @@ -24,20 +24,6 @@ static int dp_parser_ctrl_res(struct dp_parser *parser) return 0; } -int devm_dp_parser_find_next_bridge(struct device *dev, struct dp_parser *parser) -{ - struct platform_device *pdev = parser->pdev; - struct drm_bridge *bridge; - - bridge = devm_drm_of_get_bridge(dev, pdev->dev.of_node, 1, 0); - if (IS_ERR(bridge)) - return PTR_ERR(bridge); - - parser->next_bridge = bridge; - - return 0; -} - static int dp_parser_parse(struct dp_parser *parser) { int rc = 0; diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h index bc56e0e8c446..2b39b1c394ae 100644 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ b/drivers/gpu/drm/msm/dp/dp_parser.h @@ -22,7 +22,6 @@ struct dp_parser { struct platform_device *pdev; struct phy *phy; - struct drm_bridge *next_bridge; }; /** @@ -38,17 +37,4 @@ struct dp_parser { */ struct dp_parser *dp_parser_get(struct platform_device *pdev); -/** - * devm_dp_parser_find_next_bridge() - find an additional bridge to DP - * - * @dev: device to tie bridge lifetime to - * @parser: dp_parser data from client - * - * This function is used to find any additional bridge attached to - * the DP controller. The eDP interface requires a panel bridge. - * - * Return: 0 if able to get the bridge, otherwise negative errno for failure. - */ -int devm_dp_parser_find_next_bridge(struct device *dev, struct dp_parser *parser); - #endif From patchwork Sun Dec 31 00:44:02 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 759250 Received: from mail-lf1-f44.google.com (mail-lf1-f44.google.com [209.85.167.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BB6D7259D for ; Sun, 31 Dec 2023 00:44:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linaro.org Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="BLNyiqy/" Received: by mail-lf1-f44.google.com with SMTP id 2adb3069b0e04-50e7be1c65dso4670730e87.3 for ; Sat, 30 Dec 2023 16:44:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1703983448; x=1704588248; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=GfYzeOHgcS5rMFRaftvfFpeZQ1V5yhlJ0V9zRKLNji8=; b=BLNyiqy/MYvrrHs8ZlJClcXohQzWwqaWcMoRKphI38GjFTcRHu3n7HC99iNlsr1UKT vMhtWEkC3WQOmmLh2dljpiuXcOwdh7IjQaJT1j8cgb4Eq2oKwM13wGGlx7Rrr0je2947 FOu6fEM+zoXyEXHQ43HflfBf3FXhdfIni4BW0KejgFD04gbft27JHUFcFngAibCRT4AW mFBwFkUfLh/w4WmPb8nZo4W6T2Spq4FPl94iejJaB4gYezWCwfOdouJ7Z+pq6fx733gx ZbSjhI1HA//v29tWnaqlZWSoLGYLa2VmG5mnB6gpl9kAkYpU9eOvBLgMnnZ3/EIcByK2 wa5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1703983448; x=1704588248; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GfYzeOHgcS5rMFRaftvfFpeZQ1V5yhlJ0V9zRKLNji8=; b=nTanasm6ym6Ye14RQZDKwFykqt8ZDn6QzpkTWqykaMQkq2eNZq0H6mZAFloBvE+Lio dAlFL/TlEJIxBOHnJo72SvmvyUmsSJcKuifz1gCga8Yrec5AcU3lZQ3hPw2ql00zi4MR fgi5ZJLudbl8+z79jRU7eesqJ0qrq1DUMC2lpRToHluqJIZNY2TFMOUVIX6L8gozLlBQ qvAjgCq2kJBYvM0HKm8l3l5Ac/wDF6zuDM+cZVGNxZq3lgMQVxTq14t/DTOPEa2uOmNN 8x9L298Ct7PMFdFLyWuDoEeVZxJV4mRePu0Xb9swB2OVNRWbJ4DwbpB/JvjnMBtfNxpl og9g== X-Gm-Message-State: AOJu0Yyeg0FDMv+1Wu8SeN5E1lYRg3aitP8vRrLZVxOLHcHavHclZdUO bkpDG8CTfkR1XVMtlzIvDFDRwGE1UIryiQ== X-Google-Smtp-Source: AGHT+IFySGzQRGCSjG6ixBApkOm4Lcta1ozEWXk5N6wglQTrBh35tc4J3enyNJ4mmr9B72346GKhiA== X-Received: by 2002:ac2:548b:0:b0:50e:1a9f:3c36 with SMTP id t11-20020ac2548b000000b0050e1a9f3c36mr5745924lfk.15.1703983447955; Sat, 30 Dec 2023 16:44:07 -0800 (PST) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id n13-20020a05651203ed00b0050e84be8127sm1295995lfq.101.2023.12.30.16.44.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 30 Dec 2023 16:44:07 -0800 (PST) From: Dmitry Baryshkov Date: Sun, 31 Dec 2023 02:44:02 +0200 Subject: [PATCH v2 15/15] drm/msm/dp: drop dp_parser Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20231231-dp-power-parser-cleanup-v2-15-fc3e902a6f5b@linaro.org> References: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> In-Reply-To: <20231231-dp-power-parser-cleanup-v2-0-fc3e902a6f5b@linaro.org> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Kuogee Hsieh , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, Bjorn Andersson , Konrad Dybcio X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=8110; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=TOKAUj7wqAQ9xZhC70Z8FjrR1dl4xCheaCIfCLWs5m0=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ+qEnd4mH14Uu/WZ52axRwgVzrnncZRNVk659HH2idMOs 9rChfZ3MhqzMDByMciKKbL4FLRMjdmUHPZhx9R6mEGsTCBTGLg4BWAi6y+y/4/f9tGpSe7bs8WP ZReq8/PEc5VLWFSvz7uedLDtjX2b6MQJWbf/z41R9Uhp33s8UOai1vqbSRGrFq+8Ijjpd5VzWeM iMatr/CqCirOizZPlapVCAh/nHd+3rEbr/HXrs6L3ghJlzNlVtPQ4D4ZZmKUeeHWlZ4ma54ST7f tbVnPuOXj57qaTnx8eZ9w+a7+pgYxOdk9rnGVA/ssZM5tm+7SU3Dj47oHFs5aQg7c21novm9mv2 ipk0xwW+4P5xrIm5v/KWXuuia45Ev5/X3yEAYf/TWllmbtJNiW8Jt25gdZxikFFbkXXoiRrVXfY dJSfflbL/alFKVlPsr1If69C0e4j9dyXBZiE7bniFDcCAA== X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Finally drop separate "parsing" submodule. There is no need in it anymore. All submodules handle DT properties directly rather than passing them via the separate structure pointer. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/gpu/drm/msm/Makefile | 1 - drivers/gpu/drm/msm/dp/dp_aux.h | 1 + drivers/gpu/drm/msm/dp/dp_catalog.h | 1 - drivers/gpu/drm/msm/dp/dp_ctrl.h | 3 +- drivers/gpu/drm/msm/dp/dp_debug.c | 1 - drivers/gpu/drm/msm/dp/dp_display.c | 18 +++++------ drivers/gpu/drm/msm/dp/dp_display.h | 2 ++ drivers/gpu/drm/msm/dp/dp_parser.c | 61 ------------------------------------- drivers/gpu/drm/msm/dp/dp_parser.h | 40 ------------------------ 9 files changed, 12 insertions(+), 116 deletions(-) diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 8dbdf3fba69e..543e04fa72e3 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -127,7 +127,6 @@ msm-$(CONFIG_DRM_MSM_DP)+= dp/dp_aux.o \ dp/dp_drm.o \ dp/dp_link.o \ dp/dp_panel.o \ - dp/dp_parser.o \ dp/dp_audio.o msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o diff --git a/drivers/gpu/drm/msm/dp/dp_aux.h b/drivers/gpu/drm/msm/dp/dp_aux.h index 16d9b1758748..f47d591c1f54 100644 --- a/drivers/gpu/drm/msm/dp/dp_aux.h +++ b/drivers/gpu/drm/msm/dp/dp_aux.h @@ -16,6 +16,7 @@ void dp_aux_init(struct drm_dp_aux *dp_aux); void dp_aux_deinit(struct drm_dp_aux *dp_aux); void dp_aux_reconfig(struct drm_dp_aux *dp_aux); +struct phy; struct drm_dp_aux *dp_aux_get(struct device *dev, struct dp_catalog *catalog, struct phy *phy, bool is_edp); diff --git a/drivers/gpu/drm/msm/dp/dp_catalog.h b/drivers/gpu/drm/msm/dp/dp_catalog.h index 989e4c4fd6fa..a724a986b6ee 100644 --- a/drivers/gpu/drm/msm/dp/dp_catalog.h +++ b/drivers/gpu/drm/msm/dp/dp_catalog.h @@ -8,7 +8,6 @@ #include -#include "dp_parser.h" #include "disp/msm_disp_snapshot.h" /* interrupts */ diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h index 6e9f375b856a..fa014cee7e21 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -9,7 +9,6 @@ #include "dp_aux.h" #include "dp_panel.h" #include "dp_link.h" -#include "dp_parser.h" #include "dp_catalog.h" struct dp_ctrl { @@ -17,6 +16,8 @@ struct dp_ctrl { bool wide_bus_en; }; +struct phy; + int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl); int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train); void dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); diff --git a/drivers/gpu/drm/msm/dp/dp_debug.c b/drivers/gpu/drm/msm/dp/dp_debug.c index 6c281dc095b9..ac68554801a4 100644 --- a/drivers/gpu/drm/msm/dp/dp_debug.c +++ b/drivers/gpu/drm/msm/dp/dp_debug.c @@ -9,7 +9,6 @@ #include #include -#include "dp_parser.h" #include "dp_catalog.h" #include "dp_aux.h" #include "dp_ctrl.h" diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 03e9c5c3bd46..5df6d9761c31 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -9,12 +9,12 @@ #include #include #include +#include #include #include #include "msm_drv.h" #include "msm_kms.h" -#include "dp_parser.h" #include "dp_ctrl.h" #include "dp_catalog.h" #include "dp_aux.h" @@ -87,7 +87,6 @@ struct dp_display_private { struct drm_device *drm_dev; struct dentry *root; - struct dp_parser *parser; struct dp_catalog *catalog; struct drm_dp_aux *aux; struct dp_link *link; @@ -704,14 +703,11 @@ static int dp_init_sub_modules(struct dp_display_private *dp) struct dp_panel_in panel_in = { .dev = dev, }; + struct phy *phy; - dp->parser = dp_parser_get(dp->dp_display.pdev); - if (IS_ERR(dp->parser)) { - rc = PTR_ERR(dp->parser); - DRM_ERROR("failed to initialize parser, rc = %d\n", rc); - dp->parser = NULL; - goto error; - } + phy = devm_phy_get(dev, "dp"); + if (IS_ERR(phy)) + return PTR_ERR(phy); dp->catalog = dp_catalog_get(dev); if (IS_ERR(dp->catalog)) { @@ -722,7 +718,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) } dp->aux = dp_aux_get(dev, dp->catalog, - dp->parser->phy, + phy, dp->dp_display.is_edp); if (IS_ERR(dp->aux)) { rc = PTR_ERR(dp->aux); @@ -753,7 +749,7 @@ static int dp_init_sub_modules(struct dp_display_private *dp) dp->ctrl = dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, dp->catalog, - dp->parser->phy); + phy); if (IS_ERR(dp->ctrl)) { rc = PTR_ERR(dp->ctrl); DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); diff --git a/drivers/gpu/drm/msm/dp/dp_display.h b/drivers/gpu/drm/msm/dp/dp_display.h index 70759dd1bfd0..234dada88687 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.h +++ b/drivers/gpu/drm/msm/dp/dp_display.h @@ -10,6 +10,8 @@ #include #include "disp/msm_disp_snapshot.h" +#define DP_MAX_PIXEL_CLK_KHZ 675000 + struct msm_dp { struct drm_device *drm_dev; struct platform_device *pdev; diff --git a/drivers/gpu/drm/msm/dp/dp_parser.c b/drivers/gpu/drm/msm/dp/dp_parser.c deleted file mode 100644 index f95ab3c5c72c..000000000000 --- a/drivers/gpu/drm/msm/dp/dp_parser.c +++ /dev/null @@ -1,61 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-only -/* - * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. - */ - -#include -#include - -#include -#include -#include - -#include "dp_parser.h" -#include "dp_reg.h" - -static int dp_parser_ctrl_res(struct dp_parser *parser) -{ - struct platform_device *pdev = parser->pdev; - - parser->phy = devm_phy_get(&pdev->dev, "dp"); - if (IS_ERR(parser->phy)) - return PTR_ERR(parser->phy); - - return 0; -} - -static int dp_parser_parse(struct dp_parser *parser) -{ - int rc = 0; - - if (!parser) { - DRM_ERROR("invalid input\n"); - return -EINVAL; - } - - rc = dp_parser_ctrl_res(parser); - if (rc) - return rc; - - return 0; -} - -struct dp_parser *dp_parser_get(struct platform_device *pdev) -{ - struct dp_parser *parser; - int ret; - - parser = devm_kzalloc(&pdev->dev, sizeof(*parser), GFP_KERNEL); - if (!parser) - return ERR_PTR(-ENOMEM); - - parser->pdev = pdev; - - ret = dp_parser_parse(parser); - if (ret) { - dev_err(&pdev->dev, "device tree parsing failed\n"); - return ERR_PTR(ret); - } - - return parser; -} diff --git a/drivers/gpu/drm/msm/dp/dp_parser.h b/drivers/gpu/drm/msm/dp/dp_parser.h deleted file mode 100644 index 2b39b1c394ae..000000000000 --- a/drivers/gpu/drm/msm/dp/dp_parser.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. - */ - -#ifndef _DP_PARSER_H_ -#define _DP_PARSER_H_ - -#include - -#include "msm_drv.h" - -#define DP_MAX_PIXEL_CLK_KHZ 675000 - -/** - * struct dp_parser - DP parser's data exposed to clients - * - * @pdev: platform data of the client - * @io: Display Port controller mapped memory address - * @phy: PHY handle - */ -struct dp_parser { - struct platform_device *pdev; - struct phy *phy; -}; - -/** - * dp_parser_get() - get the DP's device tree parser module - * - * @pdev: platform data of the client - * return: pointer to dp_parser structure. - * - * This function provides client capability to parse the - * device tree and populate the data structures. The data - * related to clock, regulators, pin-control and other - * can be parsed using this module. - */ -struct dp_parser *dp_parser_get(struct platform_device *pdev); - -#endif