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The current bindings documentation for armada-38x are only listing SoCs, but no actual boards. Only actual boards should be listed. Replace the dropped entries with some actual baords that already have valid compatibles in-tree: - armada 380 netgear switch - armada 385 marvell development boards - armada 388 development board Signed-off-by: Josua Mayer --- .../devicetree/bindings/arm/marvell/armada-38x.txt | 27 -------------- .../bindings/arm/marvell/armada-38x.yaml | 42 ++++++++++++++++++++++ 2 files changed, 42 insertions(+), 27 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.txt b/Documentation/devicetree/bindings/arm/marvell/armada-38x.txt deleted file mode 100644 index 202953f1887e..000000000000 --- a/Documentation/devicetree/bindings/arm/marvell/armada-38x.txt +++ /dev/null @@ -1,27 +0,0 @@ -Marvell Armada 38x Platforms Device Tree Bindings -------------------------------------------------- - -Boards with a SoC of the Marvell Armada 38x family shall have the -following property: - -Required root node property: - - - compatible: must contain "marvell,armada380" - -In addition, boards using the Marvell Armada 385 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada385" - -In addition, boards using the Marvell Armada 388 SoC shall have the -following property before the previous one: - -Required root node property: - -compatible: must contain "marvell,armada388" - -Example: - -compatible = "marvell,a385-rd", "marvell,armada385", "marvell,armada380"; diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml new file mode 100644 index 000000000000..108d665220b5 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/marvell/armada-38x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Armada 38x Platforms + +maintainers: + - Gregory CLEMENT + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: + Netgear Armada 380 GS110EM Managed Switch. + items: + - const: netgear,gs110emx + - const: marvell,armada380 + + - description: + Marvell Armada 385 Development Boards. + items: + - enum: + - marvell,a385-db-amc + - marvell,a385-db-ap + - const: marvell,armada385 + - const: marvell,armada380 + + - description: + Marvell Armada 388 Development Boards. + items: + - enum: + - marvell,a388-gp + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + +additionalProperties: true From patchwork Thu Jan 4 17:48:03 2024 Content-Type: text/plain; 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There are already 3 distinct dts in tree for these *two* boards, declaring particular compatible strings: the generic "armada-388-clearfog.dts" is a legacy name for the Pro version, old versions of u-boot built when only one variant existed explicitly boot by this name. The other two add explicit -pro / -base suffix to the filename, these are preferred and chosen by latest u-boot. Note that both compatibles and model field include the string "A1". At least up to revision 2.0 of the board, this had been printed on the pcb. However in marketing material and conversations it is usually omitted. "Clearfog Pro" and "Clearfog Pro A1" always mean exactly the same product. Technically Base and Pro variants are similar enough that they can successfully boot with each other's dts. Hence it makes (some) sense for them to share the "clearfog-a1" compatible. Add bindings for the explicit variants -pro and -base - including a shared compatible string between the two. Signed-off-by: Josua Mayer --- Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml index 108d665220b5..f4e930d8cc26 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -39,4 +39,15 @@ properties: - const: marvell,armada385 - const: marvell,armada380 + - description: + SolidRun Armada 388 clearfog family single-board computers. + items: + - enum: + - solidrun,clearfog-base-a1 + - solidrun,clearfog-pro-a1 + - const: solidrun,clearfog-a1 + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + additionalProperties: true From patchwork Thu Jan 4 17:48:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 760523 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2089.outbound.protection.outlook.com [40.107.21.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 76BFC28E0C; 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This product shares a common system on module with the solidrun armada 388 clearfog boards, however it is not easily described in a single list due to their extra "solidrun,clearfog-a1" compatible string. Signed-off-by: Josua Mayer --- Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml index f4e930d8cc26..cd5e5f88d8b5 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -30,6 +30,14 @@ properties: - const: marvell,armada385 - const: marvell,armada380 + - description: + Kobol Armada 388 based Helios-4 NAS. + items: + - const: kobol,helios4 + - const: marvell,armada388 + - const: marvell,armada385 + - const: marvell,armada380 + - description: Marvell Armada 388 Development Boards. items: From patchwork Thu Jan 4 17:48:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 760522 Received: from EUR05-VI1-obe.outbound.protection.outlook.com (mail-vi1eur05on2089.outbound.protection.outlook.com [40.107.21.89]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7AB8428E25; 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Despite similar name these two boards are designed differently from the armada 388 clearfog base and pro, they only share a name and general use case. Signed-off-by: Josua Mayer --- Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml index cd5e5f88d8b5..cdf805b5db95 100644 --- a/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml +++ b/Documentation/devicetree/bindings/arm/marvell/armada-38x.yaml @@ -30,6 +30,15 @@ properties: - const: marvell,armada385 - const: marvell,armada380 + - description: + SolidRun Armada 385 based single-board computers. + items: + - enum: + - solidrun,clearfog-gtr-l8 + - solidrun,clearfog-gtr-s4 + - const: marvell,armada385 + - const: marvell,armada380 + - description: Kobol Armada 388 based Helios-4 NAS. items: From patchwork Thu Jan 4 17:48:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 759941 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-vi1eur04on2083.outbound.protection.outlook.com [40.107.8.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1EEB288CF; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?jYHOh7aVX1HgcRypA/RgIw/3knw8?= =?utf-8?q?wWvsLjbDQuudRUAwywAJK0PYfEd1CjKrViE7yQqHu3Is6s1DFjlkiUP+cNOEGzHkm?= =?utf-8?q?e8VZ3tqK38Zz+nUQJIPtJ+VFie4wim5TbsLvZtl/B5YygD5KIpAPvmCxar8nUcEue?= =?utf-8?q?tIfV0U6PIc3tT+DgUc7PAj+Ee5gQcvDY0o6UlUmzZ3DedS+Gk5RP7Piu3cH4uMTnY?= =?utf-8?q?THPvLlLhIndreRWwIwfJ8XVInyR7vazL+xOhdV+x5KQbJ9WG5izwgUWGy2YUVMfuB?= =?utf-8?q?QBPcuQ6Jalf+69oscsYq4BmadQJwvqi1OMrTB0zfyKWF0beYQofx1V+3BDDSlhWCW?= =?utf-8?q?CLUvDMpGGBF0/4d+NRB1Tqy0DDtz03iM9BhI9RcHUsQK85W+8NiXFjskweX1Xkr/R?= =?utf-8?q?U5G2ElOL5obWjP7kVxld4AjcHvQRZRfYKZG8M7b68aUteCo6U62qf0aLW4+ZH77wy?= =?utf-8?q?ZtrsfB/0Yz1aogBc2o/wmZJe/v8nlGToq4T3YP8Tv5YcWyVgntRNH811WSUq1g10m?= =?utf-8?q?sWUd1frWombnmiVqRFIr4dOQ7fd9QSWnOtGhSbHiQEvjlzqg3yZaKLqLoJIeWPHd+?= =?utf-8?q?ggBHD/AySgTDCyKXjpJhZ88ofw4Vbj6ubtYe/WCPZ94k4eyhkD5Q4no/cD3dk6B/s?= =?utf-8?q?mBx8opJ9jh2j3TlMkZfnZ8KraPlQodyccHaH244czg2/jXoRkjiaaijp5/U7mjOUR?= =?utf-8?q?7ZC/gUOor5UnlGOTxiedegySpKa4n73GYJfw1PK56ocI6M8ZEMxKgQr92L+ANRKbq?= =?utf-8?q?F9T7enlfWym3WGyd4re/5KaPQKSc19qbf78jLqQ3q5j7+7iK0N2pF9KCHY8TIQiH3?= =?utf-8?q?8YOqWSsQe2DSHFoV6yzaRdgQtptGui/Bk2y/fJTXA2iluNeW5n1wI4D4xwNi27oMq?= =?utf-8?q?Jbd1ox+PntuigCEmZwjmDuF/D39I7UAz4rpUDZkCgx7djO6O8HSp8g46e0bBcs4N+?= =?utf-8?q?HrLnt4crrPwTDB+Hh0S2AT7iOunAJo5NL/W9YEAB6cP9GYddqTtmCQWGfTA1/wfHN?= =?utf-8?q?IRPEotZEzxOHkC8pY2PoXOU3sKPIZnxRHQkL7oHzt+pRwjuGt8KiInyCmvMgFlYE6?= =?utf-8?q?rP1PRJ9oAUDyfl6PPmCGnJhIlldTvK53lK8oVbKrbWdRKbc5e35vHdbJaPVsQntdr?= =?utf-8?q?STiXY9+laygCVUzVo0hE104OVIbg6QtdkoQH1Y/2js4K7uZRa0XABE7CPUDTHfVqR?= =?utf-8?q?E876xoUm9cgdhzGci9EZWkdLOqwFS9GoChdsiFYbW5omSmkgsoxI1qbTfswkTfKHB?= =?utf-8?q?u02fZN1EH5eH3opS09NJ5b4Xn1PQ4dEGGtRY9rTvXmNvXZrhkg4yQ1EeikQPqbEjB?= =?utf-8?q?vKeyt+SLb4/LhNTYSbmWAKezdKfhO3DVvApo5Cde3fmq+1I89tJiCPM2Eor6Geaj7?= =?utf-8?q?jdEP5bZQZg5URHRlUsAVLs3fykQqGuKNkJ7oLX3HEpE27TO+hVgQFxJHB44z5Gd7U?= =?utf-8?q?AWOCfGoIpMwCrbBGyyBKrHrQb7hcr+QAz00bYYRAvQMtiCQZqyNV5qQOubacIPK5s?= =?utf-8?q?aY7BKZc4Z+d2?= X-OriginatorOrg: solid-run.com X-MS-Exchange-CrossTenant-Network-Message-Id: fddfe264-7ae4-4752-7a04-08dc0d4d4ff4 X-MS-Exchange-CrossTenant-AuthSource: AS8PR04MB8963.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Jan 2024 17:48:08.5718 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: a4a8aaf3-fd27-4e27-add2-604707ce5b82 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: E5hMI+5d+oTfh3QjeY7CG99wZRLVIDm6AHv8LT16PaC2oa+f5oSy93nndnNgnlNsb3yy/8PLCZIFmqnEPBrbkg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB8233 Armada 388 Clearfog ("armada-388-clearfog.dts)" is a legacy filename for the Armada 388 Clearfog Pro ("armada-388-clearfog-pro.dts"). The "Pro" suffix was only used when the smaller version, the "Base" got released. The two names refer to exactly the same hardware, therefore they should share the same compatible strings. Copy "solidrun,clearfog-pro-a1" compatible from the -pro dts and add it to this legacy file. Signed-off-by: Josua Mayer --- arch/arm/boot/dts/marvell/armada-388-clearfog.dts | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts index 32c569df142f..24e478a3cc99 100644 --- a/arch/arm/boot/dts/marvell/armada-388-clearfog.dts +++ b/arch/arm/boot/dts/marvell/armada-388-clearfog.dts @@ -10,8 +10,9 @@ / { model = "SolidRun Clearfog A1"; - compatible = "solidrun,clearfog-a1", "marvell,armada388", - "marvell,armada385", "marvell,armada380"; + compatible = "solidrun,clearfog-pro-a1", "solidrun,clearfog-a1", + "marvell,armada388", "marvell,armada385", + "marvell,armada380"; soc { internal-regs { From patchwork Thu Jan 4 17:48:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 760524 Received: from EUR04-HE1-obe.outbound.protection.outlook.com (mail-he1eur04on2087.outbound.protection.outlook.com [40.107.7.87]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BA01C28DC9; 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Add board-specific properties to both variants of the Clearfog GTR: - solidrun,clearfog-gtr-l8 - solidrun,clearfog-gtr-s4 Introduction of a common parent (e.g. "solidrun,clearfog-gtr") is omitted for brevity. Since announcement of the two products no additional variants were added it is assumed that there will always be just two. Signed-off-by: Josua Mayer --- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 2 ++ arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 1990f7d0cc79..cd5b070f1218 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -4,6 +4,8 @@ / { model = "SolidRun Clearfog GTR L8"; + compatible = "solidrun,clearfog-gtr-l8", "marvell,armada385", + "marvell,armada380"; }; &mdio { diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts index b795ad573891..4a9736ec99b6 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-s4.dts @@ -4,6 +4,8 @@ / { model = "SolidRun Clearfog GTR S4"; + compatible = "solidrun,clearfog-gtr-s4", "marvell,armada385", + "marvell,armada380"; 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Signed-off-by: Josua Mayer --- .../boot/dts/marvell/armada-385-clearfog-gtr.dtsi | 40 +++++++++++----------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi index d1452a04e904..8eabb60765b0 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi @@ -141,18 +141,13 @@ i2c@11100 { /* SFP (CON5/CON6) */ }; pinctrl@18000 { - cf_gtr_switch_reset_pins: cf-gtr-switch-reset-pins { - marvell,pins = "mpp18"; - marvell,function = "gpio"; - }; - - cf_gtr_usb3_con_vbus: cf-gtr-usb3-con-vbus { - marvell,pins = "mpp22"; + cf_gtr_fan_pwm: cf-gtr-fan-pwm { + marvell,pins = "mpp23"; marvell,function = "gpio"; }; - cf_gtr_fan_pwm: cf-gtr-fan-pwm { - marvell,pins = "mpp23"; + cf_gtr_front_button_pins: cf-gtr-front-button-pins { + marvell,pins = "mpp53"; marvell,function = "gpio"; }; @@ -162,13 +157,6 @@ cf_gtr_i2c1_pins: i2c1-pins { marvell,function = "i2c1"; }; - cf_gtr_sdhci_pins: cf-gtr-sdhci-pins { - marvell,pins = "mpp21", "mpp28", - "mpp37", "mpp38", - "mpp39", "mpp40"; - marvell,function = "sd0"; - }; - cf_gtr_isolation_pins: cf-gtr-isolation-pins { marvell,pins = "mpp47"; marvell,function = "gpio"; @@ -179,18 +167,30 @@ cf_gtr_poe_reset_pins: cf-gtr-poe-reset-pins { marvell,function = "gpio"; }; + cf_gtr_rear_button_pins: cf-gtr-rear-button-pins { + marvell,pins = "mpp36"; + marvell,function = "gpio"; + }; + + cf_gtr_sdhci_pins: cf-gtr-sdhci-pins { + marvell,pins = "mpp21", "mpp28", + "mpp37", "mpp38", + "mpp39", "mpp40"; + marvell,function = "sd0"; + }; + cf_gtr_spi1_cs_pins: spi1-cs-pins { marvell,pins = "mpp59"; marvell,function = "spi1"; }; - cf_gtr_front_button_pins: cf-gtr-front-button-pins { - marvell,pins = "mpp53"; + cf_gtr_switch_reset_pins: cf-gtr-switch-reset-pins { + marvell,pins = "mpp18"; marvell,function = "gpio"; }; - cf_gtr_rear_button_pins: cf-gtr-rear-button-pins { - marvell,pins = "mpp36"; + cf_gtr_usb3_con_vbus: cf-gtr-usb3-con-vbus { + marvell,pins = "mpp22"; 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Since U-Boot is shared between multiple board variants, i.e. a388 clearfog pro / base, clearfog gtr l8 / s4, it is better to explicitly configure functions. Add explicit pinctrl entries for all gpios currently in use. Additionally the loss-of-signal gpio specified is invalid, in fact los only has a pull-up on the board but no gpio connection to the cpu. Remove this stray reference. Signed-off-by: Josua Mayer --- .../boot/dts/marvell/armada-385-clearfog-gtr.dtsi | 42 ++++++++++++++++++++-- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi index 8eabb60765b0..39ac97edb463 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi @@ -162,6 +162,22 @@ cf_gtr_isolation_pins: cf-gtr-isolation-pins { marvell,function = "gpio"; }; + cf_gtr_led_pins: led-pins { + marvell,pins = "mpp42", "mpp52"; + marvell,function = "gpio"; + }; + + cf_gtr_lte_disable_pins: lte-disable-pins { + marvell,pins = "mpp34"; + marvell,function = "gpio"; + }; + + cf_gtr_pci_pins: pci-pins { + // pci reset + marvell,pins = "mpp33", "mpp35", "mpp44"; + marvell,function = "gpio"; + }; + cf_gtr_poe_reset_pins: cf-gtr-poe-reset-pins { marvell,pins = "mpp48"; marvell,function = "gpio"; @@ -179,6 +195,12 @@ cf_gtr_sdhci_pins: cf-gtr-sdhci-pins { marvell,function = "sd0"; }; + cf_gtr_sfp0_pins: sfp0-pins { + /* sfp modabs, txdisable */ + marvell,pins = "mpp25", "mpp46"; + marvell,function = "gpio"; + }; + cf_gtr_spi1_cs_pins: spi1-cs-pins { marvell,pins = "mpp59"; marvell,function = "spi1"; @@ -193,6 +215,11 @@ cf_gtr_usb3_con_vbus: cf-gtr-usb3-con-vbus { marvell,pins = "mpp22"; marvell,function = "gpio"; }; + + cf_gtr_wifi_disable_pins: wifi-disable-pins { + marvell,pins = "mpp30", "mpp31"; + marvell,function = "gpio"; + }; }; sdhci@d8000 { @@ -221,21 +248,26 @@ usb3@f8000 { }; pcie { + pinctrl-0 = <&cf_gtr_pci_pins>; + pinctrl-names = "default"; status = "okay"; /* * The PCIe units are accessible through * the mini-PCIe connectors on the board. */ + /* CON3 - serdes 0 */ pcie@1,0 { reset-gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; status = "okay"; }; + /* CON4 - serdes 2 */ pcie@2,0 { reset-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; status = "okay"; }; + /* CON2 - serdes 4 */ pcie@3,0 { reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; status = "okay"; @@ -243,10 +275,12 @@ pcie@3,0 { }; }; + /* CON5 */ sfp0: sfp { compatible = "sff,sfp"; + pinctrl-0 = <&cf_gtr_sfp0_pins>; + pinctrl-names = "default"; i2c-bus = <&i2c1>; - los-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; mod-def0-gpio = <&gpio0 25 GPIO_ACTIVE_LOW>; tx-disable-gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; @@ -273,6 +307,8 @@ button-1 { gpio-leds { compatible = "gpio-leds"; + pinctrl-0 = <&cf_gtr_led_pins>; + pinctrl-names = "default"; led1 { function = LED_FUNCTION_CPU; @@ -408,7 +444,7 @@ &ahci1 { }; &gpio0 { - pinctrl-0 = <&cf_gtr_fan_pwm>; + pinctrl-0 = <&cf_gtr_fan_pwm &cf_gtr_wifi_disable_pins>; pinctrl-names = "default"; wifi-disable { @@ -420,7 +456,7 @@ wifi-disable { }; &gpio1 { - pinctrl-0 = <&cf_gtr_isolation_pins &cf_gtr_poe_reset_pins>; + pinctrl-0 = <&cf_gtr_isolation_pins &cf_gtr_poe_reset_pins &cf_gtr_lte_disable_pins>; pinctrl-names = "default"; lte-disable { From patchwork Thu Jan 4 17:48:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 759939 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-vi1eur04on2083.outbound.protection.outlook.com [40.107.8.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BAECB2C69C; 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Add descriptions for both entities along with pinctrl. Signed-off-by: Josua Mayer --- .../boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 20 +++++++++++++++++++- .../boot/dts/marvell/armada-385-clearfog-gtr.dtsi | 8 +++++++- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index cd5b070f1218..2df388f222ec 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -6,6 +6,16 @@ / { model = "SolidRun Clearfog GTR L8"; compatible = "solidrun,clearfog-gtr-l8", "marvell,armada385", "marvell,armada380"; + + /* CON25 */ + sfp1: sfp-1 { + compatible = "sff,sfp"; + pinctrl-0 = <&cf_gtr_sfp1_pins>; + pinctrl-names = "default"; + i2c-bus = <&i2c0>; + mod-def0-gpio = <&gpio0 24 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpio1 22 GPIO_ACTIVE_HIGH>; + }; }; &mdio { @@ -68,11 +78,19 @@ port@8 { phy-handle = <&switch0phy7>; }; + port@9 { + reg = <9>; + label = "lan-sfp"; + phy-mode = "sgmii"; + sfp = <&sfp1>; + managed = "in-band-status"; + }; + port@10 { reg = <10>; phy-mode = "2500base-x"; - ethernet = <ð1>; + fixed-link { speed = <2500>; full-duplex; diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi index 39ac97edb463..f3a3cb6ac311 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr.dtsi @@ -201,6 +201,12 @@ cf_gtr_sfp0_pins: sfp0-pins { marvell,function = "gpio"; }; + cf_gtr_sfp1_pins: sfp1-pins { + /* sfp modabs, txdisable */ + marvell,pins = "mpp24", "mpp54"; + marvell,function = "gpio"; + }; + cf_gtr_spi1_cs_pins: spi1-cs-pins { marvell,pins = "mpp59"; marvell,function = "spi1"; @@ -276,7 +282,7 @@ pcie@3,0 { }; /* CON5 */ - sfp0: sfp { + sfp0: sfp-0 { compatible = "sff,sfp"; pinctrl-0 = <&cf_gtr_sfp0_pins>; pinctrl-names = "default"; From patchwork Thu Jan 4 17:48:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Josua Mayer X-Patchwork-Id: 760521 Received: from EUR04-VI1-obe.outbound.protection.outlook.com (mail-vi1eur04on2083.outbound.protection.outlook.com [40.107.8.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8BA452C856; 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The "lan" ports on the 8-port switch in device-tree were numbered in reverse wrt. enclosure. Update all device-tree labels to match. Signed-off-by: Josua Mayer --- arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts index 2df388f222ec..da6981677b03 100644 --- a/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts +++ b/arch/arm/boot/dts/marvell/armada-385-clearfog-gtr-l8.dts @@ -32,49 +32,49 @@ ports { port@1 { reg = <1>; - label = "lan8"; + label = "lan1"; phy-handle = <&switch0phy0>; }; port@2 { reg = <2>; - label = "lan7"; + label = "lan2"; phy-handle = <&switch0phy1>; }; port@3 { reg = <3>; - label = "lan6"; + label = "lan3"; phy-handle = <&switch0phy2>; }; port@4 { reg = <4>; - label = "lan5"; + label = "lan4"; phy-handle = <&switch0phy3>; }; port@5 { reg = <5>; - label = "lan4"; + label = "lan5"; phy-handle = <&switch0phy4>; }; port@6 { reg = <6>; - label = "lan3"; + label = "lan6"; phy-handle = <&switch0phy5>; }; port@7 { reg = <7>; - label = "lan2"; + label = "lan7"; phy-handle = <&switch0phy6>; }; port@8 { reg = <8>; - label = "lan1"; + label = "lan8"; phy-handle = <&switch0phy7>; };