From patchwork Fri Jan 5 16:20:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 760294 Received: from mxout4.routing.net (mxout4.routing.net [134.0.28.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0B01A2E824; Fri, 5 Jan 2024 16:21:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="YgBZW8H8" Received: from mxbox3.masterlogin.de (unknown [192.168.10.78]) by mxout4.routing.net (Postfix) with ESMTP id 8AC1B100866; Fri, 5 Jan 2024 16:21:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1704471664; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=bbTPIz1gjiBa6bP04mmh2p5yqroBe9n9SqY/1TA2rR0=; b=YgBZW8H8tPQZI6XRVvoImj6SKnHvJEXOz+8OiJKrlS5cGHYR5FwJdv8eX6O/0iXgn3b/7j 4iJaXnf+9nOUnjAZqYiMB2UA042Qd29XFU4/6TX3nBNAIjedZIuvicOChnGm/T1LJD5m1y KFBufk7ulRwHQNfFXv3/xdJOjaKDQq4= Received: from frank-G5.. (fttx-pool-80.245.77.34.bambit.de [80.245.77.34]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id B4938360670; Fri, 5 Jan 2024 16:21:03 +0000 (UTC) From: Frank Wunderlich To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Frank Wunderlich , Sam Shih , Daniel Golle , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 1/2] dt-bindings: reset: mediatek: add MT7988 LVTS reset ID Date: Fri, 5 Jan 2024 17:20:54 +0100 Message-Id: <20240105162056.43266-2-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240105162056.43266-1-linux@fw-web.de> References: <20240105162056.43266-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mail-ID: 675202b4-de89-47e3-acdb-612b0c41f0f9 From: Frank Wunderlich Add reset constant for using as index in driver and dts. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: Matthias Brugger --- v2: - add missing commit message and SoB - change value of infrareset to 0 --- include/dt-bindings/reset/mediatek,mt7988-resets.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/reset/mediatek,mt7988-resets.h b/include/dt-bindings/reset/mediatek,mt7988-resets.h index 493301971367..0216eeb249c7 100644 --- a/include/dt-bindings/reset/mediatek,mt7988-resets.h +++ b/include/dt-bindings/reset/mediatek,mt7988-resets.h @@ -10,4 +10,8 @@ /* ETHWARP resets */ #define MT7988_ETHWARP_RST_SWITCH 0 +/* INFRA resets */ +#define MT7988_INFRA_RST0_THERM_CTRL_SWRST 0 + #endif /* _DT_BINDINGS_RESET_CONTROLLER_MT7988 */ + From patchwork Fri Jan 5 16:20:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frank Wunderlich X-Patchwork-Id: 760485 Received: from mxout1.routing.net (mxout1.routing.net [134.0.28.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CF9B81E508; Fri, 5 Jan 2024 16:30:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="eTopNlLc" Received: from mxbox3.masterlogin.de (unknown [192.168.10.78]) by mxout1.routing.net (Postfix) with ESMTP id 5AEE04027B; Fri, 5 Jan 2024 16:21:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1704471665; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=vJWaZdp7vwDloIQ8UP6qzcfjDSiX0CaWYDKppc3KgpY=; b=eTopNlLc2+mGcCIV+tMnOyedCitCF83/aJOtYLEbxcgOCBQLCYMDMx6+Aa3JEH5Hx3kCgN auv4YVUphpYKa0WbyYbeQ4FhrGz/Ae45YjSMDzpETYWyF2dC/RgwET1YGwepZnUy16risK gmJig4Cr65ntK6Av8xywoPDzKIO02Dw= Received: from frank-G5.. (fttx-pool-80.245.77.34.bambit.de [80.245.77.34]) by mxbox3.masterlogin.de (Postfix) with ESMTPSA id 7F9C6360303; Fri, 5 Jan 2024 16:21:04 +0000 (UTC) From: Frank Wunderlich To: Michael Turquette , Stephen Boyd , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Frank Wunderlich , Sam Shih , Daniel Golle , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 2/2] clk: mediatek: add infracfg reset controller for mt7988 Date: Fri, 5 Jan 2024 17:20:55 +0100 Message-Id: <20240105162056.43266-3-linux@fw-web.de> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240105162056.43266-1-linux@fw-web.de> References: <20240105162056.43266-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Mail-ID: 31b037bd-067d-4073-9b39-c5bd1557013d From: Frank Wunderlich Infracfg can also operate as reset controller, add support for it. Signed-off-by: Frank Wunderlich --- drivers/clk/mediatek/clk-mt7988-infracfg.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/clk/mediatek/clk-mt7988-infracfg.c b/drivers/clk/mediatek/clk-mt7988-infracfg.c index 8011ef278bea..1660a45349ff 100644 --- a/drivers/clk/mediatek/clk-mt7988-infracfg.c +++ b/drivers/clk/mediatek/clk-mt7988-infracfg.c @@ -14,6 +14,9 @@ #include "clk-gate.h" #include "clk-mux.h" #include +#include + +#define INFRA_RST_SET_OFFSET 0x80 static DEFINE_SPINLOCK(mt7988_clk_lock); @@ -249,12 +252,29 @@ static const struct mtk_gate infra_clks[] = { GATE_INFRA3(CLK_INFRA_133M_PCIE_CK_P3, "infra_133m_pcie_ck_p3", "sysaxi_sel", 31), }; +static u16 infra_rst_ofs[] = { + INFRA_RST_SET_OFFSET, +}; + +static u16 infra_idx_map[] = { + [MT7988_INFRA_RST0_THERM_CTRL_SWRST] = 0 * RST_NR_PER_BANK + 9, +}; + +static struct mtk_clk_rst_desc infra_rst_desc = { + .version = MTK_RST_SET_CLR, + .rst_bank_ofs = infra_rst_ofs, + .rst_bank_nr = ARRAY_SIZE(infra_rst_ofs), + .rst_idx_map = infra_idx_map, + .rst_idx_map_nr = ARRAY_SIZE(infra_idx_map), +}; + static const struct mtk_clk_desc infra_desc = { .clks = infra_clks, .num_clks = ARRAY_SIZE(infra_clks), .mux_clks = infra_muxes, .num_mux_clks = ARRAY_SIZE(infra_muxes), .clk_lock = &mt7988_clk_lock, + .rst_desc = &infra_rst_desc, }; static const struct of_device_id of_match_clk_mt7988_infracfg[] = {