From patchwork Tue Jan 23 22:25:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765204 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1834018wrx; Tue, 23 Jan 2024 14:25:44 -0800 (PST) X-Google-Smtp-Source: AGHT+IGUBNMSCnUMMQVU7c1QqFwcCMIECq8lKQqgomhMu1FRoCZk+Faxl76i4Eno+R0AbpAoTQmr X-Received: by 2002:a05:6214:c43:b0:685:caed:934f with SMTP id r3-20020a0562140c4300b00685caed934fmr1508020qvj.58.1706048744557; Tue, 23 Jan 2024 14:25:44 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706048744; cv=none; d=google.com; s=arc-20160816; b=BrI3f0goEOxWGpJI30a3zyrZsm6OgudQ+ki6JjRgmGq116I7tpLsqmuCmPvE/IZxm5 +hx0mR8aDUrsDvgryISqsbfq7e6EJqXJxX8mggc5QdlfAu8s24sreFv4j9xeJ/rBG4S0 09V279njRec/rq/B1YVlajPs8hak4sHwhxSIPq0o3+rlz4NyXMrQiQb0nD+ssvtWA3JU egoMbgZRaWdWcj1dTQhLu/ddkGj83EOPNDYVNAAG4uC2tW2tY2yIniOx4wDvFtqskIYg kFnukob5LNBBXHpyhE2A4tZR+l5EYkeRMN9AtPuvmFu/moQR7tsoXhvxZO1/Y1DvV7LA hkLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=40uyL4jME8rKLPBjW65z9H56g3H8ne6EwTmJLAFXlkk=; fh=vCRQ4SxBRaw/scGiJ+6DsMj2AC960SBJLYr7612eZsc=; b=ryOVDrOlcQDhfncTOdvRH67doHDM3o1L/c5T4fRni4z7v+uEIVgFOYewAVmzLMzT73 r55VxkY/zUQsjuTPhBO5H8xpYG1/om2GhNItlmlnxohvtDokaJVkjyb8wjWNUqt0wuXB 4QKO6XVGYxifvwAp4mvGmQhod8abHXVgzp8XqLI91vlvI57P8ZE65ak3rNdAWVPn8vzD QdXAIRDNuDzWfBYCMynjmxtIotbSyD+booxXFIj1zWdZMklCcVTMmWmt4FeBVvzMMp4r IqYFeymFtjcQhpa9uNklfWxFl7HbAJeno4bR8BT7/ZV/dWuQFrjikaR/TQoWpriHkMCA Q/XA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OdTN7GTp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id y20-20020a0cd994000000b0068194eb80a5si8982887qvj.178.2024.01.23.14.25.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 23 Jan 2024 14:25:44 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OdTN7GTp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1rSPCu-00053C-8p; Tue, 23 Jan 2024 17:25:24 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1rSPCr-00052G-T9 for qemu-devel@nongnu.org; Tue, 23 Jan 2024 17:25:21 -0500 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1rSPCp-0000gl-3t for qemu-devel@nongnu.org; Tue, 23 Jan 2024 17:25:21 -0500 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-40eb95bd2c6so15507755e9.0 for ; Tue, 23 Jan 2024 14:25:18 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1706048717; x=1706653517; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=40uyL4jME8rKLPBjW65z9H56g3H8ne6EwTmJLAFXlkk=; b=OdTN7GTp7DgZKJzLf9yS84qlNMu9AbSsKcu8gOqX4iAhN1MLPUsXj6E3CiOpzwYiHz hwFy6/vMzRgjrvgTOR1mFuO5b5yBaNlPP9+gZlHPtZYbTsuJ8tKkW3afjdGVL2PpcTij IYGaVblQxspCR+NAVgK4tcFUNWCPHy7FjvXuVHegVlF6f6mPMpPjfu8Hm5QRSu6jEPxf T7dTUXnc+hCJvl2srA/3zo+QcKsVcZnq0bJtaQ9RTvVUY/IU56Wf9ZsU11dOrO+sa9Qy HzM07LlEorQ5I3Df9iGJBNQgSeOzt8c12pYDvnqxsjAVdlFIDPyWV7XSeGC4EvTwdXip dSkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1706048717; x=1706653517; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=40uyL4jME8rKLPBjW65z9H56g3H8ne6EwTmJLAFXlkk=; b=Ze++lzs15C/rnPXqTDc8GmFXanNJzvFTn4MxlJlBeQuBsDj9TkeToSJhUP3Prk2bt5 9idaKSi2bJJNdwH1XwxCYLwe6JO8B4p6G5ce2XjA5CKrqErAAUtR4StiCJGvzPgrOlYW ACARAToMisDZnjgK64yS/lpGSVOagjedHEWFj61QBJkueENK+9D9GzCi80K9XQKV3uJH Sl92UWMP/tmvxNkMCCjzze8ixkwp+vLoK2Sganp5wIwB7hWDvDPWb8jQPWR//YUE4dJO CTGO7vjyzRbp2J4qtmeodBgMGstZ8nrrasdceNNyJ1N6XkZJPMKSj3K72diqcsoQ56go B6fg== X-Gm-Message-State: AOJu0Yzxyalrk0u0eOlCDEANHriFkHHq6Nq9zTmnKeqc5eL75I81rSm1 icxQLMeI+IjR4ZJ0uaQthjBdK9/W1dT2ItmvmWLStp/8+fQlrT1M4TqZxQf8934VZOuK4Gz8/+Z 2 X-Received: by 2002:a05:600c:5398:b0:40e:4afe:12eb with SMTP id hg24-20020a05600c539800b0040e4afe12ebmr535181wmb.188.1706048717477; Tue, 23 Jan 2024 14:25:17 -0800 (PST) Received: from m1x-phil.lan ([176.187.194.78]) by smtp.gmail.com with ESMTPSA id cf15-20020a0564020b8f00b0055c903e61easm787321edb.82.2024.01.23.14.25.16 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 23 Jan 2024 14:25:17 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Peter Maydell , qemu-arm@nongnu.org, Igor Mitsyanko , Rob Herring , Joel Stanley , "Edgar E. Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Andrew Jeffery , Gavin Shan , Alistair Francis , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 1/6] hw/arm/exynos: Add missing QOM parent for CPU cores Date: Tue, 23 Jan 2024 23:25:03 +0100 Message-ID: <20240123222508.13826-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123222508.13826-1-philmd@linaro.org> References: <20240123222508.13826-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QDev objects created with qdev_new() need to manually add their parent relationship with object_property_add_child(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/exynos4210.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 6c428d8eeb..57c77b140c 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -556,6 +556,7 @@ static void exynos4210_realize(DeviceState *socdev, Error **errp) for (n = 0; n < EXYNOS4210_NCPUS; n++) { Object *cpuobj = object_new(ARM_CPU_TYPE_NAME("cortex-a9")); + object_property_add_child(OBJECT(s), "cpu[*]", cpuobj); /* By default A9 CPUs have EL3 enabled. This board does not currently * support EL3 so the CPU EL3 property is disabled before realization. */ From patchwork Tue Jan 23 22:25:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765205 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1834043wrx; Tue, 23 Jan 2024 14:25:50 -0800 (PST) X-Google-Smtp-Source: AGHT+IGPi9EogGMtG0ri2ES/0+YcaiWAHD3X7ot3th6rt9PyZ30pf7fbb6rNQmkgN6LA1DCEteC5 X-Received: by 2002:a05:620a:298a:b0:783:a2f5:6297 with SMTP id r10-20020a05620a298a00b00783a2f56297mr3974512qkp.44.1706048750203; Tue, 23 Jan 2024 14:25:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706048750; cv=none; d=google.com; s=arc-20160816; b=wpIiBOG3PFhgLY1qEH6Is8qfeDdP7yRMq+kcLTppH4OR3w3adfGKn/0etdA22sy/yr UhQfiML99280ZT0a+8NWwsjCWI2jJbjiwW3cAINESf+pdljk33ZSORPW2cCmFYxnbrF4 1QiO20td6gi9V2q0+aEpKgSrLrjgefyrrWyZ8VsCr35hCZkeVTt0EDlF11fT6+lQsHVo ZOTSzsavER0RjsG/+b2B5cQgepqr9uc0JVmiWp3jvJo11UReIURxLbrGLxlkxtWfRUin ugnbpBHbi2vxQlgHbRmxZQhJeae7feqSDkVmHdFV9KoACoqg8M2M7Dy7havT8S9XWPvh ZmyA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hHwCEbu45pXTY5w3owTg7wqVENSPbbC1Vt4bbpMAXmk=; fh=vCRQ4SxBRaw/scGiJ+6DsMj2AC960SBJLYr7612eZsc=; b=tkOc8iSOjZz4RI0dgqLrgBasf3Zi/QL9Q5KGaUa5192LIyKkl0DO2V6rtTy2a8Ad9F oU7g7M9htrXreGwLLrkWX18I4gHgX3vYpHrzJnZe7nzPfOuiu0i8N3kPNeh2Se6nN8gl p1A9JndGa8I141/2FcxzRUEl4liC2JGgWW1CVH8z4O1HZHPl+EJnPbcFnAplm6TYI2hE YrOEfWAhZ0zy8bw8ztX9wyOow1FYc/mWvakdAcGpKUr0Lg0Zgo4+tho+UbB2JahRG8zM ytK9q90+J8O7HvD4QlvnWrVUhYEL+4CPRsyHeIJTuozehmts+gBk/NxT7+H75A6DOM5x gYsg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HOJUGhsO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Andrew Jeffery , Gavin Shan , Alistair Francis , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 2/6] hw/arm/exynos: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 23:25:04 +0100 Message-ID: <20240123222508.13826-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123222508.13826-1-philmd@linaro.org> References: <20240123222508.13826-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philmd@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Instead of ignoring invalid CPU type requested by the user: $ qemu-system-arm -M nuri -cpu cortex-a7 -S -monitor stdio QEMU 8.2.50 monitor - type 'help' for more information (qemu) info qom-tree /machine (nuri-machine) /soc (exynos4210) /cpu[0] (cortex-a9-arm-cpu) ... We now display an error: $ qemu-system-arm -M nuri -cpu cortex-a7 qemu-system-arm: Invalid CPU model: cortex-a7 The only valid type is: cortex-a9 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/exynos4_boards.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index b0e13eb4f0..01c7618a67 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -34,6 +34,7 @@ #include "hw/qdev-properties.h" #include "hw/boards.h" #include "hw/irq.h" +#include "target/arm/cpu-qom.h" #define SMDK_LAN9118_BASE_ADDR 0x05000000 @@ -150,12 +151,18 @@ static void smdkc210_init(MachineState *machine) arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo); } +static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL +}; + static void nuri_class_init(ObjectClass *oc, void *data) { MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Samsung NURI board (Exynos4210)"; mc->init = nuri_init; + mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = EXYNOS4210_NCPUS; mc->min_cpus = EXYNOS4210_NCPUS; mc->default_cpus = EXYNOS4210_NCPUS; @@ -174,6 +181,7 @@ static void smdkc210_class_init(ObjectClass *oc, void *data) mc->desc = "Samsung SMDKC210 board (Exynos4210)"; mc->init = smdkc210_init; + mc->valid_cpu_types = valid_cpu_types; mc->max_cpus = EXYNOS4210_NCPUS; mc->min_cpus = EXYNOS4210_NCPUS; mc->default_cpus = EXYNOS4210_NCPUS; From patchwork Tue Jan 23 22:25:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765208 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1834215wrx; Tue, 23 Jan 2024 14:26:28 -0800 (PST) X-Google-Smtp-Source: AGHT+IFOWIXKddp5imXphkkRY0AHAFClsYt0T4m/c5NQJG6tEBc9HnljE08h90QSHGC6TeeRd3T6 X-Received: by 2002:a81:6e05:0:b0:5ff:869f:e465 with SMTP id j5-20020a816e05000000b005ff869fe465mr5945673ywc.68.1706048787803; Tue, 23 Jan 2024 14:26:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706048787; cv=none; d=google.com; s=arc-20160816; b=FHwkLZCT0A1ndcP/OFP+bYs8Eu+jO7I470CwOJSmbgEGwGt5qQ4jxMC7tZ05JEKqHp DtB1i4W2LTqC4a4EPJB+VFgwbZxdf9tDLMRI83aEnPEGJgLkuLNWwqhB6CqTmtdX5Fuv c+8g8enMudy9oLkYZbaaHVvR0Y7QZ1V6jir3Kg+09VK1TlJ3Ci2AWl0oOQmAoivr7d7R JlUXvjo5fS1Zwp+lG/V+eVXfyddYAZq7Okub8w2W2JL/vXIbVgZDFd9FMmTBBvTWlU8e Q0YY/HuPbUGUNoPWVKmEMAQwDeCcq50+pTndA/00sdH+NnNsYo60LOBI89O7jFmJrYqs achQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Cw3bjLOiGxm/gmaq73KAUTSMcDh1pUeA2J6w4VTjYkA=; fh=vCRQ4SxBRaw/scGiJ+6DsMj2AC960SBJLYr7612eZsc=; b=jLudxOnEgPSwrLDSWPr3VKoRfZPNRQgT7tq8A3d2ag9nS5vOmWGYo4zO/OJUJ/++3s j6tbXZswcSnCduxJiQk7/o3Qn61kPs7Ioc5TDB3q04PheiuJO5JhOgTfbZ+m10BMaePq mkn/yhMZqmlf1U1qwXOZm4DdGRoLHfwyqBRlHUkVKTB4jaZpKL1Kun+Z7YClhMgNoWGN oaIMGFjMMXQ1islhf43NKuGekV1EN2lyNlXSVQT24ltaeyC/MFftDAYaN1BGq0xPpotx zFxV01XWrS7Ljskd9Yx/X/koHEEF26xA9qNciEfpUQBQvvc71hqozS6uLX18eSzm+n5Q wdBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DmqCJt2U; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Andrew Jeffery , Gavin Shan , Alistair Francis , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 3/6] hw/arm/highbank: Add missing QOM parent for CPU cores Date: Tue, 23 Jan 2024 23:25:05 +0100 Message-ID: <20240123222508.13826-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123222508.13826-1-philmd@linaro.org> References: <20240123222508.13826-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::62e; envelope-from=philmd@linaro.org; helo=mail-ej1-x62e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org QDev objects created with qdev_new() need to manually add their parent relationship with object_property_add_child(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/highbank.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index e6e27d69af..b8d702c82c 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -209,6 +209,7 @@ static void calxeda_init(MachineState *machine, enum cxmachines machine_id) cpuobj = object_new(machine->cpu_type); cpu = ARM_CPU(cpuobj); + object_property_add_child(OBJECT(machine), "cpu[*]", cpuobj); object_property_set_int(cpuobj, "psci-conduit", QEMU_PSCI_CONDUIT_SMC, &error_abort); From patchwork Tue Jan 23 22:25:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765206 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1834067wrx; Tue, 23 Jan 2024 14:25:55 -0800 (PST) X-Google-Smtp-Source: AGHT+IEUw+OGVe8xU/hfs6yeu+OPlMeSQljcjKya5FWGDqTvkxG/rq9E7ajOetbMRj02quK4MRiK X-Received: by 2002:a05:620a:846:b0:783:352b:d8b5 with SMTP id u6-20020a05620a084600b00783352bd8b5mr7056134qku.51.1706048755186; Tue, 23 Jan 2024 14:25:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706048755; cv=none; d=google.com; s=arc-20160816; b=RomCSEs9a952AXsZuBm3ZNkTYdQ5NApI0q5sqgOOuvTbDUvWu/ew0bAAZGLmnx73/a OxDG/tIMi0zQJWPtutNbKEphGbvgdSfmh1cM8OlGr4ebQ6c588VCQ7JmiGmSTO/3i3yq t3dcS0aJ464I5p/8ph8WNsgWlWv2lFeQaOb/n1lFvDrjQ67CPvWDDtJ2b+mEVcsbkjRh KcXsW14YkilgopANRItfY4JUCJT0Bln3ew+aUIzINzfMOWv1mWB7g7L0VpUdfr0cogsf qwQcKxrbsjUds8fHPUlL0oaRDMNwjPD8IFXVY5ezE0ZveC5whWr7kF3zpr+JoQx9IgWn i0UA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=9gOIjV+kRVk5jxD4Ph/NrJc9jwr9UWxBXsmdwi6+Inw=; fh=vCRQ4SxBRaw/scGiJ+6DsMj2AC960SBJLYr7612eZsc=; b=ZRsWfVro1QhkNei38ulxX/HralHSA0Vw4xOrmQF89E0fIv2v20fMX7N72nOBzcgdZn K8WPCTH1PnVWEKfhv50LsCN8GCRMADHoePe6gBTsl6lrC9pIQEuzgghI4BarWh5HKN54 MvPQuVWQZKpjTPL800UEABRB99/tSHPOzlOZMMxj8VdWWu7PCr9vlvr+RfpEr1486UEJ rqLRHHxvHqo3YQlAyxCxFCLOsqDbqDto9EdcjNSBzkMHIryGgx4A7OyqDSwySXaZeB92 FT3HrjOKY2Q+egnk/CwlfiobBCVUZQZ9N6NBoHu6G2PS8Hzipu4zz09doUk5CZ22rU4K 5Zfw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=QwRVraXS; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Andrew Jeffery , Gavin Shan , Alistair Francis , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 4/6] hw/arm/highbank: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 23:25:06 +0100 Message-ID: <20240123222508.13826-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123222508.13826-1-philmd@linaro.org> References: <20240123222508.13826-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU types. Instead of ignoring invalid CPU type requested by the user: $ qemu-system-arm -M midway -cpu cortex-a7 -S -monitor stdio QEMU 8.2.50 monitor - type 'help' for more information (qemu) info qom-tree /machine (midway-machine) /cpu[0] (cortex-a15-arm-cpu) ... we now display an error: $ qemu-system-arm -M midway -cpu cortex-a7 qemu-system-arm: Invalid CPU model: cortex-a7 The only valid type is: cortex-a15 Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/highbank.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/arm/highbank.c b/hw/arm/highbank.c index b8d702c82c..0367050697 100644 --- a/hw/arm/highbank.c +++ b/hw/arm/highbank.c @@ -345,10 +345,15 @@ static void midway_init(MachineState *machine) static void highbank_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Calxeda Highbank (ECX-1000)"; mc->init = highbank_init; + mc->valid_cpu_types = valid_cpu_types; mc->block_default_type = IF_IDE; mc->units_per_default_bus = 1; mc->max_cpus = 4; @@ -364,10 +369,15 @@ static const TypeInfo highbank_type = { static void midway_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a15"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Calxeda Midway (ECX-2000)"; mc->init = midway_init; + mc->valid_cpu_types = valid_cpu_types; mc->block_default_type = IF_IDE; mc->units_per_default_bus = 1; mc->max_cpus = 4; From patchwork Tue Jan 23 22:25:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765207 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1834199wrx; Tue, 23 Jan 2024 14:26:24 -0800 (PST) X-Google-Smtp-Source: AGHT+IE4xbzrOInqGq9yCxaXBXV24eXeYLiafxUAT3WFmJIGl6aI75LWYo+ORo9dlWPFDbYfoWVL X-Received: by 2002:a05:622a:1906:b0:429:f43b:4ccf with SMTP id w6-20020a05622a190600b00429f43b4ccfmr1615596qtc.50.1706048783779; Tue, 23 Jan 2024 14:26:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706048783; cv=none; d=google.com; s=arc-20160816; b=sUTOTjrfA96Q5hFM9JqYO/VYXUKh+pK90t2nXk/KJddg9QBnOJ32Dzd0KeIi8ky8Ue Hpmqjo0fd//ZurJfD0nZjX4QhpO0v2BQDzq8bINVOZ1LwVt6Oj8lHUzRCt7i1lX8vKHp OpdcW0pURydW1cBICzpUWgIGPAzQNDdCHn9TxXc2fZOMLX5NsuKKcA5k0+IYDjzQbdZG 9cc6Lan5+XyuXDrRfXfAplFVPI7Ii/kTVljWqDuZnb0j11t6fTP1bu4rUG4Di+sSTo/P mZOGiC4+BAY3kLrDYtefMVXw6CuMsZuy6HcMwEoQCgZnQ08FZjqC5+7OhGUEeDkPs6X/ h4qw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=2RjX1tFrRGVlM1BwnlKhE6JoLvLjIml7FEvFQ9cMoCw=; fh=vCRQ4SxBRaw/scGiJ+6DsMj2AC960SBJLYr7612eZsc=; b=KbsG7ceRWPx/GVRmSgTzzcF3nKJb7tPnnxqbHHxC2RUTzV76zBRK5U5e6WLHvjTJ+R Vu0enamuNjRidhD0QAbs3fGAFyIyAATD5xKe1iL2DCw34woXwdY6f0Lr3f7jIUdK+QSP zmxQsHTTq7Gf89+rsMio3XtWf1fc1jjpiXZwaY7vlW+/DlfQ8typVVvq2ZbSn8q1hbGu pgIbsW2cKaZnGijqdkAzR5tigAmnI/yBqZ3VuF4UAJQ+cV9h5VqW0ykP8s7IrgUC8QBq mX7HLH8XaF8bQANfrTQdpusuqG3Qj7z2lQaWPbvNEUrPUGN5oODnjqjKDYLgEgwcydvn S5Og== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=TUc19tHZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Andrew Jeffery , Gavin Shan , Alistair Francis , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 5/6] hw/arm/vexpress: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 23:25:07 +0100 Message-ID: <20240123222508.13826-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123222508.13826-1-philmd@linaro.org> References: <20240123222508.13826-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=philmd@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU types. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/vexpress.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index f1b45245d5..a3561a1b56 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -783,22 +783,32 @@ static void vexpress_class_init(ObjectClass *oc, void *data) static void vexpress_a9_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); VexpressMachineClass *vmc = VEXPRESS_MACHINE_CLASS(oc); mc->desc = "ARM Versatile Express for Cortex-A9"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types = valid_cpu_types; vmc->daughterboard = &a9_daughterboard; } static void vexpress_a15_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a15"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); VexpressMachineClass *vmc = VEXPRESS_MACHINE_CLASS(oc); mc->desc = "ARM Versatile Express for Cortex-A15"; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a15"); + mc->valid_cpu_types = valid_cpu_types; vmc->daughterboard = &a15_daughterboard; From patchwork Tue Jan 23 22:25:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 765209 Delivered-To: patch@linaro.org Received: by 2002:a05:6000:10c4:b0:337:62d3:c6d5 with SMTP id b4csp1834273wrx; Tue, 23 Jan 2024 14:26:47 -0800 (PST) X-Google-Smtp-Source: AGHT+IGm13cGIqkLc/7NBtt6wqRVF5moPwzaJSaHH3eSpKLWi/LIR4AueKkNSP9YoWg9ues4qp9g X-Received: by 2002:ad4:5c84:0:b0:685:482b:a with SMTP id o4-20020ad45c84000000b00685482b000amr2166528qvh.26.1706048806979; Tue, 23 Jan 2024 14:26:46 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1706048806; cv=none; d=google.com; s=arc-20160816; b=BGU189pBbV7ORHH9P4hdAdU6TY7yWynjNisX+p6fJxGkzHpT/yqhpLjEYixrXsc+6G qW/rx7N4NVo4OeDj3rMpWY6Rd6JhQFIThJa5VsXB/kiH9Z8s2wadjJreIaaA7dS8r88m GSDOnMpNkTfordToyWqkbG5YSYN7r0/C0nbuos4BLc7121RVEhcODJsL4isksHwSbS0f VaJ+IA8pFf/9Zi3rCjiNS42KYJezNreN/84LtfZySYRMwJoUkl2JX3fmdE3KahGd29Mp VqUe7tXCeEOVNBrDufhMa6MqPrWP+vdrcwHpa9LbumoOiiZ0JXmZSk7sLzLbwojEENND +8vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=39OP9EE9lF2EcfOzamU8x35qcADjGnzDFDx/nFOBMLk=; fh=vCRQ4SxBRaw/scGiJ+6DsMj2AC960SBJLYr7612eZsc=; b=MBACowD7c9WO3aWIHkNixdqv5m2nK0XWFoNsU9hrmOpIla9SJ78P0lVrSe4RmG0yTr wGrWj9spWzT4l3/WIGbcwETuLskUjW8weLPZ5X2otxYr6YKmF6HGla5b+cfp3YBkkCA8 oqkkcl1Df4//E5zs3yS9n9JPkrX7oYI5e7TysWQ5EG3v51N7Hhnwlf8N0aPh4V9qSCQP 8vQLwooisZ7OKuBw6wdknVvyjs7/xp82JV4kIwLJigwtCJvfHcLk/C2NpZr8BolpTxZ4 dDcviTZN5Veeza58w2/foQ1+1XnCTMBhefaXFuzGZ0uuE5rw+4hjYjC/V87GW80e8FBW txqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XpXdfJ8W; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Andrew Jeffery , Gavin Shan , Alistair Francis , Igor Mammedov , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v2 6/6] hw/arm/zynq: Check for CPU types in machine_run_board_init() Date: Tue, 23 Jan 2024 23:25:08 +0100 Message-ID: <20240123222508.13826-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240123222508.13826-1-philmd@linaro.org> References: <20240123222508.13826-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::231; envelope-from=philmd@linaro.org; helo=mail-lj1-x231.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Restrict MachineClass::valid_cpu_types[] to the single valid CPU type. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Reviewed-by: Gavin Shan --- hw/arm/xilinx_zynq.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c index 66d0de139f..6ec65d4780 100644 --- a/hw/arm/xilinx_zynq.c +++ b/hw/arm/xilinx_zynq.c @@ -355,6 +355,10 @@ static void zynq_init(MachineState *machine) static void zynq_machine_class_init(ObjectClass *oc, void *data) { + static const char * const valid_cpu_types[] = { + ARM_CPU_TYPE_NAME("cortex-a9"), + NULL + }; MachineClass *mc = MACHINE_CLASS(oc); mc->desc = "Xilinx Zynq Platform Baseboard for Cortex-A9"; mc->init = zynq_init; @@ -362,6 +366,7 @@ static void zynq_machine_class_init(ObjectClass *oc, void *data) mc->no_sdcard = 1; mc->ignore_memory_transaction_failures = true; mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9"); + mc->valid_cpu_types = valid_cpu_types; mc->default_ram_id = "zynq.ext_ram"; }