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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?epTrwGUYEvOirgZCQI4XeKfDtHKZ?= =?utf-8?q?fY9KXIWGSYXbvac0CUyE+KNBcIfSEa52BGO6PjmMredvRWtW8lcxoPL8G4NxRrkT+?= =?utf-8?q?K81+Vhvs6HbeLZB6Nll9Bhks+XLaPcFfsdym+OULt/kSOcY2CRotbqNvrix7xdfEi?= =?utf-8?q?ulpWbvj0iUqvlqSZ2oBl44rp0tV7BirNGRiWY8zfj0WGT9Dcs0lTWESnfT2+/OAHd?= =?utf-8?q?Gigy8DG0xhHp4eYnfVUMx46GzKLRCafquoA4nB4bctJf8s64/teKaAn7fQ9a+adtt?= =?utf-8?q?LmjLGnllo9N3qKtNp1KWM3oe7BlEDMFGoDAqdhlxGYNaFdSz5phdOiZYGmpmWpgAB?= =?utf-8?q?x7H9xTZprNFzGjRVOblXdGh3Lj8Dp55+DRoAFC1jyCZjV1mrWPCHBDzbU5Ava8hmJ?= =?utf-8?q?GISyVatHz2hqi3VHzJu0gHq54SbMBkrlhwJvqgY4uonllJoJGVGChMWErnvIGJuFS?= =?utf-8?q?dKPWaLUThZDJb/SDhXFOoPoRdzC2pknou0Vr5HJcp/oRMc7ZkMMiJ8QiXtTAEpK9z?= =?utf-8?q?Xbo8iskAWe0Hi1AtK99nl6LPzI37hwGM8p2eseiT6ravhCaTfr/yjaCd+rKE7/YLd?= =?utf-8?q?q8IvxesWSA69FjE20xgbCFJOSaV0S3WXxodZYm1iWIqqbmbtSmz9lj6Bd+/zCttdu?= =?utf-8?q?KoYYsCap4fnS9rfpKXc3l7qi78k880YIwbo71NTp/XiyI23U5DqgTo70lMtlUGpLP?= =?utf-8?q?7QC0dwbhRWUE8aAjJoVV0U/pKFH0sP2bTfzYW9FRksykzuX6IRFp1otCP11wGyPpa?= =?utf-8?q?XJKL1ujbeLIkEGBFTqs8ol/yhyif7NqPymkj4lcKGppf0y6ETMRZjv0rYib1tj7X6?= =?utf-8?q?fh99nnKdmk73nNnLSoANLnp6qtjWP/DY1VnJ2yYHDYzcjRfAeytfDskKFuGjcSALX?= =?utf-8?q?olTKjAq7a+RVzy8Q3l8tTIhQa5vtBnvHam+6DMCVX/k4wkYoYWTWOwpXoWzS/DPUu?= =?utf-8?q?VXBShLuOt8HdyOL/dXuRhuw7IREdDux5jmmpyqrF1SIjOW3Py9XQjRLCYYmDQrQ1Z?= =?utf-8?q?IqoNf/7PB1wEvl9TTNl2cWp/sJ8H+fxL5yJa98qxpO0Dn4xQbsx3sL9lXe9WvhnHF?= =?utf-8?q?ZWLjOGoPGQgzYsUAV14fD0ubBKrENT9ZXFxny+oSkGTbCI4lHTbYJIXTfzttKIV6i?= =?utf-8?q?yeB+9XKmr9wo82bYg7vzYPwUcv8v1zkZ39iNq5XLs+gH0YKv+cXVSG8jv+y8fUfR1?= =?utf-8?q?idm1kp3j/O0/cziWtPRlrqN7JMWI51PK+BbrX6rFvzR16XgwuzHFwQ31Bf0YmtVms?= =?utf-8?q?xVGifMGXMiYftPelxkXDPLkX2YPBxjeG5IBNlujCaxLcp/5iYU/auaOfRDhhRM4in?= =?utf-8?q?NaExJCmfHlNygBLMwsar8MjQm/dfy/wc4IOHkCQez9JBnM74Gcw6hJOIvcd5IGWb/?= =?utf-8?q?uPp1pp5La7jA8OWwfN7cUusf+83dNBv8yQusKcaGsksEPha5a1mZjzdkrq6AC1hK6?= =?utf-8?q?Z7V8qZWn6ejs0CvbCyz9cLFOck9b+NK6tEmZJJehJWt3T050JnuinH7uGArWVLHcF?= =?utf-8?q?AW3cC/eFvgc0oSXJAqeAm5ZEogCYo4wjgn5nM8j0OP0EvKSIF8iXV3U=3D?= X-OriginatorOrg: theobroma-systems.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5923ba1e-4249-4cc7-4cab-08dc1e7f3e35 X-MS-Exchange-CrossTenant-AuthSource: AM0PR04MB6371.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 14:58:23.8547 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5e0e1b52-21b5-4e7b-83bb-514ec460677e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: AtYJWfx04FOf3TEvhnBYZEjIT4c/UxRa0S+DO694UlqdBHgmQ4xSbRvGhrDytSFnKWVZ0C9n9r2KuzhnZXcFsLgXDcmqCWDWdg+iZMPFPqMFq2cXm6uIXN+9fugqwFkm X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR04MB9735 From: Heiko Stuebner RS485 has two signals to control transmissions "driver enable" (DE) and "receiver enable" (RE). DE is already handled via the uarts RTS signal while the RE signal on most implementations doesn't get handled separately at all. As there still will be cases where this is needed though add a gpio property for declaring this signal pin. Signed-off-by: Heiko Stuebner Signed-off-by: Farouk Bouabid --- Documentation/devicetree/bindings/serial/rs485.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml index 9418fd66a8e9..b64577036b5c 100644 --- a/Documentation/devicetree/bindings/serial/rs485.yaml +++ b/Documentation/devicetree/bindings/serial/rs485.yaml @@ -51,6 +51,10 @@ properties: description: enables the receiving of data even while sending data. $ref: /schemas/types.yaml#/definitions/flag + rs485-rx-enable-gpios: + description: GPIO to handle a separate RS485 receive enable signal + maxItems: 1 + rs485-term-gpios: description: GPIO pin to enable RS485 bus termination. maxItems: 1 From patchwork Fri Jan 26 14:55:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Farouk Bouabid X-Patchwork-Id: 766795 Received: from EUR02-VI1-obe.outbound.protection.outlook.com (mail-vi1eur02on2078.outbound.protection.outlook.com [40.107.241.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0A761CD3C; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?ITTeMTtfqFG7xMV0YV5aVDB+YndS?= =?utf-8?q?Bdt5+MKm5L8gb5pzHrFwJiCT6VRrBvf4+4bIjOJbYp5Lih79+FxP10v2kinC0i6Sy?= =?utf-8?q?psHuyFKbPjMVSQmfHB8IU1LMuT8fTa0E5e7iAwl5dW0rOfOMsYa/c81PkIcFSfdfv?= =?utf-8?q?Xu0JX6JfSU+dy2l0Itzx+KEc/6oEOKldbZQ291DWBQk14waXJwd4YX8mE88FlAJO5?= =?utf-8?q?UfTieTbNMRUEIp6n8+16cpz+h1vr8rG1rpYKpkDUMuXQc8hRQia7oZ9MPlpzzGU/X?= =?utf-8?q?VWeQCzzi5gaw4uNyhJ/SeMlA+QXmLcA0oku0ez0ICAhMp8ZlcW8eF7o1dsQ26OGDY?= =?utf-8?q?do7hGxc/f62fozJb4Uz8CjbFTsfJ7uz9vnF3O7HnolVrUgEk2Uq7JP643MmHaM/+J?= =?utf-8?q?lo8wUnMiPaTU4D/sTqq+QXzHUFpYy8wROvQ9hI2vx4xAJyk0L+uOQfkr7Jvwwy9j1?= =?utf-8?q?bQimCXSEmny49pTRnMF6sIEXM8ol6nG4/cHTxQynK51Mf7dgS+PYwdBNZAzvnQ+oz?= =?utf-8?q?9dqDVj2Fh3JTsrf04aDxB/kdpOYgRlbh0GfRoD9dWjqbseSx/G4jlfvsRGRcI99QB?= =?utf-8?q?DqnQB20skz/EQhIpNYMAVEBtqHomRvp7AhwEYMZi+NGnTzNggnY2caF0EbsPhic2y?= =?utf-8?q?A4oHmlD6RID1kDhK92ZEOnbyragQI290EtJe2LxhEomy4KubfQB5xoNsedtS0vvWT?= =?utf-8?q?KvSNyUYW13n9DIiyvtB2AvGHJlh+lTAp/dhnjHa1XKvulY4yGSi9KEUMHVawWsDGe?= =?utf-8?q?hbsbi6EgAduQZCdMZN9HZeo0zB/zPdVYvKxjeImN8ZtzX9UCN8wMf4c2VrTQ2cAhg?= =?utf-8?q?fGmnXvu4pDxBfn/bpsb/Y/FMlroGDYqH9Q+QlIfCyZ256qp8W0SgcWX3yzBPtWBUC?= =?utf-8?q?7EOjjUKTsBzDD106hUttpeiNGdQB+NZ11An1WkgkTw3xRpgDw4//n9ook9P5lTubJ?= =?utf-8?q?phYtx3wFPN3NGKAAD84qK0PD4w02tLjG2qC1CQeU/05pogJGGSCemdv54FcSSMVsl?= =?utf-8?q?r7MZ4r5TWMvNc8pQmwaZy7XIefPK5b/8XRVo+4xwMy47t64Pubp7mnvueg5O4C3P/?= =?utf-8?q?yFQ3CouVMH3JsWVAsIov8UxA0io4EKghNxPYp0MwkIU4sF2qJ6IJ2En7uAhl+Ig/B?= =?utf-8?q?8qmmDYC3gdxIc3icnCcEIgnQIUvZTwvA7B4HpRg2fTCmy/sr9dJVwn5kHZj90x5/1?= =?utf-8?q?e/6yOyRiOeHUXU+PZRq1gqZIH+KzXF4AeUtSiPLIlmybXtEXRt6cIFJAVhrx6F4pN?= =?utf-8?q?4P34n/RFecJalOsdFW0yqt8WIChqU57YxdzOwYNQDqgfLzhhCJ7/tH974nbZIVQmC?= =?utf-8?q?SPg2tB7fXtWKxKhBin1LNubE7Dmluqky1eFYcltwG4+w5dvPM+ebZTKo9HWul/RGw?= =?utf-8?q?5EajNEKReap6kIGHzPU6j9ZIidfUJFsjGdt0HiW/4YJFaVUP5QUaJDyNEOTSzGf0Q?= =?utf-8?q?80VhvCMubCxej5o5aL2MYsftmI4KfVyBGVbNwTnlq1RxOQimKd+vOO+FPlrlfiNbY?= =?utf-8?q?cN82c9d7seBEnEBX835w8aqHjoVdjIBZfdj00cXJW2iONy06xDNlV5A=3D?= X-OriginatorOrg: theobroma-systems.com X-MS-Exchange-CrossTenant-Network-Message-Id: 0fa91db1-8cba-44ea-948a-08dc1e7f3ee7 X-MS-Exchange-CrossTenant-AuthSource: AM0PR04MB6371.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 14:58:24.7526 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5e0e1b52-21b5-4e7b-83bb-514ec460677e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: VwWSvnqlvkljgiPPUcnMZWKEu3DOmEtWWjA5a9JZhyFGURyMILYuuZCzumyTzTKwDU8+v8pzwp44lM3EbRy404VB14aky93KZkf4YU0oaAliKTBD/BDjQFjJ+9WRbmsJ X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR04MB9735 From: Heiko Stuebner The RE signal is used to control the duplex mode of transmissions, aka receiving data while sending in full duplex mode, while stopping receiving data in half-duplex mode. On a number of boards the !RE signal is tied to ground so reception is always enabled except if the UART allows disabling the receiver. This can be taken advantage of to implement half-duplex mode - like done on 8250_bcm2835aux. Another solution is to tie !RE to RTS always forcing half-duplex mode. And finally there is the option to control the RE signal separately, like done here by introducing a new rs485-specific gpio that can be set depending on the RX_DURING_TX setting in the common em485 callbacks. Signed-off-by: Heiko Stuebner Signed-off-by: Farouk Bouabid --- drivers/tty/serial/8250/8250_port.c | 7 ++++++- drivers/tty/serial/serial_core.c | 6 ++++++ include/linux/serial_core.h | 1 + 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 8ca061d3bbb9..54d8f809b81e 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -1402,6 +1402,7 @@ static void serial8250_stop_rx(struct uart_port *port) void serial8250_em485_stop_tx(struct uart_8250_port *p) { unsigned char mcr = serial8250_in_MCR(p); + struct uart_port *port = &p->port; /* Port locked to synchronize UART_IER access against the console. */ lockdep_assert_held_once(&p->port.lock); @@ -1418,6 +1419,7 @@ void serial8250_em485_stop_tx(struct uart_8250_port *p) * Enable previously disabled RX interrupts. */ if (!(p->port.rs485.flags & SER_RS485_RX_DURING_TX)) { + gpiod_set_value(port->rs485_re_gpio, 1); serial8250_clear_and_reinit_fifos(p); p->ier |= UART_IER_RLSI | UART_IER_RDI; @@ -1567,9 +1569,12 @@ static inline void __start_tx(struct uart_port *port) void serial8250_em485_start_tx(struct uart_8250_port *up) { unsigned char mcr = serial8250_in_MCR(up); + struct uart_port *port = &up->port; - if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) + if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX)) { + gpiod_set_value(port->rs485_re_gpio, 0); serial8250_stop_rx(&up->port); + } if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND) mcr |= UART_MCR_RTS; diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index b56ed8c376b2..47aeece985f3 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -3663,6 +3663,12 @@ int uart_get_rs485_mode(struct uart_port *port) if (port->rs485_rx_during_tx_gpio) port->rs485_supported.flags |= SER_RS485_RX_DURING_TX; + if (IS_ERR(port->rs485_re_gpio)) { + ret = PTR_ERR(port->rs485_re_gpio); + port->rs485_re_gpio = NULL; + return dev_err_probe(dev, ret, "Cannot get rs485-rx-enable-gpios\n"); + } + return 0; } EXPORT_SYMBOL_GPL(uart_get_rs485_mode); diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 536b2581d3e2..364583203a24 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -584,6 +584,7 @@ struct uart_port { struct serial_rs485 rs485_supported; /* Supported mask for serial_rs485 */ struct gpio_desc *rs485_term_gpio; /* enable RS485 bus termination */ struct gpio_desc *rs485_rx_during_tx_gpio; /* Output GPIO that sets the state of RS485 RX during TX */ + struct gpio_desc *rs485_re_gpio; /* gpio RS485 receive enable */ struct serial_iso7816 iso7816; void *private_data; /* generic platform data pointer */ }; From patchwork Fri Jan 26 14:55:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Farouk Bouabid X-Patchwork-Id: 767173 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2040.outbound.protection.outlook.com [40.107.22.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 658081CF98; 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When rs485 is enabled, this gpio, if provided, must be driven active while receiving. However when RS485 is disabled this gpio should not have an undefined state. In that case, as DE and RE pins can be connected both to this gpio, if its state is not properly defined, can cause unexpected transceiver behavior. This binding depend on rx-enable-gpios to be implemented. Signed-off-by: Farouk Bouabid --- Documentation/devicetree/bindings/serial/rs485.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/serial/rs485.yaml b/Documentation/devicetree/bindings/serial/rs485.yaml index b64577036b5c..4c79dfaaf460 100644 --- a/Documentation/devicetree/bindings/serial/rs485.yaml +++ b/Documentation/devicetree/bindings/serial/rs485.yaml @@ -55,6 +55,11 @@ properties: description: GPIO to handle a separate RS485 receive enable signal maxItems: 1 + rs485-rx-enable-inactive-when-rs485-disabled: + description: rx-enable GPIO is not active when RS485 is disabled. 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This defines the state of RE or DE/RE signal when em485 is disabled. Signed-off-by: Farouk Bouabid --- drivers/tty/serial/8250/8250_port.c | 4 ++++ drivers/tty/serial/serial_core.c | 6 ++++++ include/linux/serial_core.h | 1 + 3 files changed, 11 insertions(+) diff --git a/drivers/tty/serial/8250/8250_port.c b/drivers/tty/serial/8250/8250_port.c index 54d8f809b81e..fbd0212d2397 100644 --- a/drivers/tty/serial/8250/8250_port.c +++ b/drivers/tty/serial/8250/8250_port.c @@ -582,12 +582,16 @@ static int serial8250_em485_init(struct uart_8250_port *p) */ void serial8250_em485_destroy(struct uart_8250_port *p) { + struct uart_port *port = &p->port; + if (!p->em485) return; hrtimer_cancel(&p->em485->start_tx_timer); hrtimer_cancel(&p->em485->stop_tx_timer); + gpiod_set_value(port->rs485_re_gpio, !port->rs485_re_gpio_inactive_when_rs485_disabled); + kfree(p->em485); p->em485 = NULL; } diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 47aeece985f3..6460646cf83c 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -3663,6 +3663,12 @@ int uart_get_rs485_mode(struct uart_port *port) if (port->rs485_rx_during_tx_gpio) port->rs485_supported.flags |= SER_RS485_RX_DURING_TX; + port->rs485_re_gpio_inactive_when_rs485_disabled = device_property_read_bool(dev, + "rs485-rx-enable-inactive-when-rs485-disabled"); + + port->rs485_re_gpio = devm_gpiod_get_optional(dev, "rs485-rx-enable", + port->rs485_re_gpio_inactive_when_rs485_disabled ? GPIOD_OUT_LOW : GPIOD_OUT_HIGH); + if (IS_ERR(port->rs485_re_gpio)) { ret = PTR_ERR(port->rs485_re_gpio); port->rs485_re_gpio = NULL; diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h index 364583203a24..fa5a92b56360 100644 --- a/include/linux/serial_core.h +++ b/include/linux/serial_core.h @@ -585,6 +585,7 @@ struct uart_port { struct gpio_desc *rs485_term_gpio; /* enable RS485 bus termination */ struct gpio_desc *rs485_rx_during_tx_gpio; /* Output GPIO that sets the state of RS485 RX during TX */ struct gpio_desc *rs485_re_gpio; /* gpio RS485 receive enable */ + bool rs485_re_gpio_inactive_when_rs485_disabled; struct serial_iso7816 iso7816; void *private_data; /* generic platform data pointer */ }; From patchwork Fri Jan 26 14:55:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Farouk Bouabid X-Patchwork-Id: 766794 Received: from EUR02-VI1-obe.outbound.protection.outlook.com (mail-vi1eur02on2078.outbound.protection.outlook.com [40.107.241.78]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 245421D52C; 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Switching to the half-duplex mode requires the user to enable em485 on uart2 using ioctl, DE/RE are both connected to GPIO2_C3 which is the RTS signal for uart0. Which means GPIO2_C3 is implemented as rs485 rx-enable gpio. In full-duplex mode (em485 is disabled), DE is connected to GPIO2_C3 and RE is grounded (enabled). This requires rx-enable gpio to be inactive to enable DE as well. Signed-off-by: Farouk Bouabid --- arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts index 18a98c4648ea..576024c745ed 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts @@ -273,11 +273,13 @@ &u2phy0_host { &uart0 { pinctrl-names = "default"; - pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; + pinctrl-0 = <&uart0_xfer>; status = "okay"; }; &uart2 { + rs485-rx-enable-gpios = <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>; + rs485-rx-enable-inactive-when-rs485-disabled; status = "okay"; }; From patchwork Fri Jan 26 14:55:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Farouk Bouabid X-Patchwork-Id: 767172 Received: from EUR05-AM6-obe.outbound.protection.outlook.com (mail-am6eur05on2040.outbound.protection.outlook.com [40.107.22.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7FD4A1CA9A; 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DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?q?1twqb4f4q5M1Nk0jdEI91XJoT/wS?= =?utf-8?q?b4wd31hv70ON8hNIUnF7gHyVPnns3Zav+5GPD6LW6TzAST5kiQ7Vi3UnaPt2O7YuX?= =?utf-8?q?bIwd5ouyuE2MMmgwUKCzq5+AjBwamv/Noi+NP6iKeUxBbZ9xar3E2LO004saaS65M?= =?utf-8?q?XDYUPXEbbD7i66hsMLxIJou1RFLJcRANfvQsAkwXLAMBs8AFqtk7GOfKPOgXBS+yL?= =?utf-8?q?E0ou4hqKqKt0oz1or+1MgJVbuWGPTKYqwpF/nXn3AVXNxNJcdpr/Gf5Yhix1cP4s8?= =?utf-8?q?gmk2PHlsoWwZATsmuqnqGzIXzvvioCcGC8Skh134argKWx2Qxi9hy9353w0mHMq+o?= =?utf-8?q?RgY2JTO/ZgmM1ypttZdsSmbQW+R8iGi3CPFkYi+75GD8fVrtEpCAb3PeAwbAzqzkZ?= =?utf-8?q?d3Tou4FPrPhJerSEhiosX6kGgeUnPaZ/z3C4tNv18XfZ4Lj7WvbNwUjC60/ryRG86?= =?utf-8?q?JjN7BKv4e36sBEkZi9HtPEAT2XUIlWjWp7UbO2w7aRM3OnepGC4E1G11unmZ+Thox?= =?utf-8?q?1IL3sDbuOexUuZ9Ec5p8fgJVg1/xrArDNEAfpe8T989lctWw4T+XNzYd4gIHN9i9Y?= =?utf-8?q?+1cd10jxB33Jmoh4V2WlGdnfH279E3LTSJ+KeWsJSnun/rNaRAMfj6yghV5aytUn9?= =?utf-8?q?Phk+e/rbplkFRxtaF1t7nxqPMX7CD7GF0GnYOraofwbnXNSUBgQwm1+ZvGPCFAovR?= =?utf-8?q?33Qrs19Yxtdvt+lHOiYFkJImS1OqnsD4V3Jh7tHcGOgIzfkRYbRFOqNOUk/sRiaqF?= =?utf-8?q?AlgUI6eBD7YNantzJyHxJ2dqqIiKQaxGnFCwT1y+EYzBVtwCv2zZhrUKGW3uo18z4?= =?utf-8?q?OvwmfZOse/Cj5aTco+CfY3JMmeM/3ECUWe8nEbaSDNOslIQM31Q+TezCOJBQyUGK8?= =?utf-8?q?SjRtHH1o+YqG8SAMci5CcWGDYrw3oIe6OvJAQDC+WsbW6/jZBmQyEukkXxvUHsuBy?= =?utf-8?q?dy+ZzTFmQ3ZPi1mJnXEOFeNJV+E8eIc0NDaeKct1poer7+y4cHk8vNgicommjH+GH?= =?utf-8?q?EoIqbG9zH4ZgOXHZI5q12Wf+NSi4/TbbGR7F4gL04JuPmN2RExlow9vp91fziDYDU?= =?utf-8?q?VDNB5lSzYT9Adk5PPiDggqOJn6yL/Gk1ptVxIFrTjlYmc+oo9h5v0OVTNGiGtNk6V?= =?utf-8?q?gr8aPdINaUZjcyR8l9ryn+nQje7YmCBZSFWvv+BF6mVXRHPStUzL1sBR3/DAdpLEX?= =?utf-8?q?wa7//4a/Ii+e/JVs49AfMt2FrsERaWRARXR7U7w/r0oWBxHTGjwuiJHrg/V7c7a4d?= =?utf-8?q?UvTnBxBc9fcRUfArmmOxPtCxj9OgE6DII28GqOQVUMQfuItXxCzEB6BIsAB2/ihxW?= =?utf-8?q?5T8nkVikYzp1HeEGiIqI8CwixKwJwNB07yQvStYXeiT7BZklaiDKcNc9FxUQjvEuO?= =?utf-8?q?n/Xq8+vLuDj5JTNJRuvIPWKpZZCEfql4fobXr1So4hTaaH3f6hcGgN0vLeHHmIPW0?= =?utf-8?q?s5eP+jEdC24HiLtlpJicz7+VHY8TTpEwiqksg/hDPh0UpbfjxnKcqMRhYfitmWYFU?= =?utf-8?q?VQOq5x8Gx41ZQercDAXYPOl+7j7HjntW3dcRZ9kCRdIMAorSbmRkIvw=3D?= X-OriginatorOrg: theobroma-systems.com X-MS-Exchange-CrossTenant-Network-Message-Id: 402d2297-329a-4ce6-3f6e-08dc1e7f4076 X-MS-Exchange-CrossTenant-AuthSource: AM0PR04MB6371.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 26 Jan 2024 14:58:27.1648 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 5e0e1b52-21b5-4e7b-83bb-514ec460677e X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: XNSD3WHet0GRzBjZHYALvtbaUjYUVkP/uXjs6KuaQuv9S9gHNsPKQharQKbZscxLrQN+lMp3l3hf4rX/9hmeTwHQqVl6fQ1DAmFZEHTdpXQRTle+YO7ZGehzVypmgKxt X-MS-Exchange-Transport-CrossTenantHeadersStamped: GVXPR04MB9735 A hardware switch can set the rs485 transceiver into half or full duplex mode. Switching to the half-duplex mode requires the user to enable em485 on uart5 using ioctl, DE/RE are both connected to GPIO0_B5 which is the RTS signal for uart5. Which means GPIO0_B5 is implemented as rs485 rx-enable gpio. In full-duplex mode (em485 is disabled), DE is connected to GPIO0_B5 and RE is grounded (active). This requires rx-enable gpio to be inactive to enable DE as well. Signed-off-by: Farouk Bouabid --- arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts index 16798eb77077..369a6518a487 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts @@ -227,6 +227,8 @@ &uart0 { &uart5 { pinctrl-0 = <&uart5_xfer>; + rs485-rx-enable-gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + rs485-rx-enable-inactive-when-rs485-disabled; status = "okay"; };