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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1347; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=mW0FO82P9i9mtiqyO3ysE5mu6PqL/zVStjt8u6ip+SM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1DqCMaalBck7dNtUqL5D/MI74MhqWXnmNzCw g91Dns3Mt6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6gAKCRCLPIo+Aiko 1co9CACmqrWuSOIobvzElflz90Jq2rTpGNE0+MoWeF5EHPUVGMRDMXZ57vgldw1EvyBE7bebVY7 bfDbH3zSLreYNY16T2FhSqwcvWITVlEt0y2tNoTJJVBFQsV8OqfC9QzNFhrd07VysxbZZHC0Bb8 QG4oyZ0hV3GqCCwCx8c3LCzDHPV70hL0EXUfPIgy6t1H4fwKox0AZhiE8q5lnUjUEORb4LqN41K QFVRvtetMggD0PFIJYhDl+D7/3+t7PbEdP7skeXESpaLWsh6S1wOyIfW4qRfFF540oxexqTNVK6 ji4rGKyriEEWiwVWSMHBy3NS4wq7F1G2n6R6kGfp2zhjUUZd X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The MSM8996 DT doesn't provide frequency limits for the core_clk_unipro clock, which results in miscalculation of the cycles_in_1us value. Provide the backwards-compatible default to support existing MSM8996 DT files. Fixes: b4e13e1ae95e ("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES") Cc: Nitin Rawat Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam --- drivers/ufs/host/ufs-qcom.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/ufs/host/ufs-qcom.c b/drivers/ufs/host/ufs-qcom.c index 0aeaee1c564c..79f8cb377710 100644 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@ -1210,8 +1210,10 @@ static int ufs_qcom_set_core_clk_ctrl(struct ufs_hba *hba, bool is_scale_up) list_for_each_entry(clki, head, list) { if (!IS_ERR_OR_NULL(clki->clk) && - !strcmp(clki->name, "core_clk_unipro")) { - if (is_scale_up) + !strcmp(clki->name, "core_clk_unipro")) { + if (!clki->max_freq) + cycles_in_1us = 150; /* default for backwards compatibility */ + else if (is_scale_up) cycles_in_1us = ceil(clki->max_freq, (1000 * 1000)); else cycles_in_1us = ceil(clk_get_rate(clki->clk), (1000 * 1000)); From patchwork Tue Feb 13 11:22:18 2024 Content-Type: text/plain; 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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1151; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=U5NHcti9mGlzzsInbBW5rutmFws8SfG+NrSfi+LiWxw=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1DqZ1EBhLzbYq+xAKMyIjzFue0guaOYriXFV S3GAa4n5gaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6gAKCRCLPIo+Aiko 1RVOCACeoLiLwq0/8j3orEZkIkqlj6Fgl8Cxp7OCiDQ0IAFFWC3CQzwvEtEVoruLp8drDGRXZAc 5Bw3NjWKN208B2r7SJltlUH2NZT2kKmTP65ycluIHbGY3DYvSEk914BmoPF0noSHRooxlPp9qu7 nCeN5PQZmMkwmAaSdiLIDVJzUrUvGSklsjsoyviOJBna6mfWDsw0iIf7z2H4/WxgtmU0+Grp0tZ sd0A+Bkix7HztHewzpaI7PD/0+jhVxZWbtcs0GRXPkAU+sMcAsACrwxqJwbpOGhzQeeLFo2CDjF QE2rk86jo4l1hLYjwHEAe5J2NxY1gHTyu+/2E4A4q7Uvw9oD X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Since the commit b4e13e1ae95e ("scsi: ufs: qcom: Add multiple frequency support for MAX_CORE_CLK_1US_CYCLES") the Qualcomm UFS driver uses core_clk_unipro values from frequency table to calculate cycles_in_1us. The DT file for MSM8996 passed 0 HZ frequencies there, resulting in broken UFS support on that platform. Fix the corresponding clock values in the frequency table. Suggested-by: Nitin Rawat Fixes: 57fc67ef0d35 ("arm64: dts: qcom: msm8996: Add ufs related nodes") Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov Reviewed-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index f6b6fdc12f44..80d83e01bb4d 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2077,7 +2077,7 @@ ufshc: ufshc@624000 { <0 0>, <0 0>, <150000000 300000000>, - <0 0>, + <75000000 150000000>, <0 0>, <0 0>, <0 0>, From patchwork Tue Feb 13 11:22:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 772608 Received: from mail-lj1-f175.google.com (mail-lj1-f175.google.com [209.85.208.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C1D43D966 for ; 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Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=975; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=Yu/LzOcQdCwZAyJpUXbklqudqrQ3EIxx4vsAwegkqbc=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1Dqn2+zx6i7LHuLUU/Je5m21KC2vtMGqJSUK 6aV5DBKBy2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6gAKCRCLPIo+Aiko 1d6JB/sGi8mxyK2NqYew8InH8n0loFnN3a8OcHKYSqeZLMUyCYkZsEHykAL8Jf7/mcH/5004XoP p1t7f3UU3B/ilNjxaB2aYXXw2Z0zmlXP0X/M59932ZZaFJB+KoEY8RIcqLgfFwts4Pmjvu57zxD ggIriyUHd593xs/Beu6euhMKaIqwVYiOJ1kkWeVr49hB9uQpOjVAdxHS7zZXMQ4oCPy5wm/14aL cQyYxILvsjiiEzCrUF+Opt6DXZvB08uVyFQeAN81sWspDtZF4F6QPMwirYy3MTq2NmnJxFl6nzT g6AqVLvxSEK+Q2iKxoUUaZ76q5pk++zHuY9GnlfrKIhvifVh X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Follow the example of other platforms and specify core_clk frequencies in the frequency table in addition to the core_clk_src frequencies. The driver should be setting the leaf frequency instead of some interim clock freq. Suggested-by: Nitin Rawat Fixes: 57fc67ef0d35 ("arm64: dts: qcom: msm8996: Add ufs related nodes") Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 80d83e01bb4d..401c6cce9fec 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2072,7 +2072,7 @@ ufshc: ufshc@624000 { <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; freq-table-hz = <100000000 200000000>, - <0 0>, + <100000000 200000000>, <0 0>, <0 0>, <0 0>, From patchwork Tue Feb 13 11:22:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 773625 Received: from mail-lj1-f170.google.com (mail-lj1-f170.google.com [209.85.208.170]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FCCA36AED for ; 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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=802; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=BuQzg2iJaW63ZjLgGhbysHhHcNyAHX+tIUOIDDX7neY=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1Dqid9hqLr0E//FiCkM8sXB4d+Wd9cxpUgxv WpDVUbwPc2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6gAKCRCLPIo+Aiko 1Zv3B/95nI4ncjBcVkCDqCawoLyBN84EDa9EuPZXsmuhSvy2FHskcYWWjfslYWKMTlN/MehSnSz Dqd/5R2MexAAvjWgTLBxl22NL7w+JnQhsW08/Eqxov7YZy4IYXhpJ0Un23ZA7XL98g4Cflf91T6 BtWb3SILf+bFsTucFI6w2chlkLNFsLd+46zFQ9KluHoBbwdcoigFCzVf6Gu0c/zNHj5wO7kTYEj 9YlsAvhOqo/bctVfyC8btGP42Kach8eEjXz24/U6AgFzVk2NJkIRTbLULYSLM6N9lZnkW8Z75Mz CgDJws2vna25Mfgi7TuNCVYDZF1PZvnB4RAe+us4+u12qraB X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A Instead of setting the frequency of the interim UFS_ICE_CORE_CLK_SRC clokc, set the freency of the leaf GCC_UFS_ICE_CORE_CLK clock directly. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index 401c6cce9fec..ce94e2af6bc5 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2076,9 +2076,9 @@ ufshc: ufshc@624000 { <0 0>, <0 0>, <0 0>, - <150000000 300000000>, - <75000000 150000000>, <0 0>, + <75000000 150000000>, + <150000000 300000000>, <0 0>, <0 0>, <0 0>; From patchwork Tue Feb 13 11:22:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 773624 Received: from mail-lj1-f177.google.com (mail-lj1-f177.google.com [209.85.208.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E6CBE54BE7 for ; Tue, 13 Feb 2024 11:22:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org, Krzysztof Kozlowski X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1667; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=fiDOpLgmq0dhXTsGReQzn91SkMU/B6/9yS5El4QNj7M=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1DrjoC0cfqzBfI582y2/cjvC/gG/oni/soOP qVQceJ34YuJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6wAKCRCLPIo+Aiko 1Y5XB/9x9Zjm8dG4TiVQ6VBhIH9rBhhUwn32IfI88NCVeb4igYO1Bda90yPhuXv0PTF2ZulG00A psWtbU8INsbzt5E7/SyZ917ZGP/L2owmuZ/D5/jmx3EzDOwJ6tRpiCWv//aai6Ydjt/VUjjhlnq 7UQZQHmufqFps2dOLK6PvCd8AXcNdwFMdZDpq9f11zdnWXtQmskNj5lAUBcokQvhmrW8eD0aK9U 2ggNZGZKvCqbZcajpEoKt3UmHW41J0mBMlbmImK7P0x37XsXHx8dLZzsVjhC0rzsY/rZpf5TWRc 7uKK1s+AjS+PYAlFgVCz3h4zuHhJd+qyH3y40vIQ1j7WlzC7 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Dmitry Baryshkov Acked-by: Manivannan Sadhasivam --- Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index 9a4f2b43e155..649f7951ac01 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -44,11 +44,11 @@ properties: clocks: minItems: 8 - maxItems: 11 + maxItems: 9 clock-names: minItems: 8 - maxItems: 11 + maxItems: 9 dma-coherent: true @@ -189,16 +189,14 @@ allOf: then: properties: clocks: - minItems: 11 - maxItems: 11 + minItems: 9 + maxItems: 9 clock-names: items: - - const: core_clk_src - const: core_clk - const: bus_clk - const: bus_aggr_clk - const: iface_clk - - const: core_clk_unipro_src - const: core_clk_unipro - const: core_clk_ice - const: ref_clk @@ -259,7 +257,7 @@ allOf: maxItems: 2 clocks: minItems: 8 - maxItems: 11 + maxItems: 9 unevaluatedProperties: false From patchwork Tue Feb 13 11:22:22 2024 Content-Type: text/plain; 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Tue, 13 Feb 2024 03:22:24 -0800 (PST) X-Forwarded-Encrypted: i=1; AJvYcCW3m5vE+sJaaRrnsq+SdkjsaVzhAG1+xXj41PM8wmKPgN/IR1ztRvUeb5KNGWg3DBgNp7CfPju/IdB5arZFrT3pt/j80CMlTV1+9UBz0tLS0ZkIxV5fXGGKAp/oavyT+fXgEY1efZ79yvMUe7VPOL3COnhlXtsoOtW1d1CN2d8gDQDe8rcYBT+xMGn9zDwqApzAzYmHiX+XpWh+HTVjKEriSuJAXbj7cTo+24/9NQahVV3IDZtdzp+aS6kDUpv8PFZ92HTR11/APnWyU9taN2/V2ECVn3F6URV3mYr+OkVP+34c0+dkTmn/IimkWuI9DT2EdZtyX77RSzCNG+DoQJBpY1czHHTLszhbrtBect7JraTHnCr+2UDHNsa/HIS8WjVNxPwOI11U9t1eOQDeHb78lNU1S9iwg04/sPRuGzxnrQieVKfLd+z0/NFyIDiWagQALoetMY8ylqscHnltXSxd9ObNPeWUw1H5fXe/xs/acRdNj+eHQXCB/e2+Tr+6MWKyY8Oruy7BQj91EOeuIJH5XQxSEPZRwfSmr6E2Ihq3womVYglOeVWQbdFdfZMajz0o Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id z11-20020a2e964b000000b002ce04e9d944sm451107ljh.69.2024.02.13.03.22.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 13 Feb 2024 03:22:24 -0800 (PST) From: Dmitry Baryshkov Date: Tue, 13 Feb 2024 13:22:22 +0200 Subject: [PATCH v2 6/6] arm64: dts: qcom: msm8996: drop source clock entries from the UFS node Precedence: bulk X-Mailing-List: linux-scsi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240213-msm8996-fix-ufs-v2-6-650758c26458@linaro.org> References: <20240213-msm8996-fix-ufs-v2-0-650758c26458@linaro.org> In-Reply-To: <20240213-msm8996-fix-ufs-v2-0-650758c26458@linaro.org> To: Manivannan Sadhasivam , Bjorn Andersson , Konrad Dybcio , "James E.J. Bottomley" , "Martin K. Petersen" , Nitin Rawat , Can Guo , Naveen Kumar Goud Arepalli , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Alim Akhtar , Avri Altman , Bart Van Assche , Andy Gross Cc: linux-arm-msm@vger.kernel.org, linux-scsi@vger.kernel.org, devicetree@vger.kernel.org X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=openpgp-sha256; l=1469; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=iD4ooa7gvFH4iiY2/KlUwjcOqPjF6mqUsxynf2nxGNs=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBly1DrJy1H3oYWSSDAMZFzwBPQ1VH6fqx8zhgAs 7GSHotR9vCJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZctQ6wAKCRCLPIo+Aiko 1d7bCACCfJ4zpXitap/cJOFAu7Js4O9gVA7De66YByXSIF7ebZvVbXEt3BP7iGCh/KvYgWyLC6O HXOsnDJUUncZ060nYQJGFcDFij2S2EzAcLuzWGQGKfzgcdzUecBgb61K4YgW8j9V2F6i1zeGlkc rOr1PNTp8/b4xZgEfXBVlerQUxfnGMuExDgET6ZDTtmoukg/RQiGOzjkRGlgMQIX0imAiILLc7f ZV0c0qdp3wzbo2uIKWfbKScrQNrfQR9jBCtp6T/ITe+jwLpYJqnXmV/OKM7oKlrbVSJnxgglvdU 8CabrLISpv4ZE1Kj/5hatjpdKXuR7lxw5Uuu4fmg+H8fm237 X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A There is no need to mention and/or to touch in any way the intermediate (source) clocks. Drop them from MSM8996 UFSHCD schema, making it follow the example lead by all other platforms. Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio Reviewed-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/msm8996.dtsi | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index ce94e2af6bc5..f18d80a97bbf 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -2047,24 +2047,20 @@ ufshc: ufshc@624000 { power-domains = <&gcc UFS_GDSC>; clock-names = - "core_clk_src", "core_clk", "bus_clk", "bus_aggr_clk", "iface_clk", - "core_clk_unipro_src", "core_clk_unipro", "core_clk_ice", "ref_clk", "tx_lane0_sync_clk", "rx_lane0_sync_clk"; clocks = - <&gcc UFS_AXI_CLK_SRC>, <&gcc GCC_UFS_AXI_CLK>, <&gcc GCC_SYS_NOC_UFS_AXI_CLK>, <&gcc GCC_AGGRE2_UFS_AXI_CLK>, <&gcc GCC_UFS_AHB_CLK>, - <&gcc UFS_ICE_CORE_CLK_SRC>, <&gcc GCC_UFS_UNIPRO_CORE_CLK>, <&gcc GCC_UFS_ICE_CORE_CLK>, <&rpmcc RPM_SMD_LN_BB_CLK>, @@ -2072,8 +2068,6 @@ ufshc: ufshc@624000 { <&gcc GCC_UFS_RX_SYMBOL_0_CLK>; freq-table-hz = <100000000 200000000>, - <100000000 200000000>, - <0 0>, <0 0>, <0 0>, <0 0>,