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Let's use it instead of the hard-coded DIV_ROUND_UP() macro function. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 0274c9295514..722b5eb1f709 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -6,6 +6,7 @@ */ #include +#include #include #include #include @@ -421,10 +422,7 @@ static int dw_spi_transfer_one(struct spi_controller *host, int ret; dws->dma_mapped = 0; - dws->n_bytes = - roundup_pow_of_two(DIV_ROUND_UP(transfer->bits_per_word, - BITS_PER_BYTE)); - + dws->n_bytes = roundup_pow_of_two(BITS_TO_BYTES(transfer->bits_per_word)); dws->tx = (void *)transfer->tx_buf; dws->tx_len = transfer->len / dws->n_bytes; dws->rx = transfer->rx_buf; From patchwork Thu Feb 15 18:00:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 773915 Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BDAA91386C1; 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Thu, 15 Feb 2024 10:01:24 -0800 (PST) Received: from localhost ([178.176.56.174]) by smtp.gmail.com with ESMTPSA id k11-20020ac2456b000000b00511ae3225d1sm321197lfm.226.2024.02.15.10.01.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 Feb 2024 10:01:24 -0800 (PST) From: Serge Semin To: Serge Semin , Mark Brown , Andy Shevchenko Cc: Alexey Malahov , Andy Shevchenko , Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] spi: dw: Add a number of native CS auto-detection Date: Thu, 15 Feb 2024 21:00:47 +0300 Message-ID: <20240215180102.13887-3-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240215180102.13887-1-fancer.lancer@gmail.com> References: <20240215180102.13887-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Aside with the FIFO depth and DFS field size it's possible to auto-detect a number of native chip-select synthesized in the DW APB/AHB SSI IP-core. It can be done just by writing ones to the SER register. The number of writable flags in the register is limited by the SSI_NUM_SLAVES IP-core synthesize parameter. All the upper flags are read-only and wired to zero. Based on that let's add the number of native CS auto-detection procedure so the low-level platform drivers wouldn't need to manually set it up unless it's required to set a constraint due to platform-specific reasons (for instance, due to a hardware bug). Signed-off-by: Serge Semin --- drivers/spi/spi-dw-core.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/spi/spi-dw-core.c b/drivers/spi/spi-dw-core.c index 722b5eb1f709..ddfdb903047a 100644 --- a/drivers/spi/spi-dw-core.c +++ b/drivers/spi/spi-dw-core.c @@ -834,6 +834,20 @@ static void dw_spi_hw_init(struct device *dev, struct dw_spi *dws) DW_SPI_GET_BYTE(dws->ver, 1)); } + /* + * Try to detect the number of native chip-selects if the platform + * driver didn't set it up. There can be up to 16 lines configured. + */ + if (!dws->num_cs) { + u32 ser; + + dw_writel(dws, DW_SPI_SER, 0xffff); + ser = dw_readl(dws, DW_SPI_SER); + dw_writel(dws, DW_SPI_SER, 0); + + dws->num_cs = hweight16(ser); + } + /* * Try to detect the FIFO depth if not set by interface driver, * the depth could be from 2 to 256 from HW spec From patchwork Thu Feb 15 18:00:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 773277 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 036B11386DE; Thu, 15 Feb 2024 18:01:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1708020090; cv=none; b=MmUrODagNJzzu9b2WY2whIkx5TleJX/CyPKlQBkqgPMiBmnE5gdBmRH8QBBS9X5DLRC3sW9nxG1D+FaHBecAPb1I/YIdw7Z7ZjukPKcud9OS2MldTZb90LpsLRNquAG7rzxrBijS3emqj+glII0oVQqU1K2TWpxola7GZqKqGes= ARC-Message-Signature: i=1; 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Thu, 15 Feb 2024 10:01:26 -0800 (PST) From: Serge Semin To: Serge Semin , Mark Brown , Andy Shevchenko Cc: Alexey Malahov , Andy Shevchenko , Andy Shevchenko , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] spi: dw: Drop default number of CS setting Date: Thu, 15 Feb 2024 21:00:48 +0300 Message-ID: <20240215180102.13887-4-fancer.lancer@gmail.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20240215180102.13887-1-fancer.lancer@gmail.com> References: <20240215180102.13887-1-fancer.lancer@gmail.com> Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 DW APB/AHB SSI core now supports the procedure which automatically determines the number of native CS. Thus there is no longer point in defaulting to four CS if platform doesn't specify the real number. Signed-off-by: Serge Semin --- drivers/spi/spi-dw-mmio.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c index cc74cbe03431..eb335fcc8720 100644 --- a/drivers/spi/spi-dw-mmio.c +++ b/drivers/spi/spi-dw-mmio.c @@ -364,11 +364,8 @@ static int dw_spi_mmio_probe(struct platform_device *pdev) &dws->reg_io_width)) dws->reg_io_width = 4; - num_cs = 4; - - device_property_read_u32(&pdev->dev, "num-cs", &num_cs); - - dws->num_cs = num_cs; + if (!device_property_read_u32(&pdev->dev, "num-cs", &num_cs)) + dws->num_cs = num_cs; init_func = device_get_match_data(&pdev->dev); if (init_func) {