From patchwork Fri Mar 8 17:18:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779282 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 60F25282E1; Fri, 8 Mar 2024 17:18:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918307; cv=none; b=LXvKMd30C98kvf1RbjIhqj6NFO/T3SrhIK7d073hmVbXnsVJemJKTGOwb+8hk/Li7F4Z/BiObEE/TxMECrnGstk4xEYk7iH+bT3XNYnHx0OFMv56TsZ4Suyt4+fUjUQhJJ2zBtZP/7v0Se3Ws6La6hq+65suHUnbIVXVOHO9wm0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918307; c=relaxed/simple; bh=SU8R2y4/XuqxTtYghpt2nzG2hjyN0IAUqTl830ap1V0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=gEThSgtCgALTpe8pGe2qMKFw2tfXm7gR+PIu8Xdfa1I/DRyV/MjAnXKIGOPw8bJfl+MEzKhMN9+I2dqztHNYa+PJ6+ZwWeTOLT/1BKrP2dhjtHkiYUomzubyoNFnYEjsLi1DyQZh9mY3Ihj3HZppw2ojAQymEri8LGtlhUa4TEM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=JinAFtZD; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="JinAFtZD" Received: by mail.gandi.net (Postfix) with ESMTPSA id 0D838C0006; Fri, 8 Mar 2024 17:18:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918298; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=I1ZW8csWkCGVE3gvbimGZ4O77Vq0iVPh60n1dHennJc=; b=JinAFtZDuCzcKJiWT9oO4ML2pG9VbIGv91fydzWzixAiXLdPrz07Po3Wr7LFPvUdI54XC1 PhhwaZJppQ2SRbH9z7o0CX1cG8k9PJkSrR2W72EFX5ZBEz02a9KzBnMoclawK7e1qmDsT0 Jfvg1kbQQndhMh/cvGynw2deAAEm2w7EYqrWdlzGWWhB8/8DV6SZ4cqX2EQ3Z7saeK0FYH Ype7+iBLH/3Od/xDTPNmcsfBPT328Cnhq+7FB1dhVQNg/hVR6j52GPu9ZHyzbnjT7EeBdY Eroimu6mS2SIguDsea1fNOnFpJP/XxSMdZ9s8WeS8+kFo07b+f6az5Enqtj0uA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:16 +0100 Subject: [PATCH 01/11] dt-bindings: qspi: cdns,qspi-nor: add mobileye,eyeq5-ospi compatible Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-1-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Add Mobileye EyeQ5 compatible. FIFO depth shall not be passed; hardware can detect it. Signed-off-by: Théo Lebrun Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml index cca81f89e252..cf7abf48673a 100644 --- a/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml +++ b/Documentation/devicetree/bindings/spi/cdns,qspi-nor.yaml @@ -61,6 +61,17 @@ allOf: cdns,fifo-depth: enum: [ 128, 256 ] default: 128 + - if: + properties: + compatible: + contains: + const: mobileye,eyeq5-ospi + then: + properties: + cdns,fifo-depth: false + else: + required: + - cdns,fifo-depth properties: compatible: @@ -74,6 +85,7 @@ properties: - xlnx,versal-ospi-1.0 - intel,socfpga-qspi - starfive,jh7110-qspi + - mobileye,eyeq5-ospi - const: cdns,qspi-nor - const: cdns,qspi-nor @@ -145,7 +157,6 @@ required: - reg - interrupts - clocks - - cdns,fifo-depth - cdns,fifo-width - cdns,trigger-address - '#address-cells' From patchwork Fri Mar 8 17:18:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779281 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C8A8F28DA4; Fri, 8 Mar 2024 17:18:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918308; cv=none; b=K5IPchO2rVOXLVAB54QEt8f61SW3PXtA/yX8vn81/oOA6yVZot9k1qOOYjmp45/VVNrvefa5QgNesZ6x1GsJ7CeCi4s2KbyevN1pIK56lcFnnrxTbGmLNWJBxLAuI4/bMFvwJaa+6dwrmLTPApCSzy1ZhAa/irch5Twf9RL1yPY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918308; c=relaxed/simple; bh=/IUtR1QhrOh+Npea2oe41h1LCefsP4M9voCRGpR8M7s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sQ0/egMyZ+puHNJroPHMDBYje/ZUpAd5sR2I5HQqAVAOrlgx4s0yzwFU8DTIJXh6HbtSVt3JYqejcVIJBxst4yG44GMMEHNQ+z1DlF7XDnEgr1FHBmYj2HOTPs9eEOQFNduKuwv8heisecwuOdijIAtV/xJ5CaYp3e2l1eHM08s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=N0vqFYfj; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="N0vqFYfj" Received: by mail.gandi.net (Postfix) with ESMTPSA id AD624C0007; Fri, 8 Mar 2024 17:18:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918299; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QMNvpchq6L9NiooxCj/RaP2N+unTTBYKBtPBw/XfUSY=; b=N0vqFYfjmYFxrSNypQ/bG9DaU49kgOcdKSYl+GUe8G6eQjh6IA8hBGAv5ZLv1ZDR8HJbfY tuRs+1+DtJwo0dgY52Jb2cwr9frsC0bW9ysa9W1aVs3pnESLkNQHgfOE/J9NXBdQlfqiyE 8qjLNi5f192YhIqegXckujWjgUAkAh51VPDTSTDezNI/H1XSOjBmyjUfatsyoCKO1+2SmT MdZU+MRcua8V1KktjstYHyqfxWAFp9BIe4Vc42+cNPdFc4Ly4txrBDZ+qdI6ZA2T/M1PjX +yNAc97U3J4/O9Ed7gyd+7NdzttWrj3Jp4viUxe0vhk5TdmYnsfRUqeJym8YXQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:17 +0100 Subject: [PATCH 02/11] spi: cadence-qspi: switch from legacy names to modern ones Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-2-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Both spi_master_get_devdata() and the ->master field in struct spi_device are part of the compatibility layer provided by . Switch away from them. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 1f2d404c2cde..266a5d5dcfaf 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -1412,7 +1412,7 @@ static int cqspi_mem_process(struct spi_mem *mem, const struct spi_mem_op *op) static int cqspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op) { int ret; - struct cqspi_st *cqspi = spi_master_get_devdata(mem->spi->master); + struct cqspi_st *cqspi = spi_controller_get_devdata(mem->spi->controller); struct device *dev = &cqspi->pdev->dev; ret = pm_runtime_resume_and_get(dev); From patchwork Fri Mar 8 17:18:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779112 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 881E428DA6; Fri, 8 Mar 2024 17:18:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918309; cv=none; b=XGrTxzZcvheGytB3jlUTnzdE6DvvNhyx8+90pEo6D2hoFZhoddIPGJZMdUzNp31RoNBbAJ9KhcKa09il02U+tVTyMTIeLPTHuAKzxx7Nr2T8BUZvnyZCOzY+Suz9aKHCTY/nL7fEHoyNCiqOEAWwvBIsDeywR1QAV1Rm5IZyhA8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918309; c=relaxed/simple; bh=nk0694HdvY49hVbvEOBszReAqBL6XI4pN9/4MeXvheU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=arOwFIM/Gw2ADajybAW0WZaOtWoLwPl3qtTb2Ype/YbnXD9TC6iYzlOIHWWrmPqWLxbD3ADK1XvKSyGbdzDLrOk5Gw1ZCJO5pvxG/jh5J4aLwKJA4MliN4Y1Crtc49kyD4smHHEKKHxGSeNb3Dcz05XCdJhapaKu6A+hxWoGiTY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=HA4ECSJf; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="HA4ECSJf" Received: by mail.gandi.net (Postfix) with ESMTPSA id 5415CC0005; Fri, 8 Mar 2024 17:18:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918299; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=kNms7RL0icimFpEg39nbbIwCCVvraktcinQEWSShPjQ=; b=HA4ECSJfUQ3aBKJDbX9bEwwdh1hAX9KCtxzWxfGrN1xghbXTzpgi9WAAPG5PBpTp02q2mo lxGmf9qtxrpL58I8YHGme7MWU+3sQffOWPIqOD+RG/uiB6gMzfA1rB7HvYijZ63QM+mUws UqEHPQaByM6qaupug2ZRSIW+6m40hjmQcR9N4otzZIDMQGWeCLceBWX39hZ2U+xYYaijWJ XzPfgwtxjsysC/d0LoYYqtfSFfzkScFWyOG1LN4spB7fSGjUp1N2sOZ9ly/fxLwi4SXEIv pOLD6zQvOVzFtrN91V8Z4fw3QwMmzlimPUymJ+hxj9bYlBZL61z2nVqtlW419w== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:18 +0100 Subject: [PATCH 03/11] spi: cadence-qspi: allow building for MIPS Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-3-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com The Cadence QSPI Controller driver is used on Mobileye EyeQ5 platform. Allow building on MIPS. Signed-off-by: Théo Lebrun --- drivers/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index ddae0fde798e..77489dad2945 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -246,7 +246,7 @@ config SPI_CADENCE config SPI_CADENCE_QUADSPI tristate "Cadence Quad SPI controller" - depends on OF && (ARM || ARM64 || X86 || RISCV || COMPILE_TEST) + depends on OF && (ARM || ARM64 || X86 || RISCV || MIPS || COMPILE_TEST) help Enable support for the Cadence Quad SPI Flash controller. From patchwork Fri Mar 8 17:18:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779280 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 881B028DA5; Fri, 8 Mar 2024 17:18:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918310; cv=none; b=ImKjzHkrFaqNfzJvOst1LLc1wYzEYXWDIgf5eO6iWsu+KJk1WJ2LFJof2Rs0rRYJ+9PK0bpo14Ahw8yJRz0yIMBsaxBzcoGaTtTsuHfUgiihlfqhn3Zhs9UNOF0QHxEXe8nckAr8KFdOIWFF1AjEJIf+paVAL6b3rKTxIPJXw0w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918310; c=relaxed/simple; bh=VXeunZ5N76jlGdhugZbRm6cy1XlnU0cXgDgDsneqnKA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ZUgxF/5I/EUj4k9GY9hSuo+JWKxnFykG56d6Olm5z6Rhsm0ck3aWoH2B22M1JG8NlBuuNYn1j3H61oKwnAzPB3OEvgcKSjobU3C7HKP1Q1CN6ZSthfcTTDN25mWErOiFAkO8YDWFuR7TI65Wos+5p48r1Dvx9rEFIsxe6LajJN0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SG1Wv8Ep; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SG1Wv8Ep" Received: by mail.gandi.net (Postfix) with ESMTPSA id DCA88C0008; Fri, 8 Mar 2024 17:18:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918300; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7P82CvPIyWzjYW3qcslrXHP+TE4Er05uK/MYjNOvvnk=; b=SG1Wv8EpNFPpbrhFxsXJRIte9ZXfor+k+zdFyVM0jC7gFmO2B2W9RTrX0ZsUJDKPDnAIJJ D0cFP3mi/3KPmD16bnOO9B9lyd7YyM/M0+loBj8ToysxNO8bxE6mMmEvjP2LA5s0d4qkRw BtwCTGbXpzKppr2E+4V7OYDrH56hY1X3wlCqY9Ijeky0v1bUVoXXUMIfSLQJJnvmnSbmuL dNH8USCxy/dezHiVjPj/9SMZF/uRaXKHCrHA8DRQI4O/gur41plVmX5tgWzBq15PGMD752 HE6Y8WAXmwVow0DKDBmxM+B0jDPwbpmoY5rE+IjJ2fqGJQ0u5RqoStsTbf7q7Q== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:19 +0100 Subject: [PATCH 04/11] spi: cadence-qspi: store device data pointer in private struct Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-4-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Avoid of_device_get_match_data() call on each IRQ and each read operation. Store pointer in `struct cqspi_st` device instance. End-to-end performance measurements improve with this patch. On a given octal flash, reading 235M over UBIFS is ~3.4% faster. During that read, the average cqspi_exec_mem_op() call goes from 85.4µs to 80.7µs according to ftrace. The worst case goes from 622.4µs to 615.2µs. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 266a5d5dcfaf..02a80745fa6d 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -102,6 +102,8 @@ struct cqspi_st { bool apb_ahb_hazard; bool is_jh7110; /* Flag for StarFive JH7110 SoC */ + + const struct cqspi_driver_platdata *ddata; }; struct cqspi_driver_platdata { @@ -334,11 +336,8 @@ static u32 cqspi_get_versal_dma_status(struct cqspi_st *cqspi) static irqreturn_t cqspi_irq_handler(int this_irq, void *dev) { struct cqspi_st *cqspi = dev; + const struct cqspi_driver_platdata *ddata = cqspi->ddata; unsigned int irq_status; - struct device *device = &cqspi->pdev->dev; - const struct cqspi_driver_platdata *ddata; - - ddata = of_device_get_match_data(device); /* Read interrupt status */ irq_status = readl(cqspi->iobase + CQSPI_REG_IRQSTATUS); @@ -1358,16 +1357,13 @@ static ssize_t cqspi_read(struct cqspi_flash_pdata *f_pdata, const struct spi_mem_op *op) { struct cqspi_st *cqspi = f_pdata->cqspi; - struct device *dev = &cqspi->pdev->dev; - const struct cqspi_driver_platdata *ddata; + const struct cqspi_driver_platdata *ddata = cqspi->ddata; loff_t from = op->addr.val; size_t len = op->data.nbytes; u_char *buf = op->data.buf.in; u64 dma_align = (u64)(uintptr_t)buf; int ret; - ddata = of_device_get_match_data(dev); - ret = cqspi_read_setup(f_pdata, op); if (ret) return ret; @@ -1823,7 +1819,8 @@ static int cqspi_probe(struct platform_device *pdev) /* write completion is supported by default */ cqspi->wr_completion = true; - ddata = of_device_get_match_data(dev); + ddata = of_device_get_match_data(dev); + cqspi->ddata = ddata; if (ddata) { if (ddata->quirks & CQSPI_NEEDS_WR_DELAY) cqspi->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, From patchwork Fri Mar 8 17:18:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779279 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AC3133FB97; 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arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="XK3MmF07" Received: by mail.gandi.net (Postfix) with ESMTPSA id 6F831C0009; Fri, 8 Mar 2024 17:18:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918300; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=7yJcTfycgZt7wFIJiCcPAwyIVYEvz5zzBGPjCoMBUvY=; b=XK3MmF07ayuYTAuLQz1JMIpJ2h2S4Tsj+QmEOpAXDFD3vdNJX2lKaBgRDT5irkYH/ROyNn bZzrtQpR2xxjRE1raMAJKFjmCIG7P4Ezx16hCxWccBk0ClsMWlpuMJKGt28JqWGfIgXv8n VRsgiXHPszgCWhG5FgG7UIhxEtPLkbymARmOm2N9otmG1NKWpjA5b1lf2rGCxUUevQzTKp tBnmXNcci+8T+g5YQfcLZLYMH3b/Tk5QtM4F8Tvk6scgEA7UAD8P86LWsLK8aG58X29dqc vwKuq4x+BXUjTSzQkvhWL80xyAkxc0dCOyePlaOeQ5lEt7crvOVgN7o+4aFx1A== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:20 +0100 Subject: [PATCH 05/11] spi: cadence-qspi: add FIFO depth detection quirk Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-5-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Use hardware ability to read the FIFO depth thanks to CQSPI_REG_SRAMPARTITION that is partially read-only. Keep current behavior identical for existing compatibles. Hide feature behind a flag. If unset and detected value is different from the devicetree-provided value, warn. Move probe cqspi->ddata assignment prior to cqspi_of_get_pdata() call. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 38 ++++++++++++++++++++++++++++++++------ 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 02a80745fa6d..d178148788f0 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -42,6 +42,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX); #define CQSPI_NO_SUPPORT_WR_COMPLETION BIT(3) #define CQSPI_SLOW_SRAM BIT(4) #define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5) +#define CQSPI_DETECT_FIFO_DEPTH BIT(6) /* Capabilities */ #define CQSPI_SUPPORTS_OCTAL BIT(0) @@ -1500,13 +1501,15 @@ static int cqspi_of_get_flash_pdata(struct platform_device *pdev, static int cqspi_of_get_pdata(struct cqspi_st *cqspi) { + const struct cqspi_driver_platdata *ddata = cqspi->ddata; struct device *dev = &cqspi->pdev->dev; struct device_node *np = dev->of_node; u32 id[2]; cqspi->is_decoded_cs = of_property_read_bool(np, "cdns,is-decoded-cs"); - if (of_property_read_u32(np, "cdns,fifo-depth", &cqspi->fifo_depth)) { + if (!(ddata && ddata->quirks & CQSPI_DETECT_FIFO_DEPTH) && + of_property_read_u32(np, "cdns,fifo-depth", &cqspi->fifo_depth)) { dev_err(dev, "couldn't determine fifo-depth\n"); return -ENXIO; } @@ -1538,8 +1541,6 @@ static void cqspi_controller_init(struct cqspi_st *cqspi) { u32 reg; - cqspi_controller_enable(cqspi, 0); - /* Configure the remap address register, no remap */ writel(0, cqspi->iobase + CQSPI_REG_REMAP); @@ -1573,8 +1574,29 @@ static void cqspi_controller_init(struct cqspi_st *cqspi) reg |= CQSPI_REG_CONFIG_DMA_MASK; writel(reg, cqspi->iobase + CQSPI_REG_CONFIG); } +} - cqspi_controller_enable(cqspi, 1); +static void cqspi_controller_detect_fifo_depth(struct cqspi_st *cqspi) +{ + const struct cqspi_driver_platdata *ddata = cqspi->ddata; + struct device *dev = &cqspi->pdev->dev; + u32 reg, fifo_depth; + + /* + * Bits N-1:0 are writable while bits 31:N are read as zero, with 2^N + * the FIFO depth. + */ + writel(U32_MAX, cqspi->iobase + CQSPI_REG_SRAMPARTITION); + reg = readl(cqspi->iobase + CQSPI_REG_SRAMPARTITION); + fifo_depth = reg + 1; + + if (ddata && ddata->quirks & CQSPI_DETECT_FIFO_DEPTH) { + cqspi->fifo_depth = fifo_depth; + dev_dbg(dev, "using FIFO depth of %u\n", fifo_depth); + } else if (fifo_depth != cqspi->fifo_depth) { + dev_warn(dev, "detected FIFO depth (%u) different from config (%u)\n", + fifo_depth, cqspi->fifo_depth); + } } static int cqspi_request_mmap_dma(struct cqspi_st *cqspi) @@ -1728,6 +1750,7 @@ static int cqspi_probe(struct platform_device *pdev) cqspi->pdev = pdev; cqspi->host = host; cqspi->is_jh7110 = false; + cqspi->ddata = ddata = of_device_get_match_data(dev); platform_set_drvdata(pdev, cqspi); /* Obtain configuration from OF. */ @@ -1819,8 +1842,6 @@ static int cqspi_probe(struct platform_device *pdev) /* write completion is supported by default */ cqspi->wr_completion = true; - ddata = of_device_get_match_data(dev); - cqspi->ddata = ddata; if (ddata) { if (ddata->quirks & CQSPI_NEEDS_WR_DELAY) cqspi->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, @@ -1862,7 +1883,10 @@ static int cqspi_probe(struct platform_device *pdev) } cqspi_wait_idle(cqspi); + cqspi_controller_enable(cqspi, 0); + cqspi_controller_detect_fifo_depth(cqspi); cqspi_controller_init(cqspi); + cqspi_controller_enable(cqspi, 1); cqspi->current_cs = -1; cqspi->sclk = 0; @@ -1945,7 +1969,9 @@ static int cqspi_runtime_resume(struct device *dev) clk_prepare_enable(cqspi->clk); cqspi_wait_idle(cqspi); + cqspi_controller_enable(cqspi, 0); cqspi_controller_init(cqspi); + cqspi_controller_enable(cqspi, 1); cqspi->current_cs = -1; cqspi->sclk = 0; From patchwork Fri Mar 8 17:18:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779111 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 944C53BBF9; Fri, 8 Mar 2024 17:18:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="EP25NqWk" Received: by mail.gandi.net (Postfix) with ESMTPSA id 0B513C000A; Fri, 8 Mar 2024 17:18:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918301; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=wU600EcnHX7eTl5hRWQKY3CNjHvFq+CeJaAfPTEOFUc=; b=EP25NqWk261JTUwPQQ+pVqeH6Dt0/r21G0RH4ltvXsAu/MAIcSZuNSF0/Ba0Mdb9PSe0kZ 6MCPmZj/a8EE4ReQdaoylpl8Egk6uXTdam9BRxQMKVJI8mRuJECpZ2ZM1EAmLzQGgIpOsN Oxy9gZ14vXmKCNpW/31AkDA0staM3HGH/sqdVFQ8Pqvmv2agyBJSk3pf9OPDUiHA+mxvMD P5ZAHgWLyk72mcLZAHZnaNFkPkJy1rR24TAfyTQzJ2bT6wUUsnanZ7+pFUns/eU771VzXV VyvHdtGRb64AJFXeFqDK0+gE/Guw1vRdaLRN4zvR+aTa/w8ga9yCzNe5xRPCvw== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:21 +0100 Subject: [PATCH 06/11] spi: cadence-qspi: minimise register accesses on each op if !DTR Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-6-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com cqspi_enable_dtr() is called for each operation, commands or not, reads or writes. It writes CQSPI_REG_CONFIG then waits for idle (three successful reads). Skip that in the no-DTR case if DTR is already disabled. It cannot be skipped in the DTR case as cqspi_setup_opcode_ext() writes to a register and we must wait for idle state. According to ftrace, the average cqspi_exec_mem_op() call goes from 85.4µs to 83.6µs when reading 235M over UBIFS on an octal flash. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index d178148788f0..0fc452bab0ee 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -492,8 +492,11 @@ static int cqspi_enable_dtr(struct cqspi_flash_pdata *f_pdata, if (ret) return ret; } else { - reg &= ~CQSPI_REG_CONFIG_DTR_PROTO; - reg &= ~CQSPI_REG_CONFIG_DUAL_OPCODE; + unsigned int mask = CQSPI_REG_CONFIG_DTR_PROTO | CQSPI_REG_CONFIG_DUAL_OPCODE; + /* Shortcut if DTR is already disabled. */ + if ((reg & mask) == 0) + return 0; + reg &= ~mask; } writel(reg, reg_base + CQSPI_REG_CONFIG); From patchwork Fri Mar 8 17:18:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779109 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 416E656473; Fri, 8 Mar 2024 17:18:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918311; cv=none; b=TFnCS+3CGq8yn9weCwgjPhKsJ35xmUABumF6AHw/KbqePi3TN6RdtUVfdC8WMb47zYmm3CDtMBuwsyHQwXdA1KTQpGHAEVuZrhQZbI+chaq6vfOKl0+dbeS7nn8rMkbGIa5b7zzVeo9PxU7GsvzF7BzLp4Rw4tegtt8VPikA9b0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918311; c=relaxed/simple; bh=M9X2TXlu0Zd1vsp9mlncE7tOEu3zaByCOibyclsjtko=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=J+MfcuZb2TNrHqEyEITGRl7uLOTEFEV52KazhsX922TdymSij5soS5HQ+sYIbNfRUzIrPS3RJzgBO1hVmkSZYMlfAYY5dKqxm90AlbAJ8wE2DXddEIErj9i3xfCBtLOpOup5qzz2RyCtywvvEVLTaRoIaocCreI3H4+HbDv3NSI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=Z0eJ2djL; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="Z0eJ2djL" Received: by mail.gandi.net (Postfix) with ESMTPSA id A85F4C000B; Fri, 8 Mar 2024 17:18:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918302; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=6miKRXN1WuQxZt8v8O82Gej5zMYl19Jf0WHTTc8pDtQ=; b=Z0eJ2djL/tGY3KS/eUjK/7fhC3Fz726SexT0tMJ9i1AZAHmQ21UG3Y+8ieG3sDhNIGJyKp umYdWzHGKKU1caWTQTrVq/UvnFrgwHz0ik+9XOLHpoPQX+DovUFY9sqqx9adeKu3VkT8FU jDdUvCosL6DDHdBThi5MzkZcfwJ1pN7qSb9Vfor8I/FPNinHnAhYATTnsj2beNeSv8M8xp LghlihkzDe5ECKXoBpv5MC+aqRmfBT0iTCRQsNKQMSk80gLD5DT9oMTpfY9rnjZGn3eRz9 hN6sLAuRtkbMgdXTFcR84IHDBzhzyOFrs5ET+jF3KylC53gSO9gj+eDo4rOzXA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:22 +0100 Subject: [PATCH 07/11] spi: cadence-qspi: add no-IRQ mode to indirect reads Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-7-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Support reads through polling, without any IRQ. The main reason is performance; profiling shows that the first IRQ comes quickly on our specific hardware. Once this IRQ arrives, we poll until all data is retrieved. Avoid initial sleep to reduce IRQ count. Hide this behavior behind a quirk flag. This is confirmed through micro-benchmarks, but also end-to-end performance tests. Mobileye EyeQ5, octal flash, reading 235M on a UBIFS filesystem: - No optimizations, ~10.34s, ~22.7 MB/s, 199230 IRQs - CQSPI_SLOW_SRAM, ~10.34s, ~22.7 MB/s, 70284 IRQs - CQSPI_RD_NO_IRQ, ~9.37s, ~25.1 MB/s, 521 IRQs Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 0fc452bab0ee..973ea4edbe3a 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -43,6 +43,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX); #define CQSPI_SLOW_SRAM BIT(4) #define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5) #define CQSPI_DETECT_FIFO_DEPTH BIT(6) +#define CQSPI_RD_NO_IRQ BIT(7) /* Capabilities */ #define CQSPI_SUPPORTS_OCTAL BIT(0) @@ -703,6 +704,7 @@ static int cqspi_indirect_read_execute(struct cqspi_flash_pdata *f_pdata, const size_t n_rx) { struct cqspi_st *cqspi = f_pdata->cqspi; + bool use_irq = !(cqspi->ddata && cqspi->ddata->quirks & CQSPI_RD_NO_IRQ); struct device *dev = &cqspi->pdev->dev; void __iomem *reg_base = cqspi->iobase; void __iomem *ahb_base = cqspi->ahb_base; @@ -726,17 +728,20 @@ static int cqspi_indirect_read_execute(struct cqspi_flash_pdata *f_pdata, * all the read interrupts disabled for max performance. */ - if (!cqspi->slow_sram) + if (use_irq && cqspi->slow_sram) + writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); + else if (use_irq) writel(CQSPI_IRQ_MASK_RD, reg_base + CQSPI_REG_IRQMASK); else - writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); + writel(0, reg_base + CQSPI_REG_IRQMASK); reinit_completion(&cqspi->transfer_complete); writel(CQSPI_REG_INDIRECTRD_START_MASK, reg_base + CQSPI_REG_INDIRECTRD); while (remaining > 0) { - if (!wait_for_completion_timeout(&cqspi->transfer_complete, + if (use_irq && + !wait_for_completion_timeout(&cqspi->transfer_complete, msecs_to_jiffies(CQSPI_READ_TIMEOUT_MS))) ret = -ETIMEDOUT; @@ -778,7 +783,7 @@ static int cqspi_indirect_read_execute(struct cqspi_flash_pdata *f_pdata, bytes_to_read = cqspi_get_rd_sram_level(cqspi); } - if (remaining > 0) { + if (use_irq && remaining > 0) { reinit_completion(&cqspi->transfer_complete); if (cqspi->slow_sram) writel(CQSPI_REG_IRQ_WATERMARK, reg_base + CQSPI_REG_IRQMASK); From patchwork Fri Mar 8 17:18:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779108 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 26B7A5787D; Fri, 8 Mar 2024 17:18:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918312; cv=none; b=mwXQfK6DLNhG40G56kjGfC2aTHbopSZSDTQqkUxbiyqR8Jt3ic/fIZA768WS9Bg6L8hbCobILaiDKTPB1twYQCaLMgudGLFBlXUcRgw/9/NiKEEiHckHSFZxkpPH3eK6E1MnmRIZhsPfVH7pAQnIPynORMq5P04IeBxQjGop0YM= ARC-Message-Signature: i=1; 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Fri, 8 Mar 2024 17:18:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918302; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=snXfAL/ISLez0yxPxF8EY5sTF1V0n6/HA3n4V2ckkr0=; b=bfnk+POYQxg+wF6/DDH5TiggB95GchX4TXSML6GfUQFSuHUXWBV/xCQ79HE3sYNqAJV7pF CrpyIWYL0Walp55NFYvO7PwLpew+nsdJ1FmaDHSqmkLZf0rLMb+4dbqeyXqoAZrkSAmfYu SLbCBf82xPFoHd5fho3lq8+ay3N6HMCNvjPZU/xToMQ6kjMVcz0wmITJ5rt9u48TR3YT94 FhX9/urFdFXj2j7sGpSSK9R656SwmZvzbF+1nyqOWCs3kjL2cG2f+vWwLsNp2bMJDvPraZ PWB4KBWVjSYq/TxTp/84BI+V6ZAFXA6DUZzIZ64KYNQptZjjeYM0fYojSqygqA== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:23 +0100 Subject: [PATCH 08/11] spi: cadence-qspi: add early busywait to cqspi_wait_for_bit() Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-8-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com If the CQSPI_BUSYWAIT_EARLY quirk flag is on, call readl_relaxed_poll_timeout() with no sleep at the start of cqspi_wait_for_bit(). If its short timeout expires, a sleeping readl_relaxed_poll_timeout() call takes the relay. Behavior is hidden behind a quirk flag to keep the previous behavior the same on all platforms. The reason is to avoid hrtimer interrupts on the system. All read operations take less than 100µs. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 34 +++++++++++++++++++++++++--------- 1 file changed, 25 insertions(+), 9 deletions(-) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 973ea4edbe3a..2ad9c736f85f 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -44,6 +44,7 @@ static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX); #define CQSPI_NEEDS_APB_AHB_HAZARD_WAR BIT(5) #define CQSPI_DETECT_FIFO_DEPTH BIT(6) #define CQSPI_RD_NO_IRQ BIT(7) +#define CQSPI_BUSYWAIT_EARLY BIT(8) /* Capabilities */ #define CQSPI_SUPPORTS_OCTAL BIT(0) @@ -110,7 +111,7 @@ struct cqspi_st { struct cqspi_driver_platdata { u32 hwcaps_mask; - u8 quirks; + u16 quirks; int (*indirect_read_dma)(struct cqspi_flash_pdata *f_pdata, u_char *rxbuf, loff_t from_addr, size_t n_rx); u32 (*get_dma_status)(struct cqspi_st *cqspi); @@ -121,6 +122,7 @@ struct cqspi_driver_platdata { /* Operation timeout value */ #define CQSPI_TIMEOUT_MS 500 #define CQSPI_READ_TIMEOUT_MS 10 +#define CQSPI_BUSYWAIT_TIMEOUT_US 500 /* Runtime_pm autosuspend delay */ #define CQSPI_AUTOSUSPEND_TIMEOUT 2000 @@ -299,13 +301,27 @@ struct cqspi_driver_platdata { #define CQSPI_REG_VERSAL_DMA_VAL 0x602 -static int cqspi_wait_for_bit(void __iomem *reg, const u32 mask, bool clr) +static int cqspi_wait_for_bit(const struct cqspi_driver_platdata *ddata, + void __iomem *reg, const u32 mask, bool clr, + bool busywait) { + u64 timeout_us = CQSPI_TIMEOUT_MS * USEC_PER_MSEC; u32 val; + if (busywait && ddata && ddata->quirks & CQSPI_BUSYWAIT_EARLY) { + int ret = readl_relaxed_poll_timeout(reg, val, + (((clr ? ~val : val) & mask) == mask), + 0, CQSPI_BUSYWAIT_TIMEOUT_US); + + if (ret != -ETIMEDOUT) + return ret; + + timeout_us -= CQSPI_BUSYWAIT_TIMEOUT_US; + } + return readl_relaxed_poll_timeout(reg, val, (((clr ? ~val : val) & mask) == mask), - 10, CQSPI_TIMEOUT_MS * 1000); + 10, timeout_us); } static bool cqspi_is_idle(struct cqspi_st *cqspi) @@ -435,8 +451,8 @@ static int cqspi_exec_flash_cmd(struct cqspi_st *cqspi, unsigned int reg) writel(reg, reg_base + CQSPI_REG_CMDCTRL); /* Polling for completion. */ - ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_CMDCTRL, - CQSPI_REG_CMDCTRL_INPROGRESS_MASK, 1); + ret = cqspi_wait_for_bit(cqspi->ddata, reg_base + CQSPI_REG_CMDCTRL, + CQSPI_REG_CMDCTRL_INPROGRESS_MASK, 1, true); if (ret) { dev_err(&cqspi->pdev->dev, "Flash command execution timed out.\n"); @@ -791,8 +807,8 @@ static int cqspi_indirect_read_execute(struct cqspi_flash_pdata *f_pdata, } /* Check indirect done status */ - ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_INDIRECTRD, - CQSPI_REG_INDIRECTRD_DONE_MASK, 0); + ret = cqspi_wait_for_bit(cqspi->ddata, reg_base + CQSPI_REG_INDIRECTRD, + CQSPI_REG_INDIRECTRD_DONE_MASK, 0, true); if (ret) { dev_err(dev, "Indirect read completion error (%i)\n", ret); goto failrd; @@ -1092,8 +1108,8 @@ static int cqspi_indirect_write_execute(struct cqspi_flash_pdata *f_pdata, } /* Check indirect done status */ - ret = cqspi_wait_for_bit(reg_base + CQSPI_REG_INDIRECTWR, - CQSPI_REG_INDIRECTWR_DONE_MASK, 0); + ret = cqspi_wait_for_bit(cqspi->ddata, reg_base + CQSPI_REG_INDIRECTWR, + CQSPI_REG_INDIRECTWR_DONE_MASK, 0, false); if (ret) { dev_err(dev, "Indirect write completion error (%i)\n", ret); goto failwr; From patchwork Fri Mar 8 17:18:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779277 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2DD1657884; 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arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="X9aVg9/q" Received: by mail.gandi.net (Postfix) with ESMTPSA id 03FD3C000E; Fri, 8 Mar 2024 17:18:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918303; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=OGb9e89q1LiUktbIoiZeA2KMG4e+G1lEPOW1m5KfN4U=; b=X9aVg9/qhraKN94VDBDlfhLYjXH67Q+YJ6LtY368WNqu1tKWcWUHk/XN7rP75AlNcvAd5h 9zHJPH89XoFQm+gbwb6wNY9n43mUhI2y4BpX4RaSq14SwDWQSfQFCTFPsX6xdOqd62j6Bj VTtBm/3VhnuECzWOnV+Irf1YV9kgF2zWrmjaF7uklybXJBkCTl2vn3X58wOruAprKQfloi 1ShWi8uuDvxE7tcAxyiF/fVxhn4QMZILWZVBvkWtsrFvo9o1FXdqzL80tn+f62xfnUM5xV O8jxlL+j+WbCcjtEULFuKDAeaMF5XPQ/Z5skpk3u+M5VGgwlS3RSKMKWzZeMPg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:24 +0100 Subject: [PATCH 09/11] spi: cadence-qspi: add mobileye,eyeq5-ospi compatible Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-9-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Declare a new mobileye,eyeq5-ospi compatible. Exploit quirk flags: detect FIFO depth through SRAMPARTITION register; avoid IRQs during read operations. Signed-off-by: Théo Lebrun --- drivers/spi/spi-cadence-quadspi.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index 2ad9c736f85f..046388cacc66 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -2060,6 +2060,13 @@ static const struct cqspi_driver_platdata pensando_cdns_qspi = { .quirks = CQSPI_NEEDS_APB_AHB_HAZARD_WAR | CQSPI_DISABLE_DAC_MODE, }; +static const struct cqspi_driver_platdata mobileye_eyeq5_ospi = { + .hwcaps_mask = CQSPI_SUPPORTS_OCTAL, + .quirks = CQSPI_DISABLE_DAC_MODE | CQSPI_NO_SUPPORT_WR_COMPLETION | + CQSPI_DETECT_FIFO_DEPTH | CQSPI_RD_NO_IRQ | + CQSPI_BUSYWAIT_EARLY, +}; + static const struct of_device_id cqspi_dt_ids[] = { { .compatible = "cdns,qspi-nor", @@ -2093,6 +2100,10 @@ static const struct of_device_id cqspi_dt_ids[] = { .compatible = "amd,pensando-elba-qspi", .data = &pensando_cdns_qspi, }, + { + .compatible = "mobileye,eyeq5-ospi", + .data = &mobileye_eyeq5_ospi, + }, { /* end of table */ } }; From patchwork Fri Mar 8 17:18:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779278 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79C05288D7; Fri, 8 Mar 2024 17:18:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918311; cv=none; b=aKQVhljKpZUbc4G7zVNC8E8/ookUmHf+xGUWLYaGjxjE1u5U/BQ6nYL299qcjX4sUwMN6+H1u0+HFRK3sLEAjrbR/5eDLIUt2+wNASyfQL923kSIges00VqL+oAFix4ZFtMYU/hKw+gBFp3sKP4j1S2I4vF4VOnvHe0jYMSqaiw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918311; c=relaxed/simple; bh=vuFml2Tbieyo6tIWPbphQoCJOz5E27f346lkQPXpqDA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=JtnYlOLtrLuPOL9ioUQ4IXr8YXSakUqklXNhBKvplea1dK6U/NY2QMac1lX6XWcFavlpNNFDRTvngAg1QWU0JNPAx+X2J2uFkD9Lv7LO2ddaaOZWjGv0lppGwn2LphEN10ceD3bKkdMzGK7RFw2fkb+iBE81xGdAaYWG+92QuBw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=h3E/C7Di; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="h3E/C7Di" Received: by mail.gandi.net (Postfix) with ESMTPSA id 9507CC000F; Fri, 8 Mar 2024 17:18:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918304; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=/Ysm4DbzpqSZj84XzesirmTyGQsD5pPgqx8ZXriQXW0=; b=h3E/C7DiZv3ayScQSpUCUMbOsEaJi0tFj7x8KaIcN90BYdd9nxpSxiRXZmntS4LSNK4PHq q3SusbJu06VlHM+zNfQ2Z8lAKnPxvqQ4gpeMCU+9e8gP6uU97BSZAXs6laQbbUJm9ykjD5 2e9EYHeCVmfgsWuMQEMuZ+f+FML6HXXAZ0UO33XGtocDMRGDpn/6hKsLkjK4Lw7Ywcqtgh IByWJ3sm6vgvw6O7PdsPE6ZZc8ZkYLBbcZDnIxEgEyWDIqvl2e4Owl/x252G9ihMkFLKuj sGOUCcC3QLuni2IN3IAg1MVSMuFAdkrQUG90ZMvhdDLUWs/gFJ2LfIMJyLTRzQ== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:25 +0100 Subject: [PATCH 10/11] MIPS: mobileye: eyeq5: Add SPI-NOR controller node Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-10-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Add Cadence Quad SPI controller node to EyeQ5 SoC devicetree. Octal is supported. Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5.dtsi b/arch/mips/boot/dts/mobileye/eyeq5.dtsi index 8d4f65ec912d..1543c2b9bcb6 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5.dtsi +++ b/arch/mips/boot/dts/mobileye/eyeq5.dtsi @@ -158,6 +158,21 @@ timer { clocks = <&core0_clk>; }; }; + + ospi: spi@2100000 { + compatible = "mobileye,eyeq5-ospi", "cdns,qspi-nor"; + reg = <0 0x2100000 0x0 0x1000>, + <0 0x10000000 0x0 0x8000000>; + interrupt-parent = <&gic>; + interrupts = ; + clocks = <&clocks EQ5C_DIV_OSPI>; + assigned-clocks = <&clocks EQ5C_DIV_OSPI>; + assigned-clock-rates = <167000000>; + #address-cells = <1>; + #size-cells = <0>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + }; }; }; From patchwork Fri Mar 8 17:18:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Th=C3=A9o_Lebrun?= X-Patchwork-Id: 779110 Received: from relay6-d.mail.gandi.net (relay6-d.mail.gandi.net [217.70.183.198]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 79C415675B; Fri, 8 Mar 2024 17:18:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.70.183.198 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918311; cv=none; b=A/MkfDEod6RTqtWon6age0xLLEKoHn/LJ4LllL6L/NQF3EUNo6u5GWnpIubchcRytE6+XBg9GDYL+94jA2PdA87EYGdeWtujOKdyY1wbzWmgk2ru+WSbZlqvU3gzThvs2FagW8zMstr6lUH45iTbe6eHX5Kz9KbiBPrPU71BjME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1709918311; c=relaxed/simple; bh=F/9Yanst1hBH0HDc3LX9DP2jVFZb4lsc+NgoZKuU+jU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=V8rpViz+b6KERCCgpLGNP9Vouxo/O59cx1xCKc7L0pCUG4gVVdOByhtaK9BIJwN4PjbtI+yWhnDBmWC1qUOVsIinbYrLAc0uIG9CLha5WSJ7xMzSX6c/4M1D9/cdHIBwMtStzZ/OqD2LA+LmCTHN7OC1MEceqdwfujGLe7MLyOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=HSbkESLk; arc=none smtp.client-ip=217.70.183.198 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="HSbkESLk" Received: by mail.gandi.net (Postfix) with ESMTPSA id 3A057C0002; Fri, 8 Mar 2024 17:18:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1709918304; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=0sXwCu/pnKjPhnbG0qZ+rGnft7Ztmr1z9mGamghTqGc=; b=HSbkESLkn/ZN8on+cmLXpGN539iCXlvUuwGXguCM2LbcKcO/Y5s2JZ67Iituk46SZG9Qw4 QGuLotcRogiaYD5/Y233NLrU0EHT9aDZn/hfRv1aWtnIaWRKecjEMyHFXtO8VVKPiecJbU pU23Zx30nQzXgOb3TsFkvg7TxsjXxowjRZnCAWKHDLOyVN90HzkYpnYpISkpptx+YNB1dX 3HibUlZk3vN6yP6CDJLcDilnmuqKLuOC5CUxL+5QsvB9Kl70hp5sRFTMSwhNNP8Uq0FpDm u3fhvMB1+0LvI2RL3SNa+Dcy/IaiIcZqONXlPoyz6BrcV2SjbCiyn1vwmGlVBg== From: =?utf-8?q?Th=C3=A9o_Lebrun?= Date: Fri, 08 Mar 2024 18:18:26 +0100 Subject: [PATCH 11/11] MIPS: mobileye: eyeq5: add octal flash node to eval board DTS Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240308-cdns-qspi-mbly-v1-11-a503856dd205@bootlin.com> References: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> In-Reply-To: <20240308-cdns-qspi-mbly-v1-0-a503856dd205@bootlin.com> To: Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Vaishnav Achath , Thomas Bogendoerfer Cc: linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mips@vger.kernel.org, Vladimir Kondratiev , Gregory CLEMENT , Thomas Petazzoni , Tawfik Bayouk , =?utf-8?q?Th=C3=A9o_Lebrun?= X-Mailer: b4 0.13.0 X-GND-Sasl: theo.lebrun@bootlin.com Add SPI-NOR octal flash node to evaluation board devicetree. Signed-off-by: Théo Lebrun --- arch/mips/boot/dts/mobileye/eyeq5-epm5.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts b/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts index 6898b2d8267d..0e5fee7b680c 100644 --- a/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts +++ b/arch/mips/boot/dts/mobileye/eyeq5-epm5.dts @@ -21,3 +21,18 @@ memory@0 { <0x8 0x02000000 0x0 0x7E000000>; }; }; + +&ospi { + flash0: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; /* chip select */ + + spi-max-frequency = <40000000>; + spi-rx-bus-width = <8>; + cdns,read-delay = <1>; + cdns,tshsl-ns = <400>; + cdns,tsd2d-ns = <400>; + cdns,tchsh-ns = <125>; + cdns,tslch-ns = <50>; + }; +};