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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id q27-20020a63751b000000b005bd980cca56sm7835336pgc.29.2024.03.26.11.12.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 11:12:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@kernel.org Subject: [PATCH v2 1/3] target/hppa: Generate getshadowregs inline Date: Tue, 26 Mar 2024 08:10:26 -1000 Message-Id: <20240326181028.332867-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326181028.332867-1-richard.henderson@linaro.org> References: <20240326181028.332867-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::c31; envelope-from=richard.henderson@linaro.org; helo=mail-oo1-xc31.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This operation is trivial and does not require a helper. Signed-off-by: Richard Henderson Reviewed-by: Helge Deller --- target/hppa/helper.h | 1 - target/hppa/sys_helper.c | 4 ++-- target/hppa/translate.c | 17 +++++++++++++---- 3 files changed, 15 insertions(+), 7 deletions(-) diff --git a/target/hppa/helper.h b/target/hppa/helper.h index 8fd7ba65d8..5900fd70bc 100644 --- a/target/hppa/helper.h +++ b/target/hppa/helper.h @@ -86,7 +86,6 @@ DEF_HELPER_FLAGS_0(read_interval_timer, TCG_CALL_NO_RWG, tl) #ifndef CONFIG_USER_ONLY DEF_HELPER_1(halt, noreturn, env) DEF_HELPER_1(reset, noreturn, env) -DEF_HELPER_1(getshadowregs, void, env) DEF_HELPER_1(rfi, void, env) DEF_HELPER_1(rfi_r, void, env) DEF_HELPER_FLAGS_2(write_interval_timer, TCG_CALL_NO_RWG, void, env, tl) diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 4a31748342..208e51c086 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -95,7 +95,7 @@ void HELPER(rfi)(CPUHPPAState *env) cpu_hppa_put_psw(env, env->cr[CR_IPSW]); } -void HELPER(getshadowregs)(CPUHPPAState *env) +static void getshadowregs(CPUHPPAState *env) { env->gr[1] = env->shadow[0]; env->gr[8] = env->shadow[1]; @@ -108,7 +108,7 @@ void HELPER(getshadowregs)(CPUHPPAState *env) void HELPER(rfi_r)(CPUHPPAState *env) { - helper_getshadowregs(env); + getshadowregs(env); helper_rfi(env); } diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 6da9503f33..29e4a64e40 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2385,14 +2385,23 @@ static bool trans_reset(DisasContext *ctx, arg_reset *a) #endif } -static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a) +static bool do_getshadowregs(DisasContext *ctx) { CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); -#ifndef CONFIG_USER_ONLY nullify_over(ctx); - gen_helper_getshadowregs(tcg_env); + tcg_gen_ld_i64(cpu_gr[1], tcg_env, offsetof(CPUHPPAState, shadow[0])); + tcg_gen_ld_i64(cpu_gr[8], tcg_env, offsetof(CPUHPPAState, shadow[1])); + tcg_gen_ld_i64(cpu_gr[9], tcg_env, offsetof(CPUHPPAState, shadow[2])); + tcg_gen_ld_i64(cpu_gr[16], tcg_env, offsetof(CPUHPPAState, shadow[3])); + tcg_gen_ld_i64(cpu_gr[17], tcg_env, offsetof(CPUHPPAState, shadow[4])); + tcg_gen_ld_i64(cpu_gr[24], tcg_env, offsetof(CPUHPPAState, shadow[5])); + tcg_gen_ld_i64(cpu_gr[25], tcg_env, offsetof(CPUHPPAState, shadow[6])); return nullify_end(ctx); -#endif +} + +static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a) +{ + return do_getshadowregs(ctx); } static bool trans_nop_addrx(DisasContext *ctx, arg_ldst *a) From patchwork Tue Mar 26 18:10:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 782632 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp1822855wrt; Tue, 26 Mar 2024 11:13:26 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUiwKETo/E8QzfWJ/I4TUMtX+BebhSjrtgnAqTvW2iz01UYc+otvtyJiOr5Quf57c5CUcBKU3Sh8rMT2S4a2YY6 X-Google-Smtp-Source: AGHT+IHccR3FOF+HDm7naJNXFGD2WHBqPJNbzQ8BhY8JPpchep+HAkdPgCNnCjYPH/oGCyG91kd0 X-Received: by 2002:a67:f488:0:b0:478:2d45:d8c5 with SMTP id o8-20020a67f488000000b004782d45d8c5mr1745209vsn.9.1711476805785; Tue, 26 Mar 2024 11:13:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711476805; cv=none; d=google.com; s=arc-20160816; b=Q/3Yh18ZtqUHA8SjdV6mvwTDcSS4chUHkFswLydJw781mcStHMfsjUNyDw67YvcOj8 QPnuorgbSo53wNopDHOITXTpEdMEba7LjFV0/jWhtBF/vH2MSa3+YIXaw192OGvN/zsr znvAoDwQ0oC2iV28MQRjIKdMtiOifY+aKP2lUtF1E+V9rrnjXt7sn7KoFeZktLyicbtr 8EShP0Ks99+5RaWjJFGYMdWv2VW/yPH7t6FC7AQFFjfVrOGLPWQ3u6KhLcKW5RXIERut D38YKV8KxF3s95swbECB1OdmsDdoPkMURlDd0EdRpq3/Sq1814yaKU13tVLfa9wVZ4HV 5uxA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=I8a9WjWDrqxriphQGGBwyT2pmHKUNZR60B8CaaxBya8=; fh=eDs4yGdh/m73pIvaaKbumdYxma+0IB6W8R6W3ALjVcE=; b=Li3Xpwc/szEYACjalp4Ug5uvIb5idc7/gPXR9lyFrrhP+1DyyTTVfa7d7koaXzGN0F IRhzHDNEUsspqDQCqmX8uNxJZe8bqMyXkWcSPeqBFY6+JQ691W4GkhxCIghXN7+s0b5Z H8l1IT/hoKVSWY2Qvcy+gMVHXGrNjS1q6qOSJnxuogT4Xn6zduU0lXJ2sGT53BKyM4gc z+hmmfHJA5A/bZubfFzoSiQHcwhzIn2MwBnVkOvv8fFPWJ9o0kqziOpRTajblqfI7Vwo biP8sCy7LW25W+cf2sPwy0S/AKUIri+Xfa7RaqcCTnr2457PpVb1OfeeJ/VanLqGcNA2 0fUw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WVt4jykC; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id q27-20020a63751b000000b005bd980cca56sm7835336pgc.29.2024.03.26.11.12.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 11:12:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@kernel.org Subject: [PATCH v2 2/3] target/hppa: Move diag argument handling to decodetree Date: Tue, 26 Mar 2024 08:10:27 -1000 Message-Id: <20240326181028.332867-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326181028.332867-1-richard.henderson@linaro.org> References: <20240326181028.332867-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Split trans_diag into per-operation functions. Signed-off-by: Richard Henderson Reviewed-by: Helge Deller --- target/hppa/insns.decode | 8 +++++++- target/hppa/translate.c | 34 +++++++++++++++++++++------------- 2 files changed, 28 insertions(+), 14 deletions(-) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 6a74cf23cd..9f6ffd8e2c 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -634,4 +634,10 @@ fdiv_d 001110 ..... ..... 011 ..... ... ..... @f0e_d_3 xmpyu 001110 ..... ..... 010 .0111 .00 t:5 r1=%ra64 r2=%rb64 # diag -diag 000101 i:26 +{ + [ + diag_btlb 000101 00 0000 0000 0000 0001 0000 0000 + diag_cout 000101 00 0000 0000 0000 0001 0000 0001 + ] + diag_unimp 000101 i:26 +} diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 29e4a64e40..42dd3f2c8d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -4572,23 +4572,31 @@ static bool trans_fmpyfadd_d(DisasContext *ctx, arg_fmpyfadd_d *a) return nullify_end(ctx); } -static bool trans_diag(DisasContext *ctx, arg_diag *a) +/* Emulate PDC BTLB, called by SeaBIOS-hppa */ +static bool trans_diag_btlb(DisasContext *ctx, arg_diag_btlb *a) { CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); #ifndef CONFIG_USER_ONLY - if (a->i == 0x100) { - /* emulate PDC BTLB, called by SeaBIOS-hppa */ - nullify_over(ctx); - gen_helper_diag_btlb(tcg_env); - return nullify_end(ctx); - } - if (a->i == 0x101) { - /* print char in %r26 to first serial console, used by SeaBIOS-hppa */ - nullify_over(ctx); - gen_helper_diag_console_output(tcg_env); - return nullify_end(ctx); - } + nullify_over(ctx); + gen_helper_diag_btlb(tcg_env); + return nullify_end(ctx); #endif +} + +/* Print char in %r26 to first serial console, used by SeaBIOS-hppa */ +static bool trans_diag_cout(DisasContext *ctx, arg_diag_cout *a) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); +#ifndef CONFIG_USER_ONLY + nullify_over(ctx); + gen_helper_diag_console_output(tcg_env); + return nullify_end(ctx); +#endif +} + +static bool trans_diag_unimp(DisasContext *ctx, arg_diag_unimp *a) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); qemu_log_mask(LOG_UNIMP, "DIAG opcode 0x%04x ignored\n", a->i); return true; } From patchwork Tue Mar 26 18:10:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 782633 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:b0:33e:7753:30bd with SMTP id p1csp1823072wrt; Tue, 26 Mar 2024 11:13:57 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVbaseJ26YWqGL7Y2m6ceyGYfdocYyTRJP+qdKtGZORjmnNalGoI0KZzUvC4XigthR8CeUaqrOPy8HiCdIGsPty X-Google-Smtp-Source: AGHT+IE1UQ+w5DzbnBEoxSbBdkSQiGjncJ5i68DAlkGBsnC7auxhQXE13cS1LmOOKxS6QowFWKsp X-Received: by 2002:a05:6102:3e8c:b0:476:e72e:2236 with SMTP id m12-20020a0561023e8c00b00476e72e2236mr8094439vsv.12.1711476837519; Tue, 26 Mar 2024 11:13:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1711476837; cv=none; d=google.com; s=arc-20160816; b=RAVZoF+hO8vRaUiqS/rJrIyHgfJfJbX9KhyvfnsWPMt5AtUTdTzLKqeaBHEPzBIvik UoJz9yPmmaOagMzXuUAavescqaAwVPqg5g3pSJaHomS5MjKsY0+gaDsSQ8yDpe+HMA/O tj7RuzDEkU5boDGwlHzsw512x+X/AUN8fCBtqdU4863l4J6e6R/9aDTMDD6INCHuUrOe rc1gFtoxfqw070g90q8XS5SIS1f49RC+0n5OfmWT5qSqQEU5+UXYhTfF/AsqXnMqyDwG BL4RiPqKtclGUU5v53ruJzywkNvGHfJ38xE9ihHS4+oP8sH9SSx6jGP3Gbp02kwiOqYO YWqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=m1ZbZybHY9lhm5Q1WYSajtVJ/Bd2oVTk+eDSnSXGvRY=; fh=YI/QY2HyxQFQRiISZkpZFrjEn9G5f7qiOyjDMr3RXJU=; b=H9cspH8WEcFSzBFkQ0dnaDV46H4RzUv4G/JOy6Hedh+pPiKMGK3dSkJP01+3Sbm4XY Qgxsu7VsFbTELpsBERgxRr1AH3YlNLoHmRIVFR8mKOIVmPEXpn7xxYa9EbZWDAE9fJUA esMnU2eyVVl+2u+w1LwPf+pjdvHcaOGWOQSXFbX0UuCSdDCgDFePs9/Lgo49trzSiDB3 RGcTpc88W/jxQmhyGcc7yG7Jj9xFtFNscPsAM1ze8k4O8JAnCeMAWvyceFCofEX7+RPW iUQ6FdAzuWdY4UktHwbiLM1t8HLZL+nHt6OpMIyoz3+1qcvuToHojzZI9+iDYI4DdVuH Mi8Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=htfheGND; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id q27-20020a63751b000000b005bd980cca56sm7835336pgc.29.2024.03.26.11.12.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 11:12:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: deller@kernel.org, Helge Deller Subject: [PATCH v2 3/3] target/hppa: Fix diag instructions to set/restore shadow registers Date: Tue, 26 Mar 2024 08:10:28 -1000 Message-Id: <20240326181028.332867-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240326181028.332867-1-richard.henderson@linaro.org> References: <20240326181028.332867-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The 32-bit 7300LC CPU and the 64-bit PCX-W 8500 CPU use different diag instructions to save or restore the CPU registers to/from the shadow registers. Implement those per-CPU architecture diag instructions to fix those parts of the HP ODE testcases (L2DIAG and WDIAG, section 1) which test the shadow registers. Signed-off-by: Helge Deller [rth: Use decodetree to distinguish cases] Signed-off-by: Richard Henderson Reviewed-by: Helge Deller Tested-by: Helge Deller --- target/hppa/insns.decode | 10 ++++++++++ target/hppa/translate.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 44 insertions(+) diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index 9f6ffd8e2c..c2acb3796c 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -65,6 +65,8 @@ # Argument set definitions #### +&empty + # All insns that need to form a virtual address should use this set. &ldst t b x disp sp m scale size @@ -638,6 +640,14 @@ xmpyu 001110 ..... ..... 010 .0111 .00 t:5 r1=%ra64 r2=%rb64 [ diag_btlb 000101 00 0000 0000 0000 0001 0000 0000 diag_cout 000101 00 0000 0000 0000 0001 0000 0001 + + # For 32-bit 7300C + diag_getshadowregs_pa1 000101 00 0000 0000 0001 1010 0000 0000 + diag_putshadowregs_pa1 000101 00 0000 0000 0001 1010 0100 0000 + + # For 64-bit PCX-W 8500 + diag_getshadowregs_pa2 000101 00 0111 1000 0001 1000 0100 0000 + diag_putshadowregs_pa2 000101 00 0111 0000 0001 1000 0100 0000 ] diag_unimp 000101 i:26 } diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 42dd3f2c8d..143818c2d9 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -2399,6 +2399,20 @@ static bool do_getshadowregs(DisasContext *ctx) return nullify_end(ctx); } +static bool do_putshadowregs(DisasContext *ctx) +{ + CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR); + nullify_over(ctx); + tcg_gen_st_i64(cpu_gr[1], tcg_env, offsetof(CPUHPPAState, shadow[0])); + tcg_gen_st_i64(cpu_gr[8], tcg_env, offsetof(CPUHPPAState, shadow[1])); + tcg_gen_st_i64(cpu_gr[9], tcg_env, offsetof(CPUHPPAState, shadow[2])); + tcg_gen_st_i64(cpu_gr[16], tcg_env, offsetof(CPUHPPAState, shadow[3])); + tcg_gen_st_i64(cpu_gr[17], tcg_env, offsetof(CPUHPPAState, shadow[4])); + tcg_gen_st_i64(cpu_gr[24], tcg_env, offsetof(CPUHPPAState, shadow[5])); + tcg_gen_st_i64(cpu_gr[25], tcg_env, offsetof(CPUHPPAState, shadow[6])); + return nullify_end(ctx); +} + static bool trans_getshadowregs(DisasContext *ctx, arg_getshadowregs *a) { return do_getshadowregs(ctx); @@ -4594,6 +4608,26 @@ static bool trans_diag_cout(DisasContext *ctx, arg_diag_cout *a) #endif } +static bool trans_diag_getshadowregs_pa1(DisasContext *ctx, arg_empty *a) +{ + return !ctx->is_pa20 && do_getshadowregs(ctx); +} + +static bool trans_diag_getshadowregs_pa2(DisasContext *ctx, arg_empty *a) +{ + return ctx->is_pa20 && do_getshadowregs(ctx); +} + +static bool trans_diag_putshadowregs_pa1(DisasContext *ctx, arg_empty *a) +{ + return !ctx->is_pa20 && do_putshadowregs(ctx); +} + +static bool trans_diag_putshadowregs_pa2(DisasContext *ctx, arg_empty *a) +{ + return ctx->is_pa20 && do_putshadowregs(ctx); +} + static bool trans_diag_unimp(DisasContext *ctx, arg_diag_unimp *a) { CHECK_MOST_PRIVILEGED(EXCP_PRIV_OPR);