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Tue, 26 Mar 2024 13:02:58 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a21-20020ac25e75000000b00515a7984acbsm1279408lfr.94.2024.03.26.13.02.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 13:02:57 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 26 Mar 2024 22:02:54 +0200 Subject: [PATCH 1/4] dt-bindings: display/msm: sm8150-mdss: add DP node Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-fd-fix-schema-v1-1-4475d6d6d633@linaro.org> References: <20240326-fd-fix-schema-v1-0-4475d6d6d633@linaro.org> In-Reply-To: <20240326-fd-fix-schema-v1-0-4475d6d6d633@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; 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Signed-off-by: Dmitry Baryshkov --- .../devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml index c0d6a4fdff97..40b077fb20aa 100644 --- a/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml +++ b/Documentation/devicetree/bindings/display/msm/qcom,sm8150-mdss.yaml @@ -53,6 +53,16 @@ patternProperties: compatible: const: qcom,sm8150-dpu + "^displayport-controller@[0-9a-f]+$": + type: object + additionalProperties: true + + properties: + compatible: + items: + - const: qcom,sm8150-dp + - const: qcom,sm8350-dp + "^dsi@[0-9a-f]+$": type: object additionalProperties: true From patchwork Tue Mar 26 20:02:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 782717 Received: from mail-lf1-f48.google.com (mail-lf1-f48.google.com [209.85.167.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C610A13D282 for ; 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Tue, 26 Mar 2024 13:02:58 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a21-20020ac25e75000000b00515a7984acbsm1279408lfr.94.2024.03.26.13.02.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 13:02:58 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 26 Mar 2024 22:02:55 +0200 Subject: [PATCH 2/4] arm64: dts: qcom: sc8180x: drop legacy property #stream-id-cells Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-fd-fix-schema-v1-2-4475d6d6d633@linaro.org> References: <20240326-fd-fix-schema-v1-0-4475d6d6d633@linaro.org> In-Reply-To: <20240326-fd-fix-schema-v1-0-4475d6d6d633@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=807; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=mipBzLhXme/edDDsNRRaHmAV/zjI88iNQMd61g5M1kU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmAynwFhh1lFYNnond85T2qTb0Mep8Q73XymkXQ gV4iWTJAcmJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgMp8AAKCRCLPIo+Aiko 1c1EB/4h0zbDexyWBuye/7gFeqTI7lC4DyOCh8JX4d99zRLI5FyIZZmeYbOnM3At10e4qla2bRr BjiltyGGkqqifqM2h0TMlP6nytjAfhbroyTK9ZjybLQjGT9IZwxJ7AwgDMBPSeQ6HH6lBr6UIdO 5ORkv3Hk0EsJkloEAOltynaRpbKsFiyI1Km/HUO7LCm6oPLY0HgtxIKLUgmgrADJPtBWl1pVVm1 zTce9RX46VDTtwkGb0wrRVhtlxyym6KS7D+YtiIypcau+WoaEYmkuGN2NkBSHhQLZLJ/tXQ1GAc +h21wEYiNjMwj7iI1erW/1utMC8uXNfDl6cqzSdIgoXmPLOz X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The property #stream-id-cells is legacy, it is not documented as valid for the GPU. Drop it now. Fixes: 494dec9b6f54 ("arm64: dts: qcom: sc8180x: Add display and gpu nodes") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 32afc78d5b76..99462b42cfc5 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2225,7 +2225,6 @@ tcsr_mutex: hwlock@1f40000 { gpu: gpu@2c00000 { compatible = "qcom,adreno-680.1", "qcom,adreno"; - #stream-id-cells = <16>; reg = <0 0x02c00000 0 0x40000>; reg-names = "kgsl_3d0_reg_memory"; From patchwork Tue Mar 26 20:02:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 783247 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 654C813D28F for ; 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Tue, 26 Mar 2024 13:02:59 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id a21-20020ac25e75000000b00515a7984acbsm1279408lfr.94.2024.03.26.13.02.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Mar 2024 13:02:59 -0700 (PDT) From: Dmitry Baryshkov Date: Tue, 26 Mar 2024 22:02:56 +0200 Subject: [PATCH 3/4] arm64: dts: qcom: sc8180x: Drop flags for mdss irqs Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <20240326-fd-fix-schema-v1-3-4475d6d6d633@linaro.org> References: <20240326-fd-fix-schema-v1-0-4475d6d6d633@linaro.org> In-Reply-To: <20240326-fd-fix-schema-v1-0-4475d6d6d633@linaro.org> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio , Vinod Koul Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1495; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=yPu9lShLWjrX8FbgY01q1INaNP1kyI/7w03v1seDbHM=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmAynwe9CmGRZkwUdeLtPrCLeXExmbk+bZLq4La z66Qg/tqIuJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgMp8AAKCRCLPIo+Aiko 1XrkB/sH0dT8EtUmpApTgR+HX6qHLfd7G0JD71J2R4pl7Kpsg0b4hOMmi/48dmN7ygHKFmDKh5e GHIDSrgYnIobPMo6TD0HKqWGlENnS9o1ThGurh7exjswsOQhPXhIlHZ9D8sZ+VeYCCz/jdTfvOk 4nN3Ds9/Tyn+gj7NBv0P70wF2rAhwaPr5oIgTYTwMx0j4ABB+4p9NbgSnPibOP+ZKonNn1GJBWN SDpfF+cr0UAamSQo+YUAA1i2G6FFDCpOZt9VQ9d0FREfLrlOF6CdiKFCD4PHbgHZHzNdRGrRsDn jfOm779ppXBzdGhViV22N5jdjrfF9LzSVmyYlgHPd92Zc2wZ X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A The number of interrupt cells for the mdss interrupt controller is 1, meaning there should only be one cell for the interrupt number, not two. Drop the second cell containing (unused) irq flags. Fixes: 494dec9b6f54 ("arm64: dts: qcom: sc8180x: Add display and gpu nodes") Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 99462b42cfc5..6d74867d3b61 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -2804,7 +2804,7 @@ mdss_mdp: mdp@ae01000 { power-domains = <&rpmhpd SC8180X_MMCX>; interrupt-parent = <&mdss>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <0>; ports { #address-cells = <1>; @@ -2877,7 +2877,7 @@ mdss_dsi0: dsi@ae94000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <4 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <4>; clocks = <&dispcc DISP_CC_MDSS_BYTE0_CLK>, <&dispcc DISP_CC_MDSS_BYTE0_INTF_CLK>, @@ -2963,7 +2963,7 @@ mdss_dsi1: dsi@ae96000 { reg-names = "dsi_ctrl"; interrupt-parent = <&mdss>; - interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; 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a=openpgp-sha256; l=1307; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=M5PDgsfLVIKABExlt6TlS2fGlnl3XAgxVoXclxwHIH8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmAynwQqmWzf2igSonGtm/LlpImWQsxvrhjNxo5 oGaj+uthFeJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZgMp8AAKCRCLPIo+Aiko 1Vk1CACOjyNVYW+tkP4qhqZ5fM6vXzj0fu29rVIteeUM6ExFg05XKzDZeZiVsZtlxlkAYZkbSe6 UGxOEw4joPudBSyWwxGQ/21v9JVEg9SbarVapzr3Hvb4HOzJhxpZgtLXGkN5FyQA71kwIJHygUC zUIOa2G5/f/AIv8Opw2vopG+QTcOif9NLN+ox3ylKEoW5jMYSSgH9hTMxQlGLR7gXIi27yAcfvJ EfqMOHiQt6eyh+tRYEMBUFT19EZujmFrXEmBvzLuSgbKa1XS+4VwFVdo21uGibXTtf3UBXTiTbd PL/HJj6VAkggCbKRmrLAR4DbHt0Fo3lHUn2lX28rPZjYM/8x X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A DisplayPort nodes must declare the dp_p1 register space in addition to dp_p0. Add corresponding resource to DisplayPort DT nodes. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qcom/sc8180x.dtsi index 6d74867d3b61..019104bd70fb 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -3029,7 +3029,8 @@ mdss_dp0: displayport-controller@ae90000 { reg = <0 0xae90000 0 0x200>, <0 0xae90200 0 0x200>, <0 0xae90400 0 0x600>, - <0 0xae90a00 0 0x400>; + <0 0xae90a00 0 0x400>, + <0 0xae91000 0 0x400>; interrupt-parent = <&mdss>; interrupts = <12>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>, @@ -3105,7 +3106,8 @@ mdss_dp1: displayport-controller@ae98000 { reg = <0 0xae98000 0 0x200>, <0 0xae98200 0 0x200>, <0 0xae98400 0 0x600>, - <0 0xae98a00 0 0x400>; + <0 0xae98a00 0 0x400>, + <0 0xae99000 0 0x400>; interrupt-parent = <&mdss>; interrupts = <13>; clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,