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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.32 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:33 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 01/35] tcg/optimize: Do not attempt to constant fold neg_vec Date: Mon, 8 Apr 2024 07:48:55 -1000 Message-Id: <20240408174929.862917-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::634; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Split out the tail of fold_neg to fold_neg_no_const so that we can avoid attempting to constant fold vector negate. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2150 Signed-off-by: Richard Henderson --- tcg/optimize.c | 17 ++++++++--------- tests/tcg/aarch64/test-2150.c | 12 ++++++++++++ tests/tcg/aarch64/Makefile.target | 2 +- 3 files changed, 21 insertions(+), 10 deletions(-) create mode 100644 tests/tcg/aarch64/test-2150.c diff --git a/tcg/optimize.c b/tcg/optimize.c index 275db77b42..2e9e5725a9 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1990,16 +1990,10 @@ static bool fold_nand(OptContext *ctx, TCGOp *op) return false; } -static bool fold_neg(OptContext *ctx, TCGOp *op) +static bool fold_neg_no_const(OptContext *ctx, TCGOp *op) { - uint64_t z_mask; - - if (fold_const1(ctx, op)) { - return true; - } - /* Set to 1 all bits to the left of the rightmost. */ - z_mask = arg_info(op->args[1])->z_mask; + uint64_t z_mask = arg_info(op->args[1])->z_mask; ctx->z_mask = -(z_mask & -z_mask); /* @@ -2010,6 +2004,11 @@ static bool fold_neg(OptContext *ctx, TCGOp *op) return true; } +static bool fold_neg(OptContext *ctx, TCGOp *op) +{ + return fold_const1(ctx, op) || fold_neg_no_const(ctx, op); +} + static bool fold_nor(OptContext *ctx, TCGOp *op) { if (fold_const2_commutative(ctx, op) || @@ -2418,7 +2417,7 @@ static bool fold_sub_to_neg(OptContext *ctx, TCGOp *op) if (have_neg) { op->opc = neg_op; op->args[1] = op->args[2]; - return fold_neg(ctx, op); + return fold_neg_no_const(ctx, op); } return false; } diff --git a/tests/tcg/aarch64/test-2150.c b/tests/tcg/aarch64/test-2150.c new file mode 100644 index 0000000000..fb86c11958 --- /dev/null +++ b/tests/tcg/aarch64/test-2150.c @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* See https://gitlab.com/qemu-project/qemu/-/issues/2150 */ + +int main() +{ + asm volatile( + "movi v6.4s, #1\n" + "movi v7.4s, #0\n" + "sub v6.2d, v7.2d, v6.2d\n" + : : : "v6", "v7"); + return 0; +} diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 0efd565f05..70d728ae9a 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -10,7 +10,7 @@ VPATH += $(AARCH64_SRC) # Base architecture tests AARCH64_TESTS=fcvt pcalign-a64 lse2-fault -AARCH64_TESTS += test-2248 +AARCH64_TESTS += test-2248 test-2150 fcvt: LDFLAGS+=-lm From patchwork Mon Apr 8 17:48:56 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786937 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp383wrs; Mon, 8 Apr 2024 10:51:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWQx48lroyHC3lT4zxyu/9WBcpMQk+wCGZO9bq6r3pqKhNbIuObfrWy2JMcpVHUJ1KSTFOx8VpL0GgvS1/U5GVs X-Google-Smtp-Source: AGHT+IEGSnpPmy3RdT1SGTnxnRQ7/eocl13/CpEsXVs29dOAapdRE1wq6Ue6ey6APvUhK5Las/DW X-Received: by 2002:a5b:d4c:0:b0:dc7:5018:4022 with SMTP id f12-20020a5b0d4c000000b00dc750184022mr8563927ybr.44.1712598712579; Mon, 08 Apr 2024 10:51:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598712; cv=none; d=google.com; s=arc-20160816; b=HWknWSes/yXTnAzJUYosx9eOINAcbXbFvDAn+GfHRc9a6XpsFvfKHJ+dLq12HwPZwo e5FeLuu/EtF50PMjEixyRagfiPyd0lJZ/OR5Zvdzz7U31iHYlaLVr6wZ4ZbPIcAOeDQb BrFbHdDlKM07sxTo8jSxeewX4nu4vgizweEwcoGu7gYCYwjkMMLY4azP+fhN2QxX65ib uayrtEp0PLVqicdgymBclA/S8SZY+w5aXfYxA0jTTxWqYa+Hd60IClIdo3malJ0EiyV3 pQ9pG21/En4HNRKnJaw/blbwZXTihheYpbzFDUEqtz5koz5HET1YeKkvouJnpym5hvnm 49lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=xtbJ/p7JEFHTppWK8T4w7KJEZi+x0bHxbuO/ApHynWI=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=mkMp+NV4hPkobH3tS6yYWZ1337IpZLLe5ziyonRb3ZICVOmqPoPECqBqId2ZBi+PP9 jEfEdba8Jy9qVMfRcbNGI/bEiPyNkKcmRPgMniQxF89fwh8r9PZ4ZR7FmFvx3TuLYk/v IXpIdCBCNKAk9eiOcnc3WkgDK2ZNZhsWxo/jVZb89gEGDx//1sRzoe5mw+DHegyQhHlm ETQ3woCZozmGeTGXGKy6cCHeSIKjoYj2DT0Mx0Hok4eBv646+ayNZCA3iZsd7SlGKF59 xnqabTUvbnD2YW/94OZthea9RAJVULCUt0/RKe8PVmtF+x684DbIPRUMstp9uxlyKErm K8fg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=zZ6zZYb2; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.33 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:34 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 02/35] linux-user: Fix waitid return of siginfo_t and rusage Date: Mon, 8 Apr 2024 07:48:56 -1000 Message-Id: <20240408174929.862917-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The copy back to siginfo_t should be conditional only on arg3, not the specific values that might have been written. The copy back to rusage was missing entirely. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2262 Signed-off-by: Richard Henderson --- linux-user/syscall.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index e12d969c2e..3df2b94d9a 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -9272,14 +9272,24 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1, #ifdef TARGET_NR_waitid case TARGET_NR_waitid: { + struct rusage ru; siginfo_t info; - info.si_pid = 0; - ret = get_errno(safe_waitid(arg1, arg2, &info, arg4, NULL)); - if (!is_error(ret) && arg3 && info.si_pid != 0) { - if (!(p = lock_user(VERIFY_WRITE, arg3, sizeof(target_siginfo_t), 0))) + + ret = get_errno(safe_waitid(arg1, arg2, (arg3 ? &info : NULL), + arg4, (arg5 ? &ru : NULL))); + if (!is_error(ret)) { + if (arg3) { + p = lock_user(VERIFY_WRITE, arg3, + sizeof(target_siginfo_t), 0); + if (!p) { + return -TARGET_EFAULT; + } + host_to_target_siginfo(p, &info); + unlock_user(p, arg3, sizeof(target_siginfo_t)); + } + if (arg5 && host_to_target_rusage(arg5, &ru)) { return -TARGET_EFAULT; - host_to_target_siginfo(p, &info); - unlock_user(p, arg3, sizeof(target_siginfo_t)); + } } } return ret; From patchwork Mon Apr 8 17:48:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786959 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2779wrs; Mon, 8 Apr 2024 10:58:46 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVWoyFINy+4bcgGvQY0kSqxyP0YQyvUrwfaxLRmqIm2gJPGgTjYPtn4ZpTzbQb++sIMC8JBZQ575HVC1jmk8AHE X-Google-Smtp-Source: AGHT+IHuDYI9OyGtHIovkIfUgpoU3kqtmCXFDwikoT9yzDJt169ZjxdgAdeZi+JaZXws7A39zljB X-Received: by 2002:a05:6808:1209:b0:3c5:f38f:84ed with SMTP id a9-20020a056808120900b003c5f38f84edmr4619553oil.28.1712599126275; Mon, 08 Apr 2024 10:58:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712599126; cv=none; d=google.com; s=arc-20160816; b=vHLaZF5ML9tCk8ubVglUk70HHUX91NpugCl77E4aksVz971yI4TfSwRHDxTsY6xUzV Za/3cBwDpQQ60p5v73Suj5CdFHlCb4Wp6WIR/Abeerqk4ooTXx608MM3YLO2Xfoxxl4K vWBCK3oyVBDkp3uVy3R1QWC1ParDaDoa7/57qxJOrzneR9/rdaYdwU7LVmdhT/zEthen A77ducUadH2BFOG490FHpDhXcSFv82G1IzRCc9K+D5qawNu6QoV7wc0IBX3oDhVTYUXG Vu3qENMxkrFwnMluSBMLw4wY1I5a0Oos5+wmfE/PKy53IW1kf7TVguz8F+oeIGRgdynj pWWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=eljbs2yNGMGPnWHJwv7NSq5kkRuO1URzZsDZcIZtS6U=; fh=TF63Ze67lDnVlkd8xmxXNff2WGh+3exboZvnQbD94Yg=; b=p7Dbvg/a+slJ+GTZiPS+lO2SqXxotgIDlODXYX4wXXzr8liOiLyHt1rmxFfosGrLPy 89XIYD4K3ziR34Xl61LJR1SxQHXXoxVHhTCqkYKVs3NbFR34T/ydbv3cb8wk9bNVzpcD TxbxM07Z2YZhX3O1BqXZDbYVV/JklujCRSFzLrjIRQhGSHX+sos07ir4Jrg2QShngKgl 2Yat23q2rBRrLJ2+gaG5Hx0YGPq/9pxm6wuPMzo0i9qx1fNGk5R21KrY7LwR/XpNIGBD 5Yitx9BX9aW0r4Zry9s0Nd4BRjFWU3AfWQZ5orkfBB5eMbbg2MoeGM/OwO8Jr8t/YMf7 7L6Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=M8XoFFgl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:35 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PULL 03/35] linux-user: do_setsockopt: fix SOL_ALG.ALG_SET_KEY Date: Mon, 8 Apr 2024 07:48:57 -1000 Message-Id: <20240408174929.862917-4-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::436; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x436.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Michael Tokarev This setsockopt accepts zero-lengh optlen (current qemu implementation does not allow this). Also, there's no need to make a copy of the key, it is enough to use lock_user() (which accepts zero length already). Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2197 Fixes: f31dddd2fc "linux-user: Add support for setsockopt() option SOL_ALG" Signed-off-by: Michael Tokarev Message-Id: <20240331100737.2724186-2-mjt@tls.msk.ru> Signed-off-by: Richard Henderson --- linux-user/syscall.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 3df2b94d9a..59fb3e911f 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -2277,18 +2277,13 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, switch (optname) { case ALG_SET_KEY: { - char *alg_key = g_malloc(optlen); - + char *alg_key = lock_user(VERIFY_READ, optval_addr, optlen, 1); if (!alg_key) { - return -TARGET_ENOMEM; - } - if (copy_from_user(alg_key, optval_addr, optlen)) { - g_free(alg_key); return -TARGET_EFAULT; } ret = get_errno(setsockopt(sockfd, level, optname, alg_key, optlen)); - g_free(alg_key); + unlock_user(alg_key, optval_addr, optlen); break; } case ALG_SET_AEAD_AUTHSIZE: From patchwork Mon Apr 8 17:48:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786953 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2604wrs; Mon, 8 Apr 2024 10:58:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUxuJIGn7c9Wex1NwuwyFFB9ummiZPzCHOdd//1IyGZ/PfWeYorcGjbSsDZ0T3CgJ3CWWhKo5mD/wLe6/Ft4cWa X-Google-Smtp-Source: AGHT+IHPo8yU6PoMaWGPvvjYPeq7F0cYlLmyN+tvYzDY/Myy41GwGYYQnTsFftSBFp51oa4HGhmU X-Received: by 2002:a05:6808:2a43:b0:3c5:fa38:c651 with SMTP id fa3-20020a0568082a4300b003c5fa38c651mr1586262oib.18.1712599088962; Mon, 08 Apr 2024 10:58:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712599088; cv=none; d=google.com; s=arc-20160816; b=kXWq3QHtdtV7HCuWC7qhAbANYgCcEQ/h/3dmjjltSa1+FBSLuGx0vzyCKCE73OLX+/ WVUQ6odpCIB/G+/q14TuWhOSin+ocpqv0XqCH1YPXF9w01Kk2PkS+g1ifEt9vaisYlJY wyot9GxzAn8oDCXeedrMUvZyqoYjV1HL0N5ahj7T65RBCPHfhFC3xeXEWKiXxnyAQJmi OymGw4168wXKK1DVN+B2NxfsXZMKifixVvvi+4WaGYbtIzRTVqWcnS2C4eEwk4jCjc1h RWjREhqj11Kxj54IhF1adjPVpB35h1md/zLSwatdiHSBi8HT+D/WB5UwAbsIezugsAB8 SphQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=aRT5ReX6FfNpi8sInY8Erna9AcoUcJ+9OuBKDiXG1pU=; fh=TF63Ze67lDnVlkd8xmxXNff2WGh+3exboZvnQbD94Yg=; b=ObOdj83WjEVqtkBCEUQhfrxyccwOPJUXdGqbd28CRYtW8ip0PLQo4ye9sptITAo5iv p0PYWKe7VE8gp6LPa9gIpQPb3lrx/UCB4gx/1ZxG0A/9mx6CldPRGH6Vb9bYZsXqWis2 cBruRB7851KYUJhdZTSDOlk05vAiv9TTTqYQ45ja1mCWSyR0oYT64WNy3h/7XW5UwOVF tme5er5sfuzQ6kUIFli6qGwQ7QYqvUyki1sI9ENdOdHuDLzZS23az4e1iKY9VMlFOdqY M6gzC5aFyZTJ7BAFolNefJiv8chc4+OggwdtWPVIl1b3baLtbrICc2xOQE07QZWW/XVJ aBwQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="w/ERicko"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PULL 04/35] linux-user: do_setsockopt: make ip_mreq local to the place it is used and inline target_to_host_ip_mreq() Date: Mon, 8 Apr 2024 07:48:58 -1000 Message-Id: <20240408174929.862917-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1030; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1030.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Michael Tokarev ip_mreq is declared at the beginning of do_setsockopt(), while it is used in only one place. Move its declaration to that very place and replace pointer to alloca()-allocated memory with the structure itself. target_to_host_ip_mreq() is used only once, inline it. This change also properly handles TARGET_EFAULT when the address is wrong. Signed-off-by: Michael Tokarev Message-Id: <20240331100737.2724186-3-mjt@tls.msk.ru> [rth: Fix braces, adjust optlen to match host structure size] Signed-off-by: Richard Henderson --- linux-user/syscall.c | 47 ++++++++++++++++++++++---------------------- 1 file changed, 23 insertions(+), 24 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 59fb3e911f..cca9cafe4f 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -1615,24 +1615,6 @@ static abi_long do_pipe(CPUArchState *cpu_env, abi_ulong pipedes, return get_errno(ret); } -static inline abi_long target_to_host_ip_mreq(struct ip_mreqn *mreqn, - abi_ulong target_addr, - socklen_t len) -{ - struct target_ip_mreqn *target_smreqn; - - target_smreqn = lock_user(VERIFY_READ, target_addr, len, 1); - if (!target_smreqn) - return -TARGET_EFAULT; - mreqn->imr_multiaddr.s_addr = target_smreqn->imr_multiaddr.s_addr; - mreqn->imr_address.s_addr = target_smreqn->imr_address.s_addr; - if (len == sizeof(struct target_ip_mreqn)) - mreqn->imr_ifindex = tswapal(target_smreqn->imr_ifindex); - unlock_user(target_smreqn, target_addr, 0); - - return 0; -} - static inline abi_long target_to_host_sockaddr(int fd, struct sockaddr *addr, abi_ulong target_addr, socklen_t len) @@ -2067,7 +2049,6 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, { abi_long ret; int val; - struct ip_mreqn *ip_mreq; struct ip_mreq_source *ip_mreq_source; switch(level) { @@ -2111,15 +2092,33 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, break; case IP_ADD_MEMBERSHIP: case IP_DROP_MEMBERSHIP: + { + struct ip_mreqn ip_mreq; + struct target_ip_mreqn *target_smreqn; + + QEMU_BUILD_BUG_ON(sizeof(struct ip_mreq) != + sizeof(struct target_ip_mreq)); + if (optlen < sizeof (struct target_ip_mreq) || - optlen > sizeof (struct target_ip_mreqn)) + optlen > sizeof (struct target_ip_mreqn)) { return -TARGET_EINVAL; + } - ip_mreq = (struct ip_mreqn *) alloca(optlen); - target_to_host_ip_mreq(ip_mreq, optval_addr, optlen); - ret = get_errno(setsockopt(sockfd, level, optname, ip_mreq, optlen)); + target_smreqn = lock_user(VERIFY_READ, optval_addr, optlen, 1); + if (!target_smreqn) { + return -TARGET_EFAULT; + } + ip_mreq.imr_multiaddr.s_addr = target_smreqn->imr_multiaddr.s_addr; + ip_mreq.imr_address.s_addr = target_smreqn->imr_address.s_addr; + if (optlen == sizeof(struct target_ip_mreqn)) { + ip_mreq.imr_ifindex = tswapal(target_smreqn->imr_ifindex); + optlen = sizeof(struct ip_mreqn); + } + unlock_user(target_smreqn, optval_addr, 0); + + ret = get_errno(setsockopt(sockfd, level, optname, &ip_mreq, optlen)); break; - + } case IP_BLOCK_SOURCE: case IP_UNBLOCK_SOURCE: case IP_ADD_SOURCE_MEMBERSHIP: From patchwork Mon Apr 8 17:48:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786955 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2605wrs; Mon, 8 Apr 2024 10:58:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUQtoxGikmJPBiFwUVq4B1lXYHEXh0lrxCwucG7JwHFAMwgColfWeybgWWSYYqkn6y1zX94HviyiZflv75T08QP X-Google-Smtp-Source: AGHT+IF5DqZKwT41zEW72lSAdf6hCMIF0o1H3afF+5e3B9BBz0jQbR1+ekXIO6w+FdMiy3tTfxoJ X-Received: by 2002:a05:620a:a06:b0:78a:5eb3:8e3d with SMTP id i6-20020a05620a0a0600b0078a5eb38e3dmr10159659qka.8.1712599088991; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Michael Tokarev Subject: [PULL 05/35] linux-user: do_setsockopt: make ip_mreq_source local to the place where it is used Date: Mon, 8 Apr 2024 07:48:59 -1000 Message-Id: <20240408174929.862917-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1029; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1029.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Michael Tokarev Signed-off-by: Michael Tokarev Message-Id: <20240331100737.2724186-4-mjt@tls.msk.ru> Signed-off-by: Richard Henderson --- linux-user/syscall.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index cca9cafe4f..1fedf16650 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -2049,7 +2049,6 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, { abi_long ret; int val; - struct ip_mreq_source *ip_mreq_source; switch(level) { case SOL_TCP: @@ -2123,6 +2122,9 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, case IP_UNBLOCK_SOURCE: case IP_ADD_SOURCE_MEMBERSHIP: case IP_DROP_SOURCE_MEMBERSHIP: + { + struct ip_mreq_source *ip_mreq_source; + if (optlen != sizeof (struct target_ip_mreq_source)) return -TARGET_EINVAL; @@ -2133,7 +2135,7 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, ret = get_errno(setsockopt(sockfd, level, optname, ip_mreq_source, optlen)); unlock_user (ip_mreq_source, optval_addr, 0); break; - + } default: goto unimplemented; } From patchwork Mon Apr 8 17:49:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786927 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp162wrs; Mon, 8 Apr 2024 10:51:18 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWKxhXtz5NdMQB0LUtVtjAC9hyWAiqyEPfRYLhHCkgvNNYvkGxI1LLMLzZFy/dVwHR4qgaiH+wS6mr31xkcE59n X-Google-Smtp-Source: AGHT+IH5LsfvDRtPzWZ4nmsbiaqGdBE7PYET0KVSgRIrw+4YQLGw/5N0wnDsS94Mv3js9ewXS10w X-Received: by 2002:a05:6214:2465:b0:699:d07:cf22 with SMTP id im5-20020a056214246500b006990d07cf22mr701771qvb.31.1712598678698; Mon, 08 Apr 2024 10:51:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598678; cv=none; d=google.com; s=arc-20160816; b=iHs2ySvgLy96WdIZcT0N6X76XN75yMeoGtHqnspCD1ZdgE27D0qTdeJIK47WG4O9Zo QGxu5bXi+Wg7GvzW8G6CyuFIWaRuNi+Y5bLhr/Z6Z2acnUtfqFouDNmvtqQ/z9Nebcpq 1NmyL1tD8fqUpvvdk+6x1WrBQ1GSa3tODWPV/yHx6Eoy2kC3i/0IT/WPjgZY9WvWXYIl 1b3M5tyMSV1aTc9rNjSh18V74h0cpx51DnoysGSMb/K/Rphv8SdSZzBSU6qxUDMy3/qz Mh0Kiu5mbi+ue/8JqksUqNd4rG66ytKj4UdQqkSukVPGM0IkgtOcLiilVybkY+RNg+07 QXOw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/Qew14nZN1wX0iqwNUmvetvShYAajmyZbQ1f420VzBg=; fh=stWDERV0X+fGADjSDb+zJwQg8mFVbbU8pKGYcikE+Mc=; b=REuOwPwlDd+SF76bVM+4nVp1fqonY5DNl7ZcwQAvuem/QDK9P5LiMdJUQFT/JE53/K H3En/S1fsbVyW97wjYEeGo1X9kfroHrFez1T082CGVmLm/NhMvQ0bZFHnUz9ETGrhJL7 51M6RiO81ik46P71I6ULhsltYw9N+taif3obr3Fo7vrVvYjtUVKl9KLMpVV+mK/Xq/9H L2QbDo6PmesCCz/dJMNCLzE44WuR8/9/xDC4ibXg5cnwzl19sW4A1lj6m/ykDiAkjKnw OO0ZQ2PspmlhyIzed4leeS3X/U3ooE4WO9UE6phnM8Jkfio8O0v8xXRX6dbd+BQWM0MS pWkg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iwHzkw4p; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Michael Tokarev , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 06/35] linux-user: do_setsockopt: eliminate goto in switch for SO_SNDTIMEO Date: Mon, 8 Apr 2024 07:49:00 -1000 Message-Id: <20240408174929.862917-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1036; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1036.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Michael Tokarev There's identical code for SO_SNDTIMEO and SO_RCVTIMEO, currently implemented using an ugly goto into another switch case. Eliminate that using arithmetic if, making code flow more natural. Signed-off-by: Michael Tokarev Message-Id: <20240331100737.2724186-5-mjt@tls.msk.ru> Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- linux-user/syscall.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 1fedf16650..41659b63f5 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -2301,12 +2301,10 @@ static abi_long do_setsockopt(int sockfd, int level, int optname, case TARGET_SOL_SOCKET: switch (optname) { case TARGET_SO_RCVTIMEO: + case TARGET_SO_SNDTIMEO: { struct timeval tv; - optname = SO_RCVTIMEO; - -set_timeout: if (optlen != sizeof(struct target_timeval)) { return -TARGET_EINVAL; } @@ -2315,13 +2313,12 @@ set_timeout: return -TARGET_EFAULT; } - ret = get_errno(setsockopt(sockfd, SOL_SOCKET, optname, + ret = get_errno(setsockopt(sockfd, SOL_SOCKET, + optname == TARGET_SO_RCVTIMEO ? + SO_RCVTIMEO : SO_SNDTIMEO, &tv, sizeof(tv))); return ret; } - case TARGET_SO_SNDTIMEO: - optname = SO_SNDTIMEO; - goto set_timeout; case TARGET_SO_ATTACH_FILTER: { struct target_sock_fprog *tfprog; From patchwork Mon Apr 8 17:49:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786960 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2823wrs; Mon, 8 Apr 2024 10:58:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUGhrA5YHLHkiv7EWd42NdNsZ3aemRwdCX7XAStwyYD0LbSSGtar2Qh2NH+J7nVjZkqNQ3bg6SJByCLsLDxupyQ X-Google-Smtp-Source: AGHT+IF4XX9K3Ou1KVZmdhelLPFBCJKCHnX7xoVdgziY+hnJ0/GILQMGbPzzehy7uPnOFbpYzqEf X-Received: by 2002:a05:620a:10b0:b0:78d:6963:34ba with SMTP id h16-20020a05620a10b000b0078d696334bamr1742449qkk.28.1712599132706; Mon, 08 Apr 2024 10:58:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712599132; cv=none; d=google.com; s=arc-20160816; b=nDNBCGqMUIv4SrF3yWFk7J670E12AI4cawQFJ1g6OJJ7aXPl2Jzy381qoXtY4RgYZg MeJXPho3Q/BTLYyaIHMF27U5nf5NlChOTnfck6WqP+KSLKi8KU1HjjLGDZAqjJ3RWFPQ oD6Wfmii41vuDg5CdwVq7BaT1z+D84gazFq3UdryaQf/iRAEsVbu9Ox18VzToKoeLR9p OKaVTV9mUVuvMbpvBcjcyasom8TzI1MOJepGd6xZvfultr8HmG3fJM1WoR7ZvUSSpc5M HdHwIEXIR2FvkV+oAB/JqSwNEgEObPjHqWb2T1JEkC+CNagPpynLqMT8RApfwosk1JYe Gjaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=ClDgWE+squc24jCQx5ASDG99O/TQsFv8OJ3ohhBsa3Y=; fh=u9DhXX/1+w9V/lPughVlk13Er6RrFul+1XrnqwizVQE=; b=0MW9JV4QKabkSi3CRBLkb2HoVVRjE9B1LhG1+TmB2khp8CPzE8E+cS983GOwrfKQF/ rbW3BPEQKf60a79nMQBTlEyRKX3PpPWD5IWi2CaVRtTLJLzzekVRJlh58grJZXeRm3Ja auPCgybuMvPmwCk/B3zsuHXUs8gqTzhXVtR4GPFF05jyaABGxEnHUXUMk16vBydOvhBW tidZCgAXhzD/CYSIGGkbgymzPDXjueIfVXj4giHHOJpZBg05Iic+RYwDF9r11qTN+LVA 77io8SgzHXRqVLKdy/jzpwNotDmnGdJsdxZg4jrEmqFT1dBCSkY8+USAYC33EBgk7LLj 0JjQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=yLK1y3OE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Michael Vogt Subject: [PULL 07/35] linux-user: Add FITRIM ioctl Date: Mon, 8 Apr 2024 07:49:01 -1000 Message-Id: <20240408174929.862917-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Michael Vogt Tiny patch to add the missing FITRIM ioctl. Signed-off-by: Michael Vogt Message-Id: <20240403092048.16023-2-michael.vogt@gmail.com> Signed-off-by: Richard Henderson --- linux-user/ioctls.h | 3 +++ linux-user/syscall_defs.h | 1 + linux-user/syscall_types.h | 5 +++++ 3 files changed, 9 insertions(+) diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h index 1aec9d5836..d508d0c04a 100644 --- a/linux-user/ioctls.h +++ b/linux-user/ioctls.h @@ -140,6 +140,9 @@ #ifdef FITHAW IOCTL(FITHAW, IOC_W | IOC_R, TYPE_INT) #endif +#ifdef FITRIM + IOCTL(FITRIM, IOC_W | IOC_R, MK_PTR(MK_STRUCT(STRUCT_fstrim_range))) +#endif IOCTL(FIGETBSZ, IOC_R, MK_PTR(TYPE_LONG)) #ifdef CONFIG_FIEMAP diff --git a/linux-user/syscall_defs.h b/linux-user/syscall_defs.h index 744fda599e..ce0adb706e 100644 --- a/linux-user/syscall_defs.h +++ b/linux-user/syscall_defs.h @@ -945,6 +945,7 @@ struct target_rtc_pll_info { #define TARGET_FIFREEZE TARGET_IOWR('X', 119, abi_int) #define TARGET_FITHAW TARGET_IOWR('X', 120, abi_int) +#define TARGET_FITRIM TARGET_IOWR('X', 121, struct fstrim_range) /* * Note that the ioctl numbers for FS_IOC_ diff --git a/linux-user/syscall_types.h b/linux-user/syscall_types.h index c3b43f8022..6dd7a80ce5 100644 --- a/linux-user/syscall_types.h +++ b/linux-user/syscall_types.h @@ -341,6 +341,11 @@ STRUCT(file_clone_range, TYPE_ULONGLONG, /* src_length */ TYPE_ULONGLONG) /* dest_offset */ +STRUCT(fstrim_range, + TYPE_ULONGLONG, /* start */ + TYPE_ULONGLONG, /* len */ + TYPE_ULONGLONG) /* minlen */ + STRUCT(fiemap_extent, TYPE_ULONGLONG, /* fe_logical */ TYPE_ULONGLONG, /* fe_physical */ From patchwork Mon Apr 8 17:49:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786929 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp204wrs; Mon, 8 Apr 2024 10:51:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWdlyZoM7uBZQNu/hRZhN2KoNDVgKV93BYENTJBJ1KmcvayLf+Zmv3jTdLPdyWDJ2MpqNNJ7MDZuORQjXYmD5Is X-Google-Smtp-Source: AGHT+IEPEeK72HHPn/aD35+LPjqXz8HcJKBHq2ynF7PwqZLrP7z1GGhuRcrtsoXKtdvnSG8T+0Z1 X-Received: by 2002:a05:622a:5487:b0:434:6f94:cfe2 with SMTP id ep7-20020a05622a548700b004346f94cfe2mr8935112qtb.28.1712598684844; Mon, 08 Apr 2024 10:51:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598684; cv=none; d=google.com; s=arc-20160816; b=Jf3Env8OkGv6mXU8Sx9qU8fi1c9E8FBVmfmADjQ0PFJuz8Y8TkJKKbRZ/WpBp21pK1 FkzPOQtdWJaLYKcWjHCogUS9ryCFZ90aWdrcle6WDIkj4IQhlGR10rg4J0ub9hFnTRXb r4V9RVRraHAn3L4zJaIWq4whB329BCkUxzx3AeWXM/ObB2JdQAwRMPlnrE3OJQcJIl+d QP++dA7I+IIJc3oNSLB2wdhnQf/yGpD5i0G9OlZOD7z/AmWVDbn0MOo7VUhVkdp20eps AElWVzEZfQvvPFXVdnTViRjda3pO3FXdK9amXcclB4QwBQcHA20NOoo8aQD4A2nZ1wNn c4nQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Lw/beNU1QugcC97gSnNNo3jFHiOgyIQNiC5qPkBLROQ=; fh=JowuhYM/cawvxwSjj4eVbOc0NCc2c2dukzC2TrxwJhM=; b=WOH5VPhRz1n3cqBjuDrx9A6h4TpSVaO54vCKWL7/NatRj8Xfxr6p9jwBj5FMZqnIrS cXOGtLHwcdLMJFwK+ubexsEgfRuqNrRCW1nTat7W3/UX29gDHufDrBAeJbQmK/8tDqZF DnujCymdDAJ8a48JINAQZO6a4KqWveN9zkDLLhXjxdeDHrxEIa+Q5Bcv9osXE3YM1BaQ TP4TcowiVoQVI+ruxNarSLqeVAzul6cciI0X3m5rWvYHPatnRHZG40AKIANLAllBVGxY D9FhcGb1THhzcf9HvATb61/OXJ2pZPlAvCsqfC+dGmUKEGIBZGVV5vHIDf6zuMMNMCbw IDVA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=gdha9oDZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:43 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Nguyen Dinh Phi , =?utf-8?q?Alex_Benn=C3=A9e?= Subject: [PULL 08/35] linux-user: replace calloc() with g_new0() Date: Mon, 8 Apr 2024 07:49:02 -1000 Message-Id: <20240408174929.862917-9-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::533; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Nguyen Dinh Phi Use glib allocation as recommended by the coding convention Signed-off-by: Nguyen Dinh Phi Message-Id: <20240317171747.1642207-1-phind.uet@gmail.com> Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- linux-user/main.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 9277df2e9d..149e35432e 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -928,11 +928,7 @@ int main(int argc, char **argv, char **envp) * Prepare copy of argv vector for target. */ target_argc = argc - optind; - target_argv = calloc(target_argc + 1, sizeof (char *)); - if (target_argv == NULL) { - (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); - exit(EXIT_FAILURE); - } + target_argv = g_new0(char *, target_argc + 1); /* * If argv0 is specified (using '-0' switch) we replace From patchwork Mon Apr 8 17:49:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786939 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp631wrs; Mon, 8 Apr 2024 10:52:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVX64K99V7OhohdFIE4X0DXIknyhMo+rijU+/QzCfu9J/fS0At3H0E2VwiOHYn+IRpu1NnKYiMVuMgYMKv82Cwk X-Google-Smtp-Source: AGHT+IGSgNZB144q9Ao7SsVtvfnqLLH/82qbXO3F4s2Qqja9fSDvbLhSfeH4Fik+136tm53sU8Pb X-Received: by 2002:a05:6902:18c1:b0:dc6:a223:bb3b with SMTP id ck1-20020a05690218c100b00dc6a223bb3bmr9290899ybb.46.1712598750153; Mon, 08 Apr 2024 10:52:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598750; cv=none; d=google.com; s=arc-20160816; b=tg+yLBErBcMhNxiYs5H0MmnAAe2mbyDnk3aytsKwgGiRsF/5crlREkknb7pFKZkFz5 PJpyHvjXO4287lqWCU4OvvqYCv5tcTJQGpe8nJO9r+kromuD2VH9EJp+Lf8/m4HzlaRc wBGTHEWg0ezvlnoidssPjJE8edVheIjtoZih1p9muQwqz5y//MuWkIveBz4LgSsn9m9W DFKKvjtFm3uhMMigSde2IiXPI3avSCiXC8dxeMm55rF3geDQ0SOsOR6rw9tzQQmQakWH TLrm/PdNXyxdBV4rEABsgcnFSIhkx4CBeC55LK6H0uegmTsLoKuVC3TGl2RZIVtD+Va5 2rdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+6xA9uOxQL6GHFyuuAVL91EMcYGjdhkuoxzjyRnEesc=; fh=j6oUJOIe/HZ0oApVqODA+wb5Tv03Z1vlJlVjpDwxhHo=; b=MXlDYoeL9QVbCcPAfjdETMjwkGJXveIsYySYk5fh5FqAzdwnLbykGxidW3cjTeXtr9 HvbQMNAmmKUpM9+aPhDpuptbE0Pv8rSNUcFgPpim797hQDuIsYWKX163mBwlUBPM0j+b HIcaZqhCXbQGV0nZrsH7qCL1AIbHn9jMR8RulNrizltcdQbP0Mj2cO1ydTgXU0Mbbp9K uFLzvXPNxhTrrMHJlsCYagu6A1X+Hndw3gFulv2RvftXnLNL/bXnYlZJKXPM+jfRT2qN /ZH2FscmrRxeGDBqK9GyEtmgU++lruZWAxrV+ULt5Hm+KSlc4BAefr9zvxXseRO20lI1 D4qA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ARUX9p6+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Sven Schnelle , Helge Deller Subject: [PULL 09/35] target/hppa: Fix IIAOQ, IIASQ for pa2.0 Date: Mon, 8 Apr 2024 07:49:03 -1000 Message-Id: <20240408174929.862917-10-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The contents of IIAOQ depend on PSW_W. Follow the text in "Interruption Instruction Address Queues", pages 2-13 through 2-15. Tested-by: Sven Schnelle Tested-by: Helge Deller Reported-by: Sven Schnelle Fixes: b10700d826c ("target/hppa: Update IIAOQ, IIASQ for pa2.0") Signed-off-by: Richard Henderson --- target/hppa/int_helper.c | 20 +++++++++++--------- target/hppa/sys_helper.c | 18 +++++++++--------- 2 files changed, 20 insertions(+), 18 deletions(-) diff --git a/target/hppa/int_helper.c b/target/hppa/int_helper.c index 90437a92cd..a667ee380d 100644 --- a/target/hppa/int_helper.c +++ b/target/hppa/int_helper.c @@ -107,14 +107,10 @@ void hppa_cpu_do_interrupt(CPUState *cs) /* step 3 */ /* - * For pa1.x, IIASQ is simply a copy of IASQ. - * For pa2.0, IIASQ is the top bits of the virtual address, - * or zero if translation is disabled. + * IIASQ is the top bits of the virtual address, or zero if translation + * is disabled -- with PSW_W == 0, this will reduce to the space. */ - if (!hppa_is_pa20(env)) { - env->cr[CR_IIASQ] = env->iasq_f >> 32; - env->cr_back[0] = env->iasq_b >> 32; - } else if (old_psw & PSW_C) { + if (old_psw & PSW_C) { env->cr[CR_IIASQ] = hppa_form_gva_psw(old_psw, env->iasq_f, env->iaoq_f) >> 32; env->cr_back[0] = @@ -123,8 +119,14 @@ void hppa_cpu_do_interrupt(CPUState *cs) env->cr[CR_IIASQ] = 0; env->cr_back[0] = 0; } - env->cr[CR_IIAOQ] = env->iaoq_f; - env->cr_back[1] = env->iaoq_b; + /* IIAOQ is the full offset for wide mode, or 32 bits for narrow mode. */ + if (old_psw & PSW_W) { + env->cr[CR_IIAOQ] = env->iaoq_f; + env->cr_back[1] = env->iaoq_b; + } else { + env->cr[CR_IIAOQ] = (uint32_t)env->iaoq_f; + env->cr_back[1] = (uint32_t)env->iaoq_b; + } if (old_psw & PSW_Q) { /* step 5 */ diff --git a/target/hppa/sys_helper.c b/target/hppa/sys_helper.c index 208e51c086..22d6c89964 100644 --- a/target/hppa/sys_helper.c +++ b/target/hppa/sys_helper.c @@ -78,21 +78,21 @@ target_ulong HELPER(swap_system_mask)(CPUHPPAState *env, target_ulong nsm) void HELPER(rfi)(CPUHPPAState *env) { - env->iasq_f = (uint64_t)env->cr[CR_IIASQ] << 32; - env->iasq_b = (uint64_t)env->cr_back[0] << 32; - env->iaoq_f = env->cr[CR_IIAOQ]; - env->iaoq_b = env->cr_back[1]; + uint64_t mask; + + cpu_hppa_put_psw(env, env->cr[CR_IPSW]); /* * For pa2.0, IIASQ is the top bits of the virtual address. * To recreate the space identifier, remove the offset bits. + * For pa1.x, the mask reduces to no change to space. */ - if (hppa_is_pa20(env)) { - env->iasq_f &= ~env->iaoq_f; - env->iasq_b &= ~env->iaoq_b; - } + mask = gva_offset_mask(env->psw); - cpu_hppa_put_psw(env, env->cr[CR_IPSW]); + env->iaoq_f = env->cr[CR_IIAOQ]; + env->iaoq_b = env->cr_back[1]; + env->iasq_f = (env->cr[CR_IIASQ] << 32) & ~(env->iaoq_f & mask); + env->iasq_b = (env->cr_back[0] << 32) & ~(env->iaoq_b & mask); } static void getshadowregs(CPUHPPAState *env) From patchwork Mon Apr 8 17:49:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786950 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2181wrs; Mon, 8 Apr 2024 10:56:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUQ5mO49h+loAjueV5nNDS6oKsBAy57xtdmKE37v5GRekprJXlSZML5MGhX990Mmzi2Ct2sVEJ+ZGNqYrANi1h2 X-Google-Smtp-Source: AGHT+IEFiqWypB6XMzAqksKGXckJoRV7bSfvWTmEku8XwgdNLEZIJPADizT5vwt7aFPuArPUrXCx X-Received: by 2002:a05:6808:2093:b0:3c5:fc14:8503 with SMTP id s19-20020a056808209300b003c5fc148503mr1024298oiw.25.1712599007384; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:46 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Zack Buhman , Yoshinori Sato , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= Subject: [PULL 10/35] target/sh4: mac.w: memory accesses are 16-bit words Date: Mon, 8 Apr 2024 07:49:04 -1000 Message-Id: <20240408174929.862917-11-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Zack Buhman Before this change, executing a code sequence such as: mova tblm,r0 mov r0,r1 mova tbln,r0 clrs clrmac mac.w @r0+,@r1+ mac.w @r0+,@r1+ .align 4 tblm: .word 0x1234 .word 0x5678 tbln: .word 0x9abc .word 0xdefg Does not result in correct behavior: Expected behavior: first macw : macl = 0x1234 * 0x9abc + 0x0 mach = 0x0 second macw: macl = 0x5678 * 0xdefg + 0xb00a630 mach = 0x0 Observed behavior (qemu-sh4eb, prior to this commit): first macw : macl = 0x5678 * 0xdefg + 0x0 mach = 0x0 second macw: (unaligned longword memory access, SIGBUS) Various SH-4 ISA manuals also confirm that `mac.w` is a 16-bit word memory access, not a 32-bit longword memory access. Signed-off-by: Zack Buhman Reviewed-by: Yoshinori Sato Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20240402093756.27466-1-zack@buhman.org> Signed-off-by: Richard Henderson --- target/sh4/translate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index a9b1bc7524..6643c14dde 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -816,10 +816,10 @@ static void _decode_opc(DisasContext * ctx) TCGv arg0, arg1; arg0 = tcg_temp_new(); tcg_gen_qemu_ld_i32(arg0, REG(B7_4), ctx->memidx, - MO_TESL | MO_ALIGN); + MO_TESW | MO_ALIGN); arg1 = tcg_temp_new(); tcg_gen_qemu_ld_i32(arg1, REG(B11_8), ctx->memidx, - MO_TESL | MO_ALIGN); + MO_TESW | MO_ALIGN); gen_helper_macw(tcg_env, arg0, arg1); tcg_gen_addi_i32(REG(B11_8), REG(B11_8), 2); tcg_gen_addi_i32(REG(B7_4), REG(B7_4), 2); From patchwork Mon Apr 8 17:49:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786941 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1748wrs; Mon, 8 Apr 2024 10:55:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXz4Hj0WBEgsq1+jiBlzbweWdwwhnSipW1OjpUuwYpdqaK7uH8m5SLJx+fLVpAIUfXL8aI4QmoNzT7cQqoviZ3N X-Google-Smtp-Source: AGHT+IErj2/EgCiXJ59PsCGPy0Xa0XRrKI690CNNRvWwCKiMvIQ0YQxZrvQ6CCweM+938Jpbs1lJ X-Received: by 2002:ae9:c114:0:b0:78d:6a9e:66cd with SMTP id z20-20020ae9c114000000b0078d6a9e66cdmr1336147qki.53.1712598932219; Mon, 08 Apr 2024 10:55:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598932; cv=none; d=google.com; s=arc-20160816; b=fOTipxyjRRlcdJt+C4rP1iH7cMLImBk7RjmyLbAOGOn9U6K+Ma2g3SoTwPWtb6ksts 0gnd7ZBdIG9+xydC68shb5NH09AtbTANMhoifS1UrmOcewmkvpur5HMTHspMHVXFln3G ELj6csmD547U0E7rHyGxgHCsOLzZkBHk5dGzh4DgR3tAEVPmV52d+Osw+Hmhj39apr/P ovF8D47lFsY9rnSQAgs4pyjm2JMAQKyES1EItZsvCMFbDRLN4447v13cLL3Dc4hqjhl1 t4Rl6MYaXEAju872O3vRXWIl7HcN57V2eyRVHpM+rt5LvjFAHyiWTWpU3zGgkswZQTEA Mc6Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RlIBc4Oj7n9g5uv4QxhhxdXhuzA6b3JMjencPErHv6I=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=b2otltQ6GjRb03hGYI/+5BtVQ3HJYzds8GSHvU8ZNc9kNYN9e8e1sGGkZGEQFY4txB 2TBgaAp5iCHWYS346qxdBZpKmwG4V8c4Ly6jr6I7uFU2R0iD0qA+3nLVfO4why8s4OYt g0wztS2QmiQj0VwXPxeXeU57zfgSwA2hUeimnCsgIklA3OcW5GRUlSmm6wwMmATuN+Gm te4Be5UyiYBXDVKHi3nKqeZ2D+ydFvkwF8hvwiGBWe22aqnd+JJpj6hWu13DAuGxVg2g ujWKGs2urzOHUVw9VL8WuUX5e5bgBGyu7OjSHwe2okhu7P+guRCxlf3viJd278kBZner WI1A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=E47VQeJX; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 11/35] target/sh4: Merge mach and macl into a union Date: Mon, 8 Apr 2024 07:49:05 -1000 Message-Id: <20240408174929.862917-12-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow host access to the entire 64-bit accumulator. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/sh4/cpu.h | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 9211da6bde..d928bcf006 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -155,12 +155,22 @@ typedef struct CPUArchState { uint32_t pc; /* program counter */ uint32_t delayed_pc; /* target of delayed branch */ uint32_t delayed_cond; /* condition of delayed branch */ - uint32_t mach; /* multiply and accumulate high */ - uint32_t macl; /* multiply and accumulate low */ uint32_t pr; /* procedure register */ uint32_t fpscr; /* floating point status/control register */ uint32_t fpul; /* floating point communication register */ + /* multiply and accumulate: high, low and combined. */ + union { + uint64_t mac; + struct { +#if HOST_BIG_ENDIAN + uint32_t mach, macl; +#else + uint32_t macl, mach; +#endif + }; + }; + /* float point status register */ float_status fp_status; From patchwork Mon Apr 8 17:49:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786928 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp174wrs; Mon, 8 Apr 2024 10:51:20 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWV5SXIbLO2kh+u84UtBcp4XBw3ScKt3dD+HGjpgNz1cw6CZwzGQoaR65PZn2v4vm2chWmU4AZXEfix/fdf1nQ8 X-Google-Smtp-Source: AGHT+IGHg8UFI/IwpDzlZSSJ0GqdToVQcYyHEUOibjZRvB7zbzxEDu2BEfSp0IGXmsg0NzpiLSzk X-Received: by 2002:ad4:559d:0:b0:699:4c5e:8a9a with SMTP id f29-20020ad4559d000000b006994c5e8a9amr6397027qvx.51.1712598680007; Mon, 08 Apr 2024 10:51:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598679; cv=none; d=google.com; s=arc-20160816; b=JQeHREqY6pQnJYQYRDWmOtsOmaCNPiUXZZfYWtBP8jJWJqOjdGmMdI9kYqwgWbFrS4 i/ElL536jzHmYv0y28vSz6UsHee3xPn/NR0FCjhhGUqgcfg+lTrb9enbn6+BgtKDd3lf w7YiJiqe67z8/WCy9QNZypO78ov0j4QPQgevAfQYoSmmTUyznLxzn64fP/G+h3ct/lJ8 7k+IxqhnSRhK9OxLt14g5ykmsodCFUAH5tUYxdwph7vVsdLyLzvy3fwrQRw15Asj9cyL 0RdPnHtsGrg71hxzkprh/dHg+kk3139lq0YPEcxPRWDfvUA05d+RUliaaMApdd0u10P6 gyHQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=kLktQTH6TNyDdnNQxMnhQfTJfTanNKRfEbSAV10avAE=; fh=HJpP7WWWMf63xDEKZYjQL9Y0mK13c8dar/udiJ/djJ4=; b=ByIRqVAZCVsPZ2FTQt2ugf3psa6z501df/L9yOAeC/Q/ERUQ02Zudr6SSmO/tiJuzV O3ro6Sk+ZYAMk1zDLw/KEK27Zbb4vL4PsJ8VXHcfbYB/LnT5yNnlZYh+Fxogv4jReOPP YDB5dOHQd846SlHgf/4cgnuZweb8Z6HGpwanyrv1kVAgrR500ybHT/PH1QLmavUBPlKy 0Rw2U5Ep4Uqke24AFxzlbVIS8v0FLVmmiWkfqcK5fLKxPz7D5UoAMlyTzArmbc+RBjbn sq1afplXdqclH81PxUF8FTHKkREpWJopdGaGIrgbvgT7lHo+yiXgoqLmmlCnFzyKA0+6 ppOA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=JyW3yjGb; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Zack Buhman , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 12/35] target/sh4: Fix mac.l with saturation enabled Date: Mon, 8 Apr 2024 07:49:06 -1000 Message-Id: <20240408174929.862917-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::429; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x429.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Zack Buhman The saturation arithmetic logic in helper_macl is not correct. I tested and verified this behavior on a SH7091. Signed-off-by: Zack Buhman Message-Id: <20240404162641.27528-2-zack@buhman.org> [rth: Reformat helper_macl, add a test case.] Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/sh4/helper.h | 2 +- target/sh4/op_helper.c | 23 ++++++------ tests/tcg/sh4/test-macl.c | 67 +++++++++++++++++++++++++++++++++++ tests/tcg/sh4/Makefile.target | 5 +++ 4 files changed, 86 insertions(+), 11 deletions(-) create mode 100644 tests/tcg/sh4/test-macl.c diff --git a/target/sh4/helper.h b/target/sh4/helper.h index 8d792f6b55..64056e4a39 100644 --- a/target/sh4/helper.h +++ b/target/sh4/helper.h @@ -11,7 +11,7 @@ DEF_HELPER_3(movcal, void, env, i32, i32) DEF_HELPER_1(discard_movcal_backup, void, env) DEF_HELPER_2(ocbi, void, env, i32) -DEF_HELPER_3(macl, void, env, i32, i32) +DEF_HELPER_3(macl, void, env, s32, s32) DEF_HELPER_3(macw, void, env, i32, i32) DEF_HELPER_2(ld_fpscr, void, env, i32) diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index 4559d0d376..d0bae0cc00 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -158,20 +158,23 @@ void helper_ocbi(CPUSH4State *env, uint32_t address) } } -void helper_macl(CPUSH4State *env, uint32_t arg0, uint32_t arg1) +void helper_macl(CPUSH4State *env, int32_t arg0, int32_t arg1) { + const int64_t min = -(1ll << 47); + const int64_t max = (1ll << 47) - 1; + int64_t mul = (int64_t)arg0 * arg1; + int64_t mac = env->mac; int64_t res; - res = ((uint64_t) env->mach << 32) | env->macl; - res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1; - env->mach = (res >> 32) & 0xffffffff; - env->macl = res & 0xffffffff; - if (env->sr & (1u << SR_S)) { - if (res < 0) - env->mach |= 0xffff0000; - else - env->mach &= 0x00007fff; + if (!(env->sr & (1u << SR_S))) { + res = mac + mul; + } else if (sadd64_overflow(mac, mul, &res)) { + res = mac < 0 ? min : max; + } else { + res = MIN(MAX(res, min), max); } + + env->mac = res; } void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1) diff --git a/tests/tcg/sh4/test-macl.c b/tests/tcg/sh4/test-macl.c new file mode 100644 index 0000000000..b66c854365 --- /dev/null +++ b/tests/tcg/sh4/test-macl.c @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include + +#define MACL_S_MIN (-(1ll << 47)) +#define MACL_S_MAX ((1ll << 47) - 1) + +int64_t mac_l(int64_t mac, const int32_t *a, const int32_t *b) +{ + register uint32_t macl __asm__("macl") = mac; + register uint32_t mach __asm__("mach") = mac >> 32; + + asm volatile("mac.l @%0+,@%1+" + : "+r"(a), "+r"(b), "+x"(macl), "+x"(mach)); + + return ((uint64_t)mach << 32) | macl; +} + +typedef struct { + int64_t mac; + int32_t a, b; + int64_t res[2]; +} Test; + +__attribute__((noinline)) +void test(const Test *t, int sat) +{ + int64_t res; + + if (sat) { + asm volatile("sets"); + } else { + asm volatile("clrs"); + } + res = mac_l(t->mac, &t->a, &t->b); + + if (res != t->res[sat]) { + fprintf(stderr, "%#llx + (%#x * %#x) = %#llx -- got %#llx\n", + t->mac, t->a, t->b, t->res[sat], res); + abort(); + } +} + +int main() +{ + static const Test tests[] = { + { 0x00007fff12345678ll, INT32_MAX, INT32_MAX, + { 0x40007ffe12345679ll, MACL_S_MAX } }, + { MACL_S_MIN, -1, 1, + { 0xffff7fffffffffffll, MACL_S_MIN } }, + { INT64_MIN, -1, 1, + { INT64_MAX, MACL_S_MIN } }, + { 0x00007fff00000000ll, INT32_MAX, INT32_MAX, + { 0x40007ffe00000001ll, MACL_S_MAX } }, + { 4, 1, 2, { 6, 6 } }, + { -4, -1, -2, { -2, -2 } }, + }; + + for (int i = 0; i < sizeof(tests) / sizeof(tests[0]); ++i) { + for (int j = 0; j < 2; ++j) { + test(&tests[i], j); + } + } + return 0; +} diff --git a/tests/tcg/sh4/Makefile.target b/tests/tcg/sh4/Makefile.target index 16eaa850a8..9a11c10924 100644 --- a/tests/tcg/sh4/Makefile.target +++ b/tests/tcg/sh4/Makefile.target @@ -9,3 +9,8 @@ run-signals: signals $(call skip-test, $<, "BROKEN") run-plugin-signals-with-%: $(call skip-test, $<, "BROKEN") + +VPATH += $(SRC_PATH)/tests/tcg/sh4 + +test-macl: CFLAGS += -O -g +TESTS += test-macl From patchwork Mon Apr 8 17:49:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786949 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2116wrs; Mon, 8 Apr 2024 10:56:37 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVELYbJD6hSfkz6gUHdXFEZhUwcp6aHkyXxnGcaFVLtHNAhHGWqT9YoCmOLtuLDgT3pbawXfW2G0mVrpDnAunR2 X-Google-Smtp-Source: AGHT+IFgwJd0Ml+SMtFD7awv/BJceVKYujQCUnUM6S5fLsKNsD0qoDLlVj12nBaZ4gL5cc1PCTWR X-Received: by 2002:a54:4896:0:b0:3c5:f721:128c with SMTP id r22-20020a544896000000b003c5f721128cmr2753566oic.14.1712598996931; Mon, 08 Apr 2024 10:56:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598996; cv=none; d=google.com; s=arc-20160816; b=IcqMqPxYHe54+FFVELBgh5AwThPkz2wrPSoPdDh7Qljm9KdWs5dk+zeIVFHiXvrbhX 1E5T/78j3hhIXcIKClvfkA9b+hu6Vq9VwI034XtN4+28JCbVRZl8oBStzQrvK24Fuj/E kAE/AZVNcD36c6sUVb82qHMmuJ/bYUQhmb5eg+IcFNb2bDh55g2OAOXvDHpGLXPLKO59 MUg/BtmhRvUEdcqCN7TG6WAD1uN6ZiYtG2fFymls2lbw7vnQkGg2mETPClYSpV4yqVkA TYdvXnXWOnvu6It0xaAXLswX92Rggzl8Th3XxWmfm7wc3lQkNhKgLKl3v/nFYIEXpzmu USQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=/A33LtPdfhd6ZXxcd3sa54LWhQX38sygsNQTelB9lyU=; fh=UxcOinUvtH9RCUG8YjsmzGmJmYoXEUythTaZQ7RVwi0=; b=CHb3/3gRJ9XX0j4oFYCEQsAL9HYhEJwm1D8EW3aJgTiye2V07YcwslROHHYF1DfyXB lR70nyIsIqWqdngIOWFzpLuUN52/in2w7uMIVKot1SBz56/CokDqTc7ISCv5kkmY/Nhb FodvHh5ykWp0vq14S4yOIDqoOf+RVv9e50tQVAJndOifweYBkKrcLGhY9kSRCmIy1iSU k5DnwX0qh0tcTXoylYKVNhQovOJa/n1H/JWjR8lQ+F5Zqcx4V0yTPAcYnoJ5slPJ0G+7 PawHyotEUH71IEGMdfnFdG/AEr3xYn2ywNfblq0RKNfSdxo2jhRxDaA/i1czs1SL9q6p XBBw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Pub0Ka1b; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Zack Buhman , Yoshinori Sato , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= Subject: [PULL 13/35] target/sh4: Fix mac.w with saturation enabled Date: Mon, 8 Apr 2024 07:49:07 -1000 Message-Id: <20240408174929.862917-14-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Zack Buhman The saturation arithmetic logic in helper_macw is not correct. I tested and verified this behavior on a SH7091. Reviewd-by: Yoshinori Sato Signed-off-by: Zack Buhman Message-Id: <20240405233802.29128-3-zack@buhman.org> [rth: Reformat helper_macw, add a test case.] Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/sh4/helper.h | 2 +- target/sh4/op_helper.c | 28 +++++++++------- tests/tcg/sh4/test-macw.c | 61 +++++++++++++++++++++++++++++++++++ tests/tcg/sh4/Makefile.target | 3 ++ 4 files changed, 82 insertions(+), 12 deletions(-) create mode 100644 tests/tcg/sh4/test-macw.c diff --git a/target/sh4/helper.h b/target/sh4/helper.h index 64056e4a39..29011d3dbb 100644 --- a/target/sh4/helper.h +++ b/target/sh4/helper.h @@ -12,7 +12,7 @@ DEF_HELPER_1(discard_movcal_backup, void, env) DEF_HELPER_2(ocbi, void, env, i32) DEF_HELPER_3(macl, void, env, s32, s32) -DEF_HELPER_3(macw, void, env, i32, i32) +DEF_HELPER_3(macw, void, env, s32, s32) DEF_HELPER_2(ld_fpscr, void, env, i32) diff --git a/target/sh4/op_helper.c b/target/sh4/op_helper.c index d0bae0cc00..99394b714c 100644 --- a/target/sh4/op_helper.c +++ b/target/sh4/op_helper.c @@ -177,22 +177,28 @@ void helper_macl(CPUSH4State *env, int32_t arg0, int32_t arg1) env->mac = res; } -void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1) +void helper_macw(CPUSH4State *env, int32_t arg0, int32_t arg1) { - int64_t res; + /* Inputs are already sign-extended from 16 bits. */ + int32_t mul = arg0 * arg1; - res = ((uint64_t) env->mach << 32) | env->macl; - res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; - env->mach = (res >> 32) & 0xffffffff; - env->macl = res & 0xffffffff; if (env->sr & (1u << SR_S)) { - if (res < -0x80000000) { + /* + * In saturation arithmetic mode, the accumulator is 32-bit + * with carry. MACH is not considered during the addition + * operation nor the 32-bit saturation logic. + */ + int32_t res, macl = env->macl; + + if (sadd32_overflow(macl, mul, &res)) { + res = macl < 0 ? INT32_MIN : INT32_MAX; + /* If overflow occurs, the MACH register is set to 1. */ env->mach = 1; - env->macl = 0x80000000; - } else if (res > 0x000000007fffffff) { - env->mach = 1; - env->macl = 0x7fffffff; } + env->macl = res; + } else { + /* In non-saturation arithmetic mode, the accumulator is 64-bit */ + env->mac += mul; } } diff --git a/tests/tcg/sh4/test-macw.c b/tests/tcg/sh4/test-macw.c new file mode 100644 index 0000000000..4eceec8634 --- /dev/null +++ b/tests/tcg/sh4/test-macw.c @@ -0,0 +1,61 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include +#include +#include + +int64_t mac_w(int64_t mac, const int16_t *a, const int16_t *b) +{ + register uint32_t macl __asm__("macl") = mac; + register uint32_t mach __asm__("mach") = mac >> 32; + + asm volatile("mac.w @%0+,@%1+" + : "+r"(a), "+r"(b), "+x"(macl), "+x"(mach)); + + return ((uint64_t)mach << 32) | macl; +} + +typedef struct { + int64_t mac; + int16_t a, b; + int64_t res[2]; +} Test; + +__attribute__((noinline)) +void test(const Test *t, int sat) +{ + int64_t res; + + if (sat) { + asm volatile("sets"); + } else { + asm volatile("clrs"); + } + res = mac_w(t->mac, &t->a, &t->b); + + if (res != t->res[sat]) { + fprintf(stderr, "%#llx + (%#x * %#x) = %#llx -- got %#llx\n", + t->mac, t->a, t->b, t->res[sat], res); + abort(); + } +} + +int main() +{ + static const Test tests[] = { + { 0, 2, 3, { 6, 6 } }, + { 0x123456787ffffffell, 2, -3, + { 0x123456787ffffff8ll, 0x123456787ffffff8ll } }, + { 0xabcdef127ffffffall, 2, 3, + { 0xabcdef1280000000ll, 0x000000017fffffffll } }, + { 0xfffffffffll, INT16_MAX, INT16_MAX, + { 0x103fff0000ll, 0xf3fff0000ll } }, + }; + + for (int i = 0; i < sizeof(tests) / sizeof(tests[0]); ++i) { + for (int j = 0; j < 2; ++j) { + test(&tests[i], j); + } + } + return 0; +} diff --git a/tests/tcg/sh4/Makefile.target b/tests/tcg/sh4/Makefile.target index 9a11c10924..4d09291c0c 100644 --- a/tests/tcg/sh4/Makefile.target +++ b/tests/tcg/sh4/Makefile.target @@ -14,3 +14,6 @@ VPATH += $(SRC_PATH)/tests/tcg/sh4 test-macl: CFLAGS += -O -g TESTS += test-macl + +test-macw: CFLAGS += -O -g +TESTS += test-macw From patchwork Mon Apr 8 17:49:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786930 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp211wrs; Mon, 8 Apr 2024 10:51:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUFgnKWhyce35xs35JxyzBJ3MvUe83G6bUvy+G6iZKzBliRegTOHs37l0mabhAJ6N1ofs1SVSZcIecexfS5JTFk X-Google-Smtp-Source: AGHT+IFPksnYbHqaKKDrub0RStg1BNN0QhjZ8xzozVn81yPL+17MQFeANEyATz59une62OIV/5Ph X-Received: by 2002:a05:6122:2522:b0:4d4:6a11:e7f with SMTP id cl34-20020a056122252200b004d46a110e7fmr6782143vkb.10.1712598685521; Mon, 08 Apr 2024 10:51:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598685; cv=none; d=google.com; s=arc-20160816; b=gzuAiIh+7C7W7BZexUUWRbrlLLgS8anJ1vS5jTkow2rPSEq0kCJDYIZI7hnjiDFReE n4y+4MVC1BNp5nb+6KfMrDPAkK7ssEO2BV7RBZqjjYEM9rMWLCjYl0GG0vUJyeA+nEpl jbJFhjh2eSKO6iO7pRuaVlNEtWfPfpDFs1IV4M/MUmmFfI9nnOxD1MAUC0va2VCnKKHq eU5zQejx4cft98UPW77Bo+pkuh4nbHCHXN1rJrN5/dvAU5l3PC22oDuOXujN6wwBrG4t a6Vg65mfuLXiGSKbD+7hW8BT0G6x7LKQKe9h0hrhzu6oxQClz0PKWBVSxm1M7ct9l2CJ d9GA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=dcOly76/DhggOn/gIOyjbUFt0Yi/pTy/JSDCl4K3h8A=; fh=K7lFbwafzDFe9RlZVtFGWQUxhy0uw4Mr/E9DDf1LH8k=; b=Fbt40naqd9U+8atlAgee9882/vHSOD8IWcipd8p7GXpM4jVyn5QQIjF5lifKDklfr1 rUALETE9xdFm+3XGifMu79aQ7il5Umrw1o2vqrecLifZroDyfVTeodNA+DPb0RuomDCO 0EIPOtbGhdohlBDWmKnOYQ8QwnSZ+LiSSDaZ0Lwx45Nyat3cBEWDTFJAzYhedVJ46G6b Dg/Vrf/dFqWGXeehadSW5nIVDpA6nnIQfise4n4uR6xLwGpGTD1yyBhhxznfPtEZZwJ1 +Z5fFVZUHQY3WUBXDY+Z34JE+VOys+5VowgnNvnarOdWMty3/fxqZUuLpHHr2D4iKS7u S9KQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fe7aSgb4; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:51 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Zack Buhman , Yoshinori Sato Subject: [PULL 14/35] target/sh4: add missing CHECK_NOT_DELAY_SLOT Date: Mon, 8 Apr 2024 07:49:08 -1000 Message-Id: <20240408174929.862917-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Zack Buhman CHECK_NOT_DELAY_SLOT is correctly applied to the branch-related instructions, but not to the PC-relative mov* instructions. I verified the existence of an illegal slot exception on a SH7091 when any of these instructions are attempted inside a delay slot. This also matches the behavior described in the SH-4 ISA manual. Signed-off-by: Zack Buhman Reviewed-by: Richard Henderson Message-Id: <20240407150705.5965-1-zack@buhman.org> Signed-off-by: Richard Henderson Reviewd-by: Yoshinori Sato --- target/sh4/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 6643c14dde..ebb6c901bf 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -523,6 +523,7 @@ static void _decode_opc(DisasContext * ctx) tcg_gen_movi_i32(REG(B11_8), B7_0s); return; case 0x9000: /* mov.w @(disp,PC),Rn */ + CHECK_NOT_DELAY_SLOT { TCGv addr = tcg_constant_i32(ctx->base.pc_next + 4 + B7_0 * 2); tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, @@ -530,6 +531,7 @@ static void _decode_opc(DisasContext * ctx) } return; case 0xd000: /* mov.l @(disp,PC),Rn */ + CHECK_NOT_DELAY_SLOT { TCGv addr = tcg_constant_i32((ctx->base.pc_next + 4 + B7_0 * 4) & ~3); tcg_gen_qemu_ld_i32(REG(B11_8), addr, ctx->memidx, @@ -1236,6 +1238,7 @@ static void _decode_opc(DisasContext * ctx) } return; case 0xc700: /* mova @(disp,PC),R0 */ + CHECK_NOT_DELAY_SLOT tcg_gen_movi_i32(REG(0), ((ctx->base.pc_next & 0xfffffffc) + 4 + B7_0 * 4) & ~3); return; From patchwork Mon Apr 8 17:49:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786933 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp220wrs; Mon, 8 Apr 2024 10:51:27 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXSiZmoElMl6xpD+62DaHr6dc4x3FulchoHPxnwW+gCGuHer8HAw9/xD17o5etTg0BEbq+V92m08oB+rtliSFPJ X-Google-Smtp-Source: AGHT+IHA3Gv9Y8OGMpoZvelTAfIt3DkPpR8EGJ6uF+G2wG72HMmnFRrzsjXnTG8PAoME1N+y0R1H X-Received: by 2002:a05:620a:40c6:b0:787:79c3:93e3 with SMTP id g6-20020a05620a40c600b0078779c393e3mr11623990qko.33.1712598686804; Mon, 08 Apr 2024 10:51:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598686; cv=none; d=google.com; s=arc-20160816; b=FWGK2i8Nv5DV5mCSFzXwGBlIkQWNfIDkZ0xPsXIH2dAK6Wtk4jReL3s2GxWZdxUw4e LsGGUNy1hILdnkzavvKc5yuGjn2XAkwo92j59akTZ4mNUNDbfx8KoUGAED/lo/uOI10N E6XOAZUemn5pursEE60GNrGfSP3LwUi/B4i2NFG6p798mKc5oWejxaFeb2+lDFGnVRWC 9pjVJR1fVOQgJu0dl2Vv9MROBhb801ymmPkNd1mdC9gKAXgFVWUbSpH6hsMFCbuNPcJN QkC20ONuhtFVW8tLzo04VppWouj70uRY2XNbbAGD7NNRK+ssGImQ4yWF74KGekz8+Vyo zcCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cRQqZ9oBK6iehJFrs+uDcTw60o+LKkDegjDNYSUR+vc=; fh=LEzS/2znb383K59gW/mE4txfpskH6W/tMhITWj/DbfA=; b=XtHqwDolgssRfqoIjAMNYi55BsQpb185cDJDtlI6xD95KjgSvimsI7tFdRz33arltu P1Rjt85hpQXCg/zwmSOr2GrMy2Ydy+cD2WAzL4J4MT4UknR02zZASzUC9k9xHfNW9vMO FOS9CLp55mxAYGWOXuxxpUVkXdcL44DbN4p5IfpqlMP2gC02Vmw91a5kMfUgWtFIXOJY nkInwObJ6ospzquqIbc7gjPBx3VtY0QOSuGeiWps+Zk4+uQmd56CXnjQ5BGDd7pnwdo1 Fmse9+w/1POY7q3/YYSqA825bWi6uaSlyad32WMDzmywlzJxHV7vO95gtS0jO8q5IWZN 88pw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HGCQM44M; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Keith Packard Subject: [PULL 15/35] target/m68k: Map FPU exceptions to FPSR register Date: Mon, 8 Apr 2024 07:49:09 -1000 Message-Id: <20240408174929.862917-16-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Keith Packard Add helpers for reading/writing the 68881 FPSR register so that changes in floating point exception state can be seen by the application. Call these helpers in pre_load/post_load hooks to synchronize exception state. Signed-off-by: Keith Packard Reviewed-by: Richard Henderson Message-Id: <20230803035231.429697-1-keithp@keithp.com> Signed-off-by: Richard Henderson --- target/m68k/cpu.h | 3 +- target/m68k/helper.h | 2 ++ target/m68k/cpu.c | 12 +++++-- target/m68k/fpu_helper.c | 72 ++++++++++++++++++++++++++++++++++++++++ target/m68k/helper.c | 4 +-- target/m68k/translate.c | 4 +-- 6 files changed, 90 insertions(+), 7 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 346427e144..e184239a81 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -199,7 +199,8 @@ void cpu_m68k_set_ccr(CPUM68KState *env, uint32_t); void cpu_m68k_set_sr(CPUM68KState *env, uint32_t); void cpu_m68k_restore_fp_status(CPUM68KState *env); void cpu_m68k_set_fpcr(CPUM68KState *env, uint32_t val); - +uint32_t cpu_m68k_get_fpsr(CPUM68KState *env); +void cpu_m68k_set_fpsr(CPUM68KState *env, uint32_t val); /* * Instead of computing the condition codes after each m68k instruction, diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 2bbe0dc032..95aa5e53bb 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -54,6 +54,8 @@ DEF_HELPER_4(fsdiv, void, env, fp, fp, fp) DEF_HELPER_4(fddiv, void, env, fp, fp, fp) DEF_HELPER_4(fsgldiv, void, env, fp, fp, fp) DEF_HELPER_FLAGS_3(fcmp, TCG_CALL_NO_RWG, void, env, fp, fp) +DEF_HELPER_2(set_fpsr, void, env, i32) +DEF_HELPER_1(get_fpsr, i32, env) DEF_HELPER_FLAGS_2(set_fpcr, TCG_CALL_NO_RWG, void, env, i32) DEF_HELPER_FLAGS_2(ftst, TCG_CALL_NO_RWG, void, env, fp) DEF_HELPER_3(fconst, void, env, fp, i32) diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index 7c8efbb42c..df49ff1880 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -390,12 +390,19 @@ static const VMStateDescription vmstate_freg = { } }; +static int fpu_pre_save(void *opaque) +{ + M68kCPU *s = opaque; + + s->env.fpsr = cpu_m68k_get_fpsr(&s->env); + return 0; +} + static int fpu_post_load(void *opaque, int version) { M68kCPU *s = opaque; - cpu_m68k_restore_fp_status(&s->env); - + cpu_m68k_set_fpsr(&s->env, s->env.fpsr); return 0; } @@ -404,6 +411,7 @@ const VMStateDescription vmmstate_fpu = { .version_id = 1, .minimum_version_id = 1, .needed = fpu_needed, + .pre_save = fpu_pre_save, .post_load = fpu_post_load, .fields = (const VMStateField[]) { VMSTATE_UINT32(env.fpcr, M68kCPU), diff --git a/target/m68k/fpu_helper.c b/target/m68k/fpu_helper.c index ab120b5f59..8314791f50 100644 --- a/target/m68k/fpu_helper.c +++ b/target/m68k/fpu_helper.c @@ -164,6 +164,78 @@ void HELPER(set_fpcr)(CPUM68KState *env, uint32_t val) cpu_m68k_set_fpcr(env, val); } +/* Convert host exception flags to cpu_m68k form. */ +static int cpu_m68k_exceptbits_from_host(int host_bits) +{ + int target_bits = 0; + + if (host_bits & float_flag_invalid) { + target_bits |= 0x80; + } + if (host_bits & float_flag_overflow) { + target_bits |= 0x40; + } + if (host_bits & (float_flag_underflow | float_flag_output_denormal)) { + target_bits |= 0x20; + } + if (host_bits & float_flag_divbyzero) { + target_bits |= 0x10; + } + if (host_bits & float_flag_inexact) { + target_bits |= 0x08; + } + return target_bits; +} + +/* Convert cpu_m68k exception flags to target form. */ +static int cpu_m68k_exceptbits_to_host(int target_bits) +{ + int host_bits = 0; + + if (target_bits & 0x80) { + host_bits |= float_flag_invalid; + } + if (target_bits & 0x40) { + host_bits |= float_flag_overflow; + } + if (target_bits & 0x20) { + host_bits |= float_flag_underflow; + } + if (target_bits & 0x10) { + host_bits |= float_flag_divbyzero; + } + if (target_bits & 0x08) { + host_bits |= float_flag_inexact; + } + return host_bits; +} + +uint32_t cpu_m68k_get_fpsr(CPUM68KState *env) +{ + int host_flags = get_float_exception_flags(&env->fp_status); + int target_flags = cpu_m68k_exceptbits_from_host(host_flags); + int except = (env->fpsr & ~(0xf8)) | target_flags; + return except; +} + +uint32_t HELPER(get_fpsr)(CPUM68KState *env) +{ + return cpu_m68k_get_fpsr(env); +} + +void cpu_m68k_set_fpsr(CPUM68KState *env, uint32_t val) +{ + env->fpsr = val; + + int host_flags = cpu_m68k_exceptbits_to_host((int) env->fpsr); + set_float_exception_flags(host_flags, &env->fp_status); +} + +void HELPER(set_fpsr)(CPUM68KState *env, uint32_t val) +{ + cpu_m68k_set_fpsr(env, val); +} + #define PREC_BEGIN(prec) \ do { \ FloatX80RoundPrec old = \ diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 1a475f082a..7a91f33b17 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -87,7 +87,7 @@ static int m68k_fpu_gdb_get_reg(CPUState *cs, GByteArray *mem_buf, int n) case 8: /* fpcontrol */ return gdb_get_reg32(mem_buf, env->fpcr); case 9: /* fpstatus */ - return gdb_get_reg32(mem_buf, env->fpsr); + return gdb_get_reg32(mem_buf, cpu_m68k_get_fpsr(env)); case 10: /* fpiar, not implemented */ return gdb_get_reg32(mem_buf, 0); } @@ -109,7 +109,7 @@ static int m68k_fpu_gdb_set_reg(CPUState *cs, uint8_t *mem_buf, int n) cpu_m68k_set_fpcr(env, ldl_p(mem_buf)); return 4; case 9: /* fpstatus */ - env->fpsr = ldl_p(mem_buf); + cpu_m68k_set_fpsr(env, ldl_p(mem_buf)); return 4; case 10: /* fpiar, not implemented */ return 4; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 6ae3df43bc..8a194f2f21 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -4686,7 +4686,7 @@ static void gen_load_fcr(DisasContext *s, TCGv res, int reg) tcg_gen_movi_i32(res, 0); break; case M68K_FPSR: - tcg_gen_ld_i32(res, tcg_env, offsetof(CPUM68KState, fpsr)); + gen_helper_get_fpsr(res, tcg_env); break; case M68K_FPCR: tcg_gen_ld_i32(res, tcg_env, offsetof(CPUM68KState, fpcr)); @@ -4700,7 +4700,7 @@ static void gen_store_fcr(DisasContext *s, TCGv val, int reg) case M68K_FPIAR: break; case M68K_FPSR: - tcg_gen_st_i32(val, tcg_env, offsetof(CPUM68KState, fpsr)); + gen_helper_set_fpsr(tcg_env, val); break; case M68K_FPCR: gen_helper_set_fpcr(tcg_env, val); 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Keith Packard , Peter Maydell Subject: [PULL 16/35] target/m68k: Pass semihosting arg to exit Date: Mon, 8 Apr 2024 07:49:10 -1000 Message-Id: <20240408174929.862917-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Keith Packard Instead of using d0 (the semihost function number), use d1 (the provide exit status). Signed-off-by: Keith Packard Reviewed-by: Peter Maydell Message-Id: <20230802161914.395443-2-keithp@keithp.com> Signed-off-by: Richard Henderson --- target/m68k/m68k-semi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/m68k/m68k-semi.c b/target/m68k/m68k-semi.c index 546cff2246..6fbbd140f3 100644 --- a/target/m68k/m68k-semi.c +++ b/target/m68k/m68k-semi.c @@ -132,8 +132,8 @@ void do_m68k_semihosting(CPUM68KState *env, int nr) args = env->dregs[1]; switch (nr) { case HOSTED_EXIT: - gdb_exit(env->dregs[0]); - exit(env->dregs[0]); + gdb_exit(env->dregs[1]); + exit(env->dregs[1]); case HOSTED_OPEN: GET_ARG(0); From patchwork Mon Apr 8 17:49:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786931 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp210wrs; Mon, 8 Apr 2024 10:51:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUBrqLtB8v+lUTLQmrksYj/9H8TrYrVokFqHXD6p7gt+7Xdl1kz6T6TVrO0+GpnLir6b7rw2J+z928224nYjbIb X-Google-Smtp-Source: AGHT+IHL7Q7YKgWr8sLpnUk9lNAPSu4qg9rTI9MJH0G21u96UXKSyq4WKKTywhtA0nrtj7jdvEnd X-Received: by 2002:ae9:c30c:0:b0:78b:ea5b:4751 with SMTP id n12-20020ae9c30c000000b0078bea5b4751mr9605386qkg.65.1712598685530; Mon, 08 Apr 2024 10:51:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598685; cv=none; d=google.com; s=arc-20160816; b=rwg5zOFjGmtuuHScDIEhvUPm6+KhUcGDsHhnJfHQ5ljK1BeQo2VbZB85d3/Q2P71za HaG6G0UiqzE9HyWYiccJSdTtQ2Ehg8Ao0xLIJq+ynrJ7ImMVspmRthsn2LJfQbSXmT4M Eqz0ABW28nE6pOT3x6cTSvdUHowHweMP+TMlgLlP9QACd6E9OVZjxUlUnvAOWMr8W00Q BLHN8ev5aZaRkmN/wb85GSbOGXfC8NcrA8PfpfV9CmufaQAaETIJTxjyiL3DyqxrV4sx nsH/+47VfuvhQTkmfI7oUUeMtqzh0yc8+XS8xALmYvVjBsoAJCptuJ13EMI5GZjUP08I II1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=ZCdplx5RAU+rQd70pAqgPB6t58CmgDisH5Rp3Z9tsr4=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=yMS8rwR6uv6FZS4BMDdx/MkWJEjxtpjjDrp7Uw+3c/FEkUhnBJJ5y5i6Ycn8+YQe8J 3ClES+reNhmngB1jJ4fAICJZiadB8K1oujiD/PeKm/Ndg65sYQIFvnzS5mIDlhI6MFkE y1Yrar/Am8bn5I/nXEJnnUfQhEAx4cCbvESnSZAI8KCokc4Cc52Roi9WmotvtEAGDuEg 40cHsH7dcEpTJ+ZMMlYkLt0HWlzWO7ao9bM0INYJybWTtOrMC+ncGGsdSzafaBnXoOUd DnmTYazjzNOvI9OIWn+Z3QuGFLw0VnHde+JUvaJ5Pb/wclrDhdn+sBDiL4AsyX8vu+TM rzLA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=fDxPkqcG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.55 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:56 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 17/35] target/m68k: Perform the semihosting test during translate Date: Mon, 8 Apr 2024 07:49:11 -1000 Message-Id: <20240408174929.862917-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Replace EXCP_HALT_INSN by EXCP_SEMIHOSTING. Perform the pre- and post-insn tests during translate, leaving only the actual semihosting operation for the exception. Signed-off-by: Richard Henderson --- target/m68k/cpu.h | 2 +- target/m68k/op_helper.c | 14 ++----------- target/m68k/translate.c | 45 +++++++++++++++++++++++++++++++++++++---- 3 files changed, 44 insertions(+), 17 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index e184239a81..b5bbeedb7a 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -66,7 +66,7 @@ #define EXCP_MMU_ACCESS 58 /* MMU Access Level Violation Error */ #define EXCP_RTE 0x100 -#define EXCP_HALT_INSN 0x101 +#define EXCP_SEMIHOSTING 0x101 #define M68K_DTTR0 0 #define M68K_DTTR1 1 diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 125f6c1b08..15bad5dd46 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -202,18 +202,8 @@ static void cf_interrupt_all(CPUM68KState *env, int is_hw) /* Return from an exception. */ cf_rte(env); return; - case EXCP_HALT_INSN: - if (semihosting_enabled((env->sr & SR_S) == 0) - && (env->pc & 3) == 0 - && cpu_lduw_code(env, env->pc - 4) == 0x4e71 - && cpu_ldl_code(env, env->pc) == 0x4e7bf000) { - env->pc += 4; - do_m68k_semihosting(env, env->dregs[0]); - return; - } - cs->halted = 1; - cs->exception_index = EXCP_HLT; - cpu_loop_exit(cs); + case EXCP_SEMIHOSTING: + do_m68k_semihosting(env, env->dregs[0]); return; } } diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 8a194f2f21..8f61ff1238 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -26,12 +26,11 @@ #include "qemu/log.h" #include "qemu/qemu-print.h" #include "exec/translator.h" - #include "exec/helper-proto.h" #include "exec/helper-gen.h" - #include "exec/log.h" #include "fpu/softfloat.h" +#include "semihosting/semihost.h" #define HELPER_H "helper.h" #include "exec/helper-info.c.inc" @@ -1401,6 +1400,40 @@ static void gen_jmp_tb(DisasContext *s, int n, target_ulong dest, s->base.is_jmp = DISAS_NORETURN; } +#ifndef CONFIG_USER_ONLY +static bool semihosting_test(DisasContext *s) +{ + uint32_t test; + + if (!semihosting_enabled(IS_USER(s))) { + return false; + } + + /* + * "The semihosting instruction is immediately preceded by a + * nop aligned to a 4-byte boundary..." + * The preceding 2-byte (aligned) nop plus the 2-byte halt/bkpt + * means that we have advanced 4 bytes from the required nop. + */ + if (s->pc % 4 != 0) { + return false; + } + test = cpu_lduw_code(s->env, s->pc - 4); + if (test != 0x4e71) { + return false; + } + /* "... and followed by an invalid sentinel instruction movec %sp,0." */ + test = translator_ldl(s->env, &s->base, s->pc); + if (test != 0x4e7bf000) { + return false; + } + + /* Consume the sentinel. */ + s->pc += 4; + return true; +} +#endif /* !CONFIG_USER_ONLY */ + DISAS_INSN(scc) { DisasCompare c; @@ -4465,8 +4498,12 @@ DISAS_INSN(halt) gen_exception(s, s->base.pc_next, EXCP_PRIVILEGE); return; } - - gen_exception(s, s->pc, EXCP_HALT_INSN); + if (semihosting_test(s)) { + gen_exception(s, s->pc, EXCP_SEMIHOSTING); + return; + } + tcg_gen_movi_i32(cpu_halted, 1); + gen_exception(s, s->pc, EXCP_HLT); } DISAS_INSN(stop) From patchwork Mon Apr 8 17:49:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786944 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1771wrs; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Keith Packard Subject: [PULL 18/35] target/m68k: Support semihosting on non-ColdFire targets Date: Mon, 8 Apr 2024 07:49:12 -1000 Message-Id: <20240408174929.862917-19-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Keith Packard According to the m68k semihosting spec: "The instruction used to trigger a semihosting request depends on the m68k processor variant. On ColdFire, "halt" is used; on other processors (which don't implement "halt"), "bkpt #0" may be used." Add support for non-CodeFire processors by matching BKPT #0 instructions. Signed-off-by: Keith Packard [rth: Use semihosting_test()] Signed-off-by: Richard Henderson --- target/m68k/translate.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/m68k/translate.c b/target/m68k/translate.c index 8f61ff1238..659543020b 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -2646,6 +2646,11 @@ DISAS_INSN(bkpt) #if defined(CONFIG_USER_ONLY) gen_exception(s, s->base.pc_next, EXCP_DEBUG); #else + /* BKPT #0 is the alternate semihosting instruction. */ + if ((insn & 7) == 0 && semihosting_test(s)) { + gen_exception(s, s->pc, EXCP_SEMIHOSTING); + return; + } gen_exception(s, s->base.pc_next, EXCP_ILLEGAL); #endif } From patchwork Mon Apr 8 17:49:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786938 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp538wrs; Mon, 8 Apr 2024 10:52:17 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUC2GdseSPOQdnpKsjH+y2DCaWg5ApICA1xWkz0aN+mYQKhG47sFFnKARUC1kAqjN8cI4JRsV7No7RpiWVJ62GA X-Google-Smtp-Source: AGHT+IE1EbgI6TIwWtcSHqvXi958phtRLEtYzzi6IclbktHqRygJsjIgUDjjfDG2ET5lw/OPidIS X-Received: by 2002:a05:6102:e0e:b0:479:f9a7:f76d with SMTP id o14-20020a0561020e0e00b00479f9a7f76dmr2580649vst.18.1712598736857; Mon, 08 Apr 2024 10:52:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598736; cv=none; d=google.com; s=arc-20160816; b=Fg/7WYlPULZo4PK72tQlfWjgG0YpMccphkMANacxNhb0MvntuhskFFPBwZcS9IVW4e bNwD0CGJ6Y4iRjMw+xyYpIp0d4dAqho2qEXJsti33QB9X0aA96+q0OzdQ10MBFXKbQkJ D7cqoMIKuVLsJL55sfbbbGTRr0Z5Ije8e3V4AkGiubdsmSg0UgI2tR5k1nSfUFoY+7o+ j/tP8ocx5IDyrbskoMN+GX5QmpGGZhEPFAvSSKKIlWfzaxlvftwpWy7QsUVyNOF1pEmO JOKSrBdyQ13hDQV2jckvcu61H7O0+Ws/bzYSekkPYyelltttu5ViB6ynv2JBKndXLf10 0YSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=+hrHUKRn6eQNytNYIbrEJFLCXruCPezaWV08Xln+A+c=; fh=i/pWNGcx7KiR3ewgypxpPkuORYlkCnVXLqKVm9/UgNc=; b=IrNeUcfqq+yc+0Dv6yn7EU+btLkBLFJljRfKJ3P37pcqvnGnpFhSAGCrObRYpQaX2t s67NqE/bQdnu/dWziyyjIpGrUkmuhy1kWIFHMfuQJqpa6a61EAMA2vEWZmuwWPVKWXoI ciVZXpelfIvSqtstLz+ZWJym2m0bTZrt/4cErV+V+7OMIllfiI4XaAlh4MZ6erlzNxLs JmLBqdRQht5VUdRolMAJe7PFDZNLVI/E8bb/UMjXglNItGeXEFvhQt1O4pk10bnCMy2a wXWhe50M26wdf5570peu6UPMw8Rs1V28Slp4gfWHgN5gkVbB41NOybCkUq/IH0DWJXsj A71g==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="qf8/kLNw"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:49:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Pierrick Bouvier Subject: [PULL 19/35] tcg: Add TCGContext.emit_before_op Date: Mon, 8 Apr 2024 07:49:13 -1000 Message-Id: <20240408174929.862917-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Allow operations to be emitted via normal expanders into the middle of the opcode stream. Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Pierrick Bouvier Signed-off-by: Richard Henderson --- include/tcg/tcg.h | 6 ++++++ tcg/tcg.c | 14 ++++++++++++-- 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 451f3fec41..05a1912f8a 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -553,6 +553,12 @@ struct TCGContext { QTAILQ_HEAD(, TCGOp) ops, free_ops; QSIMPLEQ_HEAD(, TCGLabel) labels; + /* + * When clear, new ops are added to the tail of @ops. + * When set, new ops are added in front of @emit_before_op. + */ + TCGOp *emit_before_op; + /* Tells which temporary holds a given register. It does not take into account fixed registers */ TCGTemp *reg_to_temp[TCG_TARGET_NB_REGS]; diff --git a/tcg/tcg.c b/tcg/tcg.c index d6670237fb..0c0bb9d169 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1521,6 +1521,7 @@ void tcg_func_start(TCGContext *s) QTAILQ_INIT(&s->ops); QTAILQ_INIT(&s->free_ops); + s->emit_before_op = NULL; QSIMPLEQ_INIT(&s->labels); tcg_debug_assert(s->addr_type == TCG_TYPE_I32 || @@ -2332,7 +2333,11 @@ static void tcg_gen_callN(TCGHelperInfo *info, TCGTemp *ret, TCGTemp **args) op->args[pi++] = (uintptr_t)info; tcg_debug_assert(pi == total_args); - QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); + if (tcg_ctx->emit_before_op) { + QTAILQ_INSERT_BEFORE(tcg_ctx->emit_before_op, op, link); + } else { + QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); + } tcg_debug_assert(n_extend < ARRAY_SIZE(extend_free)); for (i = 0; i < n_extend; ++i) { @@ -3215,7 +3220,12 @@ static TCGOp *tcg_op_alloc(TCGOpcode opc, unsigned nargs) TCGOp *tcg_emit_op(TCGOpcode opc, unsigned nargs) { TCGOp *op = tcg_op_alloc(opc, nargs); - QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); + + if (tcg_ctx->emit_before_op) { + QTAILQ_INSERT_BEFORE(tcg_ctx->emit_before_op, op, link); + } else { + QTAILQ_INSERT_TAIL(&tcg_ctx->ops, op, link); + } return op; } From patchwork Mon Apr 8 17:49:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786925 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp68wrs; Mon, 8 Apr 2024 10:51:04 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUt5XOdwfOwBbcR+l48pCO9eeuuF2aSTWnL+9k41LRuy+z81td/HFChNSRTtqQKGl6mOcuCFZS1FrhNDhHMPchN X-Google-Smtp-Source: AGHT+IEVRhAruWS5dnT/XVpnywUrmuUBuLqp6DKSU8oZy9uynpjDREp2zoBhdGGoRLcjFfzNnKr0 X-Received: by 2002:a05:620a:494e:b0:78d:6b38:c975 with SMTP id vz14-20020a05620a494e00b0078d6b38c975mr1180524qkn.32.1712598663963; Mon, 08 Apr 2024 10:51:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598663; cv=none; d=google.com; s=arc-20160816; b=1Gtx01laD75ZLewIIly8C+nGn238teguqI5AoqdifEpJsut0tRLtJewh0FqiNHd1RO WTKM2B+5Fnmz/YnX/otzVsO4FLPnj604MfgCzdK/9pEFq8l+0itPOQLqEWurxrXDwICC Q0jW19vBnmzBfR7JBM53De6cB+C/bqPRR1DBsmvakTM5m7puFbmwMDRK6K4aV3ocv/0i TfUM3F2iu4crI6T8OL1SvXeIq0NZ+Sj2yYfoDN2lTopSQRyLYjIZ6TKrYxDEv3aKC7vi D/PSnHmSBLAl0nLKBczP4mFHYPPXfs3enIoMvdvRj+qGM1AwwbAA37hvFZCcfL7mVBfO T0fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Bfjee8xnAWAqUG6v01hjOGqeRqgvt7J3PQW0EStNCoU=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=s//VwEq83EMuci2Dq8bA8DXN1Pm8MsVwhXc0cGH8asU0Y56bOHeTVMp5ThilfLZhon Tg2Vi/MAVCEHezg1/81/yUCI9C1fqFn4mtDQMAWnTPbDI7C73Ic2EW4H82nKG87gIAJD MA2g2QkVJnN0lqwhyE1BlQSMlGwcqf9Ml4KKdoz5S6lPjdAG2FMefLagCNS+DDd8oBvp KttPt7CssA/egr0BwxOeuEsMz9J2JFNH0E5iW29pcOPYPMBUg2QWnNwiVRpWZ1QfJYLA jas2VlxOU3imcokCsdr1uBMhi3TMELKpouXctHgMzv67ngHIggxkT1Kd8e0Kg5M8YBi7 KaTg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SPjpghaV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.49.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:00 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 20/35] accel/tcg: Add insn_start to DisasContextBase Date: Mon, 8 Apr 2024 07:49:14 -1000 Message-Id: <20240408174929.862917-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102c; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org This is currently target-specific for many; begin making it target independent. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- include/exec/translator.h | 3 +++ accel/tcg/translator.c | 2 ++ 2 files changed, 5 insertions(+) diff --git a/include/exec/translator.h b/include/exec/translator.h index 51624feb10..ceaeca8c91 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -74,6 +74,8 @@ typedef enum DisasJumpType { * @singlestep_enabled: "Hardware" single stepping enabled. * @saved_can_do_io: Known value of cpu->neg.can_do_io, or -1 for unknown. * @plugin_enabled: TCG plugin enabled in this TB. + * @insn_start: The last op emitted by the insn_start hook, + * which is expected to be INDEX_op_insn_start. * * Architecture-agnostic disassembly context. */ @@ -87,6 +89,7 @@ typedef struct DisasContextBase { bool singlestep_enabled; int8_t saved_can_do_io; bool plugin_enabled; + struct TCGOp *insn_start; void *host_addr[2]; } DisasContextBase; diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 38c34009a5..ae61c154c2 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -140,6 +140,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, db->max_insns = *max_insns; db->singlestep_enabled = cflags & CF_SINGLE_STEP; db->saved_can_do_io = -1; + db->insn_start = NULL; db->host_addr[0] = host_pc; db->host_addr[1] = NULL; @@ -157,6 +158,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, while (true) { *max_insns = ++db->num_insns; ops->insn_start(db, cpu); + db->insn_start = tcg_last_op(); tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ if (plugin_enabled) { From patchwork Mon Apr 8 17:49:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786946 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1796wrs; Mon, 8 Apr 2024 10:55:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVR4mTYxok5LsWbPhamXFptnuJv9A9kQj4NbmGKZzzbrnfSj6QsgVcm4YMs/zEB1SBbiwbT8AIRSJGejUtigCo0 X-Google-Smtp-Source: AGHT+IHuvyB549V1ufNndT//qahD/xomaHVhKXUmQrBxJfAIG3CQDa9yX6K0mPANnmubIioVeSSG X-Received: by 2002:a05:622a:19a1:b0:434:bb25:ed02 with SMTP id u33-20020a05622a19a100b00434bb25ed02mr1612166qtc.63.1712598938910; Mon, 08 Apr 2024 10:55:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598938; cv=none; d=google.com; s=arc-20160816; b=jF928htxvEVCMKOzRh/LyKxm3mqwOOiXc0z7ayjaiIMEDPy58Dm+mJXExatb1breD0 Iu0dKr+V8mKs9gGXuznycK13bKhSH7mbjiLrY4UtM+exB3viqIYyp0nwjn3IBQPXEu9L +ufOPwlHaJ9QPkWZkjqF3ZbW2BqHYEedTGf8bSwe7tnC9sE1d/1oD2Iz2lu2DGOcaMRl eVOWinX/4aqDWxKoq6KK8Q6IXvxAxlaYorLRG93PoA9bKloIU8sDTZaVEcMrZ/TZj7M5 /+xfiwvhul4bti3GpHKh8zB+Yt9FJ1aEMGJ1CAZdOH70JY3BFfJi6JUplxxyDiltMRBE hhAw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=qu730y1a5bhHx8+lUgk6PRHwUAMG8x1kinVBmiKeHm0=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=1EdAhtrqvPdGWfW0Pz8mGBT0AjPdqxd8DoBzK1u8MtrkOYfRvkVV/ZqxB1xVPErJg0 4nBwOvT4a9LU0OVATqm0oNSU5b+9iPZKJXBh8jxCZXFOEcK688dy6A2RR16DF7Wmo5zy Tqz8cruAdmxC8i+wCyeJypqqKWt4GIcWelu+pgKzKkJtauzJDqkj1rBN0lytjdRf1PFQ jVt4FQnLWvAEQqEYkirZ2TPCaOfb9dr+XcGiArVUIPE9ncyoJj45gRqChLJS0z1mtvb6 LK93nNWRzyQ+kO8G2p9ksd2uUQP3ZfHKO2tKCE30wRARQZSRQmopTZDV4QTPqsvrahve /CCQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=vI2pmm2T; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:02 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 21/35] target/arm: Use insn_start from DisasContextBase Date: Mon, 8 Apr 2024 07:49:15 -1000 Message-Id: <20240408174929.862917-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52a; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org To keep the multiple update check, replace insn_start with insn_start_updated. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/tcg/translate.h | 12 ++++++------ target/arm/tcg/translate-a64.c | 2 +- target/arm/tcg/translate.c | 2 +- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h index 93be745cf3..dc66ff2190 100644 --- a/target/arm/tcg/translate.h +++ b/target/arm/tcg/translate.h @@ -165,10 +165,10 @@ typedef struct DisasContext { uint8_t gm_blocksize; /* True if this page is guarded. */ bool guarded_page; + /* True if the current insn_start has been updated. */ + bool insn_start_updated; /* Bottom two bits of XScale c15_cpar coprocessor access control reg */ int c15_cpar; - /* TCG op of the current insn_start. */ - TCGOp *insn_start; /* Offset from VNCR_EL2 when FEAT_NV2 redirects this reg to memory */ uint32_t nv2_redirect_offset; } DisasContext; @@ -276,10 +276,10 @@ static inline void disas_set_insn_syndrome(DisasContext *s, uint32_t syn) syn &= ARM_INSN_START_WORD2_MASK; syn >>= ARM_INSN_START_WORD2_SHIFT; - /* We check and clear insn_start_idx to catch multiple updates. */ - assert(s->insn_start != NULL); - tcg_set_insn_start_param(s->insn_start, 2, syn); - s->insn_start = NULL; + /* Check for multiple updates. */ + assert(!s->insn_start_updated); + s->insn_start_updated = true; + tcg_set_insn_start_param(s->base.insn_start, 2, syn); } static inline int curr_insn_len(DisasContext *s) diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 340265beb0..2666d52711 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -14179,7 +14179,7 @@ static void aarch64_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) pc_arg &= ~TARGET_PAGE_MASK; } tcg_gen_insn_start(pc_arg, 0, 0); - dc->insn_start = tcg_last_op(); + dc->insn_start_updated = false; } static void aarch64_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c index 69585e6003..dc49a8d806 100644 --- a/target/arm/tcg/translate.c +++ b/target/arm/tcg/translate.c @@ -9273,7 +9273,7 @@ static void arm_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) condexec_bits = (dc->condexec_cond << 4) | (dc->condexec_mask >> 1); } tcg_gen_insn_start(pc_arg, condexec_bits, 0); - dc->insn_start = tcg_last_op(); + dc->insn_start_updated = false; } static bool arm_check_kernelpage(DisasContext *dc) From patchwork Mon Apr 8 17:49:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786952 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2262wrs; Mon, 8 Apr 2024 10:57:05 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUD+UyQiTpfMZBwWvfLRgN0nfqR2VFsqmPO7iPT1v8gkf8fSIRy+zI44O5qV30ww715lsgUYJSizwaTPOZqtEpr X-Google-Smtp-Source: AGHT+IGbxRtWc+ULEYLugDt2306JCnlGhMvdSc8MA5MK3Q61LKl0AJaQfmeeRKI8W8aAbySTN4ff X-Received: by 2002:a0d:d952:0:b0:615:453:c526 with SMTP id b79-20020a0dd952000000b006150453c526mr8353635ywe.22.1712599024722; Mon, 08 Apr 2024 10:57:04 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712599024; cv=none; d=google.com; s=arc-20160816; b=DUOELwVVr5IocgeqRvr+dhVJCl2cmUMCKXkqxGON1ngtnge78O/qXQaM3VLSrJOxZ0 2TFhgNAzyafG2pgxNL8D9TwWaE3Q0Lh40XR6ZOBHCgNsIeDhlcOp8rVjDUcLJE2qBDiu 0v7glOciFtguO1zqFwYoFtkLoQ7LBYO+XvAfHX6I1vykF3B6xGtvKt7bhMaafrOQ5pGY DrRKWkR78YrKFlvKHgc+OiYL0eOLydtZkz6RYFV9WOjRu5a0DOYKEIDgGZR+yThE7uaw p77UXoiPHaf/2bNlyOUXtEjfcOa9ZLr7lHsB3lIwZzApbBWUinohV/41ZzEwPhLx1IPw 2zoA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RFanGzrvK8VkKk4csReRv0GVjABsPRaur2/zSeJo0ZU=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=vBNo/RXctN7JzltB04toIKvyrYIHZOtwS7egMjv52IA5rcIaKgkucaFnC3EoGRcOXK LprTjFJJq1oZ3UhFjeCjAxwN4ipLLBhyO0RN7Tc9OlGlSocZpPd7R9xACX1NnaIQwEaM cR4vj3TE7ZRd+tEqn8fD8cQmA2PL/INnXvrJ8kjW86qv8Gjsc7y6WiewccM2Q+9v/VhN T/Yql38kFEyb4fxS6sanTtemD3qMqfnE5vnEsMy9IrYgKOBQLjE0mxxlWl9ehuydfxHk oyCf0PvgxzUsznbCsn6ZSdQQ1gW42wvpYBagChhxVeY0qhTvd+5+995CBkEVbw4OObs/ X0ag==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uwIFljoG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:03 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 22/35] target/hppa: Use insn_start from DisasContextBase Date: Mon, 8 Apr 2024 07:49:16 -1000 Message-Id: <20240408174929.862917-23-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1031; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1031.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_PASS=-0.001, T_SPF_HELO_TEMPERROR=0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org To keep the multiple update check, replace insn_start with insn_start_updated. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/hppa/translate.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 8a1a8bc3aa..42fa480950 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -44,7 +44,6 @@ typedef struct DisasCond { typedef struct DisasContext { DisasContextBase base; CPUState *cs; - TCGOp *insn_start; uint64_t iaoq_f; uint64_t iaoq_b; @@ -62,6 +61,7 @@ typedef struct DisasContext { int privilege; bool psw_n_nonzero; bool is_pa20; + bool insn_start_updated; #ifdef CONFIG_USER_ONLY MemOp unalign; @@ -300,9 +300,9 @@ void hppa_translate_init(void) static void set_insn_breg(DisasContext *ctx, int breg) { - assert(ctx->insn_start != NULL); - tcg_set_insn_start_param(ctx->insn_start, 2, breg); - ctx->insn_start = NULL; + assert(!ctx->insn_start_updated); + ctx->insn_start_updated = true; + tcg_set_insn_start_param(ctx->base.insn_start, 2, breg); } static DisasCond cond_make_f(void) @@ -4694,7 +4694,7 @@ static void hppa_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) DisasContext *ctx = container_of(dcbase, DisasContext, base); tcg_gen_insn_start(ctx->iaoq_f, ctx->iaoq_b, 0); - ctx->insn_start = tcg_last_op(); + ctx->insn_start_updated = false; } static void hppa_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) From patchwork Mon Apr 8 17:49:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786936 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp365wrs; Mon, 8 Apr 2024 10:51:50 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVgxeAJMXFXczOdHGUG24r+mQvBMpu0hYWAANcwtibs+49mDhdRLvXfmsPejHlTuMHT/9Dq7Y+XE4ceWkc8jz7w X-Google-Smtp-Source: AGHT+IH5J9Hj95cNEHyfma7azQoA9h/YfnaVZwGaRGoae50QLCMxf8x46XrCGwWqjyFb30rza/oR X-Received: by 2002:a05:6214:e48:b0:69b:1e64:413d with SMTP id o8-20020a0562140e4800b0069b1e64413dmr3091649qvc.52.1712598710271; Mon, 08 Apr 2024 10:51:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598710; cv=none; d=google.com; s=arc-20160816; b=q0vgLi4STGwd51cskqaNlOkbOwEIrcR+wRlq8MSF5RvXSGBk5CFuWyqJZjjgmCaN0T lt7k8sWIYdNs75qTv/PD+/Nn6NQY79nc/9BmXFziSjIZsZC/SRJwQFe/xbeoCb4zQkGf g2QCRXmFY98gB7kl9rDnwoLunU+6PFe29bq7D59fwlCDjNH0zEX3mkGZXOXLtDd+MRBO qYjFcKuTQLd72IvdATYWhn00YjSSWGTys1JEM6tIhH5q4J+Oy8DcgcAlf+S8wpAlHDKv BX5N/7NWjXZYs82fgDqdsCQ2yC8dG4ZgiikdzJkPlj4c5Wq1Gbxc7tKkoK6xvTia+me/ YPrw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=fQO0EY4mDLrrFT+vnkTsVcf/DHsLrdpuFvrCYXf00/g=; fh=OTkfrEnbNDInppsfj4HB8z6V33zCj7LOct256XBfW6M=; b=MswxIqTCDVUNFsj2K/GJDjPQnzZZzVwnxid9viXWvTqI4/nhIX/yHzH5gjxs2Xqa+8 Y5HZWm8G7bCQn5Y6McfQ+lrtieCQwwsM8X6uWbw+pmZVUgg+K5KfYCALxHDI78JQNgQx beMn5R7cFATJgOYQVniqS9lHMk0KdgrBci/wL+pLf4jQYr/EnYjwP0GGpjAOcXK7U79Z LCTQ6FeesZE1BvgHfqvwZwH8bWa3zYfAlzwKqCzs/h91j7xBQ1jY3fGMACImYK2AngGE 6HSmDnYTNFp9r5LYaIJGAw19LkQaGvQ1SCfLw3IYru5bnKiqNQsoy7YqjnTFqMCNO3Ll GRhA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HN0D9VzU; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:05 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Paolo Bonzini Subject: [PULL 23/35] target/i386: Preserve DisasContextBase.insn_start across rewind Date: Mon, 8 Apr 2024 07:49:17 -1000 Message-Id: <20240408174929.862917-24-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When aborting translation of the current insn, restore the previous value of insn_start. Acked-by: Paolo Bonzini Signed-off-by: Richard Henderson --- target/i386/tcg/translate.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 07f642dc9e..76a42c679c 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -139,6 +139,7 @@ typedef struct DisasContext { TCGv_i64 tmp1_i64; sigjmp_buf jmpbuf; + TCGOp *prev_insn_start; TCGOp *prev_insn_end; } DisasContext; @@ -3123,6 +3124,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) /* END TODO */ s->base.num_insns--; tcg_remove_ops_after(s->prev_insn_end); + s->base.insn_start = s->prev_insn_start; s->base.is_jmp = DISAS_TOO_MANY; return false; default: @@ -6995,6 +6997,7 @@ static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) DisasContext *dc = container_of(dcbase, DisasContext, base); target_ulong pc_arg = dc->base.pc_next; + dc->prev_insn_start = dc->base.insn_start; dc->prev_insn_end = tcg_last_op(); if (tb_cflags(dcbase->tb) & CF_PCREL) { pc_arg &= ~TARGET_PAGE_MASK; From patchwork Mon Apr 8 17:49:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786945 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1775wrs; Mon, 8 Apr 2024 10:55:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX6tzE/t55G+GDBTjy9rYgFU/j90yS1igIKTGS+sx6jNGq5twYz5zFQwpt4f4OGEJ6OJc9GdBUBsPIiwLcetrfd X-Google-Smtp-Source: AGHT+IGn8lpqy7XU0K/yyn/XpRHLc9eRTy0UleBnSwH1hcp9PJ8+f1JyEOh6+aYxTDTDlCSwn+aP X-Received: by 2002:a05:6808:149:b0:3c3:c923:4f03 with SMTP id h9-20020a056808014900b003c3c9234f03mr9897033oie.19.1712598935867; Mon, 08 Apr 2024 10:55:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598935; cv=none; d=google.com; s=arc-20160816; b=q6wlRnS3EsxujSjKcmpdDY7QJrdcn8jQaYeBYuzxmEZLJ1Bp3VSQFtL0CCjjpwCbr2 4G4vlOFtbr6M8IIaH7tey4rbVQXBGFSUx0+it7qEb7wERTMH0Pc+egE3zDcyDfVwxZAp /Kd2eeaAEN6k0g1p+szzi79427IsugDx4S8hIBtPicCk8rRUA6GBPJWfvEzbsEbEJNJL 3FOYA1XA2kUwiK9Do7dUjyszD2cErt6Uu2p/XxDjgaJK4SBQbo+KOzwhwPy7fzRcK5GG GFSdZn2TiXyoGzJEIAOpQxes77yP6H4hS7Womm9Qt5Rq0UcYq5Wgv+lAOaatsoWyCpkA qKKg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=cP8jA9GFq1yR+e10bjvG/FkvD/Ggh4PQtWX+MXPzUjs=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=GSAj5ZRb5elykeVNDkgCOWsPYtoITOm3ZY9565jtk8x3Wv+t98sEg39fzYlwzuYa+0 Cq6qiO64hCEB8VVt06jJ3DuHZ5USa6rsrfmKu6u6xaWpRvvzSrbt4cXhk2LJqYWJflSC I5G1agloxyC/41sQItdPRlhqO2KPH1ovfbT4LinbqsiZADacAv/xOAXM+yrKPygstHsr r0nvb7ALxkv+1hyxw1ff/jAyR6DLuUmgnHhPc3sXj7rExKjyYwb0WjjFjRubVty7rIjU bQvtB6PN9bszzu2kRxARnn1zHAosV+bFXMdG0fESrMxyuDIP84TWAAnD6UYFLLxKE/XA ShlQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lTJvob90; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:06 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 24/35] target/microblaze: Use insn_start from DisasContextBase Date: Mon, 8 Apr 2024 07:49:18 -1000 Message-Id: <20240408174929.862917-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42a; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 4e52ef32db..fc451befae 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -62,9 +62,6 @@ typedef struct DisasContext { DisasContextBase base; const MicroBlazeCPUConfig *cfg; - /* TCG op of the current insn_start. */ - TCGOp *insn_start; - TCGv_i32 r0; bool r0_set; @@ -699,14 +696,14 @@ static TCGv compute_ldst_addr_ea(DisasContext *dc, int ra, int rb) static void record_unaligned_ess(DisasContext *dc, int rd, MemOp size, bool store) { - uint32_t iflags = tcg_get_insn_start_param(dc->insn_start, 1); + uint32_t iflags = tcg_get_insn_start_param(dc->base.insn_start, 1); iflags |= ESR_ESS_FLAG; iflags |= rd << 5; iflags |= store * ESR_S; iflags |= (size == MO_32) * ESR_W; - tcg_set_insn_start_param(dc->insn_start, 1, iflags); + tcg_set_insn_start_param(dc->base.insn_start, 1, iflags); } #endif @@ -1624,7 +1621,6 @@ static void mb_tr_insn_start(DisasContextBase *dcb, CPUState *cs) DisasContext *dc = container_of(dcb, DisasContext, base); tcg_gen_insn_start(dc->base.pc_next, dc->tb_flags & ~MSR_TB_MASK); - dc->insn_start = tcg_last_op(); } static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) From patchwork Mon Apr 8 17:49:19 2024 Content-Type: text/plain; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:08 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 25/35] target/riscv: Use insn_start from DisasContextBase Date: Mon, 8 Apr 2024 07:49:19 -1000 Message-Id: <20240408174929.862917-26-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52f; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org To keep the multiple update check, replace insn_start with insn_start_updated. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/riscv/translate.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 9d57089fcc..9ff09ebdb6 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -115,8 +115,7 @@ typedef struct DisasContext { bool itrigger; /* FRM is known to contain a valid value. */ bool frm_valid; - /* TCG of the current insn_start */ - TCGOp *insn_start; + bool insn_start_updated; } DisasContext; static inline bool has_ext(DisasContext *ctx, uint32_t ext) @@ -207,9 +206,9 @@ static void gen_check_nanbox_s(TCGv_i64 out, TCGv_i64 in) static void decode_save_opc(DisasContext *ctx) { - assert(ctx->insn_start != NULL); - tcg_set_insn_start_param(ctx->insn_start, 1, ctx->opcode); - ctx->insn_start = NULL; + assert(!ctx->insn_start_updated); + ctx->insn_start_updated = true; + tcg_set_insn_start_param(ctx->base.insn_start, 1, ctx->opcode); } static void gen_pc_plus_diff(TCGv target, DisasContext *ctx, @@ -1224,7 +1223,7 @@ static void riscv_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu) } tcg_gen_insn_start(pc_next, 0); - ctx->insn_start = tcg_last_op(); + ctx->insn_start_updated = false; } static void riscv_tr_translate_insn(DisasContextBase *dcbase, CPUState *cpu) From patchwork Mon Apr 8 17:49:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786940 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp838wrs; Mon, 8 Apr 2024 10:52:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVYSurlAVprIMClw+h2Yf4Jbxc3zWBx9A5p60LKx64nbx5EACf9tx0wpwAS1orOaqYg05mMPGSkUuk1ziq9q/FY X-Google-Smtp-Source: AGHT+IFl+kEPCK9LALLcTEAo0n/pI8yW4jcZpQoXyVaSVOoX81Y5+zNRf6HkXWY3HH3xLjoDZEZh X-Received: by 2002:a05:620a:1594:b0:78d:683b:941b with SMTP id d20-20020a05620a159400b0078d683b941bmr2478556qkk.39.1712598778469; Mon, 08 Apr 2024 10:52:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598778; cv=none; d=google.com; s=arc-20160816; b=WbJgkF+vT1Usa1HiknRplmim+VVs6Mfkdhp01kFu07fmBHUzueTNsa3Z0JXDWz+E0c fdQVmmigsoZ9Cw82YqN3Ma54AQScYlJlDYVRJUHWI+kJpA7pKmtiEWL9t5PSOhaEZUeg rGqsbPogfif8lO6fv1tkLMAM+m4kJvr+O9+b3xAMhEzNky240VYQFcoIOik8Ho0kU5vd aNCcV+VJpAPQc/8K6d6httKc0qCADfNki1sEBkX45Y27d4Zm4ePMisxRdi2h1KC81EGR shX+70/rTxbneIu7gOWq81MI0Inn7ijBxvLSiCMN+9FHJ7RwVbahIJQFjMzs4FuERvLm CDIg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=pLzmDWgl8qUDWCq3D57/PwLyiFcPLxohH0NJBMBSEDg=; fh=kQadAhxV42GJ3cd2VUw1RyURv/zJQGvmUdF7iLEVTtc=; b=HkK6Yp45bkGeLITJ9OM/0Qsr5/SQ/MqeBb9vLqiPQ0gvrRVvDhal9vpADQO7xNcFm9 9BCwCjeeZzHq4rbWJ7h2hKGX5m9DVk2iEmdQjVkeYvw7BJX/k44LyQQfC5cUo189iwIU nxRLZqEh9FUi64eGNfAokaKC+X8ur+ftgQguIe2up1aObZEZrfxcJeiRvbwMb9xvegnh DdalCGAsDVDFWkAJ3cMZHOCNzRtxswY1ViY2Wr+QrAFQr51hAwLMM0kQZYOF7ky8bstu Kr29TS1Zj+7TabJR/cu1vc+WktWThgwIL232rP4uc+riBRn5K1Zrn4cC/HLt/THXUBGe xrNA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=c9OolPn3; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:09 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 26/35] target/s390x: Use insn_start from DisasContextBase Date: Mon, 8 Apr 2024 07:49:20 -1000 Message-Id: <20240408174929.862917-27-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1033; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1033.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/s390x/tcg/translate.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 57b7db1ee9..90a74ee795 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -141,7 +141,6 @@ struct DisasFields { struct DisasContext { DisasContextBase base; const DisasInsn *insn; - TCGOp *insn_start; DisasFields fields; uint64_t ex_value; /* @@ -6314,7 +6313,7 @@ static DisasJumpType translate_one(CPUS390XState *env, DisasContext *s) insn = extract_insn(env, s); /* Update insn_start now that we know the ILEN. */ - tcg_set_insn_start_param(s->insn_start, 2, s->ilen); + tcg_set_insn_start_param(s->base.insn_start, 2, s->ilen); /* Not found means unimplemented/illegal opcode. */ if (insn == NULL) { @@ -6468,7 +6467,6 @@ static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) /* Delay the set of ilen until we've read the insn. */ tcg_gen_insn_start(dc->base.pc_next, dc->cc_op, 0); - dc->insn_start = tcg_last_op(); } static target_ulong get_next_pc(CPUS390XState *env, DisasContext *s, From patchwork Mon Apr 8 17:49:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786948 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1846wrs; Mon, 8 Apr 2024 10:55:45 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUZIkPiCL2iliGFCKj4PTgHZU8HKP9T2hsTbxAxrbREme3ERuB2kLbvfkthpA6O/I+1z4pKPXz9/29rqXWdh6FI X-Google-Smtp-Source: AGHT+IFwDwnYSenVG3ERRcSLn5Nr46ZYGxvMHMIPdjfGUaYEtFl8Jb4ZUB8yswyEHzL+BhdUVe7T X-Received: by 2002:a05:6214:2244:b0:696:7d37:1a6b with SMTP id c4-20020a056214224400b006967d371a6bmr13429433qvc.56.1712598945532; Mon, 08 Apr 2024 10:55:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598945; cv=none; d=google.com; s=arc-20160816; b=BoIWXWWoFbUKGDqrbOv3mOSkR35ZaQvBGcz3HFEYYrtzOQK1eWUYWsRXhEhNzRJ4fB lIeTx80eGftRVObc5UVXe06Vqotfu2bJsJeEL8nbP3mMvRyiIGLZwpOxqaXGQOuYW5qf h+yxeRxSh8ZDGS6DhS45/LhxO2WRHHZluJSFLzRC3fBZLXK96ylTrLXpfmfrgsUbZkED m98I1zXcTX1JySbs+dhV8Yhit3QZVzY8QM/xok8C/pHYcvUBi6I8HPBg6xqgfesHb9Y6 Df3WpLoNmKCdloWYlzxVBQT5YwIoN4AQCkMSrpg0JxbnD8tn7rEuSTiCtcEJqZ1oyhDX bsMA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LWeWfrDPztEwkV9YuE7zu+DtIohBh0oWfxn6udjmQ4s=; fh=feciRXMMXjL5Zdx/9FYuVSJ4fTkSvjANJ3wyTAeS3QU=; b=Zvb+lAk8jsZqV8z4N+8MGZy6q0HqaRRrzwdH5WrX4T9qdXpTo6NXNrXymgPDmv/w/6 qmKhYlLkqvz1pD5LFQd5Q6CsNOWhjNFYg66qeWIY15HhZw0Lruomtwec3b/YXFE3M8BI DTeFZoEB+M3yngSrB5pU80jb0PT0eP2JKiiILVa3PxeygujI5hBi4oEclek5lXj6STxf zcybb6SsD+HzkCvJHFgrriAGqBoqo1V/yyidthONd2qr5dqEXpIkKlXMTMPHSSs9AAGF zJp0hNxF07D9DIyFooanCabsFOTcG5IRYtb7+Xpb5B9clWRQF8gWDVir3sBToviuXPQa +4aw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XgqngNY7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: =?utf-8?q?J=C3=B8rgen_Hansen?= , =?utf-8?q?Philip?= =?utf-8?q?pe_Mathieu-Daud=C3=A9?= Subject: [PULL 27/35] accel/tcg: Improve can_do_io management Date: Mon, 8 Apr 2024 07:49:21 -1000 Message-Id: <20240408174929.862917-28-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We already attempted to set and clear can_do_io before the first and last insns, but only used the initial value of max_insns and the call to translator_io_start to find those insns. Now that we track insn_start in DisasContextBase, and now that we have emit_before_op, we can wait until we have finished translation to identify the true first and last insns and emit the sets of can_do_io at that time. This fixes the case of a translation block which crossed a page boundary, and for which the second page turned out to be mmio. In this case we truncate the block, and the previous logic for can_do_io could leave a block with a single insn with can_do_io set to false, which would fail an assertion in cpu_io_recompile. Reported-by: Jørgen Hansen Reviewed-by: Philippe Mathieu-Daudé Tested-by: Jørgen Hansen Signed-off-by: Richard Henderson --- include/exec/translator.h | 1 - accel/tcg/translator.c | 45 ++++++++++++++++++++------------------- 2 files changed, 23 insertions(+), 23 deletions(-) diff --git a/include/exec/translator.h b/include/exec/translator.h index ceaeca8c91..2c4fb818e7 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -87,7 +87,6 @@ typedef struct DisasContextBase { int num_insns; int max_insns; bool singlestep_enabled; - int8_t saved_can_do_io; bool plugin_enabled; struct TCGOp *insn_start; void *host_addr[2]; diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index ae61c154c2..9de0bc34c8 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -18,20 +18,14 @@ static void set_can_do_io(DisasContextBase *db, bool val) { - if (db->saved_can_do_io != val) { - db->saved_can_do_io = val; - - QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1); - tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env, - offsetof(ArchCPU, parent_obj.neg.can_do_io) - - offsetof(ArchCPU, env)); - } + QEMU_BUILD_BUG_ON(sizeof_field(CPUState, neg.can_do_io) != 1); + tcg_gen_st8_i32(tcg_constant_i32(val), tcg_env, + offsetof(ArchCPU, parent_obj.neg.can_do_io) - + offsetof(ArchCPU, env)); } bool translator_io_start(DisasContextBase *db) { - set_can_do_io(db, true); - /* * Ensure that this instruction will be the last in the TB. * The target may override this to something more forceful. @@ -84,13 +78,6 @@ static TCGOp *gen_tb_start(DisasContextBase *db, uint32_t cflags) - offsetof(ArchCPU, env)); } - /* - * cpu->neg.can_do_io is set automatically here at the beginning of - * each translation block. The cost is minimal, plus it would be - * very easy to forget doing it in the translator. - */ - set_can_do_io(db, db->max_insns == 1); - return icount_start_insn; } @@ -129,6 +116,7 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, { uint32_t cflags = tb_cflags(tb); TCGOp *icount_start_insn; + TCGOp *first_insn_start = NULL; bool plugin_enabled; /* Initialize DisasContext */ @@ -139,7 +127,6 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, db->num_insns = 0; db->max_insns = *max_insns; db->singlestep_enabled = cflags & CF_SINGLE_STEP; - db->saved_can_do_io = -1; db->insn_start = NULL; db->host_addr[0] = host_pc; db->host_addr[1] = NULL; @@ -159,6 +146,9 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, *max_insns = ++db->num_insns; ops->insn_start(db, cpu); db->insn_start = tcg_last_op(); + if (first_insn_start == NULL) { + first_insn_start = db->insn_start; + } tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ if (plugin_enabled) { @@ -171,10 +161,6 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, * done next -- either exiting this loop or locate the start of * the next instruction. */ - if (db->num_insns == db->max_insns) { - /* Accept I/O on the last instruction. */ - set_can_do_io(db, true); - } ops->translate_insn(db, cpu); /* @@ -207,6 +193,21 @@ void translator_loop(CPUState *cpu, TranslationBlock *tb, int *max_insns, ops->tb_stop(db, cpu); gen_tb_end(tb, cflags, icount_start_insn, db->num_insns); + /* + * Manage can_do_io for the translation block: set to false before + * the first insn and set to true before the last insn. + */ + if (db->num_insns == 1) { + tcg_debug_assert(first_insn_start == db->insn_start); + } else { + tcg_debug_assert(first_insn_start != db->insn_start); + tcg_ctx->emit_before_op = first_insn_start; + set_can_do_io(db, false); + } + tcg_ctx->emit_before_op = db->insn_start; + set_can_do_io(db, true); + tcg_ctx->emit_before_op = NULL; + if (plugin_enabled) { plugin_gen_tb_end(cpu, db->num_insns); } From patchwork Mon Apr 8 17:49:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786947 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1803wrs; Mon, 8 Apr 2024 10:55:39 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX2I/tf/PXbhLdynT/ot8sQMGvSduFweHaNNkP33mQB7ZQMbexxPpV1NJ/h8bcz4vTVEzy9RaQk3eHNxBpDYYfR X-Google-Smtp-Source: AGHT+IE85bHmgx4q0TGODbKPvhyDUYl4/YXqGvhD5/sPh+QKGk5CftMy0aHdV80k3lkQi1tuBmCK X-Received: by 2002:ac8:5d4a:0:b0:434:6fc1:b49f with SMTP id g10-20020ac85d4a000000b004346fc1b49fmr9380513qtx.4.1712598939091; Mon, 08 Apr 2024 10:55:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598939; cv=none; d=google.com; s=arc-20160816; b=pLqkweDfaVbZCoYbyEtToH12AT95asv+NAerPn8ZWir0flnB5oe0u2c5ELV4Zr1W4x Q0CGoabxhMS3hrtJ9AS2cns4NWFmadA8eD0iqd7dMt7xAA4PqeAxEJkGwnbS2Ll24BGr wyjDA4XPTjQVY9XaKqKDKKZojeWJd+10PR/9yWScEnWp1eUHtisYchWUIJBn68dHtkx+ Qec6cgHiBl8dgAtbx4/DvVkBchOvAHXjm6ik4uNStxDI/ZNOsL0/fyQk4z9ujEtKArbt ermHyX3nGiKEHIwbhmO9HtM8ODlt3BOX96/yeBZIlPvtCjMqrIGXdUI7lnLSabf+MJaM X5/Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=r70v09Z1jYUdUmudZIEve8pIi40latYcxErAtIALfYA=; fh=IOfZmL/4G2LGBtSV+LzySu7eotL7HJ1AQcRx3etIBXU=; b=I9aLKolTvAL3ddj5xjpZkhZ02Vp10oIw+GmyXsFsAaDC28rB+P6TKMrohg55akFWcg nu02M4kCNHIIqJbZ5LFADCevlKtFpIoF0HEX7ifj1hEndVzcWnPryyE5ZFTe6qErjzi/ ffiASZaPQYU871QxGuPkSZoqoUvsd4nGsDurbfhaliUL924cQH2NznRGsWmojgX7AP3X KoLfC1ESiwSqHOUfpgx+PD6mg2BiWCLwvqmWL4F09ffBhEE8fi1uXkmTrb8KKCUI4QYU 6FLJzD2Jky4u35HRuzBYkkWR9U+L0LX8L4p+EqGFIvppW5nTD8f340P5pZ1LmGLmqnAy a6oQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=wrA720sP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alexander Monakov , Mikhail Romanov Subject: [PULL 28/35] util/bufferiszero: Remove SSE4.1 variant Date: Mon, 8 Apr 2024 07:49:22 -1000 Message-Id: <20240408174929.862917-29-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52b; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Alexander Monakov The SSE4.1 variant is virtually identical to the SSE2 variant, except for using 'PTEST+JNZ' in place of 'PCMPEQB+PMOVMSKB+CMP+JNE' for testing if an SSE register is all zeroes. The PTEST instruction decodes to two uops, so it can be handled only by the complex decoder, and since CMP+JNE are macro-fused, both sequences decode to three uops. The uops comprising the PTEST instruction dispatch to p0 and p5 on Intel CPUs, so PCMPEQB+PMOVMSKB is comparatively more flexible from dispatch standpoint. Hence, the use of PTEST brings no benefit from throughput standpoint. Its latency is not important, since it feeds only a conditional jump, which terminates the dependency chain. I never observed PTEST variants to be faster on real hardware. Signed-off-by: Alexander Monakov Signed-off-by: Mikhail Romanov Reviewed-by: Richard Henderson Message-Id: <20240206204809.9859-2-amonakov@ispras.ru> --- util/bufferiszero.c | 29 ----------------------------- 1 file changed, 29 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 3e6a5dfd63..f5a3634f9a 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -100,34 +100,6 @@ buffer_zero_sse2(const void *buf, size_t len) } #ifdef CONFIG_AVX2_OPT -static bool __attribute__((target("sse4"))) -buffer_zero_sse4(const void *buf, size_t len) -{ - __m128i t = _mm_loadu_si128(buf); - __m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16); - __m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16); - - /* Loop over 16-byte aligned blocks of 64. */ - while (likely(p <= e)) { - __builtin_prefetch(p); - if (unlikely(!_mm_testz_si128(t, t))) { - return false; - } - t = p[-4] | p[-3] | p[-2] | p[-1]; - p += 4; - } - - /* Finish the aligned tail. */ - t |= e[-3]; - t |= e[-2]; - t |= e[-1]; - - /* Finish the unaligned tail. */ - t |= _mm_loadu_si128(buf + len - 16); - - return _mm_testz_si128(t, t); -} - static bool __attribute__((target("avx2"))) buffer_zero_avx2(const void *buf, size_t len) { @@ -221,7 +193,6 @@ select_accel_cpuinfo(unsigned info) #endif #ifdef CONFIG_AVX2_OPT { CPUINFO_AVX2, 128, buffer_zero_avx2 }, - { CPUINFO_SSE4, 64, buffer_zero_sse4 }, #endif { CPUINFO_SSE2, 64, buffer_zero_sse2 }, { CPUINFO_ALWAYS, 0, buffer_zero_int }, From patchwork Mon Apr 8 17:49:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786954 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2606wrs; Mon, 8 Apr 2024 10:58:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXDc1AlI0JhVKp6RwlzgPR1Cah0WwkKwQyYAuK2M53xYWWkh96YaMsO1ZdR/QzgFUnK6lJE+4Xuj4PrPgDkgfx2 X-Google-Smtp-Source: AGHT+IEkVqo1ADt1IUsn/qz8FoaNr+o893ke9bInMYlePoxdUC1xHsnH8ITtGm2YxJ0q/zkT7S6D X-Received: by 2002:a05:6808:189e:b0:3c5:e91e:2a62 with SMTP id bi30-20020a056808189e00b003c5e91e2a62mr8116181oib.23.1712599088953; Mon, 08 Apr 2024 10:58:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712599088; cv=none; d=google.com; s=arc-20160816; b=RM3guOR4TRRD/NvVu24cW10zgeHNzRin13HvNcf9N7uxMWaKIF+9AxR3OscZVBMIDb 2El/79r4ViEiLw+uzM5B1nM6H9SsGBgso9w9EWCDOnbByH6zaJqxnLKdQ/b5CW3fMLkw dbfqjSAO8iMdLbG11ZPKSUYoA4AtGSZLHMOXkXDeZjK1d0vJQdlj0dv/1JjTQI9ZDXor YeZJz7Ru85kIaG0POjWCCvYlt37uUNL1jQhSH9p8HTIvrrc5kb4oigJqLXf6mIGl5kh7 36ZkYmHCwpI0xysn93SBE3pxLUlWtaMr0ipkc4kKGlv2f4nPqUdf9f0UefgpGmuToPR4 0eTA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Sc6Au+pExfgVbkEVt3xBcrgjk6DJCZWLxXzjjgNJTcI=; fh=IOfZmL/4G2LGBtSV+LzySu7eotL7HJ1AQcRx3etIBXU=; b=S9gVwsaudwABwRts2USPV4VHtysebWGXVaXh4Bd054iGCcEZmLbVSxdf23kQaykUwJ fahlmbC6ae92rErj6w98eWIYyIhQYZLS4/qR35owipGj5Tau8HPkETHq7Xo2OvVkawEq gKMVg/4ssAboKH4rIzKccn5ZJTRSQmMVolXP1esodaFFTjscW4ebtmTzXjp02f+awBdS decywDHcwZpNv9sPfEqxUXD3BC7FsMA1B+0FPsRX2nQl7Bs6WgTNYhvOYRl0WsdvcGbi 6a8W7alLulQfRMtydL+ajb9vAFyyqSPvExHieszcZRuv+W30z9W28Okx5q+iJ20vxagK JSBA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=O7hoOfOH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alexander Monakov , Mikhail Romanov Subject: [PULL 29/35] util/bufferiszero: Remove AVX512 variant Date: Mon, 8 Apr 2024 07:49:23 -1000 Message-Id: <20240408174929.862917-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::535; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Alexander Monakov Thanks to early checks in the inline buffer_is_zero wrapper, the SIMD routines are invoked much more rarely in normal use when most buffers are non-zero. This makes use of AVX512 unprofitable, as it incurs extra frequency and voltage transition periods during which the CPU operates at reduced performance, as described in https://travisdowns.github.io/blog/2020/01/17/avxfreq1.html Signed-off-by: Mikhail Romanov Signed-off-by: Alexander Monakov Reviewed-by: Richard Henderson Message-Id: <20240206204809.9859-4-amonakov@ispras.ru> Signed-off-by: Richard Henderson --- util/bufferiszero.c | 38 +++----------------------------------- 1 file changed, 3 insertions(+), 35 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index f5a3634f9a..641d5f9b9e 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -64,7 +64,7 @@ buffer_zero_int(const void *buf, size_t len) } } -#if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT) || defined(__SSE2__) +#if defined(CONFIG_AVX2_OPT) || defined(__SSE2__) #include /* Note that each of these vectorized functions require len >= 64. */ @@ -128,41 +128,12 @@ buffer_zero_avx2(const void *buf, size_t len) } #endif /* CONFIG_AVX2_OPT */ -#ifdef CONFIG_AVX512F_OPT -static bool __attribute__((target("avx512f"))) -buffer_zero_avx512(const void *buf, size_t len) -{ - /* Begin with an unaligned head of 64 bytes. */ - __m512i t = _mm512_loadu_si512(buf); - __m512i *p = (__m512i *)(((uintptr_t)buf + 5 * 64) & -64); - __m512i *e = (__m512i *)(((uintptr_t)buf + len) & -64); - - /* Loop over 64-byte aligned blocks of 256. */ - while (p <= e) { - __builtin_prefetch(p); - if (unlikely(_mm512_test_epi64_mask(t, t))) { - return false; - } - t = p[-4] | p[-3] | p[-2] | p[-1]; - p += 4; - } - - t |= _mm512_loadu_si512(buf + len - 4 * 64); - t |= _mm512_loadu_si512(buf + len - 3 * 64); - t |= _mm512_loadu_si512(buf + len - 2 * 64); - t |= _mm512_loadu_si512(buf + len - 1 * 64); - - return !_mm512_test_epi64_mask(t, t); - -} -#endif /* CONFIG_AVX512F_OPT */ - /* * Make sure that these variables are appropriately initialized when * SSE2 is enabled on the compiler command-line, but the compiler is * too old to support CONFIG_AVX2_OPT. */ -#if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT) +#if defined(CONFIG_AVX2_OPT) # define INIT_USED 0 # define INIT_LENGTH 0 # define INIT_ACCEL buffer_zero_int @@ -188,9 +159,6 @@ select_accel_cpuinfo(unsigned info) unsigned len; bool (*fn)(const void *, size_t); } all[] = { -#ifdef CONFIG_AVX512F_OPT - { CPUINFO_AVX512F, 256, buffer_zero_avx512 }, -#endif #ifdef CONFIG_AVX2_OPT { CPUINFO_AVX2, 128, buffer_zero_avx2 }, #endif @@ -208,7 +176,7 @@ select_accel_cpuinfo(unsigned info) return 0; } -#if defined(CONFIG_AVX512F_OPT) || defined(CONFIG_AVX2_OPT) +#if defined(CONFIG_AVX2_OPT) static void __attribute__((constructor)) init_accel(void) { used_accel = select_accel_cpuinfo(cpuinfo_init()); From patchwork Mon Apr 8 17:49:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786942 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1756wrs; Mon, 8 Apr 2024 10:55:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXH2vBFshQftCYuSSmTJFqX89aYMRnNT+DB+y2PWTdZLHzzlcr16HpnHIXm/9k0h7fWhe0JnlnwQRUb6crQlWzH X-Google-Smtp-Source: AGHT+IGsLf1IH2HgFza7TclWnN1oMCn6BcOlBbQpc5XI68eAgXZdY7o8ORgSy3k81U1vDiagv0lx X-Received: by 2002:ad4:5f09:0:b0:69b:1a48:ed72 with SMTP id fo9-20020ad45f09000000b0069b1a48ed72mr5374758qvb.52.1712598933761; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alexander Monakov , Mikhail Romanov Subject: [PULL 30/35] util/bufferiszero: Reorganize for early test for acceleration Date: Mon, 8 Apr 2024 07:49:24 -1000 Message-Id: <20240408174929.862917-31-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102b; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Alexander Monakov Test for length >= 256 inline, where is is often a constant. Before calling into the accelerated routine, sample three bytes from the buffer, which handles most non-zero buffers. Signed-off-by: Alexander Monakov Signed-off-by: Mikhail Romanov Message-Id: <20240206204809.9859-3-amonakov@ispras.ru> [rth: Use __builtin_constant_p; move the indirect call out of line.] Signed-off-by: Richard Henderson --- include/qemu/cutils.h | 32 ++++++++++++++++- util/bufferiszero.c | 84 +++++++++++++++++-------------------------- 2 files changed, 63 insertions(+), 53 deletions(-) diff --git a/include/qemu/cutils.h b/include/qemu/cutils.h index 92c927a6a3..741dade7cf 100644 --- a/include/qemu/cutils.h +++ b/include/qemu/cutils.h @@ -187,9 +187,39 @@ char *freq_to_str(uint64_t freq_hz); /* used to print char* safely */ #define STR_OR_NULL(str) ((str) ? (str) : "null") -bool buffer_is_zero(const void *buf, size_t len); +/* + * Check if a buffer is all zeroes. + */ + +bool buffer_is_zero_ool(const void *vbuf, size_t len); +bool buffer_is_zero_ge256(const void *vbuf, size_t len); bool test_buffer_is_zero_next_accel(void); +static inline bool buffer_is_zero_sample3(const char *buf, size_t len) +{ + /* + * For any reasonably sized buffer, these three samples come from + * three different cachelines. In qemu-img usage, we find that + * each byte eliminates more than half of all buffer testing. + * It is therefore critical to performance that the byte tests + * short-circuit, so that we do not pull in additional cache lines. + * Do not "optimize" this to !(a | b | c). + */ + return !buf[0] && !buf[len - 1] && !buf[len / 2]; +} + +#ifdef __OPTIMIZE__ +static inline bool buffer_is_zero(const void *buf, size_t len) +{ + return (__builtin_constant_p(len) && len >= 256 + ? buffer_is_zero_sample3(buf, len) && + buffer_is_zero_ge256(buf, len) + : buffer_is_zero_ool(buf, len)); +} +#else +#define buffer_is_zero buffer_is_zero_ool +#endif + /* * Implementation of ULEB128 (http://en.wikipedia.org/wiki/LEB128) * Input is limited to 14-bit numbers diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 641d5f9b9e..972f394cbd 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -26,8 +26,9 @@ #include "qemu/bswap.h" #include "host/cpuinfo.h" -static bool -buffer_zero_int(const void *buf, size_t len) +static bool (*buffer_is_zero_accel)(const void *, size_t); + +static bool buffer_is_zero_integer(const void *buf, size_t len) { if (unlikely(len < 8)) { /* For a very small buffer, simply accumulate all the bytes. */ @@ -128,60 +129,38 @@ buffer_zero_avx2(const void *buf, size_t len) } #endif /* CONFIG_AVX2_OPT */ -/* - * Make sure that these variables are appropriately initialized when - * SSE2 is enabled on the compiler command-line, but the compiler is - * too old to support CONFIG_AVX2_OPT. - */ -#if defined(CONFIG_AVX2_OPT) -# define INIT_USED 0 -# define INIT_LENGTH 0 -# define INIT_ACCEL buffer_zero_int -#else -# ifndef __SSE2__ -# error "ISA selection confusion" -# endif -# define INIT_USED CPUINFO_SSE2 -# define INIT_LENGTH 64 -# define INIT_ACCEL buffer_zero_sse2 -#endif - -static unsigned used_accel = INIT_USED; -static unsigned length_to_accel = INIT_LENGTH; -static bool (*buffer_accel)(const void *, size_t) = INIT_ACCEL; - static unsigned __attribute__((noinline)) select_accel_cpuinfo(unsigned info) { /* Array is sorted in order of algorithm preference. */ static const struct { unsigned bit; - unsigned len; bool (*fn)(const void *, size_t); } all[] = { #ifdef CONFIG_AVX2_OPT - { CPUINFO_AVX2, 128, buffer_zero_avx2 }, + { CPUINFO_AVX2, buffer_zero_avx2 }, #endif - { CPUINFO_SSE2, 64, buffer_zero_sse2 }, - { CPUINFO_ALWAYS, 0, buffer_zero_int }, + { CPUINFO_SSE2, buffer_zero_sse2 }, + { CPUINFO_ALWAYS, buffer_is_zero_integer }, }; for (unsigned i = 0; i < ARRAY_SIZE(all); ++i) { if (info & all[i].bit) { - length_to_accel = all[i].len; - buffer_accel = all[i].fn; + buffer_is_zero_accel = all[i].fn; return all[i].bit; } } return 0; } -#if defined(CONFIG_AVX2_OPT) +static unsigned used_accel; + static void __attribute__((constructor)) init_accel(void) { used_accel = select_accel_cpuinfo(cpuinfo_init()); } -#endif /* CONFIG_AVX2_OPT */ + +#define INIT_ACCEL NULL bool test_buffer_is_zero_next_accel(void) { @@ -194,36 +173,37 @@ bool test_buffer_is_zero_next_accel(void) used_accel |= used; return used; } - -static bool select_accel_fn(const void *buf, size_t len) -{ - if (likely(len >= length_to_accel)) { - return buffer_accel(buf, len); - } - return buffer_zero_int(buf, len); -} - #else -#define select_accel_fn buffer_zero_int bool test_buffer_is_zero_next_accel(void) { return false; } + +#define INIT_ACCEL buffer_is_zero_integer #endif -/* - * Checks if a buffer is all zeroes - */ -bool buffer_is_zero(const void *buf, size_t len) +static bool (*buffer_is_zero_accel)(const void *, size_t) = INIT_ACCEL; + +bool buffer_is_zero_ool(const void *buf, size_t len) { if (unlikely(len == 0)) { return true; } + if (!buffer_is_zero_sample3(buf, len)) { + return false; + } + /* All bytes are covered for any len <= 3. */ + if (unlikely(len <= 3)) { + return true; + } - /* Fetch the beginning of the buffer while we select the accelerator. */ - __builtin_prefetch(buf); - - /* Use an optimized zero check if possible. Note that this also - includes a check for an unrolled loop over 64-bit integers. */ - return select_accel_fn(buf, len); + if (likely(len >= 256)) { + return buffer_is_zero_accel(buf, len); + } + return buffer_is_zero_integer(buf, len); +} + +bool buffer_is_zero_ge256(const void *buf, size_t len) +{ + return buffer_is_zero_accel(buf, len); } From patchwork Mon Apr 8 17:49:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786943 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp1764wrs; Mon, 8 Apr 2024 10:55:35 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX5BIN1wv5Mevsmb+FeoUXQXEAzqNpXKw+/FcvHLGV+k6yBUwUzRhObATzqHUhV1pgG/shSdfGSS4gVLloE3t4M X-Google-Smtp-Source: AGHT+IHX6aWH1U5i5LvcY5NPK5Fx5vuvKnKTxZS3H1WduiOOeAj6uBn5n8YX4zZFUGhyVOrKi+6y X-Received: by 2002:a0d:df84:0:b0:618:21e4:b402 with SMTP id i126-20020a0ddf84000000b0061821e4b402mr1336975ywe.18.1712598934792; Mon, 08 Apr 2024 10:55:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598934; cv=none; d=google.com; s=arc-20160816; b=YLQKfYexrv4ryyU45xQeC6sr2XyICWjvCEHRjBO9UbACouBL1tBFbsy2LQQHA6H+oO dIFDkWXaDGB4EbbX9mo0Lqpf//oo2uL2mp8NkVVTALW6+Cgh7UegmtCYjSraPW7S/R0O 9wC+FuoMi0oZi6J6ElKIb08vjCB3A6SCfhWmar74JLR45rRLHamNi+SF4oZ9Z4W5cmrr IkHybFZiElKN8OVba5J3DFZ9G7WT2UECjqyNOxklx90qrCIg0PklutaStZQ9XDTRzACe C98BgZeYY8d2c/zSAKiJ92TdW5CUtTRnU7BZovD3+ZZixHMLhY47RSzWE0+ilQkEglzw Od0Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=RPMJ9Fq7Hagw2E+aglC+ITwqURcRV1FccXRLb5FLQFU=; fh=IOfZmL/4G2LGBtSV+LzySu7eotL7HJ1AQcRx3etIBXU=; b=B5FK7blIaOsZbRDlAaWjHeQy3J0FoN9y/bRcHyueLhEpwpWGXFH61ZG5f5/+rLe3Qa gGtHgOzitNbdt3hHp7er6uGxaBe62wXJAdPIcJDXESU/V/kOGdtqd1ncNGa0iIdENn7H FbwK9VQvKfqlxChgJ6HSf9YRGdpGhUNnq06wPh11whQ+sEtRmqHnp/cx4oG4AN/dgL0j BI4FE5RER5RpVFy2gPYNswnOLO9Z4kQza0ion96xJhF+yq+FEWDaCe15Uwc+HzTQz5nI 59+y9UsIbLHjOVPY/5S3vZ3TXWtL3RRyTWgJ5OFUMxZkVp7Hmt/rY9Y8fuotkxS7hlMd dPrg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FynA4AtM; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:17 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alexander Monakov , Mikhail Romanov Subject: [PULL 31/35] util/bufferiszero: Remove useless prefetches Date: Mon, 8 Apr 2024 07:49:25 -1000 Message-Id: <20240408174929.862917-32-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::532; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x532.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Alexander Monakov Use of prefetching in bufferiszero.c is quite questionable: - prefetches are issued just a few CPU cycles before the corresponding line would be hit by demand loads; - they are done for simple access patterns, i.e. where hardware prefetchers can perform better; - they compete for load ports in loops that should be limited by load port throughput rather than ALU throughput. Signed-off-by: Alexander Monakov Signed-off-by: Mikhail Romanov Reviewed-by: Richard Henderson Message-Id: <20240206204809.9859-5-amonakov@ispras.ru> --- util/bufferiszero.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 972f394cbd..00118d649e 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -50,7 +50,6 @@ static bool buffer_is_zero_integer(const void *buf, size_t len) const uint64_t *e = (uint64_t *)(((uintptr_t)buf + len) & -8); for (; p + 8 <= e; p += 8) { - __builtin_prefetch(p + 8); if (t) { return false; } @@ -80,7 +79,6 @@ buffer_zero_sse2(const void *buf, size_t len) /* Loop over 16-byte aligned blocks of 64. */ while (likely(p <= e)) { - __builtin_prefetch(p); t = _mm_cmpeq_epi8(t, zero); if (unlikely(_mm_movemask_epi8(t) != 0xFFFF)) { return false; @@ -111,7 +109,6 @@ buffer_zero_avx2(const void *buf, size_t len) /* Loop over 32-byte aligned blocks of 128. */ while (p <= e) { - __builtin_prefetch(p); if (unlikely(!_mm256_testz_si256(t, t))) { return false; } From patchwork Mon Apr 8 17:49:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786934 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp230wrs; Mon, 8 Apr 2024 10:51:28 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX5Qb7KKsAPBS2BgtAY1W/wrRqy07+KhgSTdNeqahsTRqQRoHiX0bpSiq2YTil64Ro576Hm9S4YSXS8YSvc3SKX X-Google-Smtp-Source: AGHT+IFUmv01NJIs9qUvZAC38SGyCKZbifgFxXTyxCWocZt7AHTOjfXkFZnYEUbxsznj5tE4BzTk X-Received: by 2002:ac5:cc4f:0:b0:4d8:6ae0:36a6 with SMTP id l15-20020ac5cc4f000000b004d86ae036a6mr6591148vkm.3.1712598687986; Mon, 08 Apr 2024 10:51:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598687; cv=none; d=google.com; s=arc-20160816; b=NBEHPROBDENf/ejIryJKDVCzZAsS76XYLB8rqn9Ily/eG1hxV21ORbWxh9buniq3Cc 3zPFGeZGpRUmNecztE3ZT9ZPPC2sptsWO2fHnA/OdbytOXhOgUWYg+joC98TRiOh3nQK IDwcxDizZ0stgWyFluC3VG5ezeinjoVf1gp9HPMkRE1lrlEvUNYNinNPFKwCfBfUIGnx kTplN+o1tXkkBhItH/IFNGVwU3LGgTlQAj26b4H985LaVwbfRkSSLolu4BX99iHw75Z9 tddMRO/yTFmZUrCZ6iSdYefUeqaHGyv0cd/YcZLQ5N+oXSUKZLFKyrK6kAuf1bRf2VJc lNXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=LJEBA8HhooZ+SwbOdLUPlZU44jMDHr0d5xq5JBRqrDA=; fh=IOfZmL/4G2LGBtSV+LzySu7eotL7HJ1AQcRx3etIBXU=; b=FJdH9wFqr4sYjta1JxQW7c9iIaRj9KBjE8dOddV+WwFmG/XIAdVoEkbrBGE5ljrhGw 0ERCdY2cgDvEXB9w3AfP0YuGFJ/3fpD61G2VIkAF6e/Gf2ukpmS7UlyWbMAsl6Mdhj8f /VUHQ9JdMFoVj/HTqNu9nGusS4eZMXUnVIlX0vlpe4Ef+SO2ZsLit/jnHJL8edAUlNza eTBBEjwxWcgs0D3LNhHUj7EuPwK3+lQuCLJ5QdX0Gq6LuEFvD+TLW6u4usMNOIVrkiPN Uu6iWYH483voM9wAF2/a8s426lKeeAI9s3N4Tpoe0uECClxhs8WtP/9ACj6tl2IZaEH/ Axgg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=D5BEFsYh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: Alexander Monakov , Mikhail Romanov Subject: [PULL 32/35] util/bufferiszero: Optimize SSE2 and AVX2 variants Date: Mon, 8 Apr 2024 07:49:26 -1000 Message-Id: <20240408174929.862917-33-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Alexander Monakov Increase unroll factor in SIMD loops from 4x to 8x in order to move their bottlenecks from ALU port contention to load issue rate (two loads per cycle on popular x86 implementations). Avoid using out-of-bounds pointers in loop boundary conditions. Follow SSE2 implementation strategy in the AVX2 variant. Avoid use of PTEST, which is not profitable there (like in the removed SSE4 variant). Signed-off-by: Alexander Monakov Signed-off-by: Mikhail Romanov Reviewed-by: Richard Henderson Message-Id: <20240206204809.9859-6-amonakov@ispras.ru> --- util/bufferiszero.c | 111 +++++++++++++++++++++++++++++--------------- 1 file changed, 73 insertions(+), 38 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 00118d649e..02df82b4ff 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -67,62 +67,97 @@ static bool buffer_is_zero_integer(const void *buf, size_t len) #if defined(CONFIG_AVX2_OPT) || defined(__SSE2__) #include -/* Note that each of these vectorized functions require len >= 64. */ +/* Helper for preventing the compiler from reassociating + chains of binary vector operations. */ +#define SSE_REASSOC_BARRIER(vec0, vec1) asm("" : "+x"(vec0), "+x"(vec1)) + +/* Note that these vectorized functions may assume len >= 256. */ static bool __attribute__((target("sse2"))) buffer_zero_sse2(const void *buf, size_t len) { - __m128i t = _mm_loadu_si128(buf); - __m128i *p = (__m128i *)(((uintptr_t)buf + 5 * 16) & -16); - __m128i *e = (__m128i *)(((uintptr_t)buf + len) & -16); - __m128i zero = _mm_setzero_si128(); + /* Unaligned loads at head/tail. */ + __m128i v = *(__m128i_u *)(buf); + __m128i w = *(__m128i_u *)(buf + len - 16); + /* Align head/tail to 16-byte boundaries. */ + const __m128i *p = QEMU_ALIGN_PTR_DOWN(buf + 16, 16); + const __m128i *e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 16); + __m128i zero = { 0 }; - /* Loop over 16-byte aligned blocks of 64. */ - while (likely(p <= e)) { - t = _mm_cmpeq_epi8(t, zero); - if (unlikely(_mm_movemask_epi8(t) != 0xFFFF)) { + /* Collect a partial block at tail end. */ + v |= e[-1]; w |= e[-2]; + SSE_REASSOC_BARRIER(v, w); + v |= e[-3]; w |= e[-4]; + SSE_REASSOC_BARRIER(v, w); + v |= e[-5]; w |= e[-6]; + SSE_REASSOC_BARRIER(v, w); + v |= e[-7]; v |= w; + + /* + * Loop over complete 128-byte blocks. + * With the head and tail removed, e - p >= 14, so the loop + * must iterate at least once. + */ + do { + v = _mm_cmpeq_epi8(v, zero); + if (unlikely(_mm_movemask_epi8(v) != 0xFFFF)) { return false; } - t = p[-4] | p[-3] | p[-2] | p[-1]; - p += 4; - } + v = p[0]; w = p[1]; + SSE_REASSOC_BARRIER(v, w); + v |= p[2]; w |= p[3]; + SSE_REASSOC_BARRIER(v, w); + v |= p[4]; w |= p[5]; + SSE_REASSOC_BARRIER(v, w); + v |= p[6]; w |= p[7]; + SSE_REASSOC_BARRIER(v, w); + v |= w; + p += 8; + } while (p < e - 7); - /* Finish the aligned tail. */ - t |= e[-3]; - t |= e[-2]; - t |= e[-1]; - - /* Finish the unaligned tail. */ - t |= _mm_loadu_si128(buf + len - 16); - - return _mm_movemask_epi8(_mm_cmpeq_epi8(t, zero)) == 0xFFFF; + return _mm_movemask_epi8(_mm_cmpeq_epi8(v, zero)) == 0xFFFF; } #ifdef CONFIG_AVX2_OPT static bool __attribute__((target("avx2"))) buffer_zero_avx2(const void *buf, size_t len) { - /* Begin with an unaligned head of 32 bytes. */ - __m256i t = _mm256_loadu_si256(buf); - __m256i *p = (__m256i *)(((uintptr_t)buf + 5 * 32) & -32); - __m256i *e = (__m256i *)(((uintptr_t)buf + len) & -32); + /* Unaligned loads at head/tail. */ + __m256i v = *(__m256i_u *)(buf); + __m256i w = *(__m256i_u *)(buf + len - 32); + /* Align head/tail to 32-byte boundaries. */ + const __m256i *p = QEMU_ALIGN_PTR_DOWN(buf + 32, 32); + const __m256i *e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 32); + __m256i zero = { 0 }; - /* Loop over 32-byte aligned blocks of 128. */ - while (p <= e) { - if (unlikely(!_mm256_testz_si256(t, t))) { + /* Collect a partial block at tail end. */ + v |= e[-1]; w |= e[-2]; + SSE_REASSOC_BARRIER(v, w); + v |= e[-3]; w |= e[-4]; + SSE_REASSOC_BARRIER(v, w); + v |= e[-5]; w |= e[-6]; + SSE_REASSOC_BARRIER(v, w); + v |= e[-7]; v |= w; + + /* Loop over complete 256-byte blocks. */ + for (; p < e - 7; p += 8) { + /* PTEST is not profitable here. */ + v = _mm256_cmpeq_epi8(v, zero); + if (unlikely(_mm256_movemask_epi8(v) != 0xFFFFFFFF)) { return false; } - t = p[-4] | p[-3] | p[-2] | p[-1]; - p += 4; - } ; + v = p[0]; w = p[1]; + SSE_REASSOC_BARRIER(v, w); + v |= p[2]; w |= p[3]; + SSE_REASSOC_BARRIER(v, w); + v |= p[4]; w |= p[5]; + SSE_REASSOC_BARRIER(v, w); + v |= p[6]; w |= p[7]; + SSE_REASSOC_BARRIER(v, w); + v |= w; + } - /* Finish the last block of 128 unaligned. */ - t |= _mm256_loadu_si256(buf + len - 4 * 32); - t |= _mm256_loadu_si256(buf + len - 3 * 32); - t |= _mm256_loadu_si256(buf + len - 2 * 32); - t |= _mm256_loadu_si256(buf + len - 1 * 32); - - return _mm256_testz_si256(t, t); + return _mm256_movemask_epi8(_mm256_cmpeq_epi8(v, zero)) == 0xFFFFFFFF; } #endif /* CONFIG_AVX2_OPT */ From patchwork Mon Apr 8 17:49:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786956 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2624wrs; Mon, 8 Apr 2024 10:58:11 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVKYhGg31xsse2JnG+zJlRYihxC+BRIxHRqt5XnvLzpbD92RAnEsRehb3YxlGk2e7swjm6TjfPzyrqcsfBQ1IPq X-Google-Smtp-Source: AGHT+IFgwSt3sUkCvkb5f7eaksKPfvB9KVuU0qomSWDSz1m9XznxZwN/Bslfso4bpi6K0QalOJMB X-Received: by 2002:a81:bf4f:0:b0:615:4e88:c036 with SMTP id s15-20020a81bf4f000000b006154e88c036mr8504500ywk.41.1712599091374; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.19 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:20 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 33/35] util/bufferiszero: Improve scalar variant Date: Mon, 8 Apr 2024 07:49:27 -1000 Message-Id: <20240408174929.862917-34-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102e; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Split less-than and greater-than 256 cases. Use unaligned accesses for head and tail. Avoid using out-of-bounds pointers in loop boundary conditions. Signed-off-by: Richard Henderson --- util/bufferiszero.c | 85 +++++++++++++++++++++++++++------------------ 1 file changed, 51 insertions(+), 34 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index 02df82b4ff..c9a7ded016 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -28,40 +28,57 @@ static bool (*buffer_is_zero_accel)(const void *, size_t); -static bool buffer_is_zero_integer(const void *buf, size_t len) +static bool buffer_is_zero_int_lt256(const void *buf, size_t len) { - if (unlikely(len < 8)) { - /* For a very small buffer, simply accumulate all the bytes. */ - const unsigned char *p = buf; - const unsigned char *e = buf + len; - unsigned char t = 0; + uint64_t t; + const uint64_t *p, *e; - do { - t |= *p++; - } while (p < e); - - return t == 0; - } else { - /* Otherwise, use the unaligned memory access functions to - handle the beginning and end of the buffer, with a couple - of loops handling the middle aligned section. */ - uint64_t t = ldq_he_p(buf); - const uint64_t *p = (uint64_t *)(((uintptr_t)buf + 8) & -8); - const uint64_t *e = (uint64_t *)(((uintptr_t)buf + len) & -8); - - for (; p + 8 <= e; p += 8) { - if (t) { - return false; - } - t = p[0] | p[1] | p[2] | p[3] | p[4] | p[5] | p[6] | p[7]; - } - while (p < e) { - t |= *p++; - } - t |= ldq_he_p(buf + len - 8); - - return t == 0; + /* + * Use unaligned memory access functions to handle + * the beginning and end of the buffer. + */ + if (unlikely(len <= 8)) { + return (ldl_he_p(buf) | ldl_he_p(buf + len - 4)) == 0; } + + t = ldq_he_p(buf) | ldq_he_p(buf + len - 8); + p = QEMU_ALIGN_PTR_DOWN(buf + 8, 8); + e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 8); + + /* Read 0 to 31 aligned words from the middle. */ + while (p < e) { + t |= *p++; + } + return t == 0; +} + +static bool buffer_is_zero_int_ge256(const void *buf, size_t len) +{ + /* + * Use unaligned memory access functions to handle + * the beginning and end of the buffer. + */ + uint64_t t = ldq_he_p(buf) | ldq_he_p(buf + len - 8); + const uint64_t *p = QEMU_ALIGN_PTR_DOWN(buf + 8, 8); + const uint64_t *e = QEMU_ALIGN_PTR_DOWN(buf + len - 1, 8); + + /* Collect a partial block at the tail end. */ + t |= e[-7] | e[-6] | e[-5] | e[-4] | e[-3] | e[-2] | e[-1]; + + /* + * Loop over 64 byte blocks. + * With the head and tail removed, e - p >= 30, + * so the loop must iterate at least 3 times. + */ + do { + if (t) { + return false; + } + t = p[0] | p[1] | p[2] | p[3] | p[4] | p[5] | p[6] | p[7]; + p += 8; + } while (p < e - 7); + + return t == 0; } #if defined(CONFIG_AVX2_OPT) || defined(__SSE2__) @@ -173,7 +190,7 @@ select_accel_cpuinfo(unsigned info) { CPUINFO_AVX2, buffer_zero_avx2 }, #endif { CPUINFO_SSE2, buffer_zero_sse2 }, - { CPUINFO_ALWAYS, buffer_is_zero_integer }, + { CPUINFO_ALWAYS, buffer_is_zero_int_ge256 }, }; for (unsigned i = 0; i < ARRAY_SIZE(all); ++i) { @@ -211,7 +228,7 @@ bool test_buffer_is_zero_next_accel(void) return false; } -#define INIT_ACCEL buffer_is_zero_integer +#define INIT_ACCEL buffer_is_zero_int_ge256 #endif static bool (*buffer_is_zero_accel)(const void *, size_t) = INIT_ACCEL; @@ -232,7 +249,7 @@ bool buffer_is_zero_ool(const void *buf, size_t len) if (likely(len >= 256)) { return buffer_is_zero_accel(buf, len); } - return buffer_is_zero_integer(buf, len); + return buffer_is_zero_int_lt256(buf, len); } bool buffer_is_zero_ge256(const void *buf, size_t len) From patchwork Mon Apr 8 17:49:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786951 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp2203wrs; Mon, 8 Apr 2024 10:56:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUxGpFfZ4SvvJGXz273/dx5QHkY/CQquUY6plc5WolfxStFtk7YWN/FFFVncFQfCpRX6uqQrdn6pPn/v9IIzXWd X-Google-Smtp-Source: AGHT+IE3Jrbqv5Q/ywf7YvS7g3SsarkoEvotq3ZyQ72SSSmQcLMIoaCWr+AkfLZXPwwUjNEL5iYj X-Received: by 2002:a05:6214:c63:b0:69b:1c78:1590 with SMTP id t3-20020a0562140c6300b0069b1c781590mr3513077qvj.43.1712599012648; Mon, 08 Apr 2024 10:56:52 -0700 (PDT) ARC-Seal: i=1; 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.21 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:21 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 34/35] util/bufferiszero: Introduce biz_accel_fn typedef Date: Mon, 8 Apr 2024 07:49:28 -1000 Message-Id: <20240408174929.862917-35-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42f; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Signed-off-by: Richard Henderson --- util/bufferiszero.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index c9a7ded016..eb8030a3f0 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -26,7 +26,8 @@ #include "qemu/bswap.h" #include "host/cpuinfo.h" -static bool (*buffer_is_zero_accel)(const void *, size_t); +typedef bool (*biz_accel_fn)(const void *, size_t); +static biz_accel_fn buffer_is_zero_accel; static bool buffer_is_zero_int_lt256(const void *buf, size_t len) { @@ -178,13 +179,15 @@ buffer_zero_avx2(const void *buf, size_t len) } #endif /* CONFIG_AVX2_OPT */ + + static unsigned __attribute__((noinline)) select_accel_cpuinfo(unsigned info) { /* Array is sorted in order of algorithm preference. */ static const struct { unsigned bit; - bool (*fn)(const void *, size_t); + biz_accel_fn fn; } all[] = { #ifdef CONFIG_AVX2_OPT { CPUINFO_AVX2, buffer_zero_avx2 }, @@ -231,7 +234,7 @@ bool test_buffer_is_zero_next_accel(void) #define INIT_ACCEL buffer_is_zero_int_ge256 #endif -static bool (*buffer_is_zero_accel)(const void *, size_t) = INIT_ACCEL; +static biz_accel_fn buffer_is_zero_accel = INIT_ACCEL; bool buffer_is_zero_ool(const void *buf, size_t len) { From patchwork Mon Apr 8 17:49:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 786926 Delivered-To: patch@linaro.org Received: by 2002:adf:fb4d:0:b0:346:15ad:a2a with SMTP id c13csp157wrs; Mon, 8 Apr 2024 10:51:18 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVAA0V513HLlncxrPYGziQ++OKS7tkEFaAW7NHS4QkpEcmzbHxG7MB5sOZrvnRQcp1hvxaxchMBydA6Y5oPgOY+ X-Google-Smtp-Source: AGHT+IGqvSHK9rTR1uMk+BZXv3+ja8Iv5zHRMXF4D9mG/hJQRr/Sj2b5BqEgGfRREPDAq4qO9ySQ X-Received: by 2002:ae9:e648:0:b0:78d:6d20:7092 with SMTP id x8-20020ae9e648000000b0078d6d207092mr76060qkl.39.1712598678244; Mon, 08 Apr 2024 10:51:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712598678; cv=none; d=google.com; s=arc-20160816; b=0ScbXEQiTR5L+vRe/SVI4ZlMZhH+u0fZAbAWBuFNnc5jwdD8c6uIKmPLX5rnv5qrZc kMaonV1kxYhsZFopivPi6D9EPhmBXndp/39bKnMDQC10wB+uqps9dFow+niuKa1Xps2u 65PF2HqMTofgTzW5Jm6bhV3pnkYr8Q0mO8WKretwVy6jHKVZ18AqaDwWWBZ6DrsjX0qn BqbylW9Jv8r1SymEYphhYKE63ccPHQyVmrloLRRLQTMx9nVzcEGswTiBVDMPiIVY1VVM y9WHKlQ8ioTMNwnEMwydWnYvT+NIW2bo57yDSROcaz0vJeNGoDoZMbmfoqh02j3KdcBd 2lAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=DA4w6vWBcl/o/fCPqKs/e8JAcC2+x8OTjBrtE2E7+xQ=; fh=PnYt+qEB9tAfMKoqBm2xjKOFpYyFFGPudh5cVIoieJM=; b=dGedQbNJoBvPcjv+2g3QY2pDS3LmyBytZxIbGmaQlevN1eXZKzfcK/fyDRjHy8xfm2 rAeJYOXbuO4QN9H7u2IUpNMgHCO8bENVT1aIq4ROISchXZ+rzGt8dajAhrAKMtl+e1+o kjxBlbvJ1EqtjMryNQ13V13DkUuZEUGa+w+c9Q5al24vWlpU0UnM9op5TDO7uAFCh7DQ ydclrb/beqrB4xjkgcEaYuUHqhoUtmBrgFhK8WCzYzBI9nOQCiWa1Rt6I+lb95anSyuz zEl9nPextkRKooZAf6iPhk90QG6eLBBGtokG7Npz6H3RBS41XPFY7neg2sEdQ8y0d99v DcwA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cgC6t8W+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[98.147.7.212]) by smtp.gmail.com with ESMTPSA id ga15-20020a17090b038f00b0029c3bac0aa8sm8658432pjb.4.2024.04.08.10.50.22 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 08 Apr 2024 10:50:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 35/35] util/bufferiszero: Simplify test_buffer_is_zero_next_accel Date: Mon, 8 Apr 2024 07:49:29 -1000 Message-Id: <20240408174929.862917-36-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240408174929.862917-1-richard.henderson@linaro.org> References: <20240408174929.862917-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102a; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Because the three alternatives are monotonic, we don't need to keep a couple of bitmasks, just identify the strongest alternative at startup. Signed-off-by: Richard Henderson --- util/bufferiszero.c | 56 ++++++++++++++++++--------------------------- 1 file changed, 22 insertions(+), 34 deletions(-) diff --git a/util/bufferiszero.c b/util/bufferiszero.c index eb8030a3f0..ff003dc40e 100644 --- a/util/bufferiszero.c +++ b/util/bufferiszero.c @@ -179,51 +179,39 @@ buffer_zero_avx2(const void *buf, size_t len) } #endif /* CONFIG_AVX2_OPT */ - - -static unsigned __attribute__((noinline)) -select_accel_cpuinfo(unsigned info) -{ - /* Array is sorted in order of algorithm preference. */ - static const struct { - unsigned bit; - biz_accel_fn fn; - } all[] = { +static biz_accel_fn const accel_table[] = { + buffer_is_zero_int_ge256, + buffer_zero_sse2, #ifdef CONFIG_AVX2_OPT - { CPUINFO_AVX2, buffer_zero_avx2 }, + buffer_zero_avx2, #endif - { CPUINFO_SSE2, buffer_zero_sse2 }, - { CPUINFO_ALWAYS, buffer_is_zero_int_ge256 }, - }; - - for (unsigned i = 0; i < ARRAY_SIZE(all); ++i) { - if (info & all[i].bit) { - buffer_is_zero_accel = all[i].fn; - return all[i].bit; - } - } - return 0; -} - -static unsigned used_accel; +}; +static unsigned accel_index; static void __attribute__((constructor)) init_accel(void) { - used_accel = select_accel_cpuinfo(cpuinfo_init()); + unsigned info = cpuinfo_init(); + unsigned index = (info & CPUINFO_SSE2 ? 1 : 0); + +#ifdef CONFIG_AVX2_OPT + if (info & CPUINFO_AVX2) { + index = 2; + } +#endif + + accel_index = index; + buffer_is_zero_accel = accel_table[index]; } #define INIT_ACCEL NULL bool test_buffer_is_zero_next_accel(void) { - /* - * Accumulate the accelerators that we've already tested, and - * remove them from the set to test this round. We'll get back - * a zero from select_accel_cpuinfo when there are no more. - */ - unsigned used = select_accel_cpuinfo(cpuinfo & ~used_accel); - used_accel |= used; - return used; + if (accel_index != 0) { + buffer_is_zero_accel = accel_table[--accel_index]; + return true; + } + return false; } #else bool test_buffer_is_zero_next_accel(void)