From patchwork Wed Apr 10 05:43:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787467 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp541849wrs; Tue, 9 Apr 2024 22:46:17 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUX2PwthhDW++mnQPVfInZuoRU28y0PkaeiF3TgSyyPxX/ozCAVvulZot7nnMOr1fssW84HOW1fpNauEbTI5HPy X-Google-Smtp-Source: AGHT+IERKE+FJwyC6nMXxPyzob5nWk9U3V/UP0qyQ7pm30GFEzNBWG9pnMnmL2hmHo86iKsjbACv X-Received: by 2002:a05:6102:c4e:b0:47a:29b6:ef52 with SMTP id y14-20020a0561020c4e00b0047a29b6ef52mr118717vss.2.1712727976997; Tue, 09 Apr 2024 22:46:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712727976; cv=none; d=google.com; s=arc-20160816; b=fNgUq2qzuXEdpLcXb3Hn8GntiAvf+Buexov3bYr3qaABLs5gyT3hOgrJGWWYLAl+85 pbjVpRPH/pshlgBTLCcuc5L6G9FriXRBy0np/FVNcJ8J2ZWe2Fmc4oiccSl1/JlJHbvq Qh7jPFVXyFcgEaW5i0/T4gt2Xf5L1YE+wrTZOOLw7iOLeCAj8mMlG8riy9BweHHR7Yw7 k8F8dt5SV0ctNjaDBqy7wJCsHvMsTeXj6nApdhPv6bQZwXFmtPT4joxrkS8Ajz0RgGZ3 /MEy6U0EaJ7x8R9ZYFmgm3TQzJkD5NUMBEq93OrZOE7K/cI0XjWjeP+TrWpGxQQjUT9r q/8A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=/lzoLjy9Af0i2UoqEsIqKP3AtClT0RfXsxqZch+zrEg=; fh=jNjahvLDFDChdETa+zrIo/WbVWEt3Ji9EhcELd73wAE=; b=ulgzr4zOOyzlhOwotk0r0SN9rYeuXP0JJnXy74/CzZgmJHZTbVhpzhe2aoleHkGJG8 QzqILGbpZSXtizba5jW61sC0sudHlDY/7S9ugENIcBqNADcYpF7rA4PJMQkRZ6P1+eSL A6LbLORcwcyZ1Q9obqSUM4ZLtVShlLBuOxuvbTrnPWzZxBtkYCFD2GlO8vfmGtmIFZ1r QYNKNiNW//HBtRnGnBSwk1ylY65NUzpdNzV38SbtMEU30dH6TkFtKzEnlzG3BXHEHkkf Am/jPOUkvpUMyr1EkrjTrQkwcIylbU8DbliMs8ib/4M2MoHV0ERxCsifN0bHzixy1sdL Sofw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id 2-20020a0562140d6200b0069b1db86f7asi6115058qvs.476.2024.04.09.22.46.16 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:46:16 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQlI-0004kE-5j; Wed, 10 Apr 2024 01:44:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQlG-0004k1-95; Wed, 10 Apr 2024 01:44:42 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQl8-0001CV-Jb; Wed, 10 Apr 2024 01:44:42 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id CB0145D4DC; Wed, 10 Apr 2024 08:46:14 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 90C0FB0143; Wed, 10 Apr 2024 08:44:16 +0300 (MSK) Received: (nullmailer pid 4182012 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Peter Maydell , Michael Tokarev Subject: [Stable-7.2.11 04/41] tests/tcg/aarch64/sysregs.c: Use S syntax for id_aa64zfr0_el1 and id_aa64smfr0_el1 Date: Wed, 10 Apr 2024 08:43:25 +0300 Message-Id: <20240410054416.4181891-4-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Peter Maydell Some assemblers will complain about attempts to access id_aa64zfr0_el1 and id_aa64smfr0_el1 by name if the test binary isn't built for the right processor type: /tmp/ccASXpLo.s:782: Error: selected processor does not support system register name 'id_aa64zfr0_el1' /tmp/ccASXpLo.s:829: Error: selected processor does not support system register name 'id_aa64smfr0_el1' However, these registers are in the ID space and are guaranteed to read-as-zero on older CPUs, so the access is both safe and sensible. Switch to using the S syntax, as we already do for ID_AA64ISAR2_EL1 and ID_AA64MMFR2_EL1. This allows us to drop the HAS_ARMV9_SME check and the makefile machinery to adjust the CFLAGS for this test, so we don't rely on having a sufficiently new compiler to be able to check these registers. This means we're actually testing the SME ID register: no released GCC yet recognizes -march=armv9-a+sme, so that was always skipped. It also avoids a future problem if we try to switch the "do we have SME support in the toolchain" check from "in the compiler" to "in the assembler" (at which point we would otherwise run into the above errors). Signed-off-by: Peter Maydell (cherry picked from commit 3dc2afeab2964b54848715b913b6c605f36be3e1) Signed-off-by: Michael Tokarev (Mjt: pick this for v8.0.0-2361-g1f51573f79 "target/arm: Fix SME full tile indexing") diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index fc6d5d824d..118d069073 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -51,15 +51,10 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-%: CFLAGS += -march=armv8.5-a+memtag endif -ifneq ($(CROSS_CC_HAS_SVE),) # System Registers Tests AARCH64_TESTS += sysregs -ifneq ($(CROSS_CC_HAS_ARMV9_SME),) -sysregs: CFLAGS+=-march=armv9-a+sme -DHAS_ARMV9_SME -else -sysregs: CFLAGS+=-march=armv8.1-a+sve -endif +ifneq ($(CROSS_CC_HAS_SVE),) # SVE ioctl test AARCH64_TESTS += sve-ioctls sve-ioctls: CFLAGS+=-march=armv8.1-a+sve diff --git a/tests/tcg/aarch64/sysregs.c b/tests/tcg/aarch64/sysregs.c index 46b931f781..d8eb06abcf 100644 --- a/tests/tcg/aarch64/sysregs.c +++ b/tests/tcg/aarch64/sysregs.c @@ -25,9 +25,14 @@ /* * Older assemblers don't recognize newer system register names, * but we can still access them by the Sn_n_Cn_Cn_n syntax. + * This also means we don't need to specifically request that the + * assembler enables whatever architectural features the ID registers + * syntax might be gated behind. */ #define SYS_ID_AA64ISAR2_EL1 S3_0_C0_C6_2 #define SYS_ID_AA64MMFR2_EL1 S3_0_C0_C7_2 +#define SYS_ID_AA64ZFR0_EL1 S3_0_C0_C4_4 +#define SYS_ID_AA64SMFR0_EL1 S3_0_C0_C4_5 int failed_bit_count; @@ -132,10 +137,8 @@ int main(void) /* all hidden, DebugVer fixed to 0x6 (ARMv8 debug architecture) */ get_cpu_reg_check_mask(id_aa64dfr0_el1, _m(0000,0000,0000,0006)); get_cpu_reg_check_zero(id_aa64dfr1_el1); - get_cpu_reg_check_mask(id_aa64zfr0_el1, _m(0ff0,ff0f,00ff,00ff)); -#ifdef HAS_ARMV9_SME - get_cpu_reg_check_mask(id_aa64smfr0_el1, _m(80f1,00fd,0000,0000)); -#endif + get_cpu_reg_check_mask(SYS_ID_AA64ZFR0_EL1, _m(0ff0,ff0f,00ff,00ff)); + get_cpu_reg_check_mask(SYS_ID_AA64SMFR0_EL1, _m(80f1,00fd,0000,0000)); get_cpu_reg_check_zero(id_aa64afr0_el1); get_cpu_reg_check_zero(id_aa64afr1_el1); From patchwork Wed Apr 10 05:43:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787469 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp542015wrs; Tue, 9 Apr 2024 22:47:02 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUwVGkAEtbUIsZjhTibZYmGRYnVg+7ZBV1tkC7s4Goc+q62//ajzZymc3SX9A8vW5nebZ/OdvT5Y8n17J8vXSGh X-Google-Smtp-Source: AGHT+IGJsyDBf5dIrtf2j+VT6uBBw4A2WCMm6l5bqOBslPIBO9DkEh8BXBzuCbgZB9G5KTKiAtMN X-Received: by 2002:a05:6214:da5:b0:696:8f17:2ccb with SMTP id h5-20020a0562140da500b006968f172ccbmr1641067qvh.17.1712728022593; Tue, 09 Apr 2024 22:47:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712728022; cv=none; d=google.com; s=arc-20160816; b=TVo3e1XHBMfO8Bj6JB/tPKXdoOfTIlkhKI7oSmnf0xmMJBynIdyqLWuvvj9HNX+jC9 jbS0F1fxJOfJ2olT8Z28ICFJexuY2nouK12bvLn6gVIi+SQz86+LN3DR1SB3tM6fqGwS k3dUpz+afcxHyQ9P63jmeRvlcy3VaaLwqtgotkfuS19W1FPdIA6HWZE5SHvmlh0jNqWC cgg/jeXsXfZ+Crnphg5Ywubj3854UqxeIVoP2WktxbvwEMGFgMSs1pBhQCbMgAu2dYj3 JDIwRNjCdJ3N5v4Bzx44UOz+crBk7XwPy1yTUlPytg0ZSZE9n4738i7GueLWF2Xi2ntp MEkA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=v/X6x1OazP0ONlQahZyZ9/DJotktMi6V8VmWw/jn0A8=; fh=NoJ7n5JVE2hviRF6uNBFRIJvWH7igafuy1AIwg26ToM=; b=Gfa8SDeneGOW8LsyWe89IB1HvrfYY41CFCn7/6qpGefmT5pB/z8LDRTzbHLVAOkqt5 tZfDtez5yvGD+c7aSy5/zGPFcmUf4gUGYGLNd/rjLcsCOyBOLP6Gm6pTwTL6oWKKXv5L S/JHxfD2onTq0eO+yIosPY8RmwDF50nl3ix4AHNXbz/E26FcP7upWr9TZ0UKSulSrBhd AIRzR9hWz3WY8A00frp8pIwMKKftMMZ/Rsjfrj0FshSqVvNXtXAhVoFf2B4PvZGf7QCb 574teI+vaiTBZ0UR8KUx0ruigCzzBkPXte4TdXBO9/Da+wKLa0FlaczSDFvjO72yWAGM 3cNA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id ep2-20020a05621418e200b00690a5754ceasi11873703qvb.245.2024.04.09.22.47.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:47:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQlL-0004lT-Qt; Wed, 10 Apr 2024 01:44:47 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQlJ-0004l3-NV; Wed, 10 Apr 2024 01:44:45 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQlH-0001IG-MT; Wed, 10 Apr 2024 01:44:45 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id DBAAE5D4DD; Wed, 10 Apr 2024 08:46:14 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id A009DB0144; Wed, 10 Apr 2024 08:44:16 +0300 (MSK) Received: (nullmailer pid 4182015 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson , Peter Maydell , Michael Tokarev Subject: [Stable-7.2.11 05/41] target/arm: Fix SME full tile indexing Date: Wed, 10 Apr 2024 08:43:26 +0300 Message-Id: <20240410054416.4181891-5-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson For the outer product set of insns, which take an entire matrix tile as output, the argument is not a combined tile+column. Therefore using get_tile_rowcol was incorrect, as we extracted the tile number from itself. The test case relies only on assembler support for SME, since no release of GCC recognizes -march=armv9-a+sme yet. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1620 Signed-off-by: Richard Henderson Message-id: 20230622151201.1578522-5-richard.henderson@linaro.org Reviewed-by: Peter Maydell [PMM: dropped now-unneeded changes to sysregs CFLAGS] Signed-off-by: Peter Maydell (cherry picked from commit 1f51573f7925b80e79a29f87c7d9d6ead60960c0) Signed-off-by: Michael Tokarev diff --git a/target/arm/translate-sme.c b/target/arm/translate-sme.c index 7b87a9df63..65f8495bdd 100644 --- a/target/arm/translate-sme.c +++ b/target/arm/translate-sme.c @@ -103,6 +103,21 @@ static TCGv_ptr get_tile_rowcol(DisasContext *s, int esz, int rs, return addr; } +/* + * Resolve tile.size[0] to a host pointer. + * Used by e.g. outer product insns where we require the entire tile. + */ +static TCGv_ptr get_tile(DisasContext *s, int esz, int tile) +{ + TCGv_ptr addr = tcg_temp_new_ptr(); + int offset; + + offset = tile * sizeof(ARMVectorReg) + offsetof(CPUARMState, zarray); + + tcg_gen_addi_ptr(addr, cpu_env, offset); + return addr; +} + static bool trans_ZERO(DisasContext *s, arg_ZERO *a) { if (!dc_isar_feature(aa64_sme, s)) { @@ -279,8 +294,7 @@ static bool do_adda(DisasContext *s, arg_adda *a, MemOp esz, return true; } - /* Sum XZR+zad to find ZAd. */ - za = get_tile_rowcol(s, esz, 31, a->zad, false); + za = get_tile(s, esz, a->zad); zn = vec_full_reg_ptr(s, a->zn); pn = pred_full_reg_ptr(s, a->pn); pm = pred_full_reg_ptr(s, a->pm); @@ -310,8 +324,7 @@ static bool do_outprod(DisasContext *s, arg_op *a, MemOp esz, return true; } - /* Sum XZR+zad to find ZAd. */ - za = get_tile_rowcol(s, esz, 31, a->zad, false); + za = get_tile(s, esz, a->zad); zn = vec_full_reg_ptr(s, a->zn); zm = vec_full_reg_ptr(s, a->zm); pn = pred_full_reg_ptr(s, a->pn); @@ -337,8 +350,7 @@ static bool do_outprod_fpst(DisasContext *s, arg_op *a, MemOp esz, return true; } - /* Sum XZR+zad to find ZAd. */ - za = get_tile_rowcol(s, esz, 31, a->zad, false); + za = get_tile(s, esz, a->zad); zn = vec_full_reg_ptr(s, a->zn); zm = vec_full_reg_ptr(s, a->zm); pn = pred_full_reg_ptr(s, a->pn); diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 118d069073..5e4ea7c998 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -24,7 +24,7 @@ config-cc.mak: Makefile $(call cc-option,-march=armv8.3-a, CROSS_CC_HAS_ARMV8_3); \ $(call cc-option,-mbranch-protection=standard, CROSS_CC_HAS_ARMV8_BTI); \ $(call cc-option,-march=armv8.5-a+memtag, CROSS_CC_HAS_ARMV8_MTE); \ - $(call cc-option,-march=armv9-a+sme, CROSS_CC_HAS_ARMV9_SME)) 3> config-cc.mak + $(call cc-option,-Wa$(COMMA)-march=armv9-a+sme, CROSS_AS_HAS_ARMV9_SME)) 3> config-cc.mak -include config-cc.mak # Pauth Tests @@ -51,6 +51,11 @@ AARCH64_TESTS += mte-1 mte-2 mte-3 mte-4 mte-5 mte-6 mte-7 mte-%: CFLAGS += -march=armv8.5-a+memtag endif +# SME Tests +ifneq ($(CROSS_AS_HAS_ARMV9_SME),) +AARCH64_TESTS += sme-outprod1 +endif + # System Registers Tests AARCH64_TESTS += sysregs diff --git a/tests/tcg/aarch64/sme-outprod1.c b/tests/tcg/aarch64/sme-outprod1.c new file mode 100644 index 0000000000..6e5972d75e --- /dev/null +++ b/tests/tcg/aarch64/sme-outprod1.c @@ -0,0 +1,83 @@ +/* + * SME outer product, 1 x 1. + * SPDX-License-Identifier: GPL-2.0-or-later + */ + +#include + +extern void foo(float *dst); + +asm( +" .arch_extension sme\n" +" .type foo, @function\n" +"foo:\n" +" stp x29, x30, [sp, -80]!\n" +" mov x29, sp\n" +" stp d8, d9, [sp, 16]\n" +" stp d10, d11, [sp, 32]\n" +" stp d12, d13, [sp, 48]\n" +" stp d14, d15, [sp, 64]\n" +" smstart\n" +" ptrue p0.s, vl4\n" +" fmov z0.s, #1.0\n" +/* + * An outer product of a vector of 1.0 by itself should be a matrix of 1.0. + * Note that we are using tile 1 here (za1.s) rather than tile 0. + */ +" zero {za}\n" +" fmopa za1.s, p0/m, p0/m, z0.s, z0.s\n" +/* + * Read the first 4x4 sub-matrix of elements from tile 1: + * Note that za1h should be interchangable here. + */ +" mov w12, #0\n" +" mova z0.s, p0/m, za1v.s[w12, #0]\n" +" mova z1.s, p0/m, za1v.s[w12, #1]\n" +" mova z2.s, p0/m, za1v.s[w12, #2]\n" +" mova z3.s, p0/m, za1v.s[w12, #3]\n" +/* + * And store them to the input pointer (dst in the C code): + */ +" st1w {z0.s}, p0, [x0]\n" +" add x0, x0, #16\n" +" st1w {z1.s}, p0, [x0]\n" +" add x0, x0, #16\n" +" st1w {z2.s}, p0, [x0]\n" +" add x0, x0, #16\n" +" st1w {z3.s}, p0, [x0]\n" +" smstop\n" +" ldp d8, d9, [sp, 16]\n" +" ldp d10, d11, [sp, 32]\n" +" ldp d12, d13, [sp, 48]\n" +" ldp d14, d15, [sp, 64]\n" +" ldp x29, x30, [sp], 80\n" +" ret\n" +" .size foo, . - foo" +); + +int main() +{ + float dst[16]; + int i, j; + + foo(dst); + + for (i = 0; i < 16; i++) { + if (dst[i] != 1.0f) { + break; + } + } + + if (i == 16) { + return 0; /* success */ + } + + /* failure */ + for (i = 0; i < 4; ++i) { + for (j = 0; j < 4; ++j) { + printf("%f ", (double)dst[i * 4 + j]); + } + printf("\n"); + } + return 1; +} From patchwork Wed Apr 10 05:43:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787468 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp541942wrs; Tue, 9 Apr 2024 22:46:42 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVzTvEKOdNpheFHxDzrkOkJeljV6rV8UGwLqFSgVLDaxuxOtPH4KggYin0TUXnkRbL/Jxzsr6SkV5dIVmj1Qyjg X-Google-Smtp-Source: AGHT+IEsmK6LV0zS55xa4fPBZbzcgJNw/yhUvjbpv2BXzP2cr2H6VE4Kuj+eEXtWpHeyexHt5osJ X-Received: by 2002:a05:6102:2ac1:b0:47a:1a50:6953 with SMTP id eh1-20020a0561022ac100b0047a1a506953mr1597255vsb.19.1712728002291; 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[209.51.188.17]) by mx.google.com with ESMTPS id iw3-20020a0562140f2300b0069b317f312esi2681758qvb.34.2024.04.09.22.46.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:46:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQlO-0004mb-3g; Wed, 10 Apr 2024 01:44:50 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQlM-0004mD-PQ; Wed, 10 Apr 2024 01:44:48 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQlL-0001LN-59; Wed, 10 Apr 2024 01:44:48 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id F23D05D4DE; Wed, 10 Apr 2024 08:46:14 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id B099CB0145; Wed, 10 Apr 2024 08:44:16 +0300 (MSK) Received: (nullmailer pid 4182018 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Peter Maydell , Paolo Bonzini , Artyom Tarasenko , Markus Armbruster , =?utf-8?q?Alex_Benn=C3=A9e?= , =?utf-8?q?Philippe_M?= =?utf-8?q?athieu-Daud=C3=A9?= , =?utf-8?q?Daniel_P_=2E_B?= =?utf-8?q?errang=C3=A9?= , Michael Tokarev Subject: [Stable-7.2.11 06/41] hw/rtc/sun4v-rtc: Relicense to GPLv2-or-later Date: Wed, 10 Apr 2024 08:43:27 +0300 Message-Id: <20240410054416.4181891-6-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Peter Maydell The sun4v RTC device model added under commit a0e893039cf2ce0 in 2016 was unfortunately added with a license of GPL-v3-or-later, which is not compatible with other QEMU code which has a GPL-v2-only license. Relicense the code in the .c and the .h file to GPL-v2-or-later, to make it compatible with the rest of QEMU. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Signed-off-by: Paolo Bonzini (for Red Hat) Signed-off-by: Artyom Tarasenko Signed-off-by: Markus Armbruster Signed-off-by: Alex Bennée Signed-off-by: Philippe Mathieu-Daudé Signed-off-by: Daniel P. Berrangé Acked-by: Alex Bennée Message-id: 20240223161300.938542-1-peter.maydell@linaro.org Signed-off-by: Peter Maydell (cherry picked from commit fd7f95f23d6fe485332c1d4b489eb719fcb7c225) Signed-off-by: Michael Tokarev diff --git a/hw/rtc/sun4v-rtc.c b/hw/rtc/sun4v-rtc.c index e037acd1b5..ffcc0aa25d 100644 --- a/hw/rtc/sun4v-rtc.c +++ b/hw/rtc/sun4v-rtc.c @@ -5,7 +5,7 @@ * * Copyright (c) 2016 Artyom Tarasenko * - * This code is licensed under the GNU GPL v3 or (at your option) any later + * This code is licensed under the GNU GPL v2 or (at your option) any later * version. */ diff --git a/include/hw/rtc/sun4v-rtc.h b/include/hw/rtc/sun4v-rtc.h index fc54dfcba4..26a9eb6196 100644 --- a/include/hw/rtc/sun4v-rtc.h +++ b/include/hw/rtc/sun4v-rtc.h @@ -5,7 +5,7 @@ * * Copyright (c) 2016 Artyom Tarasenko * - * This code is licensed under the GNU GPL v3 or (at your option) any later + * This code is licensed under the GNU GPL v2 or (at your option) any later * version. */ From patchwork Wed Apr 10 05:43:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787472 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp542644wrs; Tue, 9 Apr 2024 22:50:07 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVX4zEqv6+kt6hcoyi8iHSY7dDPmWD8nFtKkxui4Wt8GXN0w0+Qa6K+01455pEr51tOuWfsU8NVln6WsczB4FUy X-Google-Smtp-Source: AGHT+IES2mBboY3QNdkeUi5Ntd3hc7zOYF2gFKKQhE42h7/zWcYTQ5ICCt7WgzmoQQEVTuCFNcKP X-Received: by 2002:ad4:5e8b:0:b0:699:419a:fb2 with SMTP id jl11-20020ad45e8b000000b00699419a0fb2mr1978277qvb.27.1712728206793; Tue, 09 Apr 2024 22:50:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712728206; cv=none; d=google.com; s=arc-20160816; b=HT+v0wFIqY7VlK8Lxgzo8ppZP4EcxVv0X1fw5tApHlPBOsuhqlKtxsvLx17ihtxY1C odkbe2WYQTiHuaChatdRqfNq/DHoqpoF1MV3VglF2L42OvR6pkLaTRaIV5ND5ymUA3ZT NNzP36wxMugYPkoFIhigPFkCFoAAN0pEbnYD1GbM3ZoKqKpPxNdjcvD74SuBsVYvNL9v 37qCQ0SDJ45CQ7qvGYjtqSjMeMTMeHuyiRF/v1fjk9LywH9TuKMg58GXZ/iBtRsQxOaJ NbhUQCd/sbutGEdHXokNkw0Sb4G/PU90KltPzyMziSRzl5FqbDFQrYjPKazQiWj8HkZf Oipw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=yAI++tK0930drMSXZaQufDX9hH7ym9pbTlVjew8XcnE=; fh=aZ0vNBu2BbSh58cZJ/JjvxJp0XlraRTUsvh6INnHbTI=; b=r7dkX9zlpJtykBoUMDA0oeHLk1Hscji6731mbqpcRowvyE2XVzu4LzmN1dd9GebRPG jdxvwF643TlHdhAKaeGnVQhxibnJyqIGwE83AlEI6dEt6KQTZapbtythC/1j3IfpwgVw /SzCHal+FUjcWRG0s71Ldz9rO5JNgzO4LSSr/hlsn2n/lTNnqfUr8+isX1iGftYqZ5Pe HjmLlz65qJg7IpLwwWZhefSWEMGVgWcBGWvU/U4xR/9jT0HhTpfrBL4hqqS7fDIa23WR DSeMfhTkaO4o5BXGt9r0EFgw/GibdbrnYZITP1Cmj3YtqlThisVSCNdWpSEfd/w0AwG4 3wUA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c3-20020a056214224300b0069b1ef03333si5734115qvc.6.2024.04.09.22.50.06 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:50:06 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQoB-0003P0-2H; Wed, 10 Apr 2024 01:47:43 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQn7-0007JS-1U; Wed, 10 Apr 2024 01:46:37 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQn4-0001tj-TH; Wed, 10 Apr 2024 01:46:36 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 6CE945D4F3; Wed, 10 Apr 2024 08:46:16 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 32AF3B015A; Wed, 10 Apr 2024 08:44:18 +0300 (MSK) Received: (nullmailer pid 4182083 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Peter Maydell , =?utf-8?q?Daniel_P_=2E_Berrang=C3=A9?= , Michael Tokarev Subject: [Stable-7.2.11 27/41] tests: Raise timeouts for bufferiszero and crypto-tlscredsx509 Date: Wed, 10 Apr 2024 08:43:48 +0300 Message-Id: <20240410054416.4181891-27-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Peter Maydell On our gcov CI job, the bufferiszero and crypto-tlscredsx509 tests time out occasionally, making the job flaky. Double the timeout on these two tests. Cc: qemu-stable@nongnu.org Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2221 Signed-off-by: Peter Maydell Reviewed-by: Daniel P. Berrangé Message-id: 20240312110815.116992-1-peter.maydell@linaro.org (cherry picked from commit 55f7c6a5f2bd82e1d2d0eac6eee0185ce0451815) Signed-off-by: Michael Tokarev diff --git a/tests/unit/meson.build b/tests/unit/meson.build index 60eb89ea98..ca44f45232 100644 --- a/tests/unit/meson.build +++ b/tests/unit/meson.build @@ -167,9 +167,10 @@ test_env.set('G_TEST_BUILDDIR', meson.current_build_dir()) slow_tests = { 'test-aio-multithread' : 120, + 'test-bufferiszero': 60, 'test-crypto-block' : 300, - 'test-crypto-tlscredsx509': 45, - 'test-crypto-tlssession': 45, + 'test-crypto-tlscredsx509': 90, + 'test-crypto-tlssession': 90, 'test-replication': 60, } From patchwork Wed Apr 10 05:43:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787470 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp542592wrs; Tue, 9 Apr 2024 22:49:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWvJt+vjoGMZoeKTxe1yVZuXac4ueUA/dGHJu9Si68ICy4MuwH2oXUcoUQ9RMOg30t7sOYa0XX6hfkP16IwboIJ X-Google-Smtp-Source: AGHT+IHoD5SAls8QoaO6G4hwUQcL9pW3D1IoTlY8/Iej1T6iT4b4YY6shFGgueEdV52QdpblS4rL X-Received: by 2002:a05:620a:580e:b0:78b:d447:4752 with SMTP id wm14-20020a05620a580e00b0078bd4474752mr1581948qkn.17.1712728192183; Tue, 09 Apr 2024 22:49:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712728192; cv=none; d=google.com; s=arc-20160816; b=Tv9hzGnifTfieAYVuaQ8mkfsJtmWniihlNAYnRwpZVGYdXVilgwWJFtXgty0GUt1Ea 2Wh/orJq7u2xfkppKCL+ko1euH4I7XrCzwP4f+y0FNz4RThyZDwK+tEmnZQIWVzA3VbY 1m2ywpRehSSR2Rn9UWvkxU1CPmKEYAmDtsMdrYfeStjlMZhk891CXB6818qs7hzkGHIj xeBn2rfUgZSR12VYPoQnGiatHom9PMfsQo4y4MBEO2379SCC2lenN5K9vOzjRwSeCEur m1i8KpIB5sTZxmRY2vG6vUazy3DvxJ82bmCSNLhNydTwjOgwMdakYXgyynh/szVzowFV Q3CQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=4N0y2iYQrQUv/tSmVuta8Jx5lTcfTNEZkTbXlAzrVMI=; fh=K4abbxCgZAPvqzOXA+PZ7RIZh+KufMVJze7rXLOwES0=; b=iScQAnQ4ola73Vs2pIVqzGvkAGbBIYWvI6pvE8cyvH22AF9PobwqSg2rN2AWXK4zlk 9p98ROtPBr3030MeV19wtnfICrPgcGG1JZj7DYxa1VW18KaeFQu4at4tjHjxTxht2115 piYLO7RHqtgLG2d17vxHnSh0WDA/6VzQXRTYWUdMc41psvGdk1zTOBVYBUey7VprVk28 nk8fBQVD9cEagvN96hveStS8cwVLslHOtMVxb23Fm9IS6ZzpABk2U3OwFsfFNGEBu8qa y1ZmK7Am7w+ZzA57m6YBiiIGtHIl1m+99m1YcgWJYhoag7hRHjxXoiXtrV9UbtzHowIw mR1A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id bp19-20020a05620a459300b0078d777d7ba9si1337756qkb.203.2024.04.09.22.49.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:49:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQoG-0004CO-DU; Wed, 10 Apr 2024 01:47:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQoD-0003t6-OQ; Wed, 10 Apr 2024 01:47:45 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQoB-00023D-OL; Wed, 10 Apr 2024 01:47:45 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 13E015D4FC; Wed, 10 Apr 2024 08:46:17 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id CD2CDB0163; Wed, 10 Apr 2024 08:44:18 +0300 (MSK) Received: (nullmailer pid 4182111 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Tokarev Subject: [Stable-7.2.11 36/41] tcg/optimize: Fix sign_mask for logical right-shift Date: Wed, 10 Apr 2024 08:43:57 +0300 Message-Id: <20240410054416.4181891-36-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson The 'sign' computation is attempting to locate the sign bit that has been repeated, so that we can test if that bit is known zero. That computation can be zero if there are no known sign repetitions. Cc: qemu-stable@nongnu.org Fixes: 93a967fbb57 ("tcg/optimize: Propagate sign info for shifting") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2248 Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé (cherry picked from commit 2911e9b95f3bb03783ae5ca3e2494dc3b44a9161) Signed-off-by: Michael Tokarev (Mjt: trivial context fixup in tests/tcg/aarch64/Makefile.target) diff --git a/tcg/optimize.c b/tcg/optimize.c index ae081ab29c..b6f6436c74 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1907,7 +1907,7 @@ static bool fold_shift(OptContext *ctx, TCGOp *op) * will not reduced the number of input sign repetitions. */ sign = (s_mask & -s_mask) >> 1; - if (!(z_mask & sign)) { + if (sign && !(z_mask & sign)) { ctx->s_mask = s_mask; } break; diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 5e4ea7c998..474f61bc30 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -10,6 +10,7 @@ VPATH += $(AARCH64_SRC) # Base architecture tests AARCH64_TESTS=fcvt pcalign-a64 +AARCH64_TESTS += test-2248 fcvt: LDFLAGS+=-lm diff --git a/tests/tcg/aarch64/test-2248.c b/tests/tcg/aarch64/test-2248.c new file mode 100644 index 0000000000..aac2e17836 --- /dev/null +++ b/tests/tcg/aarch64/test-2248.c @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ +/* See https://gitlab.com/qemu-project/qemu/-/issues/2248 */ + +#include + +__attribute__((noinline)) +long test(long x, long y, long sh) +{ + long r; + asm("cmp %1, %2\n\t" + "cset x12, lt\n\t" + "and w11, w12, #0xff\n\t" + "cmp w11, #0\n\t" + "csetm x14, ne\n\t" + "lsr x13, x14, %3\n\t" + "sxtb %0, w13" + : "=r"(r) + : "r"(x), "r"(y), "r"(sh) + : "x11", "x12", "x13", "x14"); + return r; +} + +int main() +{ + long r = test(0, 1, 2); + assert(r == -1); + return 0; +} From patchwork Wed Apr 10 05:43:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787471 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp542597wrs; Tue, 9 Apr 2024 22:49:53 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUkFcN0BoQc/ZFk/02SGIVtAeXiBM87xD7jTh8bjtBuDd/RM0SYbKTYRFL8nypDxHxsL5cfIKDQj4uBThG7WJCP X-Google-Smtp-Source: AGHT+IFDh8DWUPl3IWi0Wo7QwWWapb0LaRz0TjbEziHdIzSrbizuSatnHHjZzjcInT2f+4z5Gq/y X-Received: by 2002:a05:6102:1d:b0:478:89bb:602f with SMTP id j29-20020a056102001d00b0047889bb602fmr1476961vsp.31.1712728193144; Tue, 09 Apr 2024 22:49:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712728193; cv=none; d=google.com; s=arc-20160816; b=eH35x63h9mlrVXjhNxu+CTal4iH1DCkbR2vyxQN298LPPOdTfIXH80dxyl5w9BtPnp FZf7AWYUIimjq/7Rojrk1qPICdZwBiLzbo6ZCYhjz1K9Mv2RyINJu7aT35OxDJGpuZqm 78IzsIf9M3DbP9VgyvJA00DYaWcV4hpVbPw+wYjiPchzLoCLY66hAZmryr0FzUq9SueR /0O5czq5tDwPmmO1eg1Olb+R5NGipofTlpVk9KU6lcHf9jn/arFJnavKJbKhypzfKGtA QXdowjDHlBXJ5qB29pOblDIN11PDXy+TSYLyJyemuuOEqZ9LsfJ+VrSehlupOaIUVdfo 9WVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=sGzsrVjBZK5Oli7L6ij4KlbrJ9qA3eDl83fT5ULHL4o=; fh=kdk60BKfZ5DgEBtWXo3DTw7OzkP+TNgwcG6z+nAOi8Y=; b=fK9k0jX9UA6QdFS7bxH2CItnppfXXpONIjK1eOHzrr3STmSery1fNycbxukkMLuTgk /5JmuCvwhgHgtUQ2r303AE+SFjjbfM1W1YHUG8DosRvGnuS5QVaUPVJMlyOH7eyVt+JH 9fRzUxwEWJJyVlRypFXbIrk15diplcWEFn0cloHBFSOxuN3ShFf5vNZoILRG5ULn2uCy vx3f0sAQV+OoslOIaFfNQN+GdvIlUEY28cS7djgG3ZdlmPRCRlJMT3RyD9zCxZj1YWxJ JYW2C2pL5mI+or6GTReoHdxGi4Fh03PcMG19ZYvDCO9l7z94CDd4vOFuPpe/emae1kAq Ir4w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id xx13-20020a05620a5d8d00b0078d72d638d8si2406384qkn.712.2024.04.09.22.49.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:49:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQoJ-0004bJ-FO; Wed, 10 Apr 2024 01:47:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQoH-0004N9-0k; Wed, 10 Apr 2024 01:47:49 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQoF-00025t-6c; Wed, 10 Apr 2024 01:47:48 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 241F35D4FD; Wed, 10 Apr 2024 08:46:17 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id DCCFBB0164; Wed, 10 Apr 2024 08:44:18 +0300 (MSK) Received: (nullmailer pid 4182114 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Richard Henderson , Sven Schnelle , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Michael Tokarev Subject: [Stable-7.2.11 37/41] target/hppa: Clear psw_n for BE on use_nullify_skip path Date: Wed, 10 Apr 2024 08:43:58 +0300 Message-Id: <20240410054416.4181891-37-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Richard Henderson Along this path we have already skipped the insn to be nullified, so the subsequent insn should be executed. Cc: qemu-stable@nongnu.org Reported-by: Sven Schnelle Tested-by: Sven Schnelle Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson (cherry picked from commit 4a3aa11e1fb25c28c24a43fd2835c429b00a463d) Signed-off-by: Michael Tokarev diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 1af77473da..ee68d2f834 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3473,6 +3473,7 @@ static bool trans_be(DisasContext *ctx, arg_be *a) tcg_gen_addi_reg(cpu_iaoq_b, cpu_iaoq_f, 4); tcg_gen_mov_i64(cpu_iasq_f, new_spc); tcg_gen_mov_i64(cpu_iasq_b, cpu_iasq_f); + nullify_set(ctx, 0); } else { copy_iaoq_entry(cpu_iaoq_f, ctx->iaoq_b, cpu_iaoq_b); if (ctx->iaoq_b == -1) { From patchwork Wed Apr 10 05:44:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Tokarev X-Patchwork-Id: 787473 Delivered-To: patch@linaro.org Received: by 2002:adf:fdd2:0:b0:346:15ad:a2a with SMTP id i18csp543056wrs; Tue, 9 Apr 2024 22:52:02 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXw5s+iCGRrpEuDtVfFhaC5VraBuu5qs+cPrdEIwTpFglfOYQFbIh8RN9nydmIrHdnOKQ5cbCRnoWUuoNsnWjrF X-Google-Smtp-Source: AGHT+IHM+fHXUF4P0nSCqIqg0lwTv1Dh8uwslggmD1CKCzhFpJS0mo+Hv36jjswg9GQvgXkfNMeQ X-Received: by 2002:a05:6214:2602:b0:69b:286f:3375 with SMTP id gu2-20020a056214260200b0069b286f3375mr2214726qvb.4.1712728322730; Tue, 09 Apr 2024 22:52:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1712728322; cv=none; d=google.com; s=arc-20160816; b=R36X21bxTY9ppWc0jS5jfy9h80buPG2NB+y88pAh7jJm8Xj50XK7lzWtJOIOPr11OG 9LzD21CZKQMDozuqsvpyYkD/1wdJhS8a2pjfNwHgbZrYhcGT/QHFlwyFfj4K12gd4W3V jzR6WYlWYnS6SKbx93RCSWqDgYPFXuiLOTDwmLWXRQN+krdYEvhzc5b4PAUMsXbisxQ6 BvFkIl4MVR+COXtHQGmL/97Oques76ghvohHOiorQyRACc03lsodHmHm6IcEq6oEmo33 H1ZUqT+h4QhEJFQpe4D3nuggLXpQSSx2c9hr0aNRsGrMN03WiGhb+zceFKb+iaPR84Vt q04w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from; bh=p5DqYr4AjpdUW71bHk7Q0wVppMMixwgTSYrEN1pW+iY=; fh=xJ1URYKcMN3TM0/XAv5v+aCN+5tIbzAdcfBx5UNgoLw=; b=cUG6bY0UfDHH7KnbsO/VK6tGay2fz+7V4kvp1h/ri/KpNWxCjbXepP6/74a6CpFquB y6gH8nhLyWP9DTLdl0k846b0dQn1SAV/i1FValeZIPsAIk4p/4IebUOcg8/T9IMrbqgu J/gGfznsXiOta8QRSl4nqcK/SVo+2KnL08wlO05sPr+NvxuBl11I2VjVRCBpWyDViQUR 9dOVmNlcuoi95lC6GesxpZC92tHPfA+6HNu/IyxOSSffI5RMiaKbK/lYixy2TeX9wp1Z A9iJNwkIU5x4UGnERAY5vr4owbVSRUQiOOUiNJ0wSvtYCAf53oJ2v8G/H08Zb0S/qYLa YykA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id df15-20020a056214080f00b0069b3cff59afsi254700qvb.329.2024.04.09.22.52.02 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 09 Apr 2024 22:52:02 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ruQol-00063o-E2; Wed, 10 Apr 2024 01:48:19 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQoN-0004sO-7n; Wed, 10 Apr 2024 01:47:55 -0400 Received: from isrv.corpit.ru ([86.62.121.231]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ruQoL-000271-Lb; Wed, 10 Apr 2024 01:47:55 -0400 Received: from tsrv.corpit.ru (tsrv.tls.msk.ru [192.168.177.2]) by isrv.corpit.ru (Postfix) with ESMTP id 414815D4FF; Wed, 10 Apr 2024 08:46:17 +0300 (MSK) Received: from tls.msk.ru (mjt.wg.tls.msk.ru [192.168.177.130]) by tsrv.corpit.ru (Postfix) with SMTP id 06E0FB0166; Wed, 10 Apr 2024 08:44:19 +0300 (MSK) Received: (nullmailer pid 4182120 invoked by uid 1000); Wed, 10 Apr 2024 05:44:16 -0000 From: Michael Tokarev To: qemu-devel@nongnu.org Cc: qemu-stable@nongnu.org, Peter Maydell , Richard Henderson , Michael Tokarev Subject: [Stable-7.2.11 39/41] hw/intc/arm_gicv3: ICC_HPPIR* return SPURIOUS if int group is disabled Date: Wed, 10 Apr 2024 08:44:00 +0300 Message-Id: <20240410054416.4181891-39-mjt@tls.msk.ru> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=86.62.121.231; envelope-from=mjt@tls.msk.ru; helo=isrv.corpit.ru X-Spam_score_int: -68 X-Spam_score: -6.9 X-Spam_bar: ------ X-Spam_report: (-6.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_HI=-5, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Peter Maydell If the group of the highest priority pending interrupt is disabled via ICC_IGRPEN*, the ICC_HPPIR* registers should return INTID_SPURIOUS, not the interrupt ID. (See the GIC architecture specification pseudocode functions ICC_HPPIR1_EL1[] and HighestPriorityPendingInterrupt().) Make HPPIR reads honour the group disable, the way we already do when determining whether to preempt in icc_hppi_can_preempt(). Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20240328153333.2522667-1-peter.maydell@linaro.org (cherry picked from commit 44e25fbc1900c99c91a44e532c5bd680bc403459) Signed-off-by: Michael Tokarev diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index f71b3b07d8..ddfbc69d65 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -1065,7 +1065,7 @@ static uint64_t icc_hppir0_value(GICv3CPUState *cs, CPUARMState *env) */ bool irq_is_secure; - if (cs->hppi.prio == 0xff) { + if (icc_no_enabled_hppi(cs)) { return INTID_SPURIOUS; } @@ -1102,7 +1102,7 @@ static uint64_t icc_hppir1_value(GICv3CPUState *cs, CPUARMState *env) */ bool irq_is_secure; - if (cs->hppi.prio == 0xff) { + if (icc_no_enabled_hppi(cs)) { return INTID_SPURIOUS; }