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([82.78.167.8]) by smtp.gmail.com with ESMTPSA id j24-20020a17090643d800b00a51d46c684csm3979691ejn.89.2024.04.10.06.54.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Apr 2024 06:54:19 -0700 (PDT) From: Claudiu Beznea X-Google-Original-From: Claudiu Beznea To: wsa+renesas@sang-engineering.com, ulf.hansson@linaro.org Cc: linux-mmc@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org, Claudiu Beznea , Hien Huynh Subject: [PATCH v2] mmc: renesas_sdhi: Set the SDBUF after reset Date: Wed, 10 Apr 2024 16:54:16 +0300 Message-Id: <20240410135416.2139173-1-claudiu.beznea.uj@bp.renesas.com> X-Mailer: git-send-email 2.39.2 Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 For development purpose, renesas_sdhi_probe() could be called w/ dma_ops = NULL to force the usage of PIO mode. In this case the renesas_sdhi_enable_dma() will not be called before transferring data. If renesas_sdhi_enable_dma() is not called, renesas_sdhi_clk_enable() call from renesas_sdhi_probe() will configure SDBUF by calling the renesas_sdhi_sdbuf_width() function, but then SDBUF will be reset in tmio_mmc_host_probe() when calling tmio_mmc_reset() though host->reset(). If SDBUF is zero the data transfer will not work in PIO mode for RZ/G3S. To fix this call again the renesas_sdhi_sdbuf_width(host, 16) in renesas_sdhi_reset(). The call of renesas_sdhi_sdbuf_width() was not removed from renesas_sdhi_clk_enable() as the host->reset() is optional. Co-developed-by: Hien Huynh Signed-off-by: Hien Huynh Signed-off-by: Claudiu Beznea --- Changes in v2: - fixed typos in commit description - limit the comment lines to 80 chars drivers/mmc/host/renesas_sdhi_core.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mmc/host/renesas_sdhi_core.c b/drivers/mmc/host/renesas_sdhi_core.c index f84f60139bcf..5233731a94c4 100644 --- a/drivers/mmc/host/renesas_sdhi_core.c +++ b/drivers/mmc/host/renesas_sdhi_core.c @@ -589,6 +589,12 @@ static void renesas_sdhi_reset(struct tmio_mmc_host *host, bool preserve) sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); priv->needs_adjust_hs400 = false; renesas_sdhi_set_clock(host, host->clk_cache); + + /* + * In case the controller works in PIO mode the SDBUF + * needs to be set as its reset value is zero. + */ + renesas_sdhi_sdbuf_width(host, 16); } else if (priv->scc_ctl) { renesas_sdhi_scc_reset(host, priv); }