From patchwork Thu Oct 10 11:08:56 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suzuki K Poulose X-Patchwork-Id: 175744 Delivered-To: patch@linaro.org Received: by 2002:ac9:3c86:0:0:0:0:0 with SMTP id w6csp2154690ocf; Thu, 10 Oct 2019 04:09:03 -0700 (PDT) X-Google-Smtp-Source: APXvYqyCLITHjQrpc2QYreX62XO1WAE0JREpJzhUxbu+mkUuS7yZmxUU9VxCDzZmUskLiJvXzcce X-Received: by 2002:a50:8f65:: with SMTP id 92mr7790903edy.9.1570705743418; Thu, 10 Oct 2019 04:09:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1570705743; cv=none; d=google.com; s=arc-20160816; b=FV37CWuLaD+Gc1WqAc7sBWkKrsMiti/kmxr/2/yVfQ3eJ7IFg9X9C+cLF+n8Rf4j5Z 4AXW2OOxDPUnjLKxiucIfF4kjZB0pNAsXILFAv+TaggDfD0HA8s3v1qq0IJOgLMIYizc fljsjCZqehyUvjf2RU+0SC6g5jebiQYZMxRUBMEdSE6Q1jqwfBgaNdUPFdE9yWIKn+3X YIVWK+A5+auZHaS67ObqRPReD1rcIgfjSzkqd17lMAdUMuTyrErsHUCci67qUKMVd1av hoXGIyD4qbT8wwP3gPiKs5BWX/md6Xej1CytImFVFaMBDjhvkpEDSEDxVh1n1ubHMFZW +1hQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from; bh=iShxSYxZP0aAjDGlBRAysxWhEEzY9rmENQvy+E8EAvQ=; b=w2ovG8WdVlgyOTctDp2KsXW/aKVCLdC059MI6Y4gKblsFw66nLY/9jdeiiJgItsrKo UhozQunQyvBnxdDBumcUPA+c+BmLEJU4qfNInnj0s9WfnZHaA9KaMaa1x0WBeR8uNxzP vr5Gsyv8mE+6d2Du+unT1k6GeubUm/Y2uJFVtj8Gc4Nn5jqmfWDIFLvPmaIU8Yi2JJ+h rJEzbgV7PdKQP8Dizajjczw1RmzRBF4ZlkHQevVUoauuZZ+638d9dA6h6mwWUHjPOE2m F4TAt0uSyafGgmIFdcwap51y7U/JdTmLvCN2ygl/lYpfj7xjtRCcUrwbzhHQ2idpFoTV ez/w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c28si3169323ede.3.2019.10.10.04.09.03; Thu, 10 Oct 2019 04:09:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of stable-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=stable-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726983AbfJJLJC (ORCPT + 13 others); Thu, 10 Oct 2019 07:09:02 -0400 Received: from foss.arm.com ([217.140.110.172]:57008 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726237AbfJJLJC (ORCPT ); Thu, 10 Oct 2019 07:09:02 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D794428; Thu, 10 Oct 2019 04:09:01 -0700 (PDT) Received: from dawn-kernel.cambridge.arm.com (unknown [10.1.197.116]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id EEA1B3F68E; Thu, 10 Oct 2019 04:09:00 -0700 (PDT) From: Suzuki K Poulose To: stable@vger.kernel.org Cc: suzuki.poulose@arm.com, linux-arm-kernel@lists.infradead.org, will@kernel.org, mark.rutland@arm.com, catalin.marinas@arm.com Subject: [PATCH] arm64: cpufeature: Fix truncating a feature value Date: Thu, 10 Oct 2019 12:08:56 +0100 Message-Id: <20191010110856.4376-1-suzuki.poulose@arm.com> X-Mailer: git-send-email 2.21.0 MIME-Version: 1.0 Sender: stable-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org A signed feature value is truncated to turn to an unsigned value causing bad state in the system wide infrastructure. This affects the discovery of FP/ASIMD support on arm64. Fix this by making sure we cast it properly. Fixes: 4f0a606bce5ec ("arm64: cpufeature: Track unsigned fields") Cc: stable@vger.kernel.org # v4.4 Cc: Will Deacon Cc: Mark Rutland Cc: Catalin Marinas Signed-off-by: Suzuki K Poulose --- arch/arm64/include/asm/cpufeature.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.21.0 diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 0a66f8241f18..9eb0d8072dd9 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -151,8 +151,8 @@ static inline u64 arm64_ftr_mask(struct arm64_ftr_bits *ftrp) static inline s64 arm64_ftr_value(struct arm64_ftr_bits *ftrp, u64 val) { return ftrp->sign ? - cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) : - cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width); + (s64)cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) : + (s64)cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width); } static inline bool id_aa64mmfr0_mixed_endian_el0(u64 mmfr0)