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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(36860700004)(1800799015)(82310400014)(376005); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 08:08:18.4695 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: e309fdc2-dc2f-43af-f9c1-08dc64feddcf X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000011.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR12MB4293 From: "Gautham R. Shenoy" The four fields of struct cpudata namely min_limit_perf, max_limit_perf, min_limit_freq, max_limit_freq introduced in the commit febab20caeba("cpufreq/amd-pstate: Fix scaling_min_freq and scaling_max_freq update") are currently undocumented Add comments describing these fields Acked-by: Huang Rui Fixes: febab20caeba("cpufreq/amd-pstate: Fix scaling_min_freq and scaling_max_freq update") Reviewed-by: Li Meng Tested-by: Dhananjay Ugwekar Signed-off-by: Gautham R. Shenoy Signed-off-by: Perry Yuan --- include/linux/amd-pstate.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index d21838835abd..83fb3fc647fc 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -49,6 +49,10 @@ struct amd_aperf_mperf { * @lowest_perf: the absolute lowest performance level of the processor * @prefcore_ranking: the preferred core ranking, the higher value indicates a higher * priority. + * @min_limit_perf: Cached value of the performance corresponding to policy->min + * @max_limit_perf: Cached value of the performance corresponding to policy->max + * @min_limit_freq: Cached value of policy->min + * @max_limit_freq: Cached value of policy->max * @max_freq: the frequency that mapped to highest_perf * @min_freq: the frequency that mapped to lowest_perf * @nominal_freq: the frequency that mapped to nominal_perf From patchwork Thu Apr 25 08:07:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Perry Yuan X-Patchwork-Id: 792231 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2069.outbound.protection.outlook.com [40.107.93.69]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E8FC75808; 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Thu, 25 Apr 2024 03:08:18 -0500 From: Perry Yuan To: , , , , , , CC: , , , , , Subject: [PATCH v12 2/8] cpufreq: amd-pstate: Document the units for freq variables in amd_cpudata Date: Thu, 25 Apr 2024 16:07:52 +0800 Message-ID: <102336d846b82a91faa09240f1751635b2d9d7cc.1714032153.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000011:EE_|SA0PR12MB4446:EE_ X-MS-Office365-Filtering-Correlation-Id: 0094c119-6d2d-4b0d-b5ab-08dc64fee053 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|376005|36860700004|1800799015|82310400014; X-Microsoft-Antispam-Message-Info: A1R8XV7SUDXGFfVNddXsbOSGEDcTAz+IVIsZ8ndsYC1yuRVocYTTv+rxqFv6m4RUNGCrBKvVJqkvZldhsf1bRkeDvxb7rpyyQ8RUDkz2XVL/CRMaIqH1AzA5yNuAhw58usH7XebjL1brJ6xd97JVn4CVETsNCTjTkZVQsac+IbCajgCBU5u5SYmrjITrqNLYwQ3ezA9mbUEsS9pYyHBYGr98dfpBy20GqZ/F5cd62mqVYq/bu13CIwpmiWzWEtpzqnTPnqhMxmjJGnBsMI/j3IWJgt0QaZhtEmk3W/yHB86Rl/jMzpMZfqyVSfcP4P/678whRlUM6pAMg3j392/kX+c4dsYrxEn9YDnKX7UdG3EpqrfOyjSLvhiLVZrzhKNiAux8COUCaUXEFjz/fQUDmRk+talEIyITrxmGZ5mcFmzYZLVEW6HYC6A0yyZsjtyxYOzLlBSZbWr4qhX3Luquyk+c54eS1wW0CZJmUYO2vuJQWHcbkvn5wLD54KbVZb/1Y/Ez6alDPQKYqe4ra1xehnxORUelbxw1ysv9RgJCBlA/nUmtOQgjobRdztvjzhBgwP4FMyPOwcXASVht+8mq80npj5KP+hVwamcl4ixyee+/yb/LJonIH5+MqCc0YNy3ysmf8z/a3ZY/P1v5tKoIbY6lPT37tYg38ouHgB7iqkSEcMdNzPirwPfpdDZGertiwHDvbGG5/03GwAQsHbNXjCTtIs/KC/5slLaalk8IGE6JlZvHzGZG1dS4EIFMv+ZzxrcS3uYVolYJKHNFXyGC+ECb74YCVIB8eRvSd3ReZZVdutrsFe3Qss8R5iyzXUbZzOZJAxM+hxgXVq+ea/uMXt5StxHz/1phFNk9DY7lGVv/Owx5WC8v89unyv2Z0d3jFyKqqlWnCxYMP5+otuqFnDmwp99XLNcMqqO/H1a72S/L4fJkWg+iaLqmmwVUhnO2ENHswcqE8ECwtoQf+hLQbTcpWO8plS5Hf7j0M6VbJUhYXH1Oe25VTdH2OVxzBJHkE/ibv2iAFX+fvx9b4mtw6dQ0j7NNwej8G/gCtQk1Ob2Jiy5HXiTMz9U9nCin6tOVxeYdjmG25Nx1aZETkxu2WevFCAabSW7BBEQjcJAARg3sGxi8Ia96Uv5AooktX4Sc0W68GV8gIfKEPxlmT9CmgGV2nZzKRY1hvb3hHjnS3ANMg5DJRwps3bDJsb3f0/0Ph9yfWvEjmon90hNnH8mODajLyV6YegSlHSmNZcKpS1wGN5aHoIlRpN8r8Cqufb1dpkWM9J32UWAf7s+Tw5sKHsnninaR2pBSZT+NaTr4kIhTlMnY+fXD+2Txq/nkwxrhg38vo/U/5JgWV6UsgN3lXCxmnmVvOiOALFx3+If1OHt5ueIIN7ah+WMBMv3yf+YZ X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(36860700004)(1800799015)(82310400014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 08:08:22.7195 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 0094c119-6d2d-4b0d-b5ab-08dc64fee053 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000011.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB4446 From: "Gautham R. Shenoy" The min_limit_freq, max_limit_freq, min_freq, max_freq, nominal_freq and the lowest_nominal_freq members of struct cpudata store the frequency value in khz to be consistent with the cpufreq core. Update the comment to document this. Reviewed-by: Li Meng Tested-by: Dhananjay Ugwekar Signed-off-by: Gautham R. Shenoy Signed-off-by: Perry Yuan Acked-by: Huang Rui --- include/linux/amd-pstate.h | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index 83fb3fc647fc..ec0b0fa3e9bb 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -51,15 +51,15 @@ struct amd_aperf_mperf { * priority. * @min_limit_perf: Cached value of the performance corresponding to policy->min * @max_limit_perf: Cached value of the performance corresponding to policy->max - * @min_limit_freq: Cached value of policy->min - * @max_limit_freq: Cached value of policy->max - * @max_freq: the frequency that mapped to highest_perf - * @min_freq: the frequency that mapped to lowest_perf - * @nominal_freq: the frequency that mapped to nominal_perf - * @lowest_nonlinear_freq: the frequency that mapped to lowest_nonlinear_perf + * @min_limit_freq: Cached value of policy->min (in khz) + * @max_limit_freq: Cached value of policy->max (in khz) + * @max_freq: the frequency (in khz) that mapped to highest_perf + * @min_freq: the frequency (in khz) that mapped to lowest_perf + * @nominal_freq: the frequency (in khz) that mapped to nominal_perf + * @lowest_nonlinear_freq: the frequency (in khz) that mapped to lowest_nonlinear_perf * @cur: Difference of Aperf/Mperf/tsc count between last and current sample * @prev: Last Aperf/Mperf/tsc count value read from register - * @freq: current cpu frequency value + * @freq: current cpu frequency value (in khz) * @boost_supported: check whether the Processor or SBIOS supports boost mode * @hw_prefcore: check whether HW supports preferred core featue. * Only when hw_prefcore and early prefcore param are true, From patchwork Thu Apr 25 08:07:53 2024 Content-Type: text/plain; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(376005)(36860700004)(1800799015)(82310400014); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 08:08:26.6533 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ca88998a-9f50-4732-7bea-08dc64fee2b5 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000017.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB4211 Currently the amd_get_{min, max, nominal, lowest_nonlinear}_freq() helpers computes the values of min_freq, max_freq, nominal_freq and lowest_nominal_freq respectively afresh from cppc_get_perf_caps(). This is not necessary as there are fields in cpudata to cache these values. To simplify this, add a single helper function named amd_pstate_init_freq() which computes all these frequencies at once, and caches it in cpudata. Use the cached values everywhere else in the code. Acked-by: Huang Rui Reviewed-by: Li Meng Tested-by: Dhananjay Ugwekar Co-developed-by: Gautham R. Shenoy Signed-off-by: Gautham R. Shenoy Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 126 ++++++++++++++++------------------- 1 file changed, 59 insertions(+), 67 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 2015c9fcc3c9..891fad6f90e1 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -606,74 +606,22 @@ static void amd_pstate_adjust_perf(unsigned int cpu, static int amd_get_min_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - /* Switch to khz */ - return cppc_perf.lowest_freq * 1000; + return READ_ONCE(cpudata->min_freq); } static int amd_get_max_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - u32 max_perf, max_freq, nominal_freq, nominal_perf; - u64 boost_ratio; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - nominal_freq = cppc_perf.nominal_freq; - nominal_perf = READ_ONCE(cpudata->nominal_perf); - max_perf = READ_ONCE(cpudata->highest_perf); - - boost_ratio = div_u64(max_perf << SCHED_CAPACITY_SHIFT, - nominal_perf); - - max_freq = nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT; - - /* Switch to khz */ - return max_freq * 1000; + return READ_ONCE(cpudata->max_freq); } static int amd_get_nominal_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - /* Switch to khz */ - return cppc_perf.nominal_freq * 1000; + return READ_ONCE(cpudata->nominal_freq); } static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) { - struct cppc_perf_caps cppc_perf; - u32 lowest_nonlinear_freq, lowest_nonlinear_perf, - nominal_freq, nominal_perf; - u64 lowest_nonlinear_ratio; - - int ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); - if (ret) - return ret; - - nominal_freq = cppc_perf.nominal_freq; - nominal_perf = READ_ONCE(cpudata->nominal_perf); - - lowest_nonlinear_perf = cppc_perf.lowest_nonlinear_perf; - - lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, - nominal_perf); - - lowest_nonlinear_freq = nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT; - - /* Switch to khz */ - return lowest_nonlinear_freq * 1000; + return READ_ONCE(cpudata->lowest_nonlinear_freq); } static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state) @@ -828,6 +776,53 @@ static void amd_pstate_update_limits(unsigned int cpu) mutex_unlock(&amd_pstate_driver_lock); } +/** + * amd_pstate_init_freq: Initialize the max_freq, min_freq, + * nominal_freq and lowest_nonlinear_freq for + * the @cpudata object. + * + * Requires: highest_perf, lowest_perf, nominal_perf and + * lowest_nonlinear_perf members of @cpudata to be + * initialized. + * + * Returns 0 on success, non-zero value on failure. + */ +static int amd_pstate_init_freq(struct amd_cpudata *cpudata) +{ + int ret; + u32 min_freq; + u32 highest_perf, max_freq; + u32 nominal_perf, nominal_freq; + u32 lowest_nonlinear_perf, lowest_nonlinear_freq; + u32 boost_ratio, lowest_nonlinear_ratio; + struct cppc_perf_caps cppc_perf; + + + ret = cppc_get_perf_caps(cpudata->cpu, &cppc_perf); + if (ret) + return ret; + + min_freq = cppc_perf.lowest_freq * 1000; + nominal_freq = cppc_perf.nominal_freq; + nominal_perf = READ_ONCE(cpudata->nominal_perf); + + highest_perf = READ_ONCE(cpudata->highest_perf); + boost_ratio = div_u64(highest_perf << SCHED_CAPACITY_SHIFT, nominal_perf); + max_freq = (nominal_freq * boost_ratio >> SCHED_CAPACITY_SHIFT) * 1000; + + lowest_nonlinear_perf = READ_ONCE(cpudata->lowest_nonlinear_perf); + lowest_nonlinear_ratio = div_u64(lowest_nonlinear_perf << SCHED_CAPACITY_SHIFT, + nominal_perf); + lowest_nonlinear_freq = (nominal_freq * lowest_nonlinear_ratio >> SCHED_CAPACITY_SHIFT) * 1000; + + WRITE_ONCE(cpudata->min_freq, min_freq); + WRITE_ONCE(cpudata->lowest_nonlinear_freq, lowest_nonlinear_freq); + WRITE_ONCE(cpudata->nominal_freq, nominal_freq); + WRITE_ONCE(cpudata->max_freq, max_freq); + + return 0; +} + static int amd_pstate_cpu_init(struct cpufreq_policy *policy) { int min_freq, max_freq, nominal_freq, lowest_nonlinear_freq, ret; @@ -855,6 +850,10 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) if (ret) goto free_cpudata1; + ret = amd_pstate_init_freq(cpudata); + if (ret) + goto free_cpudata1; + min_freq = amd_get_min_freq(cpudata); max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); @@ -896,13 +895,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) goto free_cpudata2; } - /* Initial processor data capability frequencies */ - cpudata->max_freq = max_freq; - cpudata->min_freq = min_freq; cpudata->max_limit_freq = max_freq; cpudata->min_limit_freq = min_freq; - cpudata->nominal_freq = nominal_freq; - cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; policy->driver_data = cpudata; @@ -1317,6 +1311,10 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) if (ret) goto free_cpudata1; + ret = amd_pstate_init_freq(cpudata); + if (ret) + goto free_cpudata1; + min_freq = amd_get_min_freq(cpudata); max_freq = amd_get_max_freq(cpudata); nominal_freq = amd_get_nominal_freq(cpudata); @@ -1333,12 +1331,6 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) /* It will be updated by governor */ policy->cur = policy->cpuinfo.min_freq; - /* Initial processor data capability frequencies */ - cpudata->max_freq = max_freq; - cpudata->min_freq = min_freq; - cpudata->nominal_freq = nominal_freq; - cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq; - policy->driver_data = cpudata; cpudata->epp_cached = amd_pstate_get_epp(cpudata, 0); From patchwork Thu Apr 25 08:07:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Perry Yuan X-Patchwork-Id: 792230 Received: from NAM12-DM6-obe.outbound.protection.outlook.com (mail-dm6nam12on2042.outbound.protection.outlook.com [40.107.243.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0258B82D9D; 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Thu, 25 Apr 2024 03:08:25 -0500 From: Perry Yuan To: , , , , , , CC: , , , , , Subject: [PATCH v12 4/8] cpufreq: amd-pstate: Remove amd_get_{min,max,nominal,lowest_nonlinear}_freq() Date: Thu, 25 Apr 2024 16:07:54 +0800 Message-ID: <23ef36cc03ff5579dbb2d9318ed8cdf4346924ee.1714032153.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000017:EE_|SN7PR12MB7371:EE_ X-MS-Office365-Filtering-Correlation-Id: ae1e3af3-e3f3-4215-bd5c-08dc64fee561 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: L7BF9hN0FOl6ImOGHYIkDpDuKuja+5bMrDW/mLIWXxm7uWuTYIraGhN1IPieysOht+7cnKDKj6/tamkUDuifjHGxk+Rr5xE96J3V+bYwbaSdqylomVbGieOJe0t7WSTMlyzw7WpRhe6AL3xZ5Sg810VjwEdTqswEJuvQfT5ezrY3mEOI/E6f7h922eiNA6nBbSN5e96rG7SNQ2AYM9RyHkmQPVvomga0DBRR3KaQRUsHwjaUZyKBcAUHRHD1pOjP/atIaMHqXOTvMQKbfoc9UaTWSYmfdQXcW2WNoCb4Iw6sqoh3au1vKUhdB/k0UPa1RSk9SzYn56gmbYJWjHHIVygPocq62itjB827+peLUbLQH9ADJD4gJpZ5702IdZ4uwqy6kMzuyzP1jfyC6FaEuj83qZMVEU2uyxusNzBDT4MkOQqPSA0bd3G1QKUxf1n3IVkiDrs+MB+0xBTvuoqSW+s1Wx4fbu4+pqbNErhi3eD6ktBQDcIl5Pd4kIo+OUKm9W1DosUyvU0EgOKNL0vXiceLqZ0yiquz2wMZfk5y2Yyd0a6rqFiabvWbur6B5sVLNjosCd1wG9NVYBT8liPEWXyPw8zGbyfByh0Ro7bAKSYYjOXJ/C5P3UWUvUnULBoONq7dEPkGos9dP9DK90ukaMd4q2K/LcJjZzt3CKkiphjNSbUZe82/uGCcYjcXmbQPhFTj3Phm5b10IFRkSi2HPq2dicKMXWhZQRRPMQ/kx7tHssVFogDqv98tt6dmB7yyxtX/FF8SqlzLvi5F8QIo6F/b5TrTP1i81kmbMOI0aLkk6SKMpCGxbDxNZOpl+4NDoG0el8+M+7j7CMTUFNriSyaz2QzMxiUeslFURIdcoTZDhOY5imkxtyBUHLSbnP/MauXjhISHe4ehBb3I2DwYL/TX8rPGH0ryXn91ZbeM7omG50+bTyLGJqXmp9uCGZW6rhiQA90rY71OcUFL7R582rP0zgPlp3E2H7EZpLSKpzLa4UenSYzKqhCip/YKxEZ17qUIuHAqDFxBZvpBVDpB1a8kygOmreWNJCNQctWcnu1ZVEyRS/DlP5Zx3Hdh1fMi769yZZT4EPA/QN0D/LKr23iUkcErg+kVoYPtKfGA5e4Ah3/9lcqDwwxS5ago5OLMGP7BpiCZbHxY5SEDkqKUbFYjsrz7DhHevo3lbdqJgJmaYz2Lm342Rrp0xZSnmdWgfFcgMqY6YAfUHThNwWLngaY3Br9C6tA90JvMvqX5QbrAVtsVkVSYNDUgKFFBeL+6efgLisdvbsIc8cWtVibneTwHOZY8ZhoDukn1EKIrgQMCrgMwl66EYEouvG5PG3Gwbu2PVN22iWLT+axEW9QIA7Krho2kpWMl4caGMS2+YpUna58oztJfXl9WyoBIFh+b X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Shenoy" amd_get_{min,max,nominal,lowest_nonlinear}_freq() functions merely return cpudata->{min,max,nominal,lowest_nonlinear}_freq values. There is no loss in readability in replacing their invocations by accesses to the corresponding members of cpudata. Do so and remove these helper functions. Acked-by: Huang Rui Reviewed-by: Li Meng Tested-by: Dhananjay Ugwekar Signed-off-by: Gautham R. Shenoy Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 40 +++++++++--------------------------- 1 file changed, 10 insertions(+), 30 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 891fad6f90e1..3836d62b54ef 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -604,26 +604,6 @@ static void amd_pstate_adjust_perf(unsigned int cpu, cpufreq_cpu_put(policy); } -static int amd_get_min_freq(struct amd_cpudata *cpudata) -{ - return READ_ONCE(cpudata->min_freq); -} - -static int amd_get_max_freq(struct amd_cpudata *cpudata) -{ - return READ_ONCE(cpudata->max_freq); -} - -static int amd_get_nominal_freq(struct amd_cpudata *cpudata) -{ - return READ_ONCE(cpudata->nominal_freq); -} - -static int amd_get_lowest_nonlinear_freq(struct amd_cpudata *cpudata) -{ - return READ_ONCE(cpudata->lowest_nonlinear_freq); -} - static int amd_pstate_set_boost(struct cpufreq_policy *policy, int state) { struct amd_cpudata *cpudata = policy->driver_data; @@ -854,10 +834,10 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) if (ret) goto free_cpudata1; - min_freq = amd_get_min_freq(cpudata); - max_freq = amd_get_max_freq(cpudata); - nominal_freq = amd_get_nominal_freq(cpudata); - lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata); + min_freq = READ_ONCE(cpudata->min_freq); + max_freq = READ_ONCE(cpudata->max_freq); + nominal_freq = READ_ONCE(cpudata->nominal_freq); + lowest_nonlinear_freq = READ_ONCE(cpudata->lowest_nonlinear_freq); if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", @@ -960,7 +940,7 @@ static ssize_t show_amd_pstate_max_freq(struct cpufreq_policy *policy, int max_freq; struct amd_cpudata *cpudata = policy->driver_data; - max_freq = amd_get_max_freq(cpudata); + max_freq = READ_ONCE(cpudata->max_freq); if (max_freq < 0) return max_freq; @@ -973,7 +953,7 @@ static ssize_t show_amd_pstate_lowest_nonlinear_freq(struct cpufreq_policy *poli int freq; struct amd_cpudata *cpudata = policy->driver_data; - freq = amd_get_lowest_nonlinear_freq(cpudata); + freq = READ_ONCE(cpudata->lowest_nonlinear_freq); if (freq < 0) return freq; @@ -1315,10 +1295,10 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) if (ret) goto free_cpudata1; - min_freq = amd_get_min_freq(cpudata); - max_freq = amd_get_max_freq(cpudata); - nominal_freq = amd_get_nominal_freq(cpudata); - lowest_nonlinear_freq = amd_get_lowest_nonlinear_freq(cpudata); + min_freq = READ_ONCE(cpudata->min_freq); + max_freq = READ_ONCE(cpudata->max_freq); + nominal_freq = READ_ONCE(cpudata->nominal_freq); + lowest_nonlinear_freq = READ_ONCE(cpudata->lowest_nonlinear_freq); if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", min_freq, max_freq); From patchwork Thu Apr 25 08:07:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Perry Yuan X-Patchwork-Id: 792564 Received: from NAM04-BN8-obe.outbound.protection.outlook.com (mail-bn8nam04on2040.outbound.protection.outlook.com [40.107.100.40]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DC2A484A3E; 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Thu, 25 Apr 2024 03:08:28 -0500 From: Perry Yuan To: , , , , , , CC: , , , , , Subject: [PATCH v12 5/8] cpufreq: amd-pstate: Bail out if min/max/nominal_freq is 0 Date: Thu, 25 Apr 2024 16:07:55 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000017:EE_|SJ2PR12MB8109:EE_ X-MS-Office365-Filtering-Correlation-Id: 07c93b5d-4fb4-4c93-74ae-08dc64fee67d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: aPUiBRxo82u2FOOR5ndpDKzGqiTXM5gBnCmSALBHx/4HtwXhpZd+kQuQPoP433f1rEOrJLn816h8vDa9/+XEt23dCO0hcmiKWIlKSxdDLh+sqRcnBINNLyDg1W+oE/DEcXL+SFWN0WBYymITy4pVtGzlzjWq/lwIc3j4zs6tSRYWlccVmxSTR/1VCZ6vXEGgHP+05lAO1KOtGA9k7fzBYp72gareW/+TvoQU1g29jc9WzgyJUkNTxnQDTkjt0xKqgtg7FgIQAYhKcVMZM0ZzWDeebbdzE5Y+V9h/pJf0FT7M22zO8fWp45EiP3eFrzXyfYA8sTQFkxyBKNezngybWHjyamW3dhYb7s2+ilUHdpwkzYDS3EfalACfrC4rz6dExhK0LgtGJnqddcBvBj5q+Mgp3/PTm2PSQ29V97fvd6ytTSX6Mq5NsTM/aPTTSOCCtLZtz7YFDILhVAGvKIea8w71L+KAOlS8duni5iJELzPUzFpV36AdhvrkTevxK+i8uVWaVHOKFdtS467DGJff11+aJtaFwRyNSbZK854x4s8ICH8J127bkq47L3I6FncNpUc4zILIXwR0mrwTM93CocDD2fcm5gFT2kLJ4tojmw9NW/NC1HXr1kvAgCXPjVH1DEVA3xW+/dueNnYM2wu2/SVIs6T7azwgkk8/SXJg5ZpmDT0xPuD5E2gJYEQvpBQCW+myO0fUsR5Q3SR7RRLCW1bg6v0zyayua37q9pD7qrBAX1jEguNEcX0HFXt54cIGp+IiagWqDivCAgLQqU+Q2HltPRuXOCdWnPyvCv1scF9iG0jZn42MTQiBLfLxIx3IvaPLxgn1jjWRgg8/raxVK/OiFOOnlhz1lF7h3vlKK7LQgbxf/QYOSMAOyRoItsNdtdrsGjWjoQQDnGzJD1JpAWVk6ommqtVvuEDtgYqauS86/eeLTRh/X/slkaiJwCds2/kyu/BETqdgjOYLrvxpyjt+7cU7h2FNc21sRKrcs4akKAXkvGMpuAEe815LV6PmLCLFzlu6AH/v9JjVUOG958lkJMGZmPJS81nziv2y+UleDTUQiP0TofYOPPOXGDC5oEngPi1AvR5jkXShvNSZrxPNF6kHky1l+8QQ70PrCU24m8Xe0F2hoHB+1bewVhb1Xeq95kEbz+fB5eZeQHsWJquBnAiLk2vyi1/FbBcoVzPEZegccNvzU7mlhYQlXNdvj0Y00GaGUG1n2IpRjTc6mVd1Pa4afcpLqSJRLi3UThItRUoQzPDtklTLcgWSSZIsnOb/tzsXcDBO5Abe2PvpkPGBlQL83u1h9oELQJEfJxj58/lM4WYHaDwvmchUwv5/NhpkK1+GCtlUSY1oBa5Bm7zO6quKb16eQvM+R0IDNW8= X-Forefront-Antispam-Report: CIP:165.204.84.17; CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(36860700004)(82310400014)(376005)(1800799015); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 08:08:33.0595 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 07c93b5d-4fb4-4c93-74ae-08dc64fee67d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000017.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SJ2PR12MB8109 The amd-pstate driver cannot work when the min_freq, nominal_freq or the max_freq is zero. When this happens it is prudent to error out early on rather than waiting failing at the time of the governor initialization. Acked-by: Huang Rui Reviewed-by: Gautham R. Shenoy Tested-by: Dhananjay Ugwekar Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 3836d62b54ef..960fead0b83e 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -839,9 +839,11 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) nominal_freq = READ_ONCE(cpudata->nominal_freq); lowest_nonlinear_freq = READ_ONCE(cpudata->lowest_nonlinear_freq); - if (min_freq < 0 || max_freq < 0 || min_freq > max_freq) { - dev_err(dev, "min_freq(%d) or max_freq(%d) value is incorrect\n", - min_freq, max_freq); + if (min_freq <= 0 || max_freq <= 0 || + nominal_freq <= 0 || min_freq > max_freq) { + dev_err(dev, + "min_freq(%d) or max_freq(%d) or nominal_freq (%d) value is incorrect, check _CPC in ACPI tables\n", + min_freq, max_freq, nominal_freq); ret = -EINVAL; goto free_cpudata1; } @@ -1299,9 +1301,11 @@ static int amd_pstate_epp_cpu_init(struct cpufreq_policy *policy) max_freq = READ_ONCE(cpudata->max_freq); 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Thu, 25 Apr 2024 03:08:32 -0500 From: Perry Yuan To: , , , , , , CC: , , , , , Subject: [PATCH v12 6/8] cpufreq: amd-pstate: get transition delay and latency value from ACPI tables Date: Thu, 25 Apr 2024 16:07:56 +0800 Message-ID: <23d8478a809e39748e140eef898c778a3d378697.1714032153.git.perry.yuan@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000016:EE_|CH3PR12MB8904:EE_ X-MS-Office365-Filtering-Correlation-Id: 49ce337c-274e-4d46-c448-08dc64fee937 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: a2b+GPSsMxkZoz5exjs0B8qkZUoSlgc8fsH+kuPv/73GUZBVCaIvAe29HvRglekMnAXTCVs9Grt2Ng0RvTENoxEZfnpGYEFc9JTYJ3L+RnxZa0mJ9msEUNXbo5b5nP5BtsnjQE1Y4GkkHecMWwcmyOxBE+zuZ6FDvUE0YJLrELXM6cP3U6i3FB6sWJPE8ApTM2ri1/J1smGL9FdM23hpjzCfcdLEPMfDnp1l5cGzWrMXRs+6HUI1EorvdrodxSZusQMwICMkZCnUNKG77Hvbm/ah2Ckqt6O5BNSPMxpENH1XqqYUTsRYJC1Xe5Gq2zYP6JG0mkJQVwjAr5z7teBjijsXylbga/oymkJYk24npGkiD0FRtXldKYgQ0d2FdQpq7swVI8U3q0/BoPZiWB53FVu5KGPGi+uJuvjGkLB6oPWoJs6iyTtQQCkZ4YSwo3G7NERBUqrQDiz0OVZxw5LaF3OmASFKkMGZiIyjWlB62GFIMgSNUiI/FVmXJ2j2JrLGI+BCkmvNY/eE/Y9UZU2wb/8FGAhv5FSqfI9WaxkujUsO3etuv+IgJqPDBhCA0r4EEMMAw2dccdawMWe/7S/qidsCr+9CJL6oBAFlrmEQPlzhImQvPO7kzP8ujs1NyaQQb7MxlMpGfhoGinzSJp5xntBxwftXXItR6hicnhK++ZE6Ed7bKrUaHBP2KIx91qwBH9BbvXDsxO8DP7eUxrNgHpkfgNIoFt/L0TThjRiwZbFF0V5LV+hkLOdEYXmOlGt2s4Cf9B1CU2wxd6fmqzqtr3exLz8iQSb4tMKLndS0DDGpF2IlqRAvHKUPDHc0eKMvqei7sp7hra/9IQeuDglQ+IotQZk+1JxSJkBLMEF0YA7VH4ZKxYcf00IhgYJMBukaILtJtAbiIXhseXDNgBbNRu42wiEHkJqv9KzW4vycHBJj77RQYm176TJ43Aqqz7ZBwT0xMc9ArXIBFh62Yoeay+CwL8wqiWvBBG7FUCY8v9Di45+4bgljDYX0E2/HEtjZ1byg5gAB+JNHEzFoZi/qyHzuKw6+gJKLDBqerht7aiAtMwd1k0oqW8j25v0MixAQn3KwqfZm2gZ8gRs85mtO2DKyl0RuMfO0Y6Za1jFJpbU59dWbDPYWtL0piJvjiS0reqpI6Ll0kmlQcbNLs6+OXhWXuAs1E+IkFntdt/YNY5Y/diCd04h3pG7O9Om44NnG5MmxORCbcwupO54SrMIJmh0XBglENlLQEnevWfAJ+WnLAlCZyYb9ivO5efYBxQYCr/e8vepM1uhUtQd6HPvmZk9LOzlbZ2j3umwBFsFe2bA/fIIDWxM4P+Lj2Oqve8aZvzyQaXbmn3F4wAw+uqfMWWPc6F0gSNsBK6Fmn+Ej+fE= X-Forefront-Antispam-Report: CIP:165.204.84.17; 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Previously there values were hardcoded at specific value which may have conflicted with platform and it might not reflect the most accurate or optimized setting for the processor. [054h 0084 8] Preserve Mask : FFFFFFFF00000000 [05Ch 0092 8] Write Mask : 0000000000000001 [064h 0100 4] Command Latency : 00000FA0 [068h 0104 4] Maximum Access Rate : 0000EA60 [06Ch 0108 2] Minimum Turnaround Time : 0000 Reviewed-by: Gautham R. Shenoy Reviewed-by: Mario Limonciello Tested-by: Dhananjay Ugwekar Signed-off-by: Perry Yuan Acked-by: Huang Rui --- drivers/cpufreq/amd-pstate.c | 34 ++++++++++++++++++++++++++++++++-- 1 file changed, 32 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 960fead0b83e..510b5aec42ea 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -756,6 +756,36 @@ static void amd_pstate_update_limits(unsigned int cpu) mutex_unlock(&amd_pstate_driver_lock); } +/** + * Get pstate transition delay time from ACPI tables that firmware set + * instead of using hardcode value directly. + */ +static u32 amd_pstate_get_transition_delay_us(unsigned int cpu) +{ + u32 transition_delay_ns; + + transition_delay_ns = cppc_get_transition_latency(cpu); + if (transition_delay_ns == CPUFREQ_ETERNAL) + return AMD_PSTATE_TRANSITION_DELAY; + + return transition_delay_ns / NSEC_PER_USEC; +} + +/** + * Get pstate transition latency value from ACPI tables that firmware + * set instead of using hardcode value directly. + */ +static u32 amd_pstate_get_transition_latency(unsigned int cpu) +{ + u32 transition_latency; + + transition_latency = cppc_get_transition_latency(cpu); + if (transition_latency == CPUFREQ_ETERNAL) + return AMD_PSTATE_TRANSITION_LATENCY; + + return transition_latency; +} + /** * amd_pstate_init_freq: Initialize the max_freq, min_freq, * nominal_freq and lowest_nonlinear_freq for @@ -848,8 +878,8 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy) goto free_cpudata1; } - policy->cpuinfo.transition_latency = AMD_PSTATE_TRANSITION_LATENCY; - policy->transition_delay_us = AMD_PSTATE_TRANSITION_DELAY; + policy->cpuinfo.transition_latency = amd_pstate_get_transition_latency(policy->cpu); + policy->transition_delay_us = amd_pstate_get_transition_delay_us(policy->cpu); policy->min = min_freq; policy->max = max_freq; From patchwork Thu Apr 25 08:07:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Perry Yuan X-Patchwork-Id: 792563 Received: from NAM04-DM6-obe.outbound.protection.outlook.com (mail-dm6nam04on2070.outbound.protection.outlook.com [40.107.102.70]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C071074432; 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CTRY:US; LANG:en; SCL:1; SRV:; IPV:CAL; SFV:NSPM; H:SATLEXMB04.amd.com; PTR:InfoDomainNonexistent; CAT:NONE; SFS:(13230031)(1800799015)(376005)(82310400014)(36860700004); DIR:OUT; SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Apr 2024 08:08:40.8389 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7642be05-70db-41cb-8144-08dc64feeb20 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d; Ip=[165.204.84.17]; Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CH3PEPF00000012.namprd21.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY8PR12MB7170 The amd-pstate driver can fail when _CPC objects are not supported by the CPU. However, the current error message is ambiguous (see below) and there is no clear way for attributing the failure of the amd-pstate driver to the lack of CPPC support. [ 0.477523] amd_pstate: the _CPC object is not present in SBIOS or ACPI disabled Fix this by adding an debug message to notify the user if the amd-pstate driver failed to load due to CPPC not be supported by the CPU Reviewed-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy Tested-by: Dhananjay Ugwekar Signed-off-by: Perry Yuan Acked-by: Huang Rui --- drivers/acpi/cppc_acpi.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c index a40b6f3946ef..1d857978f5f4 100644 --- a/drivers/acpi/cppc_acpi.c +++ b/drivers/acpi/cppc_acpi.c @@ -686,8 +686,10 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr) if (!osc_sb_cppc2_support_acked) { pr_debug("CPPC v2 _OSC not acked\n"); - if (!cpc_supported_by_cpu()) + if (!cpc_supported_by_cpu()) { + pr_debug("CPPC is not supported by the CPU\n"); return -ENODEV; + } } /* Parse the ACPI _CPC table for this CPU. */ From patchwork Thu Apr 25 08:07:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Perry Yuan X-Patchwork-Id: 792228 Received: from NAM10-DM6-obe.outbound.protection.outlook.com (mail-dm6nam10on2069.outbound.protection.outlook.com [40.107.93.69]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 473558594A; 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Thu, 25 Apr 2024 03:08:40 -0500 From: Perry Yuan To: , , , , , , CC: , , , , , Subject: [PATCH v12 8/8] cpufreq: amd-pstate: Add quirk for the pstate CPPC capabilities missing Date: Thu, 25 Apr 2024 16:07:58 +0800 Message-ID: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-pm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: SATLEXMB03.amd.com (10.181.40.144) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH3PEPF00000018:EE_|CYYPR12MB8871:EE_ X-MS-Office365-Filtering-Correlation-Id: 59abe25e-e866-4f36-8c58-08dc64feed4d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; ARA:13230031|36860700004|1800799015|82310400014|376005; X-Microsoft-Antispam-Message-Info: o8pcCFzltJh33gYqlzzPM8iMnTeLiBn/9bHOVRQAqZ17zxdHbz13fX/EuRFXwzJEByzpLYuB5Nw2QfhtUMN3K83m92iu9bigjsc/Mt2E7eWlNyO53j8fi2CWQVNE+igY2ckFZP7pCKvoo3CpzitQkXhbWtL0OJLymMzTW4FZH+E6kt5n3tTb2xcGJ7RcT7EU3JLvwlMDVJAysDjyVFMkDOI9N8swon8aEb9pmF6VZxvYTuM3BfWoawFWBr7gPZt/h/pwsn8mbeItL2WDJ2wrH5E/wb9h3VIpkFzLJVsX7iTgtsbkx0zjkVXf/Qxt4ebI5AesMvUSAwCa3mUUV7QrCGbZu7YUP7YeHmb2PDSqYRlwtgVVhY5VjtKkO7MSTqsR56yJC7+zYP0Y9Ts60b6PNz+JMr0eekl/JhIxMpdbfDZbIH3HxHa3gVnu2vwaFpFPFJ1+upSCf/bEw8TATM7yxw+w1IrVjF2mVEMRYJ7K91NHpsteRWUrOOfwTFcsjy8tNFL8emc7YLL6fL++0efZAvTfL0gpQvDlLaa/Tgw7JYuYuaFBCmcqO8oPppXmJAPfgwohsSmI49OFy3avINwcYrSpykbvcBlZ4jALDwHf5EvhibMuinoGpdtvshEWqG9p/XdF/ktWdx5lszuizMa7+1Kvz7ng52T1YRiSsPWOIU4jTpjm4u4R8fyPjeIV1+da8RMgbD2/72n75IsUKxx/8eQEvFjPrntMUXWcUm3zd4slgUFnE5TukhJFM9UG/d3YtiJC/1+ka2W2tlP7PgysTbaHFCuH/8yRK54A2iStdO2hRx1IucVIFhwGigSHhPa4MrZzQEYOCw1w9gc87Z+tUxGi+dj/21o+54s8FBmmMHT2q/oSYa9SwfgmvPt2Ml9VPvleG3h69hsKHRqWiwr+zlEKmP6TaX3NuAXIZp4+kaj5zHUNtdIqbBTVHYg2sQ4MC0hWgXnXoJ8lvhX2njG1bzwl98XA1AjoPxRLtw1pCDmLjdFg6TmLWEMQWuthI0WsddSRVChjn8GDJxMOuGfAy3Le0lsWJwWEZLeo/JA2MjjQaZAVtMoMEpg2GNAx8vTuBs/faWsSRl9BX819CWflSWAw8V8XbZ5TMC6uvPJkImCE+AR6Fdz+3owUXWjNqj/U8ACCHdJofl1wytW0z6VmOinUPLQ8aTb01XNZbMNiS24vMF5zdmLSY8Apnz2vRjM50IjDjLsz1Ja9N9qd4CZBT4DWGBpy9smvZ0jNqxGENizZWVG5ablr8SdR3J8xmU1aOc6/NsR6yaUs3Rk+MfAkYyRJnVCf5Byvy5OMtv/UlToCxNfdNLb42mPVlrrU/C8TmlaQnk73TQlhszzynlwRtJ31+wu+Hru18COTrE7PxXgfhhfNLiHjX68I+IrHNF/Q X-Forefront-Antispam-Report: CIP:165.204.84.17; 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If CPPC capabilities are not defined in the ACPI tables or wrongly defined by platform firmware, it needs to use quick to get those issues fixed with correct workaround values to make pstate driver can be loaded even though there are CPPC capabilities errors. The workaround will match the broken BIOS which lack of CPPC capabilities nominal_freq and lowest_freq definition in the ACPI table. $ cat /sys/devices/system/cpu/cpu0/acpi_cppc/lowest_freq 0 $ cat /sys/devices/system/cpu/cpu0/acpi_cppc/nominal_freq 0 Acked-by: Huang Rui Reviewed-by: Mario Limonciello Reviewed-by: Gautham R. Shenoy Tested-by: Dhananjay Ugwekar Signed-off-by: Perry Yuan --- drivers/cpufreq/amd-pstate.c | 53 ++++++++++++++++++++++++++++++++++-- include/linux/amd-pstate.h | 6 ++++ 2 files changed, 57 insertions(+), 2 deletions(-) diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c index 510b5aec42ea..83a29b257794 100644 --- a/drivers/cpufreq/amd-pstate.c +++ b/drivers/cpufreq/amd-pstate.c @@ -67,6 +67,7 @@ static struct cpufreq_driver amd_pstate_epp_driver; static int cppc_state = AMD_PSTATE_UNDEFINED; static bool cppc_enabled; static bool amd_pstate_prefcore = true; +static struct quirk_entry *quirks; /* * AMD Energy Preference Performance (EPP) @@ -111,6 +112,41 @@ static unsigned int epp_values[] = { typedef int (*cppc_mode_transition_fn)(int); +static struct quirk_entry quirk_amd_7k62 = { + .nominal_freq = 2600, + .lowest_freq = 550, +}; + +static int __init dmi_matched_7k62_bios_bug(const struct dmi_system_id *dmi) +{ + /** + * match the broken bios for family 17h processor support CPPC V2 + * broken BIOS lack of nominal_freq and lowest_freq capabilities + * definition in ACPI tables + */ + if (boot_cpu_has(X86_FEATURE_ZEN2)) { + quirks = dmi->driver_data; + pr_info("Overriding nominal and lowest frequencies for %s\n", dmi->ident); + return 1; + } + + return 0; +} + +static const struct dmi_system_id amd_pstate_quirks_table[] __initconst = { + { + .callback = dmi_matched_7k62_bios_bug, + .ident = "AMD EPYC 7K62", + .matches = { + DMI_MATCH(DMI_BIOS_VERSION, "5.14"), + DMI_MATCH(DMI_BIOS_RELEASE, "12/12/2019"), + }, + .driver_data = &quirk_amd_7k62, + }, + {} +}; +MODULE_DEVICE_TABLE(dmi, amd_pstate_quirks_table); + static inline int get_mode_idx_from_str(const char *str, size_t size) { int i; @@ -812,8 +848,16 @@ static int amd_pstate_init_freq(struct amd_cpudata *cpudata) if (ret) return ret; - min_freq = cppc_perf.lowest_freq * 1000; - nominal_freq = cppc_perf.nominal_freq; + if (quirks && quirks->lowest_freq) + min_freq = quirks->lowest_freq * 1000; + else + min_freq = cppc_perf.lowest_freq * 1000; + + if (quirks && quirks->nominal_freq) + nominal_freq = quirks->nominal_freq ; + else + nominal_freq = cppc_perf.nominal_freq; + nominal_perf = READ_ONCE(cpudata->nominal_perf); highest_perf = READ_ONCE(cpudata->highest_perf); @@ -1662,6 +1706,11 @@ static int __init amd_pstate_init(void) if (cpufreq_get_current_driver()) return -EEXIST; + quirks = NULL; + + /* check if this machine need CPPC quirks */ + dmi_check_system(amd_pstate_quirks_table); + switch (cppc_state) { case AMD_PSTATE_UNDEFINED: /* Disable on the following configs by default: diff --git a/include/linux/amd-pstate.h b/include/linux/amd-pstate.h index ec0b0fa3e9bb..d58fc022ec46 100644 --- a/include/linux/amd-pstate.h +++ b/include/linux/amd-pstate.h @@ -128,4 +128,10 @@ static const char * const amd_pstate_mode_string[] = { [AMD_PSTATE_GUIDED] = "guided", NULL, }; + +struct quirk_entry { + u32 nominal_freq; + u32 lowest_freq; +}; + #endif /* _LINUX_AMD_PSTATE_H */