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[209.51.188.17]) by mx.google.com with ESMTPS id ew11-20020a05622a514b00b00437c0ce6da1si21124175qtb.694.2024.04.27.08.57.57 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 27 Apr 2024 08:57:57 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="CkY/JMTh"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s0kQa-0002gq-M4; Sat, 27 Apr 2024 11:57:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s0kQY-0002g0-Ir for qemu-devel@nongnu.org; Sat, 27 Apr 2024 11:57:26 -0400 Received: from mail-lj1-x236.google.com ([2a00:1450:4864:20::236]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s0kQW-0005Ib-S8 for qemu-devel@nongnu.org; Sat, 27 Apr 2024 11:57:26 -0400 Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2df9af57b5eso13349151fa.2 for ; Sat, 27 Apr 2024 08:57:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714233443; x=1714838243; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=9YCHViXrIvsiDzRF1J1rW6k7RCjgqLKR+ps9Q4CzIQQ=; b=CkY/JMTh2NJIoU7Gr6hidQKc1gbD14HXWIg22szKaX43oKbjIVg7nnnE8D5STxQOSc PbR+6dN1nXuis5KFkwCKzEya06aauO18Pw/b50pfM6kDjO5zpmdo1xQyK4+p1PfjqSBT R5vo9sxZeUi58hNqfCGcBQqHNCZs27EVmjfHdJy6zIuJc5KmWLoGQY68Rwn74/KLm1R+ TXk+FYzM8zPQR4Z1iqEKhNwt6+TwreTQd9cUEUulKni8NmDSWLkZscxfgc71XGcWROyA wAOrSU/cNIs2Pd74P5uEOo/mvEcA1OIvlgjVhoOYdiPVx1MjW3+VZX8a+tm0f+7rD23X NSwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714233443; x=1714838243; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9YCHViXrIvsiDzRF1J1rW6k7RCjgqLKR+ps9Q4CzIQQ=; b=w5T7eYvaBip2f4LfqWtEnuySnGOpPf2mcRw7jFmMvjJmhf54CzOWyg5C0RQpl2ljx/ Vr2taiun+TWjTUdakIYvDnvUJ7VO4erYJqly6u1dn+1PCVlYD7A1Y5zODRukI338tD2s 6QzE5cmuxEPME+Q0JfPvurnbHG3IjI8wzz742B+CzmOL3fW6fmyobivZdrjr9tIc6AwM ou4dLVggecHsQ8x2H2vIPoZRdw6X9VB2bu27LjTa9xT8cealTst+Fex1vd1NnJ+1rvEM uEMhtV0G7vk+VeMCDM2jh06pRl1QVtVj/rUYTZCW7XIMwb7u57Uj5FsdJSNbGbuVMNTm 2bzg== X-Gm-Message-State: AOJu0Yxc93MOFtvo3IhRG6pD0HMo/TMiit4gmUGCGV1TbGyWBUVNWDY8 RIyCmA7+bgN+f8QeMIHQuCCv9WsnitafXqk2O8sCOE//dykJmGe2Ydv1TA0TdgGMt8Q5Aru55Tc o+Zo= X-Received: by 2002:a05:651c:199e:b0:2df:81a1:70fa with SMTP id bx30-20020a05651c199e00b002df81a170famr3663020ljb.20.1714233442651; Sat, 27 Apr 2024 08:57:22 -0700 (PDT) Received: from m1x-phil.lan ([176.187.209.2]) by smtp.gmail.com with ESMTPSA id p14-20020a05600c1d8e00b0041bab13cd74sm4957207wms.17.2024.04.27.08.57.21 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sat, 27 Apr 2024 08:57:22 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH 01/14] target/i386: Simplify get_memio_eip() Date: Sat, 27 Apr 2024 17:57:01 +0200 Message-ID: <20240427155714.53669-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240427155714.53669-1-philmd@linaro.org> References: <20240427155714.53669-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The single call to get_memio_eip(), in cpu_report_tpr_access(), is protected by a check on tcg_enabled(). Since the call only exists when CONFIG_TCG is defined, we can slightly simplify. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/helper.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) diff --git a/target/i386/helper.c b/target/i386/helper.c index 23ccb23a5b..a3e70a630a 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -512,9 +512,9 @@ void cpu_x86_inject_mce(Monitor *mon, X86CPU *cpu, int bank, } } +#ifdef CONFIG_TCG static inline target_ulong get_memio_eip(CPUX86State *env) { -#ifdef CONFIG_TCG uint64_t data[TARGET_INSN_START_WORDS]; CPUState *cs = env_cpu(env); @@ -528,10 +528,8 @@ static inline target_ulong get_memio_eip(CPUX86State *env) } else { return data[0] - env->segs[R_CS].base; } -#else - qemu_build_not_reached(); -#endif } +#endif void cpu_report_tpr_access(CPUX86State *env, TPRAccess access) { From patchwork Sat Apr 27 15:57:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792668 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973378wrh; Sat, 27 Apr 2024 08:57:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX1+cDXmb6UStYhwwGrs+N53Sdw6HwVtPSDDoy0nUGbs9UPs2hvgBdW3CjNteU3ZFnU66xRBcVW/+GHP9te9W88 X-Google-Smtp-Source: AGHT+IFDYAi3YL3fBbSn4kdqkm8lozTQDCcmMTgl1HNp8VsNN5cyW7t2xRGLn56cVlrTTalecmF/ X-Received: by 2002:ad4:452b:0:b0:6a0:bc4c:d8e2 with SMTP id l11-20020ad4452b000000b006a0bc4cd8e2mr2682474qvu.5.1714233478441; Sat, 27 Apr 2024 08:57:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233478; cv=none; d=google.com; s=arc-20160816; b=xfXv0coVuD31VsrzzlKqPWx2RPdQlrZNuu4REst3m0EzyFjPoGkrZZgDpQswmHdbgB PPh/SyG5wzGE+yAhAV3Kv8cChu57tkMvgGB0DXnjtKECRwIdFsPFFGylR2uiwcTfqYWW Ezay7Sgf4SDXHbNRxviBeOsZJiy0DMSEyJKeO+gFokZgFJZVH/8XIjCmhApoPpfJin1C hhPTt6H+96qqq5FoKga9pCGFY2qrLtHrA9+Grf4/TCYx0mc8wM7TKEc54qfIrqHzivvM xhoy+/U9JzeXg1CZHOHiDbKA5vee5b0VYDrVONzHzlh0Grhk77TW3e7LaiE4fFOCfgMN 9VAQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bQ+WqvRqZbe6NXFesfOZIQa4hGw4rQ6ubEcYnFEz+AI=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=YXc2zQNx+AQH9ZYD3CsRS9P5dreHQhmsU/QvcxhAa7T90jVTKyaEOqNe1J6eVVEdWG CD4oRxE6J4Xc66zDBVMI6UM8DtdTFWUR6vChrLNQXhL+mE7UeQgCpQI2blLbsBlxLacE RiYVP/sIpYpj2kEsBlcPVYIqciRm+vJl92iettlzS6ovbnVX4tBT4Uh073faRYPLz2QM nUJHuSghwoTbJUTViiQ6p5z8yN0NQY6IWA9vhe4bdqBcDu6GhJJYXgDhfXvEWPLCvTwq SscR2ixQqboFQwhEPTXMhyfhYsf4KFaYYQXAgMiwfCSZMvOV4SmEIRd7qmNYHWBXRv4M wxDw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lNvu9q5b; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- plugins/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/core.c b/plugins/core.c index 11ca20e626..09c98382f5 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -373,7 +373,7 @@ void qemu_plugin_tb_trans_cb(CPUState *cpu, struct qemu_plugin_tb *tb) struct qemu_plugin_cb *cb, *next; enum qemu_plugin_event ev = QEMU_PLUGIN_EV_VCPU_TB_TRANS; - /* no plugin_mask check here; caller should have checked */ + /* no plugin_state->event_mask check here; caller should have checked */ QLIST_FOREACH_SAFE_RCU(cb, &plugin.cb_lists[ev], entry, next) { qemu_plugin_vcpu_tb_trans_cb_t func = cb->f.vcpu_tb_trans; From patchwork Sat Apr 27 15:57:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792669 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973467wrh; Sat, 27 Apr 2024 08:58:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUxcfl228fltTs54IIDzSuUj0TJ6KeeBL6TS8xyk5XJtYLqW4hlugIcPXs2H9uxEBaA/A2eQMcavk17wB0Ta6HB X-Google-Smtp-Source: AGHT+IEjQggn3EqgJ1WlSYtjG1QN9yxPUVjQp4K/oiBj1qjsSskSNipXpI9C6KNOBGAmkaVmZ15G X-Received: by 2002:ad4:596a:0:b0:6a0:b479:52bb with SMTP id eq10-20020ad4596a000000b006a0b47952bbmr4475822qvb.11.1714233494845; Sat, 27 Apr 2024 08:58:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233494; cv=none; d=google.com; s=arc-20160816; b=J0wu6arpdH8m0F7fnWUfhpOssAdsSOhOw2W/unMtvCM+IwNvhOKDnaYFXpccwaCw8+ WXdqJrpm7gpLvpnaFnTd3hdl42x4u0Z5uR8Gw2e7SDpzgjuvHl2T/sC9ImgX2eu/f38R zyK6fFYAmK1BrNbmXn9li1pzVV69/PW5cNo5HTgQA5d4pJP/IabKbVwZCFNa6ffDwAPb 7FrNhs2HXTGjUcwH2xDgKjLV/nh6fhC7nmQp0iNrQi+IYMoFDJ3OE5XOP+z64CBNa7Xq i6RMXHQDaqu3V1wNmvgVTNiT1uNRj00YhhhUQlr62EG175AQ779WpEi4r1rulhZHMnBq BJlg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=e0W1pDBAxPisymJilpn3Ssy5zQkizzAMOErHk8we8co=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=LXeyr9IAP12Zc1KHwZxNWfsHqVjeyBVVnbffu9vUBs0q+SuaPfBOHOydm7a+C1acZt n671HQ6hFXwdgmhx8g3Uty1ON8/N1xc9CPIjR7B4P4OtdNxYHmZ0dZvFY1MQDMZZtntN +JkU2L30pNAoj/KwB6hM4T2OCe1ttkfMU1wILzxAY44QkPNR8bAsHz7VEcCgdO73G5Tx WFtzeGo64ZyVt+FhGaFBsmHBD44g3EhujrA++JPW1Dj0KSUQkOsJs++j73YmGCR2ZNy9 DPzzIZDp5UZJAvhxJKjdks6879pRpiKwQOyYJstkA1apBrINfNZvEwlYYJQr/bA+4wqY xyqQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="kDFv7Hw/"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson --- plugins/api.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/api.c b/plugins/api.c index 8fa5a600ac..eaee344d8e 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -42,10 +42,10 @@ #include "tcg/tcg.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" -#include "exec/ram_addr.h" #include "disas/disas.h" #include "plugin.h" #ifndef CONFIG_USER_ONLY +#include "exec/ram_addr.h" #include "qemu/plugin-memory.h" #include "hw/boards.h" #else From patchwork Sat Apr 27 15:57:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792670 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973526wrh; Sat, 27 Apr 2024 08:58:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUq78AUurAHxYt2hIB48gzKkIT7JTVu1lEd5t7ZDSqpJiATtfzMxvND1r3VSjFGhs+lAEHu46FMMEkLchsJpcB+ X-Google-Smtp-Source: AGHT+IFnke9U/9ujr3aPHWrUf/K4aCIfeKZwEsni0ohbbr1w4uFYXswywVJFGPycffQsWieJoUO3 X-Received: by 2002:a05:620a:2916:b0:790:9666:5c8a with SMTP id m22-20020a05620a291600b0079096665c8amr5042797qkp.19.1714233508974; Sat, 27 Apr 2024 08:58:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233508; cv=none; d=google.com; s=arc-20160816; b=POa6BJh6svin35O4N62CzjZtVq0k7o1iSa9zHiXlHrijXZ6f4U2Eeri4zWJZEmoStJ g5FGC5Gfsv1SxsZ3zZvgS7Ziw2h5MnvGN83FrqW0KxdTR4ABG/Eu69B9q+xND1HP7vxl NS0u4bvKJ/FoMv53cr7pv4zFGH9EB8DpkIO/Iuqwk6AXKh/f0HrjlHJWQoFSJhy/Am/e MYTxzMse5fa37653h9sxfqy537oe5AXIVf4gzRrExFDLiHtdCn34hsBliEy+nctuQHKX qEK1JhF0cn9jfosX+d+BIuZeWFSxkB5hsvqlKGTVymcGiqbh6igfcwBYgNafirTLvMLF xr8Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=78a0G46O2KG7qu7wAjz0eYAxj9N3YLXQHp2WJkN84to=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=WCdY4QaC53lrISFb7IjLmcBngPBEPzzHTtLmntBWDyFkXlnOxi35npYW+bLhXu3xMP AWTlRkjHbqMa5h5h9MKuqjCtpOkL20FZlHO6pzd/hdfzaVrVny4LKAAt43aOdOQEqjBZ ajWi6jlVMrCsXKGhc52vbj6OpzwcAAklGVavKOWQK7hIM7NnePxAsHV6rAZmFUacaNUc zeRBzgeVdMlJS15XcZ+57oyUGGBDgedcF/yzTS/jS6mBOd2ItVo9ubXaIq12MZ8a8I0U cRInSp9ajHpvjyAfvA0kpyjf1svvQ/PWnX90xwHK0aCBd8Z12Nh8qbRiJJu2g8eCoiWx xCgA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cs9ihlaO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu-common.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 6d5318895a..8812ba744d 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -1,8 +1,13 @@ +/* + * CPU interfaces that are target independent. + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ #ifndef CPU_COMMON_H #define CPU_COMMON_H -/* CPU interfaces that are target independent. */ - #include "exec/vaddr.h" #ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" From patchwork Sat Apr 27 15:57:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792671 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973627wrh; Sat, 27 Apr 2024 08:58:58 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXRYgY/d2r3Htk0VNJ41YHOCHCtextueXmzwVm9MInwlklPjEbx8lvy9lv7FVmf09xOK8AC+9//L+pv8l553jOf X-Google-Smtp-Source: AGHT+IFpMBNl7on4YsodWqjpuz35e+1NlP1Zq3WMO5rOe9LwRJZ6Q1h2gnadHoENrvDWjTZJnMb2 X-Received: by 2002:ad4:559c:0:b0:6a0:c30f:3181 with SMTP id f28-20020ad4559c000000b006a0c30f3181mr786255qvx.6.1714233537897; Sat, 27 Apr 2024 08:58:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233537; cv=none; d=google.com; s=arc-20160816; b=bYaMwZbZZSiZwMUQ8qx6umrKZ/sGlOH7WzZDz7kMftoAoqN6Gd0WulsWL81/jsrJyg SUB3Tvthk1u6Q9OlaP1AHLuvYQv5f1JTZp24YtfwAuxyvyK3rRIcS98PD5Z3deSfoqGc hqT6YRifvUcrX/sjHe7QZ11LEIuhlb9v5c/0+9ZogAHoV6yFjn7f2t7j2qK6hQUjoza8 tJ8ejOrmeSwX9D1S4xN97T7HoN1J4ljRBd5cyjfsyahwGpa8t0iV4p1ELJODA6eH34iZ QQqxrGexQc7ZPS30z5B5SOtNlgXu0JPzZhXXeXLuedKKKrF8GasE0RYyeBH9JvI4EUjZ 96iA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=P+4yLUAOofyuOllTmkJb4TGA3hpl35wvUcTVB112zyg=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=XFkoVNtKGXqD4JS6AV1lhZ7aH05njD24IcZc+B9+JPEszDFYcjLzOsSjpjwZ5EhR19 ub6bZMDaK1MS3rK96QFolqcKtmup3Jk67cUd+Xg2Q4qeSM7AIan2SMAMVxWYbJTXn0SW 1NVgB9yK1vI2MbMfHVauUwwgfa1W4V8W6bcVqcxGA63Zh15lBtAMRF+8n4XlxhQ2m1R/ shA/JgUBtHV9uCap8tSWtnMQVt6apeuhSmBZRpHbvgyX+Ih/iRNb5D2Ukrt9lj8ehNzD BqeRhI3bKX1KT1C0/kEYiDZSQnZ76aYUtyFvaE0SxqPB2Uo0+CH1YF2o2cFCfbhPRHm4 RnaQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dFqn4C+Q; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Indent it a bit for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index e75ec13cd0..eaa59a5cc1 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -139,19 +139,20 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val #ifdef TARGET_PAGE_BITS_VARY # include "exec/page-vary.h" extern const TargetPageBits target_page; -#ifdef CONFIG_DEBUG_TCG -#define TARGET_PAGE_BITS ({ assert(target_page.decided); target_page.bits; }) -#define TARGET_PAGE_MASK ({ assert(target_page.decided); \ - (target_long)target_page.mask; }) +# ifdef CONFIG_DEBUG_TCG +# define TARGET_PAGE_BITS ({ assert(target_page.decided); \ + target_page.bits; }) +# define TARGET_PAGE_MASK ({ assert(target_page.decided); \ + (target_long)target_page.mask; }) +# else +# define TARGET_PAGE_BITS target_page.bits +# define TARGET_PAGE_MASK ((target_long)target_page.mask) +# endif +# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) #else -#define TARGET_PAGE_BITS target_page.bits -#define TARGET_PAGE_MASK ((target_long)target_page.mask) -#endif -#define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) -#else -#define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS +# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #endif #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) From patchwork Sat Apr 27 15:57:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792676 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973788wrh; Sat, 27 Apr 2024 08:59:33 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWxAc7cQ0RxlqKt5J3ad5YBjCLJ42VvDcc6QHV0BuuFRfewjESQ5SCOJIPzhvmDa4cXQkdGdCuiqCc2LABieW52 X-Google-Smtp-Source: AGHT+IFn2Cj1t/mmI19Jx/4e9jqEl4WuVRa/foPzXK4pPNsgDCXzQmMdckrnvYODv2G21b5AaesV X-Received: by 2002:a05:622a:6106:b0:43a:4b07:57ec with SMTP id hg6-20020a05622a610600b0043a4b0757ecmr3824879qtb.9.1714233572812; Sat, 27 Apr 2024 08:59:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233572; cv=none; d=google.com; s=arc-20160816; b=0j/NrUlbwQ8qGwl3U4LlHW+aBfg9xta6zyxbszcryJPZBDVHTzhs+labIavLVz1HpB MhqLIYWmb7A6BqeuuclM3qpSA2sQ0FIhqXM7J5EakzvQnHDatl9NF+V7cXVbnHgAYfR1 z2XJdnw+5W8USwZ/TASdr+lUdo0AXh3qSiACpjkI2CpR1zktetSZ1fWCDxYcf6xnnN+T PXVw6NIDmvZWmreTNRdlftSxkjxwenJHFpdNro7FapOs7QhYqpQ9NNUuE0HRZc/jl2dw f6T3oqhfY0VOF9vUFX84sAC8jopcKh1PcX6cYYDUlXJI7p8IUMWyh7DBqsFW5CHcJhpz 4cNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Hn/H/yoFNZW2Rn975+BG8+EVesDlf/lUvVb7HKZ3vng=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=ShFqTC56o8A+snB5pvBm3iNm90bMoFRE9ex6dzMfsR6Roz2YLPRy147jsoGqZwLkpw hla3XghzoH612AN4TStrayXGus2S114cjJoBPKqFY06wqmZej91OFUXEaiGoZ6Z8xy0s FvIdUJRZIqerXeK+TVQ/Dw8XwsVK+O90LaCBNRMo/qmRUBx3I8V0CrVhy4CG5DxDjP0o tN8MHTZBJVPqkD7iaNr/BjfNttekTTHOB901t+Wf+WTaYHkaqYiWpjCdMr1K2IvrwjK6 DcM6ifI3vU8FNeNX1gpPpyKcoVc1vjkESM5wleOyfXp1jon8F0Rvr3/QO7bVruDsbZk8 6+6A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BPyDyXrQ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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This completes commit 2e9a5713f0 ("Remove PAGE_RESERVED"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index eaa59a5cc1..5ea8c4d3ef 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -157,10 +157,6 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) -#if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) -/* FIXME: Code that sets/uses this is broken and needs to go away. */ -#define PAGE_RESERVED 0x0100 -#endif /* * For linux-user, indicates that the page is mapped with the same semantics * in both guest and host. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/cpu-all.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 5ea8c4d3ef..8c3ad7153d 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -157,12 +157,6 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) -/* - * For linux-user, indicates that the page is mapped with the same semantics - * in both guest and host. - */ -#define PAGE_PASSTHROUGH 0x0800 - #if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); From patchwork Sat Apr 27 15:57:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792674 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973733wrh; Sat, 27 Apr 2024 08:59:21 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXPXWTWf0smU9g6dkZP6SvjDeE6QZ5/WTePfqFYB8NKoB7ehoFfGJqxO4NYvYluywTrd62mtcvzn/YGoyW5S18Z X-Google-Smtp-Source: AGHT+IFAwKXaT7i1jBw9xLBiPPUKSqDP4lsrMxuW4uoKN5tU/EDIqdbT1uBumnd+bK6Ks33HXwcY X-Received: by 2002:aca:1c0c:0:b0:3c7:3af4:6081 with SMTP id c12-20020aca1c0c000000b003c73af46081mr5846577oic.16.1714233560786; Sat, 27 Apr 2024 08:59:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233560; cv=none; d=google.com; s=arc-20160816; b=bY8eb502xe4RjlOab0kuaYbcPwff5No1JCpkgkmCaNjfJMnj7KlxMvrzyrUqMnsgAj gDLrFPUV00e7HpUeW4s/4BvIdNcxSPdTQ0CU5rDBVInybT8rkf207W3zwsYbPw9X+Vo7 NArXTFVkHuPDF6W2ugAOYdU9dMXAljpEUWijrE9iNiPw5piof4+r20Ch2GME3t17xj4R /lhRakymwSl1BlAdx67/dlipMxIOiEUHUZotqr668HrEdHcmIa+J2M1Kko8JcypUEsKJ RhsAvmXv/wGHXlDZ3TI5N+z9HWymyd32s3BVDfLFKkkFHTI/qMW+5OkGaE0AOszYSoyy HigA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=bG1IiuCIsMipMG4q8jBLkK232zEBtmE1ClkZ0fh9nOE=; fh=5gjew8NMvEApfq1BBHuKvOYpzi9iKTR5un8QVV9CG4k=; b=jbcc8pw+6hPpVJ5F8dk5NwVWQpbFmVG7CHJ+2A+qaDahkzlxW8Puen9wiuXSAHJI/c pr+e6Rx/mEE4ppGnEITTQ2TVfO4OzaXu+KBws1aytCGyiRz3d0+0EjXTE8NUnUZwi3NF nFA8WlFPTIpKItSJ/Z9SqUAcz5fStLXlVKJxXj3UdIvdAVWDJ+jThl9eSjwxZq2+/4VZ znKhpb93yrzS5bE+Aaro9Qc3bY/9HzLJaM8mLxyIRhUJtLxfql/PoE6olgfnOlqacHKY Dt2UZBFxfWWGpunrj8xU0VVMdTaUgptpWDETWrqcnZULScDTH0QG9AgXcLUK5wWVoWk6 UMxQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Je9ouGrl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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The list of files requiring the new header was generated using: $ git grep -wE \ 'PAGE_(READ|WRITE|EXEC|BITS|VALID|ANON|RESERVED|TARGET_.|PASSTHROUGH)' Signed-off-by: Philippe Mathieu-Daudé Acked-by: Nicholas Piggin Acked-by: Richard Henderson --- bsd-user/bsd-mem.h | 1 + bsd-user/qemu.h | 1 + include/exec/cpu-all.h | 1 + include/exec/cpu-common.h | 31 +-------------------- include/exec/page-prot-common.h | 41 ++++++++++++++++++++++++++++ include/semihosting/uaccess.h | 1 + target/arm/cpu.h | 1 + target/ppc/internal.h | 1 + target/ppc/mmu-radix64.h | 2 ++ accel/tcg/cputlb.c | 1 + accel/tcg/tb-maint.c | 1 + accel/tcg/user-exec.c | 1 + bsd-user/mmap.c | 1 + bsd-user/signal.c | 1 + cpu-target.c | 1 + hw/ppc/ppc440_bamboo.c | 1 + hw/ppc/sam460ex.c | 1 + hw/ppc/virtex_ml507.c | 1 + linux-user/arm/cpu_loop.c | 1 + linux-user/elfload.c | 1 + linux-user/mmap.c | 1 + linux-user/signal.c | 1 + linux-user/syscall.c | 1 + system/physmem.c | 1 + target/alpha/helper.c | 1 + target/arm/ptw.c | 1 + target/arm/tcg/m_helper.c | 1 + target/arm/tcg/mte_helper.c | 1 + target/arm/tcg/sve_helper.c | 1 + target/avr/helper.c | 1 + target/cris/mmu.c | 1 + target/hppa/mem_helper.c | 1 + target/hppa/translate.c | 1 + target/i386/tcg/sysemu/excp_helper.c | 1 + target/loongarch/tcg/tlb_helper.c | 1 + target/m68k/helper.c | 1 + target/microblaze/helper.c | 1 + target/microblaze/mmu.c | 1 + target/mips/sysemu/physaddr.c | 1 + target/mips/tcg/sysemu/tlb_helper.c | 1 + target/openrisc/mmu.c | 1 + target/ppc/mmu-hash32.c | 1 + target/ppc/mmu-hash64.c | 1 + target/ppc/mmu-radix64.c | 1 + target/ppc/mmu_common.c | 1 + target/ppc/mmu_helper.c | 1 + target/riscv/cpu_helper.c | 1 + target/riscv/pmp.c | 1 + target/riscv/vector_helper.c | 1 + target/rx/cpu.c | 1 + target/s390x/mmu_helper.c | 1 + target/s390x/tcg/mem_helper.c | 1 + target/sh4/helper.c | 1 + target/sparc/ldst_helper.c | 1 + target/sparc/mmu_helper.c | 1 + target/tricore/helper.c | 1 + target/xtensa/mmu_helper.c | 1 + target/xtensa/op_helper.c | 1 + 58 files changed, 99 insertions(+), 30 deletions(-) create mode 100644 include/exec/page-prot-common.h diff --git a/bsd-user/bsd-mem.h b/bsd-user/bsd-mem.h index 21d9bab889..f95472bcab 100644 --- a/bsd-user/bsd-mem.h +++ b/bsd-user/bsd-mem.h @@ -56,6 +56,7 @@ #include #include "qemu-bsd.h" +#include "exec/page-prot-common.h" extern struct bsd_shm_regions bsd_shm_regions[]; extern abi_ulong target_brk; diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 8629f0dcde..4631a3e23b 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -34,6 +34,7 @@ extern char **environ; #include "target_os_signal.h" #include "target.h" #include "exec/gdbstub.h" +#include "exec/page-prot-common.h" #include "qemu/clang-tsa.h" #include "qemu-os.h" diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 8c3ad7153d..563827b8ec 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -19,6 +19,7 @@ #ifndef CPU_ALL_H #define CPU_ALL_H +#include "exec/page-prot-common.h" #include "exec/cpu-common.h" #include "exec/memory.h" #include "exec/tswap.h" diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 8812ba744d..ced0b1c886 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -14,6 +14,7 @@ #endif #include "hw/core/cpu.h" #include "tcg/debug-assert.h" +#include "exec/page-prot-common.h" #define EXCP_INTERRUPT 0x10000 /* async interruption */ #define EXCP_HLT 0x10001 /* hlt instruction reached */ @@ -208,36 +209,6 @@ G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); G_NORETURN void cpu_loop_exit(CPUState *cpu); G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); -/* same as PROT_xxx */ -#define PAGE_READ 0x0001 -#define PAGE_WRITE 0x0002 -#define PAGE_EXEC 0x0004 -#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) -#define PAGE_VALID 0x0008 -/* - * Original state of the write flag (used when tracking self-modifying code) - */ -#define PAGE_WRITE_ORG 0x0010 -/* - * Invalidate the TLB entry immediately, helpful for s390x - * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() - */ -#define PAGE_WRITE_INV 0x0020 -/* For use with page_set_flags: page is being replaced; target_data cleared. */ -#define PAGE_RESET 0x0040 -/* For linux-user, indicates that the page is MAP_ANON. */ -#define PAGE_ANON 0x0080 - -/* Target-specific bits that will be used via page_get_flags(). */ -#define PAGE_TARGET_1 0x0200 -#define PAGE_TARGET_2 0x0400 - -/* - * For linux-user, indicates that the page is mapped with the same semantics - * in both guest and host. - */ -#define PAGE_PASSTHROUGH 0x0800 - /* accel/tcg/cpu-exec.c */ int cpu_exec(CPUState *cpu); diff --git a/include/exec/page-prot-common.h b/include/exec/page-prot-common.h new file mode 100644 index 0000000000..2722ded724 --- /dev/null +++ b/include/exec/page-prot-common.h @@ -0,0 +1,41 @@ +/* + * QEMU page protection definitions. + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ +#ifndef EXEC_PAGE_PROT_COMMON_H +#define EXEC_PAGE_PROT_COMMON_H + +/* same as PROT_xxx */ +#define PAGE_READ 0x0001 +#define PAGE_WRITE 0x0002 +#define PAGE_EXEC 0x0004 +#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) +#define PAGE_VALID 0x0008 +/* + * Original state of the write flag (used when tracking self-modifying code) + */ +#define PAGE_WRITE_ORG 0x0010 +/* + * Invalidate the TLB entry immediately, helpful for s390x + * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() + */ +#define PAGE_WRITE_INV 0x0020 +/* For use with page_set_flags: page is being replaced; target_data cleared. */ +#define PAGE_RESET 0x0040 +/* For linux-user, indicates that the page is MAP_ANON. */ +#define PAGE_ANON 0x0080 + +/* Target-specific bits that will be used via page_get_flags(). */ +#define PAGE_TARGET_1 0x0200 +#define PAGE_TARGET_2 0x0400 + +/* + * For linux-user, indicates that the page is mapped with the same semantics + * in both guest and host. + */ +#define PAGE_PASSTHROUGH 0x0800 + +#endif diff --git a/include/semihosting/uaccess.h b/include/semihosting/uaccess.h index dd289af8dd..9873157170 100644 --- a/include/semihosting/uaccess.h +++ b/include/semihosting/uaccess.h @@ -17,6 +17,7 @@ #include "exec/cpu-common.h" #include "exec/cpu-defs.h" #include "exec/tswap.h" +#include "exec/page-prot-common.h" #define get_user_u64(val, addr) \ ({ uint64_t val_ = 0; \ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 17efc5d565..82b88b4883 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -26,6 +26,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" #include "exec/gdbstub.h" +#include "exec/page-prot-common.h" #include "qapi/qapi-types-common.h" #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 601c0b533f..2af5f9549d 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -20,6 +20,7 @@ #include "exec/breakpoint.h" #include "hw/registerfields.h" +#include "exec/page-prot-common.h" /* PM instructions */ typedef enum { diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h index 4c768aa5cc..1a3fd8f65b 100644 --- a/target/ppc/mmu-radix64.h +++ b/target/ppc/mmu-radix64.h @@ -3,6 +3,8 @@ #ifndef CONFIG_USER_ONLY +#include "exec/page-prot-common.h" + /* Radix Quadrants */ #define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF #define R_EADDR_VALID_MASK 0xC00FFFFFFFFFFFFF diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 953c437ba9..fd5234792c 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -21,6 +21,7 @@ #include "qemu/main-loop.h" #include "hw/core/tcg-cpu-ops.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/memory.h" #include "exec/cpu_ldst.h" #include "exec/cputlb.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index da39a43bd8..717e31e602 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -23,6 +23,7 @@ #include "exec/cputlb.h" #include "exec/log.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/tb-flush.h" #include "exec/translate-all.h" #include "sysemu/tcg.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 1c621477ad..cb29c4d01b 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -25,6 +25,7 @@ #include "qemu/rcu.h" #include "exec/cpu_ldst.h" #include "exec/translate-all.h" +#include "exec/page-prot-common.h" #include "exec/helper-proto.h" #include "qemu/atomic128.h" #include "trace/trace-root.h" diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c index 3ef11b2807..deb384605e 100644 --- a/bsd-user/mmap.c +++ b/bsd-user/mmap.c @@ -17,6 +17,7 @@ * along with this program; if not, see . */ #include "qemu/osdep.h" +#include "exec/page-prot-common.h" #include "qemu.h" diff --git a/bsd-user/signal.c b/bsd-user/signal.c index b2faf1d0dd..b19b8dd2e7 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu.h" +#include "exec/page-prot-common.h" #include "user/tswap-target.h" #include "gdbstub/user.h" #include "signal-common.h" diff --git a/cpu-target.c b/cpu-target.c index f88649c299..4744b00a8d 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -21,6 +21,7 @@ #include "qapi/error.h" #include "exec/target_page.h" +#include "exec/page-prot-common.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" #include "qemu/error-report.h" diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index e18f57efce..88a271f725 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -15,6 +15,7 @@ #include "qemu/units.h" #include "qemu/datadir.h" #include "qemu/error-report.h" +#include "exec/page-prot-common.h" #include "net/net.h" #include "hw/pci/pci.h" #include "hw/boards.h" diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index d42b677898..70278c0472 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -21,6 +21,7 @@ #include "kvm_ppc.h" #include "sysemu/device_tree.h" #include "sysemu/block-backend.h" +#include "exec/page-prot-common.h" #include "hw/loader.h" #include "elf.h" #include "exec/memory.h" diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d02f330650..e2da13c064 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "qemu/datadir.h" #include "qemu/units.h" +#include "exec/page-prot-common.h" #include "cpu.h" #include "hw/sysbus.h" #include "hw/char/serial.h" diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index db1a41e27f..81bd7fac29 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -24,6 +24,7 @@ #include "cpu_loop-common.h" #include "signal-common.h" #include "semihosting/common-semi.h" +#include "exec/page-prot-common.h" #include "target/arm/syndrome.h" #define get_user_code_u32(x, gaddr, env) \ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index f9461d2844..554251dc02 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -8,6 +8,7 @@ #include "qemu.h" #include "user/tswap-target.h" +#include "exec/page-prot-common.h" #include "user/guest-base.h" #include "user-internals.h" #include "signal-common.h" diff --git a/linux-user/mmap.c b/linux-user/mmap.c index be3b9a68eb..ecde6b8812 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -20,6 +20,7 @@ #include #include "trace.h" #include "exec/log.h" +#include "exec/page-prot-common.h" #include "qemu.h" #include "user-internals.h" #include "user-mmap.h" diff --git a/linux-user/signal.c b/linux-user/signal.c index 05dc4afb52..14abeb0641 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/bitops.h" #include "gdbstub/user.h" +#include "exec/page-prot-common.h" #include "hw/core/tcg-cpu-ops.h" #include diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 41659b63f5..096694faab 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -25,6 +25,7 @@ #include "qemu/plugin.h" #include "tcg/startup.h" #include "target_mman.h" +#include "exec/page-prot-common.h" #include #include #include diff --git a/system/physmem.c b/system/physmem.c index 1a81c226ba..66e61990d2 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -31,6 +31,7 @@ #endif /* CONFIG_TCG */ #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/target_page.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" diff --git a/target/alpha/helper.c b/target/alpha/helper.c index d6d4353edd..bd8f8bce60 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "fpu/softfloat-types.h" #include "exec/helper-proto.h" #include "qemu/qemu-print.h" diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 31ae43f60e..cc97f1d74a 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -11,6 +11,7 @@ #include "qemu/range.h" #include "qemu/main-loop.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "cpu.h" #include "internals.h" #include "cpu-features.h" diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c index d1f1e02acc..c702781768 100644 --- a/target/arm/tcg/m_helper.c +++ b/target/arm/tcg/m_helper.c @@ -16,6 +16,7 @@ #include "qemu/bitops.h" #include "qemu/log.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #ifdef CONFIG_TCG #include "exec/cpu_ldst.h" #include "semihosting/common-semi.h" diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index d971b81370..8ed5cf7bb6 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "internals.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/ram_addr.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 6853f58c19..add7704bf5 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "internals.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/helper-proto.h" #include "tcg/tcg-gvec-desc.h" #include "fpu/softfloat.h" diff --git a/target/avr/helper.c b/target/avr/helper.c index eeca415c43..aad92520ae 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "hw/core/tcg-cpu-ops.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/cpu_ldst.h" #include "exec/address-spaces.h" #include "exec/helper-proto.h" diff --git a/target/cris/mmu.c b/target/cris/mmu.c index b574ec6e5b..dee485419d 100644 --- a/target/cris/mmu.c +++ b/target/cris/mmu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "mmu.h" #ifdef DEBUG diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 84785b5a5c..1a9b6d4fb5 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/helper-proto.h" #include "hw/core/cpu.h" #include "trace.h" diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 42fa480950..5a121db6b0 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -22,6 +22,7 @@ #include "disas/disas.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" #include "exec/helper-proto.h" diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c index 7a57b7dd10..be5c69cc26 100644 --- a/target/i386/tcg/sysemu/excp_helper.c +++ b/target/i386/tcg/sysemu/excp_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/cpu_ldst.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "tcg/helper-tcg.h" typedef struct TranslateParams { diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c index 57f5308632..8344562888 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -13,6 +13,7 @@ #include "internals.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/cpu_ldst.h" #include "exec/log.h" #include "cpu-csr.h" diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 7a91f33b17..d314296622 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/gdbstub.h" #include "exec/helper-proto.h" #include "gdbstub/helpers.h" diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index d25c9eb4d3..e2f17d4848 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "qemu/host-utils.h" #include "exec/log.h" diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c index 234006634e..db2b12a49e 100644 --- a/target/microblaze/mmu.c +++ b/target/microblaze/mmu.c @@ -22,6 +22,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" static unsigned int tlb_decode_size(unsigned int f) { diff --git a/target/mips/sysemu/physaddr.c b/target/mips/sysemu/physaddr.c index 5c5184e136..d0ea1d4aab 100644 --- a/target/mips/sysemu/physaddr.c +++ b/target/mips/sysemu/physaddr.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "../internal.h" static int is_seg_am_mapped(unsigned int am, bool eu, int mmu_idx) diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c index 119eae771e..302117bb30 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "internal.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/cpu_ldst.h" #include "exec/log.h" #include "exec/helper-proto.h" diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c index 603c26715e..6ca7cc023e 100644 --- a/target/openrisc/mmu.c +++ b/target/openrisc/mmu.c @@ -22,6 +22,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "gdbstub/helpers.h" #include "qemu/host-utils.h" #include "hw/loader.h" diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 3976416840..da446632c9 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "internal.h" diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index d645c0bb94..1633a0e5d0 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -21,6 +21,7 @@ #include "qemu/units.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "sysemu/hw_accel.h" diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 690dff7a49..5977f98689 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "qemu/error-report.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 751403f1c8..03713e0a90 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -25,6 +25,7 @@ #include "mmu-hash64.h" #include "mmu-hash32.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index c071b4d5e2..db2dd8c76a 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -25,6 +25,7 @@ #include "mmu-hash64.h" #include "mmu-hash32.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index fc090d729a..6f0f8ab0b9 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -24,6 +24,7 @@ #include "internals.h" #include "pmu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "instmap.h" #include "tcg/tcg-op.h" #include "trace.h" diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 2a76b611a0..4eff14b3f8 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -25,6 +25,7 @@ #include "cpu.h" #include "trace.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" static bool pmp_write_cfg(CPURISCVState *env, uint32_t addr_index, uint8_t val); diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index fa139040f8..c6716cfd30 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -23,6 +23,7 @@ #include "exec/memop.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "exec/page-prot-common.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "tcg/tcg-gvec-desc.h" diff --git a/target/rx/cpu.c b/target/rx/cpu.c index e3dfb09722..b45957c43a 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "migration/vmstate.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "hw/loader.h" #include "fpu/softfloat.h" #include "tcg/debug-assert.h" diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index fbb2f1b4d4..0b2240e39a 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -24,6 +24,7 @@ #include "sysemu/kvm.h" #include "sysemu/tcg.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "trace.h" #include "hw/hw.h" #include "hw/s390x/storage-keys.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 557831def4..290f84e97c 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -25,6 +25,7 @@ #include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/cpu_ldst.h" #include "hw/core/tcg-cpu-ops.h" #include "qemu/int128.h" diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 7c6f9d374a..21889caaaa 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/log.h" #if !defined(CONFIG_USER_ONLY) diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 2846a86cc4..b5fd600754 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -23,6 +23,7 @@ #include "tcg/tcg.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "exec/cpu_ldst.h" #include "asi.h" diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index ad1591d9fd..7ff000e820 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "qemu/qemu-print.h" #include "trace.h" diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 76bd226370..92312e5b95 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -20,6 +20,7 @@ #include "hw/registerfields.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #include "fpu/softfloat-helpers.h" #include "qemu/qemu-print.h" diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 47063b0a57..453fd37193 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -33,6 +33,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" +#include "exec/page-prot-common.h" #define XTENSA_MPU_SEGMENT_MASK 0x0000001f #define XTENSA_MPU_ACC_RIGHTS_MASK 0x00000f00 diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 496754ba57..a9048ad6ac 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" +#include "exec/page-prot-common.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "qemu/atomic.h" From patchwork Sat Apr 27 15:57:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792680 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973891wrh; Sat, 27 Apr 2024 08:59:52 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX7yLtRAhOXyqRRjMd9nBTq1Zi7KR12swltODPmP5lIEKRwiCiXd/9yUAqT11zgo5Z9TWxk20FfnlZWnQkHnIUK X-Google-Smtp-Source: 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Signed-off-by: Philippe Mathieu-Daudé --- include/exec/page-prot-common.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/include/exec/page-prot-common.h b/include/exec/page-prot-common.h index 2722ded724..b1fce45c15 100644 --- a/include/exec/page-prot-common.h +++ b/include/exec/page-prot-common.h @@ -17,16 +17,22 @@ /* * Original state of the write flag (used when tracking self-modifying code) */ +#if defined(CONFIG_USER_ONLY) #define PAGE_WRITE_ORG 0x0010 +#endif /* * Invalidate the TLB entry immediately, helpful for s390x * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() */ #define PAGE_WRITE_INV 0x0020 /* For use with page_set_flags: page is being replaced; target_data cleared. */ +#if defined(CONFIG_USER_ONLY) #define PAGE_RESET 0x0040 +#endif /* For linux-user, indicates that the page is MAP_ANON. */ +#if defined(CONFIG_USER_ONLY) #define PAGE_ANON 0x0080 +#endif /* Target-specific bits that will be used via page_get_flags(). */ #define PAGE_TARGET_1 0x0200 @@ -36,6 +42,8 @@ * For linux-user, indicates that the page is mapped with the same semantics * in both guest and host. */ +#if defined(CONFIG_USER_ONLY) #define PAGE_PASSTHROUGH 0x0800 +#endif #endif From patchwork Sat Apr 27 15:57:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792673 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973686wrh; Sat, 27 Apr 2024 08:59:10 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCX7mLR/JyrJ4zTTSXjB/n0Lqb5GYT2baF+daL44VmNjZ5hDVqqOWenGiGKUDdsYzW1pn0qCPTeLbQjOoyhpRNSF X-Google-Smtp-Source: AGHT+IG0Vg8TjRRUn+MFHYXl3FmgEG/WmSUd6iBzEzND4NxN2i2FzweSRZ8VDjgjrl/sJw8WI2q9 X-Received: by 2002:ad4:4ee8:0:b0:69b:695f:ad20 with SMTP id dv8-20020ad44ee8000000b0069b695fad20mr7828688qvb.16.1714233550288; Sat, 27 Apr 2024 08:59:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233550; cv=none; d=google.com; s=arc-20160816; b=VkwOjnQgaU34UapCQMS0E8iAXkjN3zlRPbbPJ2YKsjZJblYwVK/1mU+z2DVvpwc0KQ vLlfbxCOncqVoeMZQHwJ4rvJxqYO3h8bHaviq2HF7ijfnyZh3JcGDHVmIPjPoj1+J3nM eAg07sb29x0lR9/SYzNweP0wyfAx6UFaGCszDviVYGlt3GG3+2B/bXNFyPWdwv98iEmT xp1ljfM/jKmgkphRZBLN1Qk4sfBaFSHtVGb367nNkB58ocSMq1dB+IvQ514UZ70eLLG8 naEKHZiRxZnIVZRlXq4ymaL9XHo2359BFZlrfQ3COd/9G8QbrGXgZkZYl67MxaQyP7ut Rnmw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=TTp39rZqop/if5H1KxCSQywM5GdZtqtO3vJKkvfEhps=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=rL2sz2VwTNbg7KQC5DAm189IDznFdzFiFF85USfCL0hucxscClXnBZqqDEiq00HH+3 FJ6PJ7WiUMHZOIVClRiHGil2Zo8CtPKz2WpMZH1W3frOi/sCbdbKKwengzdu7RTgnDUR 870hiKqfnJH+M2dhsEtzBvO0MlEvgXrYP2RlKF13HyZcmmx3XX62+40yS/Tgo9zCTrQC P0kZP5yT7MLnxd9DNllOQWjfwF8t+JBTzezQmWESx3SY7IYhBSTBSe6VVBoEXu8aSj0j IqA1COUZpIfUw6zMspBvtjDl7J9l1H5fXKBZMnLrRopYZ0x/gZBBqB5QY4JK1S4CHFIf huQQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WfeUbBF9; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé --- include/user/syscall-trace.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/user/syscall-trace.h b/include/user/syscall-trace.h index b48b2b2d0a..6926434d9a 100644 --- a/include/user/syscall-trace.h +++ b/include/user/syscall-trace.h @@ -10,6 +10,10 @@ #ifndef SYSCALL_TRACE_H #define SYSCALL_TRACE_H +#ifndef CONFIG_USER_ONLY +#error Cannot include this header from system emulation +#endif + #include "exec/user/abitypes.h" #include "gdbstub/user.h" #include "qemu/plugin.h" From patchwork Sat Apr 27 15:57:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792679 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973858wrh; Sat, 27 Apr 2024 08:59:47 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVgGppDF8nKc2uEPnqq/ywAcTqw4KnSCxE1aDYosLvrHb0EWSLlrkcD/hhaUgBuFAWQC3/xnQlfcWIHfl3BSMvE X-Google-Smtp-Source: AGHT+IEeUdCa46EDAnBSt0Qe2x3560FnByMfvuE43rNLNiR2AkUMd8cQ+BCzP6QwCPF08olHDg4J X-Received: by 2002:ac8:7c4b:0:b0:43a:8248:26f with SMTP id o11-20020ac87c4b000000b0043a8248026fmr5615016qtv.27.1714233586912; Sat, 27 Apr 2024 08:59:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233586; cv=none; d=google.com; s=arc-20160816; b=SyriuJkRFYr4cMj6Emq3bKpugvjbzvCeYtSPY8tR+3+XG97tVHFB9B4OznknDGtO1V llmf6XyJQUv3GDHb+8JbsG6eTQL7bJQCe/CPBAKG5RHJMcrXMJKtShkZ/YNlKmPPllmA szUAfFhZsi+tw/Qw3p+2eMwEYnW2vSYuWFcbhO/2R+PZjAqlqN19n0xiECqJkIFv6OYz LlY9ZH+bsa4FpjNlaWj7TvLHk5ZdV7dSwEPej5u1V33vGguN+Z43MUVQsrewULAITRnT OeoOSLBXBrr2exlPJFUDzojUcmLxfEkraKCIVDDMcBe3PTxGAd9ZyNxHkJX4gvEX3QFU evoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=z1+Wv8QB/miGw++EL4p3GyCE2nTTIsU/1KJBEYJal40=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=Er/MYZuWAoiK4X9gJr7WeOludDa4DBGVbarT0QfbSj0D3JVKSmOk2C/dZbW4jOWroR RHTAKB2y9CUsXtJA4hYdggRrHQEI2+4r4QOtnoG2+rseZhoKvoduhJ3JUazgeG5z8+21 I7hxotyd29MYIQ6oALL2V1nXa/SCkpi+m66gUWkBT3kJdkoQN2YybA0zA0TL5kWEuqXq NZRboWv7FZL1X11sLNqW96o9mNDxVSEa7I4hjvdoERUr9WATEtf+PKzZdcv+A3Go90Kz DYBSJ4erebuLqsT6eE2ZPPGvjtWfm4UyCAvVfU5kET3XgQ3uRk6aE9rFko37BNrJ4OFu ur3Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=j+pfFeJl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé --- accel/tcg/cpu-exec.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 225e5fbd3e..0329c6423e 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -900,8 +900,6 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, vaddr pc, TranslationBlock **last_tb, int *tb_exit) { - int32_t insns_left; - trace_exec_tb(tb, pc); tb = cpu_tb_exec(cpu, tb, tb_exit); if (*tb_exit != TB_EXIT_REQUESTED) { @@ -910,8 +908,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, } *last_tb = NULL; - insns_left = qatomic_read(&cpu->neg.icount_decr.u32); - if (insns_left < 0) { + if (cpu_loop_exit_requested(cpu)) { /* Something asked us to stop executing chained TBs; just * continue round the main loop. Whatever requested the exit * will also have set something else (eg exit_request or @@ -925,6 +922,8 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, /* Instruction counter expired. */ assert(icount_enabled()); #ifndef CONFIG_USER_ONLY + int32_t insns_left; + /* Ensure global icount has gone forward */ icount_update(cpu); /* Refill decrementer and continue execution. */ From patchwork Sat Apr 27 15:57:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792672 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973681wrh; Sat, 27 Apr 2024 08:59:09 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUuQ07l0rMoGDgKiabeHiC+RjoGjMDlRU+n4zDdqUa5o1Wr4lUuIYS6vhZy6lG6d+HPnWT0j5W1ubqI4fe/Pz4o X-Google-Smtp-Source: AGHT+IHtytEI5UldxvQkKdfTqh2x7dPiKSMq7Alls171ItoyvWFqQsTpS7lzVb2A/thzHN/Eqz8T X-Received: by 2002:a05:620a:2059:b0:790:a36b:477d with SMTP id d25-20020a05620a205900b00790a36b477dmr5502075qka.35.1714233548923; Sat, 27 Apr 2024 08:59:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233548; cv=none; d=google.com; s=arc-20160816; b=0wPZjNJ3dUQMRFD5zraK9OJj5k0gDWI7U90xG5jvuTNyGkELshVILdvTH/oYJvtOxS kXkZTMOeXsxWD28mVe3qicJQQxvl+FC7nBseDGtJLJ0AAtwenqnuLLiShLmjLhXMYK0y 2ewMSNFVDnKVmca08YDFNpwGP7waR++JUik2H3f2pVhN7+q0V30WZJ0LTPq+vPzNwIwS V2uzSvl4+jUAacByOqto9GaNk/QsN12BPVo2GWcjfds0mHeuOuafz+wRLLNRWMC+cBFF sbMofVvSIp0A5lJucNRTFRtwbIRggJHPwbMuQ3zaDsXyAvEFUVU4tuAJEUOwqtWsE4Pt 388g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=NHvD9/OzQTcoYpYvmX9pCrDnTY/ZLkEX4YizKfP7T1c=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=Nji5HnDhH8CWUecCeTxria2C8+LHoLCCuYr2AM0nOkcEpIx/C2QeLWr5L1A7X/s6KV v6uLrwdF1xcW+mXPHPGErWkdqnBLUw+9MQ0n1OCbYoRTR78FAO9s8wwkzm2fqCyNCjDj zTy78hwZ2T/wbqj1hMisAlLHy7AlpBVSwIeVwt5sqlvBF4rspT4yOTUoD+pKKokJe2eX eCV60U1VuLqjm8R8CovORlO0yuz5YcXJIObAJn/B7Rnl8LvBwzbKEa+RiUeVY1UAnPh/ ybdAfgf8XU6uIbEwjsWy3EYGRdPxHaJf5F/gSqJxt7MOKBmfeCgot09QwfjSQdqYHwV6 usxQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=RRbsoW0Y; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- hw/core/cpu-common.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index a72d48d9e1..c4175cc4b9 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -255,7 +255,6 @@ static void cpu_common_initfn(Object *obj) /* the default value is changed by qemu_init_vcpu() for system-mode */ cpu->nr_cores = 1; cpu->nr_threads = 1; - cpu->cflags_next_tb = -1; qemu_mutex_init(&cpu->work_mutex); qemu_lockcnt_init(&cpu->in_ioctl_lock); From patchwork Sat Apr 27 15:57:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792677 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973801wrh; Sat, 27 Apr 2024 08:59:34 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVjZeEZ8gIaX+TDKyZqZR51SjqZKBHNROnPgVIhGprnqcfCqj8M1vJi3kKuvmd5hBdKa2dpCvI1g1vucb1Mxl0y X-Google-Smtp-Source: AGHT+IEz47NglKY+5ADGng7OKD4DLChs+y9TnOkSaiV5JaVlNX87GGCETsK7mjYNsYhukpGC514K X-Received: by 2002:a05:620a:1271:b0:790:a7d3:fe57 with SMTP id b17-20020a05620a127100b00790a7d3fe57mr6444075qkl.34.1714233574643; Sat, 27 Apr 2024 08:59:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233574; cv=none; d=google.com; s=arc-20160816; b=cBiP4PdfGGo9yOZpMVse9VO7RQLDp4VzvpuGvcVZevKCmKzcWJ1nljYUWUbUOuVEtS 9HtJEpuuyMbBYavGflesxFRVjdWEjAAHDRNEGbZyruDAfLwhy2o+0peLIMPxGVmyZfQ8 aX+LayqRLYfLyx8tmLqKuEX7s98NM2LZSZmFKWto4wm04gvAdo2ZGWmYRqwE12snxaDI A+tujYyWvP3gja302hfEwPsuUHwX3BJcaNhgdwWIvt9npmWSf0bZ2KwpGpPWQ1VdvwVn IrlYnOcHUsK2hEJeaQhUlF8zbkxFiWU8PAblfXCF4rybE76xjXTzS62Wtc4RnO8sI4ta 0ToA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=sL6dJhw+HNdXHaNBh4cOmuPi/pd0h9a+XY1hEoCa0Ns=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=OCwuj9CYsdkyelxd/tN8p09wPMGCx2KL9QfW+BHsD2BtGNDF8OR24xNv0MXS4UMt2B 51KuWI4PZveTavm++lapHPDTdCABL50I02LWslElpMPTrZSa9ahWnuWy6HG9y20boofW jQr5LZyA+nmxuoOXh5cIBYvG9pH1e+4o80du1wEueVjqYxZKlsneSEleYOMxLA6jFUpi HCuZS5JOOvop3/91UMr7Q6kDIlCDn5N18W9/gU3w5V4s+VjLQGU8ONPSzb+4/rIGSz+p 5eVLXp9nlB+gn1180IfapLvLEcjwHU2ozuUEegkJHC52OhnPQM9x+qeObz58AXymUIjI 5djw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=T+8GVxZp; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/tcg-accel-ops.c | 3 +++ hw/core/cpu-common.c | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 2c7b0cc09e..be99105ac5 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -85,6 +85,9 @@ static void tcg_cpu_reset_hold(CPUState *cpu) tcg_flush_jmp_cache(cpu); tlb_flush(cpu); + + qatomic_set(&cpu->neg.icount_decr.u32, 0); + cpu->neg.can_do_io = true; } /* mask must never be zero, except for A20 change call */ diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index c4175cc4b9..9b3efba82f 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -127,8 +127,6 @@ static void cpu_common_reset_hold(Object *obj, ResetType type) cpu->halted = cpu->start_powered_off; cpu->mem_io_pc = 0; cpu->icount_extra = 0; - qatomic_set(&cpu->neg.icount_decr.u32, 0); - cpu->neg.can_do_io = true; cpu->exception_index = -1; cpu->crash_occurred = false; cpu->cflags_next_tb = -1; From patchwork Sat Apr 27 15:57:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792675 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp973784wrh; Sat, 27 Apr 2024 08:59:31 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXNJC7L0L9EuxyttPEbUDZN7BC+vVPyq2BVKTPbbi2mAj2wJFgM0NxsxGCJByjj5uvMMyJVUkbwqET+cQOAa6Bd X-Google-Smtp-Source: AGHT+IG9Iwku/pxUlhR5+HEqWORH4ifPFXGkDjSojmip0KHkJpT/EwiCMW7gJ5/g8PW5g6dkRpH+ X-Received: by 2002:a05:620a:29c2:b0:790:a8c3:b303 with SMTP id s2-20020a05620a29c200b00790a8c3b303mr7704464qkp.4.1714233571729; Sat, 27 Apr 2024 08:59:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714233571; cv=none; d=google.com; s=arc-20160816; b=eOimy3LDjxeu/8tCm4lehZejM/mdHpyrJWQzP4MaLNRTuUifDH3uIdq5nUHEMFo9P0 QjGXhoZfdNWHsNSmfb9Ep8k/1T4YOBjpOfuxhN5p2aHSLR0LHhLkxbS0gRVnNex653Rm FKotzFt9W5ApKdhwfAnpj8IGnLsWhnVRr2W6GmyLjFVZZHBSTmJLBM+8Q4de1oMSqbtf e7jx4JMPuLR6sJZT9g3MoVg1JJWc6EaI4K1kQnPYDNQjDof3xNN9fGZAnWiu5p0DLnE/ IEobSWcI1tYfpp00hUh46iPhBztEmMTEoWMm2nDK4stBHLStJCBh4LIZ//DN84kL9ik6 1X+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=hASzw4q5skwjHkcBH+huMTbW3BFqP+zPi5SZuWvkmFQ=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=bWFiI2UM4Yiam0vSdHvpPifltJ+B3LYLG+zUp2YNqqQc1wqOI8fdj7s+Qhng3Mc2u4 iO2BocUYCS1clE5YFofUhNX7SIQSLcAwMFbRa3OKmP7M3lx1hpWp5NHir8GuMkudgk/0 3HAX7Q2xqt9134d56ZF1I/d9VHtltfyuc3fXC4fCrL44o/moip5BNahsUUAPEuy2wcYR UrBTeA66V6FcGtxPHTLcG6eoAK9zEyHhK/20aUT74DJU05kgqimC9ifOeHe+6uZ004HL rQYJwDXFcRgP305mDLxv1YXeYFTx0ekPJz+CFeeLLNVgV/ZMnVLftn5q8H8XBSM4Y+YE xoVQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Uay3tRSy; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Mechanical change using the following Coccinelle spatch script: @@ expression cpu; expression flags; @@ - cpu->tcg_cflags & flags + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - (tcg_cflags_has(cpu, flags)) + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - cpu->tcg_cflags |= flags; + tcg_cflags_set(cpu, flags); Then manually moving the declarations, and adding both tcg_cflags_has() and tcg_cflags_set() definitions. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/internal-common.h | 3 ++- include/exec/cpu-common.h | 7 +++++++ include/exec/exec-all.h | 3 --- accel/tcg/cpu-exec.c | 10 ++++++++++ accel/tcg/tcg-accel-ops.c | 2 +- linux-user/mmap.c | 8 ++++---- linux-user/syscall.c | 4 ++-- target/arm/cpu.c | 2 +- target/avr/cpu.c | 2 +- target/hexagon/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 2 +- target/i386/helper.c | 2 +- target/loongarch/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/tcg/exception.c | 2 +- target/mips/tcg/sysemu/special_helper.c | 2 +- target/openrisc/cpu.c | 2 +- target/riscv/tcg/tcg-cpu.c | 4 ++-- target/rx/cpu.c | 2 +- target/sh4/cpu.c | 4 ++-- target/sparc/cpu.c | 2 +- target/tricore/cpu.c | 2 +- 23 files changed, 44 insertions(+), 29 deletions(-) diff --git a/accel/tcg/internal-common.h b/accel/tcg/internal-common.h index edefd0dcb7..ead53cb8a5 100644 --- a/accel/tcg/internal-common.h +++ b/accel/tcg/internal-common.h @@ -9,6 +9,7 @@ #ifndef ACCEL_TCG_INTERNAL_COMMON_H #define ACCEL_TCG_INTERNAL_COMMON_H +#include "exec/cpu-common.h" #include "exec/translation-block.h" extern int64_t max_delay; @@ -20,7 +21,7 @@ extern int64_t max_advance; */ static inline bool cpu_in_serial_context(CPUState *cs) { - return !(cs->tcg_cflags & CF_PARALLEL) || cpu_in_exclusive_context(cs); + return !tcg_cflags_has(cs, CF_PARALLEL) || cpu_in_exclusive_context(cs); } #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index ced0b1c886..a9a6c694ee 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -178,6 +178,13 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, void list_cpus(void); #ifdef CONFIG_TCG + +bool tcg_cflags_has(CPUState *cpu, uint32_t flags); +void tcg_cflags_set(CPUState *cpu, uint32_t flags); + +/* current cflags for hashing/comparison */ +uint32_t curr_cflags(CPUState *cpu); + /** * cpu_unwind_state_data: * @cpu: the cpu context diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 4c5e470581..2cd7b8f61b 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -510,9 +510,6 @@ static inline void tb_set_page_addr1(TranslationBlock *tb, #endif } -/* current cflags for hashing/comparison */ -uint32_t curr_cflags(CPUState *cpu); - /* TranslationBlock invalidate API */ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last); diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 0329c6423e..c2f18ac633 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -147,6 +147,16 @@ static void init_delay_params(SyncClocks *sc, const CPUState *cpu) } #endif /* CONFIG USER ONLY */ +bool tcg_cflags_has(CPUState *cpu, uint32_t flags) +{ + return cpu->tcg_cflags & flags; +} + +void tcg_cflags_set(CPUState *cpu, uint32_t flags) +{ + cpu->tcg_cflags |= flags; +} + uint32_t curr_cflags(CPUState *cpu) { uint32_t cflags = cpu->tcg_cflags; diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index be99105ac5..7ac5f0c974 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -62,7 +62,7 @@ void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) cflags |= parallel ? CF_PARALLEL : 0; cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; - cpu->tcg_cflags |= cflags; + tcg_cflags_set(cpu, cflags); } void tcg_cpu_destroy(CPUState *cpu) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index ecde6b8812..5d50ad442f 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -960,8 +960,8 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot, */ if (ret != -1 && (flags & MAP_TYPE) != MAP_PRIVATE) { CPUState *cpu = thread_cpu; - if (!(cpu->tcg_cflags & CF_PARALLEL)) { - cpu->tcg_cflags |= CF_PARALLEL; + if (!tcg_cflags_has(cpu, CF_PARALLEL)) { + tcg_cflags_set(cpu, CF_PARALLEL); tb_flush(cpu); } } @@ -1400,8 +1400,8 @@ abi_ulong target_shmat(CPUArchState *cpu_env, int shmid, * supported by the host -- anything that requires EXCP_ATOMIC will not * be atomic with respect to an external process. */ - if (!(cpu->tcg_cflags & CF_PARALLEL)) { - cpu->tcg_cflags |= CF_PARALLEL; + if (!tcg_cflags_has(cpu, CF_PARALLEL)) { + tcg_cflags_set(cpu, CF_PARALLEL); tb_flush(cpu); } diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 096694faab..a64e8a291d 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -6583,8 +6583,8 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, * generate code for parallel execution and flush old translations. * Do this now so that the copy gets CF_PARALLEL too. */ - if (!(cpu->tcg_cflags & CF_PARALLEL)) { - cpu->tcg_cflags |= CF_PARALLEL; + if (!tcg_cflags_has(cpu, CF_PARALLEL)) { + tcg_cflags_set(cpu, CF_PARALLEL); tb_flush(cpu); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a152def241..b9cff9043b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1938,7 +1938,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) /* Use pc-relative instructions in system-mode */ - cs->tcg_cflags |= CF_PCREL; + tcg_cflags_set(cs, CF_PCREL); #endif /* If we needed to query the host kernel for the CPU features diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 71ce62a4c2..f53e1192b1 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -55,7 +55,7 @@ static int avr_cpu_mmu_index(CPUState *cs, bool ifetch) static void avr_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu_env(cs)->pc_w = tb->pc / 2; /* internally PC points to words */ } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index a56bb4b075..64cc05cca7 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -257,7 +257,7 @@ static vaddr hexagon_cpu_get_pc(CPUState *cs) static void hexagon_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu_env(cs)->gpr[HEX_REG_PC] = tb->pc; } diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 3831cb6db2..393a81988d 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -48,7 +48,7 @@ static void hppa_cpu_synchronize_from_tb(CPUState *cs, { HPPACPU *cpu = HPPA_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); #ifdef CONFIG_USER_ONLY cpu->env.iaoq_f = tb->pc; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fa1ea3735d..5ff3f92fe4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7371,7 +7371,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) /* Use pc-relative instructions in system-mode */ - cs->tcg_cflags |= CF_PCREL; + tcg_cflags_set(cs, CF_PCREL); #endif if (cpu->apic_id == UNASSIGNED_APIC_ID) { diff --git a/target/i386/helper.c b/target/i386/helper.c index a3e70a630a..aa6a61cac7 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -523,7 +523,7 @@ static inline target_ulong get_memio_eip(CPUX86State *env) } /* Per x86_restore_state_to_opc. */ - if (cs->tcg_cflags & CF_PCREL) { + if (tcg_cflags_has(cs, CF_PCREL)) { return (env->eip & TARGET_PAGE_MASK) | data[0]; } else { return data[0] - env->segs[R_CS].base; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index bac84dca7a..e488a8fa9c 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -336,7 +336,7 @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static void loongarch_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); set_pc(cpu_env(cs), tb->pc); } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 9eb7374ccd..41ad47d04c 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -99,7 +99,7 @@ static void mb_cpu_synchronize_from_tb(CPUState *cs, { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; cpu->env.iflags = tb->flags & IFLAGS_TB_MASK; } diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 13275d1ded..4886d087b2 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -81,7 +81,7 @@ void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { CPUMIPSState *env = cpu_env(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); env->active_tc.PC = tb->pc; env->hflags &= ~MIPS_HFLAG_BMASK; env->hflags |= tb->flags & MIPS_HFLAG_BMASK; diff --git a/target/mips/tcg/sysemu/special_helper.c b/target/mips/tcg/sysemu/special_helper.c index 5baa25348e..9ce5e2ceac 100644 --- a/target/mips/tcg/sysemu/special_helper.c +++ b/target/mips/tcg/sysemu/special_helper.c @@ -93,7 +93,7 @@ bool mips_io_recompile_replay_branch(CPUState *cs, const TranslationBlock *tb) CPUMIPSState *env = cpu_env(cs); if ((env->hflags & MIPS_HFLAG_BMASK) != 0 - && !(cs->tcg_cflags & CF_PCREL) && env->active_tc.PC != tb->pc) { + && !tcg_cflags_has(cs, CF_PCREL) && env->active_tc.PC != tb->pc) { env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); env->hflags &= ~MIPS_HFLAG_BMASK; return true; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index d711035cf5..fdaaa09fc8 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -45,7 +45,7 @@ static void openrisc_cpu_synchronize_from_tb(CPUState *cs, { OpenRISCCPU *cpu = OPENRISC_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; } diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index b5b95e052d..40054a391a 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -96,7 +96,7 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, CPURISCVState *env = &cpu->env; RISCVMXL xl = FIELD_EX32(tb->flags, TB_FLAGS, XL); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); if (xl == MXL_RV32) { env->pc = (int32_t) tb->pc; @@ -890,7 +890,7 @@ static bool riscv_tcg_cpu_realize(CPUState *cs, Error **errp) CPURISCVState *env = &cpu->env; Error *local_err = NULL; - CPU(cs)->tcg_cflags |= CF_PCREL; + tcg_cflags_set(CPU(cs), CF_PCREL); if (cpu->cfg.ext_sstc) { riscv_timer_init(cpu); diff --git a/target/rx/cpu.c b/target/rx/cpu.c index b45957c43a..40f49afc7e 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -46,7 +46,7 @@ static void rx_cpu_synchronize_from_tb(CPUState *cs, { RXCPU *cpu = RX_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; } diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 43e35ec2ca..618aa7154e 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -47,7 +47,7 @@ static void superh_cpu_synchronize_from_tb(CPUState *cs, { SuperHCPU *cpu = SUPERH_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; cpu->env.flags = tb->flags & TB_FLAG_ENVFLAGS_MASK; } @@ -74,7 +74,7 @@ static bool superh_io_recompile_replay_branch(CPUState *cs, CPUSH4State *env = cpu_env(cs); if ((env->flags & (TB_FLAG_DELAY_SLOT | TB_FLAG_DELAY_SLOT_COND)) - && !(cs->tcg_cflags & CF_PCREL) && env->pc != tb->pc) { + && !tcg_cflags_has(cs, CF_PCREL) && env->pc != tb->pc) { env->pc -= 2; env->flags &= ~(TB_FLAG_DELAY_SLOT | TB_FLAG_DELAY_SLOT_COND); return true; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 485d416925..685485c654 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -702,7 +702,7 @@ static void sparc_cpu_synchronize_from_tb(CPUState *cs, { SPARCCPU *cpu = SPARC_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; cpu->env.npc = tb->cs_base; } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 8f9b72c3a0..bdefb84511 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -47,7 +47,7 @@ static vaddr tricore_cpu_get_pc(CPUState *cs) static void tricore_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu_env(cs)->PC = tb->pc; }