From patchwork Sun Apr 28 21:49:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792917 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417687wrh; Sun, 28 Apr 2024 14:51:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVjVfMdMolqZETFU5KMyQR72DqtYWExG9+Pe5sXmlUcQq0mDO6Qtr4A8vAk0MpzyrdFrLim+bkRxHP9wPPu+9Mg X-Google-Smtp-Source: AGHT+IF6hsZR3Tw6oP8lZuIPFV/jP6/pTBFu/v6HWoz4KG9nAeNhy0Uz1YgY/z4WIw+bU5Vm8Elt X-Received: by 2002:a05:6214:d6c:b0:6a0:c982:e1ac with SMTP id 12-20020a0562140d6c00b006a0c982e1acmr2916474qvs.63.1714341114168; Sun, 28 Apr 2024 14:51:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341114; cv=none; d=google.com; s=arc-20160816; b=sjChoFutUWUDElLnIgiQcRDLZby5ikne0Q7pd0dXrdO4qLEKkjQWP6JGJHt9C8F5a2 nrPQ8I3cXXovuzgnPNt9Jk65ubvnAXBtGnQflxR6jmJyHLZDFjfyRMvd+RscjKmpz+K/ Y/BLSeO6PG1jMDpP/6/EXP8xsiibDIJfihD6N71A+z5QmhHsHs6vrcPlKEfSJWtospCx tgvEGTSCmfGNx6hJRn9tcqvw20U2ZBps29b7y3T8crzDTEt37AUEh6m9JNdbSkCVLNHR 2x5a/mwIwRcUcnfOgYoEm/kLmXIqGFqWt+pwCQ77TjHmqbFzc1BqL1KROVxYBrU/DyP5 wzdQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=WlnSWxk2ckicORZmY3MYyhbs7CkzbKWbFMF7/22EQlk=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=f5jdEYhIp81HpWlccQ37FXqhLYpIZlCD1b4xYOtnZHb7voubRLNQTd9q6F8bL8lVnU /aEf46O0YMx8dO8303sIC8C1izYocaJGIHY7PZyKY7vovHQ/yrFup3nWwsm7qiUOiuBw GNMS7cjcwmUYjn0FFHlgNxmYIzv1dfxpIxp/s1oqOGwNhhKI/Se59hkEZOrsrwVMb5Mr hVzwWfI6CGr3Tw+0LZB1Sw3qKf1tfucY+6nQj8d7FCznnpDiVSFcFa1aznw7cRBmPfe6 G+oezMTxgfDxWaLut6Ab0bCzya9yPpkoG1/nu/daFTFUpu2/0oyl/DncvJYwkOodUGCW qTKQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qh1OCHHE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id gu13-20020a056214260d00b006a0cac0687bsi1829664qvb.151.2024.04.28.14.51.54 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:54 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Qh1OCHHE; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1COy-0002yb-Cg; Sun, 28 Apr 2024 17:49:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1COp-0002vb-C2 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:31 -0400 Received: from mail-ej1-x634.google.com ([2a00:1450:4864:20::634]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1COn-00012j-73 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:31 -0400 Received: by mail-ej1-x634.google.com with SMTP id a640c23a62f3a-a55b93f5540so505639766b.1 for ; Sun, 28 Apr 2024 14:49:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340965; x=1714945765; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=WlnSWxk2ckicORZmY3MYyhbs7CkzbKWbFMF7/22EQlk=; b=Qh1OCHHE7tbSobxDJkXN+6ak85WEP03064n0Qr9NphLEE6UXJPzOMJErGOUmuO2x7y UdTl7Etl9dmziHK2n7sIdgaMDq/6PKx5IHNfZhsheuTly7885rkt0ZzThhrYizeUBOuO md/G2M+8D98tJ3VLErFZwysSQI+nDgPOAStEPF3s4rg1HYMVzdRQUChs59jtHrl2SoYO 0zk83wzh7RZuT1NAwpxnA2h8xpxrEnIVFFjN5YG2cUpdEgUy/UtkhnslpGHAaIKkOPXs RAfD3J4zw8R+rhflF5Z8yj1mnB3jE8TEpFCwVKx3kBqRJ7D6q/BMI47q3V3ixqZbJb2e 4mrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340965; x=1714945765; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=WlnSWxk2ckicORZmY3MYyhbs7CkzbKWbFMF7/22EQlk=; b=Ak9E+0bOeHsVdTvbxwnZzjyX8h1VSlIdJ3H+/tXpHjBi8vGtOiRi23FZUzQSZy5Y+R OSME/GF18MK1Rf4XQtxpaMVASzG6pt9jDkNYhS+cIerNqMKPFlghQgJkDUJehXWPOKwC fQU+eAAxZ02YZoNVULiKt3dVtjSNH7NTSj/3JkgjTrw84qGjeVesRXA1VhNgAtWEcXoM LT9F2pdvZgZHhu7VnSuqkhE+7p5TB837nvBYbtmEYLTWzX2X4q9U6IySS3UWTC6H8Vt8 p7WTbsS3UfQwmndDyO1cTdlw142RtNdZJW9+OETvZr5gZ5rLauOscF2TZvjKQSmOGlzc FTqg== X-Gm-Message-State: AOJu0Yy47CGb5piENAUiQ58VdUiqu++vEN4HXKSVYZ4LXSu7LbCjYDRB 6ZISPurqpZTquTs9KCXT3U2GeQdBFQ2yW996j6pEMyVzPRyzzI8EqsR14UgHgjPrdCyDe39VQc/ e X-Received: by 2002:a17:906:c288:b0:a58:7283:f587 with SMTP id r8-20020a170906c28800b00a587283f587mr5365104ejz.33.1714340964816; Sun, 28 Apr 2024 14:49:24 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id i6-20020a17090639c600b00a58d2a48a6dsm3131201eje.192.2024.04.28.14.49.23 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:24 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 01/12] plugins: Update stale comment Date: Sun, 28 Apr 2024 23:49:04 +0200 Message-ID: <20240428214915.10339-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::634; envelope-from=philmd@linaro.org; helo=mail-ej1-x634.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "plugin_mask" was renamed as "event_mask" in commit c006147122 ("plugins: create CPUPluginState and migrate plugin_mask"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-3-philmd@linaro.org> --- plugins/core.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/core.c b/plugins/core.c index 11ca20e626..09c98382f5 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -373,7 +373,7 @@ void qemu_plugin_tb_trans_cb(CPUState *cpu, struct qemu_plugin_tb *tb) struct qemu_plugin_cb *cb, *next; enum qemu_plugin_event ev = QEMU_PLUGIN_EV_VCPU_TB_TRANS; - /* no plugin_mask check here; caller should have checked */ + /* no plugin_state->event_mask check here; caller should have checked */ QLIST_FOREACH_SAFE_RCU(cb, &plugin.cb_lists[ev], entry, next) { qemu_plugin_vcpu_tb_trans_cb_t func = cb->f.vcpu_tb_trans; From patchwork Sun Apr 28 21:49:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792905 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417439wrh; Sun, 28 Apr 2024 14:50:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVfJNQfhHttOmnaxOiE1uM0FQWJTAtvWIoqe+HshVwmqtq4pFa2uUzQcCGiPNpP++WVUseF/WEdCDkqqCQ0WV+B X-Google-Smtp-Source: AGHT+IGbXRvI69G0lvZUzPJmSdS3sDYw78brV7g+S5UyC1OBrWACo79lJOUQLmOrq5Yze7wv6h7i X-Received: by 2002:a05:6214:1253:b0:69b:7eb7:a6ac with SMTP id r19-20020a056214125300b0069b7eb7a6acmr10357975qvv.51.1714341029523; Sun, 28 Apr 2024 14:50:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341029; cv=none; d=google.com; s=arc-20160816; b=RvidzOUOIyKrpU8CVajaBwtwE5ITUjEBUf+MHfySmU4MSpKKesLo/8zNfwIBJqmfXA QcQyPc/wI48qt6GYWHG55K+K4c2AmkKxyYjvvC2U3EIMNlUnuyVEpWjQVeWEqKUoJzAH hvfbZ0zdj/EUPhD6K2zeDeBIK7HfYBCljPT14LlLlEe+SckBhXNisNQQq6FcuZbs3+dd wTwp9jXJxNkfrNRaUCBzE3CeI79iasocIIgnBrP777+5sp9zRTYC1wpq/PNJl/FO6Re9 9ECBRO+8sRVd1wjB4fO9dgqX2CMuKfUSfIWWxsD08meTIYy5M31pVlvT6KyzQQ3tNyfS FQ5Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Qe6fMxQCClP86U2E4tekhsNK+cCefDglZXDii44rTHQ=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=Pyp1wj8JtZGT1igvUkEBqLAD3zsVLoxjwa2HG2gOuc8Wxt38It6d85eExtgMJ6S1js 609ArUtXfYR3+d+2vTfkngSYcreSGosProbJ99SATdjW3XzcLq9C4qhAjBbTk4I34GoN uwU7XzU9ifHMvWHPfbdvRR8GfvLqba2tku7QWEN8M2brDQOAacnusZE5fGpeszH2G++0 ja+5ufVq+ydWhpgETJx2cVizjvB7P2GiIrLwgWZnH74jufodCIu9BflhaLwXjiG1uuEc f+1aLHAIQSlIuNW7WNrOTyDma9Xa0WVKcT8BKQ4hW7dXj9wVU2dQAhOAPhi4UAW+f3vc cBQg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HNN+Gq5i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id fw7-20020a056214238700b006a07a484bf2si17934800qvb.482.2024.04.28.14.50.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:50:29 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HNN+Gq5i; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1COw-0002yC-Ew; Sun, 28 Apr 2024 17:49:38 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1COr-0002xD-S9 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:34 -0400 Received: from mail-ej1-x635.google.com ([2a00:1450:4864:20::635]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1COq-00013b-Df for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:33 -0400 Received: by mail-ej1-x635.google.com with SMTP id a640c23a62f3a-a55911bff66so469989466b.0 for ; Sun, 28 Apr 2024 14:49:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340970; x=1714945770; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Qe6fMxQCClP86U2E4tekhsNK+cCefDglZXDii44rTHQ=; b=HNN+Gq5iIWXjmIIcx5RZ965vgvLYHRaDbv9Bt0h7mhmt+yP4RFxr00v0IXVTUiB0et CQjwZn8BzMp287aoI2n78PNqQwQVI8GPXmzwFN94KCutHudh0bAwK5UFRMn/eW6SNYXZ 7PfYRgfTNya6QsustMhP2mI0cBhJb4px7YYgWrpYeqbl77xAXNROj2M/dWczsASHZHlV b0iEV+Xo6tOzNtYvEC9UYDSgn/L/RQcIcwuad5vduU2YxPVlAGMjt+247gNuA7enqo2o L/tp1Z+FHdiXAHwBYiNC+FJCgNPVZLaFz+gu6o4TvowXJpNRS5Z3PXB193iRuv81Z39G NvSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340970; x=1714945770; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Qe6fMxQCClP86U2E4tekhsNK+cCefDglZXDii44rTHQ=; b=BT4yJCjFjmsL96KRk27FY3jjMUYN3HcgzKny77Q+rTMnNLhuisM7wXEdVspf5hq2q/ 9tu0USFYdUHZf97Cx2HhCiy8ab4v2AeY8YfqawhANn3h/76gwa1gXNfySGvmvwWJZVl0 C0eD8RVQ17+X2BEOg0Zy2Z4k6FPu4zwHDlxDh/8b8CcPRzGhl3hRQJ2wF5+N70GXakoF z7CC5+Kj0Iry7P4/voeXmbqxXGinUVXBOZZZHo6hvU1NtLfedVIRme7nL77zvHeYPT2C M6kzepZsBxfYLP0j3nuyuQzMVs33f6tiXC0ge8OLRzyARBgSeG6UNJXo727PUOgIHXTv Wtpg== X-Gm-Message-State: AOJu0Yxv+jNOaXzzzoPe6AgzdlyL1jDV3miuZzEEKMd9kzlWGuAXKxj8 L9/+16m4mKFtkTN2BcXT5bs+wSJU5wxpZhfHnIoohhLfedGofFOgyqjAtUFjjGs7OTUwxJLMye2 O X-Received: by 2002:a17:906:c9d8:b0:a55:b25d:9c9e with SMTP id hk24-20020a170906c9d800b00a55b25d9c9emr3557962ejb.74.1714340970620; Sun, 28 Apr 2024 14:49:30 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id gc24-20020a170906c8d800b00a58f3983635sm1499209ejb.50.2024.04.28.14.49.29 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:29 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 02/12] plugins/api: Only include 'exec/ram_addr.h' with system emulation Date: Sun, 28 Apr 2024 23:49:05 +0200 Message-ID: <20240428214915.10339-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::635; envelope-from=philmd@linaro.org; helo=mail-ej1-x635.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org "exec/ram_addr.h" shouldn't be used with user emulation. Signed-off-by: Philippe Mathieu-Daudé Acked-by: Richard Henderson Message-Id: <20240427155714.53669-4-philmd@linaro.org> --- plugins/api.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/plugins/api.c b/plugins/api.c index 8fa5a600ac..eaee344d8e 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -42,10 +42,10 @@ #include "tcg/tcg.h" #include "exec/exec-all.h" #include "exec/gdbstub.h" -#include "exec/ram_addr.h" #include "disas/disas.h" #include "plugin.h" #ifndef CONFIG_USER_ONLY +#include "exec/ram_addr.h" #include "qemu/plugin-memory.h" #include "hw/boards.h" #else From patchwork Sun Apr 28 21:49:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792913 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417614wrh; Sun, 28 Apr 2024 14:51:29 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUiVNTiRw9qkilH2u/m3KC1YrMLG4o41gJkW2MrqHxsR2hLYLxd8vA0rdbBpjO8KRIcPTpUtyjtzmPK9mbWHad/ X-Google-Smtp-Source: AGHT+IEc3vTWo1rxrzaMXB94wkIg1vNwH6/AClW+Y5H+151snR05zBJCdpfx8Ws+H/UhuSwdu94C X-Received: by 2002:a05:620a:3708:b0:790:e8b0:c8f6 with SMTP id de8-20020a05620a370800b00790e8b0c8f6mr4773777qkb.16.1714341088831; Sun, 28 Apr 2024 14:51:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341088; cv=none; d=google.com; s=arc-20160816; b=zF+nKjSdGHMm1RKNl9Ox8aleKjlevk/eOR6uTsWfGs9rGYNjbsbl0XLbBQ75sihQL2 mPvd6YhKm9/g261SISZ/vSMwhuJOCK1lGtJClu5lET646BQVHzVp8Ze4Hko1OKug9cLu ibH3fRBjRga/uQtKeCv9kXvGyWx4we4IZKcSdnapQVxt1qkeNMerMcOgCB6Sb9ct2dyG olljkaIS7cHl4jeuaI4QlsYkPbHlGmcFdatbfrrtv+C1mBzGORN7kaTrcw+4lVaz790/ WznquHv6+mDrNhcgWBMF8qLk9edYf/38uchBP6t8p42yNRAjCQAz1IyT6OcSXVCaq1NK NwhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=k1ZHl3KtBDD8F5IDAshvr2j1UwCpx77YSs6aZ7LDCz8=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=V2am7A027pq/MSYJj2cCkeqpj4dNMwGjBbI0kdFMofEQJLKz5nkQ95HQ0bDautxYfL swxEB+BG0r/tgtxIvg2XIMneF6rL0KF4GEFEIjZg/tqe9I6aCYoU6oHQTu2ejJ3q/pqv fJ1kSUN4tLxXjmLtr6di0bDCm7z2SWQJiYukyRPIp8+C+QnzLkYhdAQukgtG9OZMtTI0 W/B+0MidVzNoFG1NHUAgD614x3q/jBVnMJwxzPROeNuJ911aqcuoRiQ486W9yjesiAkr d14H/0WyMhWbz22xURaiGup/lAN7sd77jwjFDZfxoB2kgf24ZsZEcTZmlCkybRl5EFab tiaw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eSsCoJgt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id pc2-20020a05620a840200b0078edc088d1asi24224915qkn.160.2024.04.28.14.51.28 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:28 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=eSsCoJgt; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CP9-0002zr-6Y; Sun, 28 Apr 2024 17:49:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CP7-0002zQ-7u for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:49 -0400 Received: from mail-lj1-x229.google.com ([2a00:1450:4864:20::229]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1COx-00015O-Nk for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:41 -0400 Received: by mail-lj1-x229.google.com with SMTP id 38308e7fff4ca-2dd7e56009cso49990471fa.3 for ; Sun, 28 Apr 2024 14:49:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340976; x=1714945776; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=k1ZHl3KtBDD8F5IDAshvr2j1UwCpx77YSs6aZ7LDCz8=; b=eSsCoJgtJrrbbaCiobU/F+gaM1SxeSHnOubz9LwuzdxLe58P8NSbIJocJFGjdT/F2P JblTEaVJ7WK+r9qudqstgUZ5etE29zMH5X0bpQFGSjE/ewCVBTn2/4Q5s9peTFA8mZxk eq5otZ0vvsHi07KEIkRMHix9vxePga8eJcIZ9K2ZZhf/pPKIOH4Li1KKtcdQ11gAalaz ybGi9sd1UWfP5DKe30uYPUQ4BMdk7yuwixaSpdR8HYplzOa01x6BfjxWZBFKr8T/rtD7 3X6mrn+wiVdujBH73K68FgKBQo411Xv0XJ9k9gOATyk+tQ9118uHYiph7ad+DlpTMBML l/WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340976; x=1714945776; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=k1ZHl3KtBDD8F5IDAshvr2j1UwCpx77YSs6aZ7LDCz8=; b=gvBw+dxaek1HVGqAAsJBNAOe5vQyilGzKHtG4qA6knYXEHe9+2L6JBGOQEWd17NsOW xkLfMzJgf/EFGV+vgNsiph1Oa1gtnwWRTmQVrFoGuUCx9/Qo3ykwStyL4jmiH3nMduv/ h0wqdLh1Bl/EQ23+37b5RAEF5J4FCqqn6Bg3AA8iboRIpN7TbvuzsrSrno2Hm70j13xx 3CDwVv51hxhvMeQihjSgK8ZnUDnaQUJIdFbmA+qEpJNRUeBezfg9xGGl5/2adGDmrXKe 9BcaU1ZAyiKfpvPj6X/gEJM06QlF9F8THtCUdyCZhs+XpMWClS0LdhVIS4PbRkXvuL6s DGwQ== X-Gm-Message-State: AOJu0Yybi2rVUz4jtYfqRTvfjOsC8009pHdCAInyDE8Ly53rTJdvt8Iv i/Ayn26olrvs9ZPQxKeHO44Tm/BKGamK/4GLyoEbaR9w41s1/Ti+TkgZfocOM73Q9MNjrRsVh// q X-Received: by 2002:a2e:b8cb:0:b0:2df:f11f:cf79 with SMTP id s11-20020a2eb8cb000000b002dff11fcf79mr2482741ljp.51.1714340976175; Sun, 28 Apr 2024 14:49:36 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id ek17-20020a056402371100b0057266474cd2sm2330638edb.15.2024.04.28.14.49.34 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:35 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 03/12] exec: Include missing license in 'exec/cpu-common.h' Date: Sun, 28 Apr 2024 23:49:06 +0200 Message-ID: <20240428214915.10339-4-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::229; envelope-from=philmd@linaro.org; helo=mail-lj1-x229.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Commit 1ad2134f91 ("Hardware convenience library") extracted "cpu-common.h" from "cpu-all.h", which uses the LGPL-2.1+ license. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-5-philmd@linaro.org> --- include/exec/cpu-common.h | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 6d5318895a..8812ba744d 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -1,8 +1,13 @@ +/* + * CPU interfaces that are target independent. + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ #ifndef CPU_COMMON_H #define CPU_COMMON_H -/* CPU interfaces that are target independent. */ - #include "exec/vaddr.h" #ifndef CONFIG_USER_ONLY #include "exec/hwaddr.h" From patchwork Sun Apr 28 21:49:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792907 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417443wrh; Sun, 28 Apr 2024 14:50:30 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWgFLJh/GYvHtyWL5033vON6hC/VB4Zsu/E44L8ZU9f/dPtDIqL8+OUF5c+wYPiiTsz3GJMCfzy5VBfQCPchMXo X-Google-Smtp-Source: AGHT+IGCYL/27zg9W6c4xzW32oI6ilDRRgxzG8dig99qerWNvoXaIXXOA/LfJ0+czkERopqxjTn3 X-Received: by 2002:ac8:58c9:0:b0:43a:db8d:4a25 with SMTP id u9-20020ac858c9000000b0043adb8d4a25mr2143236qta.4.1714341030071; Sun, 28 Apr 2024 14:50:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341030; cv=none; d=google.com; s=arc-20160816; b=ueILRDeppRxHti9VV5uRvY8nTFWTIVMVi3JfpWYg0doI6LDPZqAnhpKCDm1pcAsBGg ROif5xar0jbkYLntWzGiWSWIq+IT1TBftQ/1etE5JN+Efx5t6/EhMHLC3SRGu62NB23+ MHVa5cVzB8xDyhH2ZHQtp2fXsp5gCyxWPC1azqxZERko2bokQmjl45CUCDeubfLq4la+ jCofK92G2aGCyKctLDufVn9jPDMK8gvRvAvC3NdyBqhri1Pdvzs79ctAGbJbdk89RG/i KyMY6ac1cE+/3fBcuLZ6ecoXGvbwpF3H3/etALm1Ebkq5B9bMNT29Ad6BG3n8HbO+mzo lLvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=u2gMJsks/FVGo186jApsF1W5B3KJkzW5GgYA94nXNvw=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=I5DFIxP4y3AO+w0/JgDbBMQxDWsGJYt1IBwOkpF54d0b/088/NpKFjIReBFH94EbLq MqrgtUv4H8z20SRCohF4kDCuCTeL4Ae81uv2TJzwU9Cj35JW3YMArSl6oRD/568euWC3 fv0z5Xfwgr/9D7BARjIDHNpyzvOX/Zl3TE5fpOLo9aaQb/yUIGzNTJIYFzXfX3QCFmHW VJJgQPD8IbOI2S1NO1huRqASvhcHQv3xJ+K0zXTLoTKc7TBWPxzvwTz+Ktx8owItWik1 f0rZscRiKgRjg+kKWpKMwZpYfRphGDzwvaQp5PPpqiHI29Dhe+oZYmp1gm2khXXfOO23 tL8w==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EaiZpbdV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id hc26-20020a05622a2a1a00b004367f8cea78si23465915qtb.587.2024.04.28.14.50.29 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:50:30 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=EaiZpbdV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPM-00032F-IH; Sun, 28 Apr 2024 17:50:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPL-00031y-F4 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:03 -0400 Received: from mail-ed1-x52a.google.com ([2a00:1450:4864:20::52a]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CP7-00015Z-1O for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:03 -0400 Received: by mail-ed1-x52a.google.com with SMTP id 4fb4d7f45d1cf-56c5d05128dso3493084a12.0 for ; Sun, 28 Apr 2024 14:49:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340982; x=1714945782; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=u2gMJsks/FVGo186jApsF1W5B3KJkzW5GgYA94nXNvw=; b=EaiZpbdVz+MlM8jUP5QUju2iA/21DQUmvj0vKfOYoa6QOyqx5PxxczAx6kuSn1nEmr NiDogCJcJG5ctcllwoAjc8YIj85+CVQ8IULSiJG79jx6AP7tkG7PnyBtrBQQVF7ygr8c Tu2lxFazHIxzTlibd19T1fRv8tLmI/22MzTeB4sd3SEDyEGtHYLDOQ9/4+qTkWf4OX+w TuFhNr02FQrYpLg1U0oXVJT3Jm90uNzQBAEK/RjI5vVe9GLBYIn9elgO72qnUSQJmAbj Sfh9JbBcLyKKasxNp83ds9NDUqhIDHv3c1qPVKfgSL4UAhdwNylJrUrnCPNlcZ52LAW9 3UoA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340982; x=1714945782; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=u2gMJsks/FVGo186jApsF1W5B3KJkzW5GgYA94nXNvw=; b=ueIwS5NfqTRQns5FTZzg4xGhOeg/J2hZKqS9EbIiC87fidGfoDaPiEd6kgkvZRe3bU 7LY/wvlOF7qjOhqGAzKehakr1HWyz9fbpkixyZDixvEH3YIwzXea/KXjCm+oAy7eiCf2 JoPFkibbp0wZPC/M2XoXvdjt8U6XQ2UvIUHCOGMhBDHCzlk2BnaX+FCg1LEhxJur3K0K Sui2IkDaU2DZzDrePOaieitW0t+8Wqi/vJZ1DKc1AiAnqZqCpaEfC7FSHKIto8oyt5VS Ukokhv1YcuZ3efnTWOTg7ifhXJ9TycIYWq0UQ322y/nJUR9SymW6ZXsOT5/rwEAbKFHl SDlA== X-Gm-Message-State: AOJu0Yx0pL/PAavIcWtVm4JsabL69Gj1GGdbVnbg1a295KgAw+p3CkRF wIlZZH/1jTnIoiF9hBvX9M4Lxd41uypw5UKSH9jasvtc5hM4aFwxio0D4HtBwVtKcav7ycozGaZ / X-Received: by 2002:a50:ccdb:0:b0:56d:c926:b92c with SMTP id b27-20020a50ccdb000000b0056dc926b92cmr5519675edj.38.1714340981894; Sun, 28 Apr 2024 14:49:41 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id u7-20020a50eac7000000b005727eadcb79sm681556edp.46.2024.04.28.14.49.40 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:41 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 04/12] exec/cpu: Indent TARGET_PAGE_foo definitions Date: Sun, 28 Apr 2024 23:49:07 +0200 Message-ID: <20240428214915.10339-5-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::52a; envelope-from=philmd@linaro.org; helo=mail-ed1-x52a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The TARGET_PAGE_foo definitions are defined with multiple level of #ifdef'ry. Indent it a bit for clarity. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-6-philmd@linaro.org> --- include/exec/cpu-all.h | 25 +++++++++++++------------ 1 file changed, 13 insertions(+), 12 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index e75ec13cd0..eaa59a5cc1 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -139,19 +139,20 @@ static inline void stl_phys_notdirty(AddressSpace *as, hwaddr addr, uint32_t val #ifdef TARGET_PAGE_BITS_VARY # include "exec/page-vary.h" extern const TargetPageBits target_page; -#ifdef CONFIG_DEBUG_TCG -#define TARGET_PAGE_BITS ({ assert(target_page.decided); target_page.bits; }) -#define TARGET_PAGE_MASK ({ assert(target_page.decided); \ - (target_long)target_page.mask; }) +# ifdef CONFIG_DEBUG_TCG +# define TARGET_PAGE_BITS ({ assert(target_page.decided); \ + target_page.bits; }) +# define TARGET_PAGE_MASK ({ assert(target_page.decided); \ + (target_long)target_page.mask; }) +# else +# define TARGET_PAGE_BITS target_page.bits +# define TARGET_PAGE_MASK ((target_long)target_page.mask) +# endif +# define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) #else -#define TARGET_PAGE_BITS target_page.bits -#define TARGET_PAGE_MASK ((target_long)target_page.mask) -#endif -#define TARGET_PAGE_SIZE (-(int)TARGET_PAGE_MASK) -#else -#define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS -#define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) -#define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_BITS_MIN TARGET_PAGE_BITS +# define TARGET_PAGE_SIZE (1 << TARGET_PAGE_BITS) +# define TARGET_PAGE_MASK ((target_long)-1 << TARGET_PAGE_BITS) #endif #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) From patchwork Sun Apr 28 21:49:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792909 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417528wrh; Sun, 28 Apr 2024 14:50:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWPVQ+c+okFP8kKy7ysvUwyM1hP1SWgVDgeQu82wN/oZ9GN6fTVBdUmXMusR4PexRKhDt/uswbDZUPyfpkWiqYa X-Google-Smtp-Source: AGHT+IF5UkEPq2jE4Lquuz3IwA7jNgNPzsdZhy0XWhAe9z0la7f9avhTyeuM6ip/MAhSVtdmcmYb X-Received: by 2002:a05:622a:1a18:b0:43a:c1a3:e283 with SMTP id f24-20020a05622a1a1800b0043ac1a3e283mr5775779qtb.28.1714341053815; Sun, 28 Apr 2024 14:50:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341053; cv=none; d=google.com; s=arc-20160816; b=uJ/V+mBMZ+9ZDrRzeckpDOdM9OElZNF/NzB7C0ySiBmcSSIbAAy+93bhw+gUMGIhtk 9KcYSmMLBOD/j4H3fmeSN9TW9KKx0ngwiWPujjMZGCIzMYmsLs60tedql4YNWbmS0PUd ABOGUtjopHcwigk7Q2eoWO7oJjjhFftDAex9PhxcBo4xicy4vQlIf4WC44j0BIL5btQG eAwgKYP0Vhi+qd4aRMt0afhZABRhUmk0OKkeYDrWNQw7bbmiljDAx8Kwa//0ehNcAStA csPDAT5wbUkgdVIfGDO7x5pSct/UG9xEexI2uTFJijHBgBbuhUXNvOp6SLCLgJB4ruFv nGWA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=flj95bEjqay534/2K5egl4Am1nZLayMjsiqLpMI/BnA=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=1JExTSDRJi57TS93hHBQSeF3mmqtzuuX8n1ftCqzW551SoCMrdLtb+hKDxQOZ30aiM /ApTrPYViqS2L+z0I1WJezFWqm78Pl8UY4uOMDoTk3DzRrDEJjKGlh27BqpgZouBg5Ss s9ugktaj6s5eBwTEW4X+bShiWIZFQvhxwZIsed0SnR+fD0z7Ic9+aEQfOAQNSd0BhnZj BtZFxViwrfjR6mP5MrolBgcRMt1AX5J4RCiJ5BXE/psOjzGwL3lFeB5GZ1p4JT7JoqZh /BgWyV1Vf1LiHI6DU7bgEYX6PDCwcLp/b+/4SVJq0Nsd5vJrerF1EL5CMB6kphFzbSqX rOHQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="b7kl/U1E"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id fg5-20020a05622a580500b0043980b93f21si19934494qtb.634.2024.04.28.14.50.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:50:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="b7kl/U1E"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPG-00030t-36; Sun, 28 Apr 2024 17:49:58 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPE-000300-Cw for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:56 -0400 Received: from mail-lf1-x12b.google.com ([2a00:1450:4864:20::12b]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CP9-00015m-3y for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:56 -0400 Received: by mail-lf1-x12b.google.com with SMTP id 2adb3069b0e04-51967f75763so4438899e87.2 for ; Sun, 28 Apr 2024 14:49:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340988; x=1714945788; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=flj95bEjqay534/2K5egl4Am1nZLayMjsiqLpMI/BnA=; b=b7kl/U1EuhGPukfW4k3k/JB0LI2qISs1sfTDKAExxXnQKwT9YiFUlExEjCYnEHb65q 7cHG5Fxqyr51NYDxOm43QU/lYP5IKEd8/s0i/SXOXv8g9uHHh+iA21ZlhFz0gN8vxBSX WXwWFagzbXiI+aJXYYT6c+dX6Ht4rEipqvdX5DLG8y37uT7pazh/sjmgd6cLIpSkZSoL qtI30tfSzwm+Mz/txpmJnBYrdjRPTS4YvI4GiaXNdCghgjvbuyNYXg8AYORq+IDMfpaK I1+CVZtLqbKQl/ReZpH33MdESBW3kMJF7xYz4vVF6EuMwp0o8cXJEyXHXJjL/0LLwh+k L5NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340988; x=1714945788; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=flj95bEjqay534/2K5egl4Am1nZLayMjsiqLpMI/BnA=; b=Y/L7Yd2iVQpsfFsfIAcrNrKooG8srMU0HvSW9pVHPSxNPwpupR6Jzd8qE5gH1tZI74 TvjRiM1mQdNi8kv19hkNeFcGShglGfRiq3J8vqoQNj4U6+CD0blLuOXhTIKYA9sk3V8o 7GQ+QOzgORFRgYAZ1CV5Hx1xdK9PHSMVkDCFcd+5UqJ705dCeu1KadWSRbz5Wh6m/n1Q fN5dxVluY8LUT1g5etdeDPLm8oFbA4CIM+X6jIAXDzQ2jsyCF5jD4IYQBxqBoSEqGNlr AQJXalZ8YCfD2iCqXSW98TAP0Wz7mwt2qM3kf3rbtnQDiLCZMP0uvBbG0xhJrdP+DJTT PaAw== X-Gm-Message-State: AOJu0Yy0/a0NZRj9t76ICvZQnETuZNCXmbG/SwgTGMK4CFl7mkFVtsqc GpPIQ/NUJAEaEGhAw8xE82Z920ROVlpYLlU9F98v8iD+ODc1NqmOkMKdn68EBUp96RW46gvcONL A X-Received: by 2002:a05:6512:3983:b0:518:d5c5:7276 with SMTP id j3-20020a056512398300b00518d5c57276mr6934870lfu.58.1714340987787; Sun, 28 Apr 2024 14:49:47 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id wk14-20020a170907054e00b00a55bd88c98esm8111076ejb.208.2024.04.28.14.49.46 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:46 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 05/12] exec/cpu: Remove obsolete PAGE_RESERVED definition Date: Sun, 28 Apr 2024 23:49:08 +0200 Message-ID: <20240428214915.10339-6-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=philmd@linaro.org; helo=mail-lf1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We stopped using the PAGE_RESERVED definition in commit 50d25c8aec ("accel/tcg: Drop PAGE_RESERVED for CONFIG_BSD"). This completes commit 2e9a5713f0 ("Remove PAGE_RESERVED"). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-7-philmd@linaro.org> --- include/exec/cpu-all.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index eaa59a5cc1..5ea8c4d3ef 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -157,10 +157,6 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) -#if defined(CONFIG_BSD) && defined(CONFIG_USER_ONLY) -/* FIXME: Code that sets/uses this is broken and needs to go away. */ -#define PAGE_RESERVED 0x0100 -#endif /* * For linux-user, indicates that the page is mapped with the same semantics * in both guest and host. From patchwork Sun Apr 28 21:49:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792916 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417685wrh; Sun, 28 Apr 2024 14:51:54 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXOcheAwiA4JUPDeXStQ+ldCSmpnwQRH6V3okm855eXKkjJALTkiGe0N1XZGBtX4cJQdYXgQdVPS3Hw7cJVoqFI X-Google-Smtp-Source: AGHT+IEyqwlzqEs4tq1URiM4LNFseVRXxjZZh8ZTiq7M2526DWjoJZ1lt1dFRWixHwMXkkT9aRDH X-Received: by 2002:a67:ff82:0:b0:47a:4138:dc1e with SMTP id v2-20020a67ff82000000b0047a4138dc1emr9198896vsq.20.1714341113771; Sun, 28 Apr 2024 14:51:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341113; cv=none; d=google.com; s=arc-20160816; b=y86QyMGQcx0GIB7eQG9XDgppgceFJ/4IqkQaDS9Lthj8fT2V57oIr+/EFjGAZwDQSR PQyx2eJBgUvbayFwXl+L+jtAkIMaMpM66IbxzjQVC6wJwWuq3+GpAdFnkPvkrczYLJC7 GR3/xb10/JWlV/yXy2KFfOuhfn1euZlPZ0uTGXP/fjzBY/xDrRUtmJad6p6AaXI8ywbG XuXB6sPXvgUO2POcpKxAiqQFze6ul5jxX9TnPQVyRmrf1Dx0RE5kXD3feqXs0ZweQ0V1 r2kUYZ/riqRgTNYbdWW/btqpLNjeese6SsruI7W++I5Ms4BmvA+GqXhmi3gwz+7/e8mr tCkw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=DC01nZRb2MKVtNO33LPQtbldUV4P1Yct1l9n3dXwvXo=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=gifhRnv41m+WWfGrPY3gmCs47Ruod9V976YBrWsDDO2lprpMdrnVF9A3WzUKAL96Rn aCgbEJpCF9qZDkuNm31c701JgXj8YV7eNJMyYuMy0290/apJC6L849TsOkUxnJ/n4zuM uwcdMjdhE+9IWkHesqe7Ryj4hcd/0JYZk2QjD5DLqqDpriyx8mrRKXP7h7y5siaRAdjg j0JrmWwkaiD4LZcnECAhqX0ecwb6+XT6LCpufIhwp2WkTDthKDd0azmtnRrl6fhmPs/z nwhI+VAdjbGBDTy+rrMI1X9w2y7JAIiFINFBBw7/cIdU/JgELTPO579iKKr3XqR6hgWR OEyw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MOHdQYdn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id q13-20020a05621419ed00b006a0c4275850si3126165qvc.301.2024.04.28.14.51.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MOHdQYdn; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPI-000316-0z; Sun, 28 Apr 2024 17:50:00 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPE-00030O-Vd for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:56 -0400 Received: from mail-lj1-x22e.google.com ([2a00:1450:4864:20::22e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPD-000165-B8 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:49:56 -0400 Received: by mail-lj1-x22e.google.com with SMTP id 38308e7fff4ca-2db2f6cb312so58652121fa.2 for ; Sun, 28 Apr 2024 14:49:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340993; x=1714945793; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=DC01nZRb2MKVtNO33LPQtbldUV4P1Yct1l9n3dXwvXo=; b=MOHdQYdnRkKDo8m0djngcRxet7C75lmd90rYEuNtyeXdQlC9usNABt59p9Uld0Fzpt 29FVtmcU+0s6jTR2VNup5YxBLiWWqCTZ+tmDhGW1VFreeTr94UmTaOuYRg2lYO3LPlZE V8TaAqpT9uOinSCWr7uy5MgK1+SOAIR+t0tCM7Dvfo4J0xRl4w6zxM1A4DiP7bi8KT3R jybjsGvq5uoGLKeni0jCmvuiHuc7qHJUXf5CUaI57d52tTm6aGHO3mfK6Qmzk2GtTkUW QyYCeaw+QOenrfJJc5sY+ekwWL8a/rNR2I4BFywvnLjL6Wu9wtakTL3PHdlD15/cxBOM daaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340993; x=1714945793; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DC01nZRb2MKVtNO33LPQtbldUV4P1Yct1l9n3dXwvXo=; b=S/UvKf3AFQnMQ1I2qJ2C6UKKS1ycY6WiFabm2EcyneO23XN0z7Towa64VefNv3KdX+ DaaovW3NKDEFuFIc/0paUNTW1VemFBGUfHIgOTPBsLkkCZb+QdSWVr3Q55SJrCYSH+NV RbZegemgJK2gMrpQzhG/faFMkCcdLE9vZfxbFQ5GOMvFqYJ2pUjkyNfNq065czuYrZl8 UQt3+4XNGaGXoz0E/pjMCbA3tVyeaCH1Nd8UlRveVblkWx0KRn9xNvliK0e5wWeFDRy2 xC1Jg9nh760eJhPrj3LAC7pJ9+8hpDXPuhagsxmZ74eiWgD4NBf/rGppTMQLbjOPVbI+ fd2g== X-Gm-Message-State: AOJu0Yyg596yrIF3TXRlF+x3WU0+ROdYqHXg+otW3Vv8UNNCHg58nrFu qPyBnFmTQESjvUHY/wyFLW0uzCAoiYBrQDCQUvlpPdE+fGrTP2wQZ/TR/CeBTFsIhsf27opNYVc 7 X-Received: by 2002:a05:6512:3254:b0:51a:df97:cc8d with SMTP id c20-20020a056512325400b0051adf97cc8dmr6630270lfr.26.1714340993509; Sun, 28 Apr 2024 14:49:53 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id bn16-20020a170906c0d000b00a51dcdca6cfsm13140044ejb.71.2024.04.28.14.49.52 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:52 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 06/12] exec/cpu: Remove duplicated PAGE_PASSTHROUGH definition Date: Sun, 28 Apr 2024 23:49:09 +0200 Message-ID: <20240428214915.10339-7-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=philmd@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Missed in commit 58771921af ("include/exec: Move PAGE_* macros to common header"), PAGE_PASSTHROUGH ended being defined twice. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-8-philmd@linaro.org> --- include/exec/cpu-all.h | 6 ------ 1 file changed, 6 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 5ea8c4d3ef..8c3ad7153d 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -157,12 +157,6 @@ extern const TargetPageBits target_page; #define TARGET_PAGE_ALIGN(addr) ROUND_UP((addr), TARGET_PAGE_SIZE) -/* - * For linux-user, indicates that the page is mapped with the same semantics - * in both guest and host. - */ -#define PAGE_PASSTHROUGH 0x0800 - #if defined(CONFIG_USER_ONLY) void page_dump(FILE *f); From patchwork Sun Apr 28 21:49:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792915 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417631wrh; Sun, 28 Apr 2024 14:51:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUZ/EhLO2UThoGE4JyxJaoQH9lt1YP2t3r+FUhlajj/6JCN0WJMBnNyhl1bWSMBoFVvv2QsUrDbbhss/8Aua+2N X-Google-Smtp-Source: AGHT+IFH5y77qfAOXsF3wtat4wIXuXpYhr+oi/cRQHlaoRUhu6Jq0boW22lf6Wh0FO5l+FLHkr9j X-Received: by 2002:a05:6359:65cc:b0:186:249a:c8e2 with SMTP id ym12-20020a05635965cc00b00186249ac8e2mr11963782rwb.23.1714341096283; Sun, 28 Apr 2024 14:51:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341096; cv=none; d=google.com; s=arc-20160816; b=m2pZvljDfFdaXmlMV3xI00riIze634nB+h0dh9tF1ByupYpZWCYMGPELom+EBNlu2m W+5n+EOCKaZn4z29yTkjWQyuY7q9oXlXznPiUSNoPvG8VYlTAIUuS+SEyfquB3XJkxA1 Qhia2fYnfM8E+YgsnIhF6INzeyzlSuQqCyES8NdvdZ5ugMfLw3fFCmyiwZj8rLPWapQh 7R1Z8jVCVHlgD5VsplPIbLAxlLc/LU/vlYwMo6cMHQSwehsFTzZQ1GeHZuIC04YwMg2b gjocOmvFoyRkRYuS4on9MO1LZBs9Fj2XIKTPSqFY9XoLuKTXwppyvVOv1Rsd+V3jxpsw 9/sQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=refRMR0hxtVFAYzffnDaQB/8bk5ghINO2kzG0/2rINc=; fh=5gjew8NMvEApfq1BBHuKvOYpzi9iKTR5un8QVV9CG4k=; b=SnxSEzVhcK8wVOCDX/6oBEiPIVQVYvQ5UVvem7M7L6S4563JUZEqKKXA/rS1baAMPM 2OYQjyzD6gOctBiX9Ga23Ovbaau8+QLIVLFT6sEc80NYw0ESNuTajS9Pdi17YTbeXlqa KT7igKnMpQOSzFi2/+lS0/+h7thsnA6DX4lKesLNkzG6qdu4hI5NSk6jhvX/LuabJLRN rHFKOWV9n5JYocOBsaOISLGP1I0JcfU1buKQ9ruLoAAc+lnRFTKTC+CLlWCavqcAGnmJ hbo4y2Yka4i6bXE5blV8I1F1s+gFlq8qkP208l6qXJxTMnzH6pgNKE6gx5p+RsZtJrLu 9gWw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FmqeS6rV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r12-20020a056214124c00b0069935d75206si25901921qvv.496.2024.04.28.14.51.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=FmqeS6rV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPO-00032e-8n; Sun, 28 Apr 2024 17:50:06 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPN-00032U-1g for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:05 -0400 Received: from mail-ej1-x631.google.com ([2a00:1450:4864:20::631]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPJ-00016Y-J4 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:04 -0400 Received: by mail-ej1-x631.google.com with SMTP id a640c23a62f3a-a58ebdd8b64so111093266b.0 for ; Sun, 28 Apr 2024 14:50:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714340999; x=1714945799; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=refRMR0hxtVFAYzffnDaQB/8bk5ghINO2kzG0/2rINc=; b=FmqeS6rVEWX2YweBJeJDmQdzs7XGrCm4mWuQMkNdZGvNaXnAR9Ix8IkQNpyUQLwMrm WDrxst2xAfLJf9wAJMUXEcXTBeA0fE5HLfgGdxyDKMqPSi7o8kPb43VdXOsHA3Q0sibg 6DYw9d4xK0bNaiQltKw5qXQ/d2qETy8yogxD7O7zlTirObcup8v61YXAlwocRa03IpSt mK2zFSfpUXhFvzDodYecosc+Pe8kqjCj31X8pZEbwBipHKdkzyNCYiFrGgQELGbpOC+8 Qz35KGvXf1M1hzFFw10j+51esPQ7sx/lCKfEBbK8DNsa4Q3qzNpv1QIJ4CNrcgGwHYjE RlRQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714340999; x=1714945799; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=refRMR0hxtVFAYzffnDaQB/8bk5ghINO2kzG0/2rINc=; b=tn9l3G4cWNrvO5GN7iX9pXRImcemNNQ+4plxnBUhTT/d2zx0vLwxVHP0Vn2U2+Bg9X bfmlJu1dHXCRVjfx45+rCzQfJTmqGukxNQ0OE917lkUf4bgD4pUKvl93p9HKbZEqGMXs ZaawBpAmfTkncer2OHADqzXi2zb1yIJVrOE2b4HfosKGaBeXX8jU0oOjgExFuW/z/wgK 9q3O5hc4g3kEs1n2U+Oq3DtccpZ5GFJY0XeJ/ZAO/Vp/3zqNAIZwgC7ziPEufj+Sgdl/ +2cMTte4F7hUyzIRqj4l8KXLSvI0WEi1z9IeHJed9ff8o2JohyBzvBIeHiA/vo72Muq+ TTeQ== X-Gm-Message-State: AOJu0YxrR/q7qeAAzW7WK9dCg7SgsJcpBeVC8kJasIXQVqjU/YWwofxx 1vbJmJGhE7Wn+u6nlbC7bryRiUEH7i3/DmF8SNNfpQZA8lNXTkipB16yfwj9YYUphSMFUOX3Lmt 7 X-Received: by 2002:a17:906:6ce:b0:a58:7505:16ff with SMTP id v14-20020a17090606ce00b00a58750516ffmr5258501ejb.64.1714340999402; Sun, 28 Apr 2024 14:49:59 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id jp4-20020a170906f74400b00a4734125fd2sm13171807ejb.31.2024.04.28.14.49.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:49:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= , Nicholas Piggin Subject: [PATCH v2 07/12] exec/cpu: Extract page-protection definitions to page-protection.h Date: Sun, 28 Apr 2024 23:49:10 +0200 Message-ID: <20240428214915.10339-8-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::631; envelope-from=philmd@linaro.org; helo=mail-ej1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Extract page-protection definitions from "exec/cpu-all.h" to "exec/page-protection.h". The list of files requiring the new header was generated using: $ git grep -wE \ 'PAGE_(READ|WRITE|EXEC|BITS|VALID|ANON|RESERVED|TARGET_.|PASSTHROUGH)' Signed-off-by: Philippe Mathieu-Daudé Acked-by: Nicholas Piggin Acked-by: Richard Henderson Message-Id: <20240427155714.53669-3-philmd@linaro.org> --- MAINTAINERS | 1 + bsd-user/bsd-mem.h | 1 + bsd-user/qemu.h | 1 + include/exec/cpu-all.h | 1 + include/exec/cpu-common.h | 31 +-------------------- include/exec/page-protection.h | 41 ++++++++++++++++++++++++++++ include/semihosting/uaccess.h | 1 + target/arm/cpu.h | 1 + target/ppc/internal.h | 1 + target/ppc/mmu-radix64.h | 2 ++ accel/tcg/cputlb.c | 1 + accel/tcg/tb-maint.c | 1 + accel/tcg/user-exec.c | 1 + bsd-user/mmap.c | 1 + bsd-user/signal.c | 1 + cpu-target.c | 1 + hw/ppc/ppc440_bamboo.c | 1 + hw/ppc/sam460ex.c | 1 + hw/ppc/virtex_ml507.c | 1 + linux-user/arm/cpu_loop.c | 1 + linux-user/elfload.c | 1 + linux-user/mmap.c | 1 + linux-user/signal.c | 1 + linux-user/syscall.c | 1 + system/physmem.c | 1 + target/alpha/helper.c | 1 + target/arm/ptw.c | 1 + target/arm/tcg/m_helper.c | 1 + target/arm/tcg/mte_helper.c | 1 + target/arm/tcg/sve_helper.c | 1 + target/avr/helper.c | 1 + target/cris/mmu.c | 1 + target/hppa/mem_helper.c | 1 + target/hppa/translate.c | 1 + target/i386/tcg/sysemu/excp_helper.c | 1 + target/loongarch/tcg/tlb_helper.c | 1 + target/m68k/helper.c | 1 + target/microblaze/helper.c | 1 + target/microblaze/mmu.c | 1 + target/mips/sysemu/physaddr.c | 1 + target/mips/tcg/sysemu/tlb_helper.c | 1 + target/openrisc/mmu.c | 1 + target/ppc/mmu-hash32.c | 1 + target/ppc/mmu-hash64.c | 1 + target/ppc/mmu-radix64.c | 1 + target/ppc/mmu_common.c | 1 + target/ppc/mmu_helper.c | 1 + target/riscv/cpu_helper.c | 1 + target/riscv/pmp.c | 1 + target/riscv/vector_helper.c | 1 + target/rx/cpu.c | 1 + target/s390x/mmu_helper.c | 1 + target/s390x/tcg/mem_helper.c | 1 + target/sh4/helper.c | 1 + target/sparc/ldst_helper.c | 1 + target/sparc/mmu_helper.c | 1 + target/tricore/helper.c | 1 + target/xtensa/mmu_helper.c | 1 + target/xtensa/op_helper.c | 1 + 59 files changed, 100 insertions(+), 30 deletions(-) create mode 100644 include/exec/page-protection.h diff --git a/MAINTAINERS b/MAINTAINERS index 302b6fd00c..33b6d95588 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -167,6 +167,7 @@ F: include/exec/target_long.h F: include/exec/helper*.h F: include/exec/helper*.h.inc F: include/exec/helper-info.c.inc +F: include/exec/page-protection.h F: include/sysemu/cpus.h F: include/sysemu/tcg.h F: include/hw/core/tcg-cpu-ops.h diff --git a/bsd-user/bsd-mem.h b/bsd-user/bsd-mem.h index 21d9bab889..eef6b222d9 100644 --- a/bsd-user/bsd-mem.h +++ b/bsd-user/bsd-mem.h @@ -56,6 +56,7 @@ #include #include "qemu-bsd.h" +#include "exec/page-protection.h" extern struct bsd_shm_regions bsd_shm_regions[]; extern abi_ulong target_brk; diff --git a/bsd-user/qemu.h b/bsd-user/qemu.h index 8629f0dcde..63ee07d534 100644 --- a/bsd-user/qemu.h +++ b/bsd-user/qemu.h @@ -34,6 +34,7 @@ extern char **environ; #include "target_os_signal.h" #include "target.h" #include "exec/gdbstub.h" +#include "exec/page-protection.h" #include "qemu/clang-tsa.h" #include "qemu-os.h" diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 8c3ad7153d..af431a1151 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -19,6 +19,7 @@ #ifndef CPU_ALL_H #define CPU_ALL_H +#include "exec/page-protection.h" #include "exec/cpu-common.h" #include "exec/memory.h" #include "exec/tswap.h" diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 8812ba744d..78f2c381b1 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -14,6 +14,7 @@ #endif #include "hw/core/cpu.h" #include "tcg/debug-assert.h" +#include "exec/page-protection.h" #define EXCP_INTERRUPT 0x10000 /* async interruption */ #define EXCP_HLT 0x10001 /* hlt instruction reached */ @@ -208,36 +209,6 @@ G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc); G_NORETURN void cpu_loop_exit(CPUState *cpu); G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc); -/* same as PROT_xxx */ -#define PAGE_READ 0x0001 -#define PAGE_WRITE 0x0002 -#define PAGE_EXEC 0x0004 -#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) -#define PAGE_VALID 0x0008 -/* - * Original state of the write flag (used when tracking self-modifying code) - */ -#define PAGE_WRITE_ORG 0x0010 -/* - * Invalidate the TLB entry immediately, helpful for s390x - * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() - */ -#define PAGE_WRITE_INV 0x0020 -/* For use with page_set_flags: page is being replaced; target_data cleared. */ -#define PAGE_RESET 0x0040 -/* For linux-user, indicates that the page is MAP_ANON. */ -#define PAGE_ANON 0x0080 - -/* Target-specific bits that will be used via page_get_flags(). */ -#define PAGE_TARGET_1 0x0200 -#define PAGE_TARGET_2 0x0400 - -/* - * For linux-user, indicates that the page is mapped with the same semantics - * in both guest and host. - */ -#define PAGE_PASSTHROUGH 0x0800 - /* accel/tcg/cpu-exec.c */ int cpu_exec(CPUState *cpu); diff --git a/include/exec/page-protection.h b/include/exec/page-protection.h new file mode 100644 index 0000000000..2722ded724 --- /dev/null +++ b/include/exec/page-protection.h @@ -0,0 +1,41 @@ +/* + * QEMU page protection definitions. + * + * Copyright (c) 2003 Fabrice Bellard + * + * SPDX-License-Identifier: LGPL-2.1+ + */ +#ifndef EXEC_PAGE_PROT_COMMON_H +#define EXEC_PAGE_PROT_COMMON_H + +/* same as PROT_xxx */ +#define PAGE_READ 0x0001 +#define PAGE_WRITE 0x0002 +#define PAGE_EXEC 0x0004 +#define PAGE_BITS (PAGE_READ | PAGE_WRITE | PAGE_EXEC) +#define PAGE_VALID 0x0008 +/* + * Original state of the write flag (used when tracking self-modifying code) + */ +#define PAGE_WRITE_ORG 0x0010 +/* + * Invalidate the TLB entry immediately, helpful for s390x + * Low-Address-Protection. Used with PAGE_WRITE in tlb_set_page_with_attrs() + */ +#define PAGE_WRITE_INV 0x0020 +/* For use with page_set_flags: page is being replaced; target_data cleared. */ +#define PAGE_RESET 0x0040 +/* For linux-user, indicates that the page is MAP_ANON. */ +#define PAGE_ANON 0x0080 + +/* Target-specific bits that will be used via page_get_flags(). */ +#define PAGE_TARGET_1 0x0200 +#define PAGE_TARGET_2 0x0400 + +/* + * For linux-user, indicates that the page is mapped with the same semantics + * in both guest and host. + */ +#define PAGE_PASSTHROUGH 0x0800 + +#endif diff --git a/include/semihosting/uaccess.h b/include/semihosting/uaccess.h index dd289af8dd..c2fa5a655d 100644 --- a/include/semihosting/uaccess.h +++ b/include/semihosting/uaccess.h @@ -17,6 +17,7 @@ #include "exec/cpu-common.h" #include "exec/cpu-defs.h" #include "exec/tswap.h" +#include "exec/page-protection.h" #define get_user_u64(val, addr) \ ({ uint64_t val_ = 0; \ diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 17efc5d565..6577d04749 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -26,6 +26,7 @@ #include "cpu-qom.h" #include "exec/cpu-defs.h" #include "exec/gdbstub.h" +#include "exec/page-protection.h" #include "qapi/qapi-types-common.h" #include "target/arm/multiprocessing.h" #include "target/arm/gtimer.h" diff --git a/target/ppc/internal.h b/target/ppc/internal.h index 601c0b533f..98b41a970c 100644 --- a/target/ppc/internal.h +++ b/target/ppc/internal.h @@ -20,6 +20,7 @@ #include "exec/breakpoint.h" #include "hw/registerfields.h" +#include "exec/page-protection.h" /* PM instructions */ typedef enum { diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h index 4c768aa5cc..c5c04a1527 100644 --- a/target/ppc/mmu-radix64.h +++ b/target/ppc/mmu-radix64.h @@ -3,6 +3,8 @@ #ifndef CONFIG_USER_ONLY +#include "exec/page-protection.h" + /* Radix Quadrants */ #define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF #define R_EADDR_VALID_MASK 0xC00FFFFFFFFFFFFF diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index 953c437ba9..cdb3e12dfb 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -21,6 +21,7 @@ #include "qemu/main-loop.h" #include "hw/core/tcg-cpu-ops.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/memory.h" #include "exec/cpu_ldst.h" #include "exec/cputlb.h" diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c index da39a43bd8..19ae6793f3 100644 --- a/accel/tcg/tb-maint.c +++ b/accel/tcg/tb-maint.c @@ -23,6 +23,7 @@ #include "exec/cputlb.h" #include "exec/log.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/tb-flush.h" #include "exec/translate-all.h" #include "sysemu/tcg.h" diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 1c621477ad..ca27746fe4 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -25,6 +25,7 @@ #include "qemu/rcu.h" #include "exec/cpu_ldst.h" #include "exec/translate-all.h" +#include "exec/page-protection.h" #include "exec/helper-proto.h" #include "qemu/atomic128.h" #include "trace/trace-root.h" diff --git a/bsd-user/mmap.c b/bsd-user/mmap.c index 3ef11b2807..cac2b9cad8 100644 --- a/bsd-user/mmap.c +++ b/bsd-user/mmap.c @@ -17,6 +17,7 @@ * along with this program; if not, see . */ #include "qemu/osdep.h" +#include "exec/page-protection.h" #include "qemu.h" diff --git a/bsd-user/signal.c b/bsd-user/signal.c index b2faf1d0dd..8b6654b91d 100644 --- a/bsd-user/signal.c +++ b/bsd-user/signal.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "qemu/log.h" #include "qemu.h" +#include "exec/page-protection.h" #include "user/tswap-target.h" #include "gdbstub/user.h" #include "signal-common.h" diff --git a/cpu-target.c b/cpu-target.c index f88649c299..5af120e8aa 100644 --- a/cpu-target.c +++ b/cpu-target.c @@ -21,6 +21,7 @@ #include "qapi/error.h" #include "exec/target_page.h" +#include "exec/page-protection.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" #include "qemu/error-report.h" diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index e18f57efce..73f80cf706 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -15,6 +15,7 @@ #include "qemu/units.h" #include "qemu/datadir.h" #include "qemu/error-report.h" +#include "exec/page-protection.h" #include "net/net.h" #include "hw/pci/pci.h" #include "hw/boards.h" diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c index d42b677898..8dc75fb9f0 100644 --- a/hw/ppc/sam460ex.c +++ b/hw/ppc/sam460ex.c @@ -21,6 +21,7 @@ #include "kvm_ppc.h" #include "sysemu/device_tree.h" #include "sysemu/block-backend.h" +#include "exec/page-protection.h" #include "hw/loader.h" #include "elf.h" #include "exec/memory.h" diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index d02f330650..c49da1f46f 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "qemu/datadir.h" #include "qemu/units.h" +#include "exec/page-protection.h" #include "cpu.h" #include "hw/sysbus.h" #include "hw/char/serial.h" diff --git a/linux-user/arm/cpu_loop.c b/linux-user/arm/cpu_loop.c index db1a41e27f..ec665862d9 100644 --- a/linux-user/arm/cpu_loop.c +++ b/linux-user/arm/cpu_loop.c @@ -24,6 +24,7 @@ #include "cpu_loop-common.h" #include "signal-common.h" #include "semihosting/common-semi.h" +#include "exec/page-protection.h" #include "target/arm/syndrome.h" #define get_user_code_u32(x, gaddr, env) \ diff --git a/linux-user/elfload.c b/linux-user/elfload.c index f9461d2844..d765f2375b 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -8,6 +8,7 @@ #include "qemu.h" #include "user/tswap-target.h" +#include "exec/page-protection.h" #include "user/guest-base.h" #include "user-internals.h" #include "signal-common.h" diff --git a/linux-user/mmap.c b/linux-user/mmap.c index be3b9a68eb..d9e6c51af4 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -20,6 +20,7 @@ #include #include "trace.h" #include "exec/log.h" +#include "exec/page-protection.h" #include "qemu.h" #include "user-internals.h" #include "user-mmap.h" diff --git a/linux-user/signal.c b/linux-user/signal.c index 05dc4afb52..63ac2df53b 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "qemu/bitops.h" #include "gdbstub/user.h" +#include "exec/page-protection.h" #include "hw/core/tcg-cpu-ops.h" #include diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 41659b63f5..6a492c9d35 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -25,6 +25,7 @@ #include "qemu/plugin.h" #include "tcg/startup.h" #include "target_mman.h" +#include "exec/page-protection.h" #include #include #include diff --git a/system/physmem.c b/system/physmem.c index 1a81c226ba..44e477a1a5 100644 --- a/system/physmem.c +++ b/system/physmem.c @@ -31,6 +31,7 @@ #endif /* CONFIG_TCG */ #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/target_page.h" #include "hw/qdev-core.h" #include "hw/qdev-properties.h" diff --git a/target/alpha/helper.c b/target/alpha/helper.c index d6d4353edd..ede40858f0 100644 --- a/target/alpha/helper.c +++ b/target/alpha/helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "fpu/softfloat-types.h" #include "exec/helper-proto.h" #include "qemu/qemu-print.h" diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 31ae43f60e..4476b32ff5 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -11,6 +11,7 @@ #include "qemu/range.h" #include "qemu/main-loop.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "cpu.h" #include "internals.h" #include "cpu-features.h" diff --git a/target/arm/tcg/m_helper.c b/target/arm/tcg/m_helper.c index d1f1e02acc..23d7f73035 100644 --- a/target/arm/tcg/m_helper.c +++ b/target/arm/tcg/m_helper.c @@ -16,6 +16,7 @@ #include "qemu/bitops.h" #include "qemu/log.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #ifdef CONFIG_TCG #include "exec/cpu_ldst.h" #include "semihosting/common-semi.h" diff --git a/target/arm/tcg/mte_helper.c b/target/arm/tcg/mte_helper.c index d971b81370..037ac6dd60 100644 --- a/target/arm/tcg/mte_helper.c +++ b/target/arm/tcg/mte_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "internals.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/ram_addr.h" #include "exec/cpu_ldst.h" #include "exec/helper-proto.h" diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 6853f58c19..dd49e67d7a 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "internals.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/helper-proto.h" #include "tcg/tcg-gvec-desc.h" #include "fpu/softfloat.h" diff --git a/target/avr/helper.c b/target/avr/helper.c index eeca415c43..345708a1b3 100644 --- a/target/avr/helper.c +++ b/target/avr/helper.c @@ -24,6 +24,7 @@ #include "cpu.h" #include "hw/core/tcg-cpu-ops.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/cpu_ldst.h" #include "exec/address-spaces.h" #include "exec/helper-proto.h" diff --git a/target/cris/mmu.c b/target/cris/mmu.c index b574ec6e5b..e0ea02dc0b 100644 --- a/target/cris/mmu.c +++ b/target/cris/mmu.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "mmu.h" #ifdef DEBUG diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index 84785b5a5c..d09877afd7 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/helper-proto.h" #include "hw/core/cpu.h" #include "trace.h" diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 42fa480950..6d45611888 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -22,6 +22,7 @@ #include "disas/disas.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "tcg/tcg-op.h" #include "tcg/tcg-op-gvec.h" #include "exec/helper-proto.h" diff --git a/target/i386/tcg/sysemu/excp_helper.c b/target/i386/tcg/sysemu/excp_helper.c index 7a57b7dd10..8fb05b1f53 100644 --- a/target/i386/tcg/sysemu/excp_helper.c +++ b/target/i386/tcg/sysemu/excp_helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/cpu_ldst.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "tcg/helper-tcg.h" typedef struct TranslateParams { diff --git a/target/loongarch/tcg/tlb_helper.c b/target/loongarch/tcg/tlb_helper.c index 57f5308632..d6331f9b0b 100644 --- a/target/loongarch/tcg/tlb_helper.c +++ b/target/loongarch/tcg/tlb_helper.c @@ -13,6 +13,7 @@ #include "internals.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/cpu_ldst.h" #include "exec/log.h" #include "cpu-csr.h" diff --git a/target/m68k/helper.c b/target/m68k/helper.c index 7a91f33b17..7967ad13cb 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/gdbstub.h" #include "exec/helper-proto.h" #include "gdbstub/helpers.h" diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index d25c9eb4d3..c263087db3 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "qemu/host-utils.h" #include "exec/log.h" diff --git a/target/microblaze/mmu.c b/target/microblaze/mmu.c index 234006634e..2423ac6172 100644 --- a/target/microblaze/mmu.c +++ b/target/microblaze/mmu.c @@ -22,6 +22,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" static unsigned int tlb_decode_size(unsigned int f) { diff --git a/target/mips/sysemu/physaddr.c b/target/mips/sysemu/physaddr.c index 5c5184e136..505781d84c 100644 --- a/target/mips/sysemu/physaddr.c +++ b/target/mips/sysemu/physaddr.c @@ -19,6 +19,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "../internal.h" static int is_seg_am_mapped(unsigned int am, bool eu, int mmu_idx) diff --git a/target/mips/tcg/sysemu/tlb_helper.c b/target/mips/tcg/sysemu/tlb_helper.c index 119eae771e..3ba6d369a6 100644 --- a/target/mips/tcg/sysemu/tlb_helper.c +++ b/target/mips/tcg/sysemu/tlb_helper.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "internal.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/cpu_ldst.h" #include "exec/log.h" #include "exec/helper-proto.h" diff --git a/target/openrisc/mmu.c b/target/openrisc/mmu.c index 603c26715e..c632d5230b 100644 --- a/target/openrisc/mmu.c +++ b/target/openrisc/mmu.c @@ -22,6 +22,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "gdbstub/helpers.h" #include "qemu/host-utils.h" #include "hw/loader.h" diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c index 3976416840..6dfedab11d 100644 --- a/target/ppc/mmu-hash32.c +++ b/target/ppc/mmu-hash32.c @@ -21,6 +21,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" #include "internal.h" diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index d645c0bb94..5a0d80feda 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -21,6 +21,7 @@ #include "qemu/units.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "qemu/error-report.h" #include "qemu/qemu-print.h" #include "sysemu/hw_accel.h" diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index 690dff7a49..8daf71d2db 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -20,6 +20,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "qemu/error-report.h" #include "sysemu/kvm.h" #include "kvm_ppc.h" diff --git a/target/ppc/mmu_common.c b/target/ppc/mmu_common.c index 751403f1c8..4fde7fd3bf 100644 --- a/target/ppc/mmu_common.c +++ b/target/ppc/mmu_common.c @@ -25,6 +25,7 @@ #include "mmu-hash64.h" #include "mmu-hash32.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c index c071b4d5e2..b35a93c198 100644 --- a/target/ppc/mmu_helper.c +++ b/target/ppc/mmu_helper.c @@ -25,6 +25,7 @@ #include "mmu-hash64.h" #include "mmu-hash32.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/log.h" #include "helper_regs.h" #include "qemu/error-report.h" diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c index fc090d729a..8ad546a45a 100644 --- a/target/riscv/cpu_helper.c +++ b/target/riscv/cpu_helper.c @@ -24,6 +24,7 @@ #include "internals.h" #include "pmu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "instmap.h" #include "tcg/tcg-op.h" #include "trace.h" diff --git a/target/riscv/pmp.c b/target/riscv/pmp.c index 2a76b611a0..9eea397e72 100644 --- a/target/riscv/pmp.c +++ b/target/riscv/pmp.c @@ -25,6 +25,7 @@ #include "cpu.h" #include "trace.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" static bool pmp_write_cfg(CPURISCVState *env, uint32_t addr_index, uint8_t val); diff --git a/target/riscv/vector_helper.c b/target/riscv/vector_helper.c index fa139040f8..1b4d5a8e37 100644 --- a/target/riscv/vector_helper.c +++ b/target/riscv/vector_helper.c @@ -23,6 +23,7 @@ #include "exec/memop.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "exec/page-protection.h" #include "exec/helper-proto.h" #include "fpu/softfloat.h" #include "tcg/tcg-gvec-desc.h" diff --git a/target/rx/cpu.c b/target/rx/cpu.c index e3dfb09722..c1a592e893 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -22,6 +22,7 @@ #include "cpu.h" #include "migration/vmstate.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "hw/loader.h" #include "fpu/softfloat.h" #include "tcg/debug-assert.h" diff --git a/target/s390x/mmu_helper.c b/target/s390x/mmu_helper.c index fbb2f1b4d4..f3a2f25a5c 100644 --- a/target/s390x/mmu_helper.c +++ b/target/s390x/mmu_helper.c @@ -24,6 +24,7 @@ #include "sysemu/kvm.h" #include "sysemu/tcg.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "trace.h" #include "hw/hw.h" #include "hw/s390x/storage-keys.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 557831def4..6a308c5553 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -25,6 +25,7 @@ #include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/cpu_ldst.h" #include "hw/core/tcg-cpu-ops.h" #include "qemu/int128.h" diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 7c6f9d374a..6702910627 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -21,6 +21,7 @@ #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/log.h" #if !defined(CONFIG_USER_ONLY) diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 2846a86cc4..7bdf99e0c0 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -23,6 +23,7 @@ #include "tcg/tcg.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "exec/cpu_ldst.h" #include "asi.h" diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index ad1591d9fd..9ff06026b8 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -21,6 +21,7 @@ #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "qemu/qemu-print.h" #include "trace.h" diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 76bd226370..7014255f77 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -20,6 +20,7 @@ #include "hw/registerfields.h" #include "cpu.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #include "fpu/softfloat-helpers.h" #include "qemu/qemu-print.h" diff --git a/target/xtensa/mmu_helper.c b/target/xtensa/mmu_helper.c index 47063b0a57..997b21d389 100644 --- a/target/xtensa/mmu_helper.c +++ b/target/xtensa/mmu_helper.c @@ -33,6 +33,7 @@ #include "exec/helper-proto.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" +#include "exec/page-protection.h" #define XTENSA_MPU_SEGMENT_MASK 0x0000001f #define XTENSA_MPU_ACC_RIGHTS_MASK 0x00000f00 diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c index 496754ba57..028d4e0a1c 100644 --- a/target/xtensa/op_helper.c +++ b/target/xtensa/op_helper.c @@ -28,6 +28,7 @@ #include "qemu/osdep.h" #include "cpu.h" #include "exec/helper-proto.h" +#include "exec/page-protection.h" #include "qemu/host-utils.h" #include "exec/exec-all.h" #include "qemu/atomic.h" From patchwork Sun Apr 28 21:49:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792911 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417540wrh; Sun, 28 Apr 2024 14:51:01 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWzhJXLR4509MIjdjeeLo6DwHLVc/3tYEKQLG6QOwm+x6WFz53+eVv3aj2NN6D/DowYfi/2kRK3+cXkAk11k/Qw X-Google-Smtp-Source: AGHT+IGVJM95p4Ta9MUbtWuNktTEm4XqQsGj1/CZqyZh8LZSJgsu5UwEXbZ4LOmw+vjXGkmqj1kB X-Received: by 2002:ac8:5956:0:b0:43a:daca:2ebb with SMTP id 22-20020ac85956000000b0043adaca2ebbmr1937470qtz.30.1714341060850; Sun, 28 Apr 2024 14:51:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341060; cv=none; d=google.com; s=arc-20160816; b=quc8U++R3g44mXIt3tWNgtFrnF5svXFTZZVueKlEmNNOuw8jiVyv0wsduJvL9oUfuW Pe40Ai4YMVzSexrnFlXFrPVdAyr+EDtIWQ5fVaa4WqMyK4/Vec6dmo6dozM6zcxQUQNr 3iZUjACd4Vxnl+ARXd4mzxq+6jYFeh/Lex2eh0oUUzax2G3B0KpFQJIrs+ulJkWnE9yB Owf21I8qZG1/WKGz4WuHVi5t7+zjUUBS3ojwHgLdIg+4Hc+jXu3TDDcL+rQg1HluT6bQ xIkiLfSWEGKlKPaOiaiT7p/XWuaJdRHD2A+NYsJ0WH86hHSPLg+YxA3iEjpWp2JujKKb Gbpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=5vkuOqkqjEkB9PdGqDT2q032XYrx9jU6/rWVH+r61ws=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=XC1tewmOJ0iYB5jT/axi4k0ACRXmt9fKr5Anb2mq1U+GXyFwGxW69OdC7rWQlXQm5t 9f80SV+IWbEkieEEBLDpeGF/7Yv5pJmKYhzpJMAhRDy/ZnvqkQBp2T6TI5gKC5ojSEh8 bMutFPqralGhO/S/YKUm5E0sAknYj0rCHb4jXWh2ZpSUHxiaGhVjTyYJBu1J7lHuTZsc gwX/ndQBCxQHASoAfMlu3rd/2at7BCl9NpIJm0uOJGShIte+nXgnBqu1+IfS9Gspq4MS kNSP4X8XHoNV+HF0DkTG8B98BfLMO6KVok5/G2X4Ysg3qBWpCVqmKobD0SLR2VvDjVvS ZVVA==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dbOj8tNP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id hg23-20020a05622a611700b00436e0ec2559si24798782qtb.468.2024.04.28.14.51.00 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:00 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dbOj8tNP; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPY-00034E-M5; Sun, 28 Apr 2024 17:50:18 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPW-00033y-Ds for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:14 -0400 Received: from mail-lj1-x236.google.com ([2a00:1450:4864:20::236]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPP-0001Iz-92 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:08 -0400 Received: by mail-lj1-x236.google.com with SMTP id 38308e7fff4ca-2db13ca0363so59890321fa.3 for ; Sun, 28 Apr 2024 14:50:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714341005; x=1714945805; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=5vkuOqkqjEkB9PdGqDT2q032XYrx9jU6/rWVH+r61ws=; b=dbOj8tNPy8Wo+JN3IQ4HIDARKLVOD2WQjE/2t0JU+D4p8nExcfD/hdhLA2Lkk/LPIZ m6OhfOwGeUAUBSWu6ZKEFbV9gWADGAZUP2ccZkveT0ZZanz8ZDLGnhfjiS5G1EsV5pbQ Uc8CxwuA+TiuM/jYK0Q7lx6+7OxlWhqMKouGGiACyd1tI1YUlqnN5yOPvCDwJfIvpkPx zjDPu8LGhM9c+TCIg0jrGCvMc1UgxmP+qN47qVC/uD/CPxpOEk80uDnXYqAYJso1oK1t 267B5laN0h2vwrG+D7Zq//4OTKowIOleld7M+5ttwNtH5kblgKhtOlz8zEduooWqMHiq 5l/g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714341005; x=1714945805; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=5vkuOqkqjEkB9PdGqDT2q032XYrx9jU6/rWVH+r61ws=; b=XcWW1d2VxqKXXJtLOrI4zWLEfD9dKUglkBVfG5EGrjxRDeAO3ObVjKw0YhmVIEUaos j6fO4+5Oq0Ku/f7Hn9jHlsldgpqGaH2aoz3B7tganODskIuYR0yx/3Jk96I7MRFK3XjT Xf0OkwXGeyxV3QZu4iZZ0gXOv4FWDaQvqSUW3/Mu2uZlmdZYhSirHvyoYZPDIegixjEo Tx7qHcbKnIkuPJVy3w+y9oqRrMc3usuGheSr6kz4UewClcMv4po3cMsydvKZDXM6oR7M mMlWfpdQ19dD2AWcbGv6T/J7kP2jkBMHOdI6MyIMT9YKzBqJhKP1I4uRQX4Kd0kpBMdy zMAQ== X-Gm-Message-State: AOJu0YyGUE4da7yk57XB9poiQQXNwgWouGU+Eti2H8P52xcePKmaykcK 7py4ygz/qXKAS1ba43mqEHOnzxxwg3ElHampCHnnO+HT6kEBIG54GKwQxTzsQFISuaKZ44bPchP Q X-Received: by 2002:a05:6512:45c:b0:51c:2c7e:ac92 with SMTP id y28-20020a056512045c00b0051c2c7eac92mr7068746lfk.23.1714341004957; Sun, 28 Apr 2024 14:50:04 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id z13-20020a170906434d00b00a51e5813f4fsm13361600ejm.19.2024.04.28.14.50.03 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:50:04 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 08/12] accel/tcg: Use cpu_loop_exit_requested() in cpu_loop_exec_tb() Date: Sun, 28 Apr 2024 23:49:11 +0200 Message-ID: <20240428214915.10339-9-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::236; envelope-from=philmd@linaro.org; helo=mail-lj1-x236.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Do not open-code cpu_loop_exit_requested(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- accel/tcg/cpu-exec.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 225e5fbd3e..c18a7e2b85 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -900,8 +900,6 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, vaddr pc, TranslationBlock **last_tb, int *tb_exit) { - int32_t insns_left; - trace_exec_tb(tb, pc); tb = cpu_tb_exec(cpu, tb, tb_exit); if (*tb_exit != TB_EXIT_REQUESTED) { @@ -910,8 +908,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, } *last_tb = NULL; - insns_left = qatomic_read(&cpu->neg.icount_decr.u32); - if (insns_left < 0) { + if (cpu_loop_exit_requested(cpu)) { /* Something asked us to stop executing chained TBs; just * continue round the main loop. Whatever requested the exit * will also have set something else (eg exit_request or @@ -928,7 +925,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb, /* Ensure global icount has gone forward */ icount_update(cpu); /* Refill decrementer and continue execution. */ - insns_left = MIN(0xffff, cpu->icount_budget); + int32_t insns_left = MIN(0xffff, cpu->icount_budget); cpu->neg.icount_decr.u16.low = insns_left; cpu->icount_extra = cpu->icount_budget - insns_left; From patchwork Sun Apr 28 21:49:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792914 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417634wrh; Sun, 28 Apr 2024 14:51:36 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCUbwJX/8g68ICuMoKqdIMbVYrOIIZCR1CrEoxMlf+XtyeHTXUEgXiyyvvPX6pPC9hRYyreeM2wu+PsKOO3vSRTY X-Google-Smtp-Source: AGHT+IH8CuMuh5ui8/IfmMbFV5G1pxhxVbXTU3dy6VRsI+6ztbQGoUQXQpkO9BakjqapfzZ9q8Om X-Received: by 2002:a25:ce4d:0:b0:dcd:5187:a033 with SMTP id x74-20020a25ce4d000000b00dcd5187a033mr9054597ybe.2.1714341096681; Sun, 28 Apr 2024 14:51:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341096; cv=none; d=google.com; s=arc-20160816; b=njcJo2mlvW4vg1IMN1c6aijq9nK27VRkWV85rmsDzVCihEDSVPMjnuTYM+1axkvg+F 10EuWW/CYXl4xdixPAPVmzWWvr+yRrFpq3Q5WRQiUh/yuSWH6QvWerbDFNqC5v25bSW9 UODYQXyiyi0X2Mwrjzkh/LrvxZ08g7nDSjeM+mRNYYED9KkAGTKxaZ7zbb4hhfMwLbaA pXvFLXA8ZajHvMawbATNSZhtOamQZRi6nF9WBh/NBtLFhU75msDqT05hfXQF9YbAZ+zv Ri24EcJBDg+fDEZa5WwRS0yE2NJQwo9TvsMLhyK/Jmrq/GfGwpdkahrqSIgEPeoAu5nN y9Sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=0n+ImpRw4HIvF2HMD0Mqry3BChMB8K31XsSyFCMilH8=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=oO8XD6snyR/nUE3CF2Giv9Jo6RUCo9nL71QOVhK/2oeyCoDzzhYuncnsqtCtWh7kIu RGf2HGOcQ9xPdFy5bbOBsuIK2g5LZX2ZX4tlui+YFXinBjc2wcDnQYP/GkmXn91AjqaE NN/r3tyvPni33pV/1xOmQIyEbEJWnNZF4MFZuNHifpbJdU7DCFyBZh94fRLUueV30BeV 7oqRWvjcxmjTvbNjq6mPye3nfAWGE3iheYmVQXQoFxP2XeMBLhA2V9KpmC/YzC7E89vh T54QWYYf/dMLNOSh5X9HUx3vW0Cp9PLogXABpQHSDg+EjetDdtT6hqq7lMLSa4oQvIra /euQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="l/j7oLb6"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id f31-20020a05622a1a1f00b0043ac04e697asi2939677qtb.727.2024.04.28.14.51.36 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:36 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="l/j7oLb6"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPl-0003Ax-F0; Sun, 28 Apr 2024 17:50:29 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPi-00035V-J7 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:27 -0400 Received: from mail-ed1-x535.google.com ([2a00:1450:4864:20::535]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPW-0001JO-0n for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:26 -0400 Received: by mail-ed1-x535.google.com with SMTP id 4fb4d7f45d1cf-56e1f3462caso4807725a12.3 for ; Sun, 28 Apr 2024 14:50:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714341010; x=1714945810; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=0n+ImpRw4HIvF2HMD0Mqry3BChMB8K31XsSyFCMilH8=; b=l/j7oLb6VBJricJ7aSp9NlbvLArVslOrxKocx4ulcOEWruW71vDibugY66SmscOnRZ MbUsUdLFlUYtrqwNawduWqrlMtUGoNCOYH2bKG2joHbFusL7+uc7csAMNRggKyPC8MFT nHEG1FkCh5o32eY5y8AIjQXRsnuODeJlapA5vjUTBGUDuDymsTsjuaNqs6JC27fgrfQU GGyIj4xiuVYr2x3G+J4fapqeeGld6hz184GggNDlxF+QWijDCTpiLrImTMsbsJhncfVg WmPid0b7YrhF/MwuqlY3bFsGhB10jqTLQEbUbhPgArFUNEc6SasbVKrXtVlgumAynrqq M4hA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714341010; x=1714945810; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=0n+ImpRw4HIvF2HMD0Mqry3BChMB8K31XsSyFCMilH8=; b=XskhTnGKPRmFXC5ZB84erNMvclDbITItgMuRGZyGLjBUuLc2yI7K5RAOMCvOwspnNB uDBvMk6GC8g5TGwJDry0///r+ron/PvO1qSP+oo/kQz8U+gk8b/cmCV8xE5k8NNKCGDL e3BCcNyQ1o04UIrBtmtSou2UO9tuSm3lWshTKGYvjMQ0xrvjOuRUZDdJrPqRdXuXFl6T K2I67SoyvHootJmG3X7bfba3uBjer9ViSVGBNXnqN4CkKcNVEi00H4hSxbMREaN+RK2Z 09lUjs2aD0bGwI/a8yKsNNFlQN83SOe+/zfAi8SrZ+R58ucPR3upn0nIMODuvZqywHFS r/WA== X-Gm-Message-State: AOJu0YyD5Uv6Sr13rtc6QjbydNIdzN2LQ+pNZcSy0wlJPrmLK0MmozPh beKS3/mlgtdJSWcIg12NVQMjVGcBJafelqnjKwqXsshuzixV7m7TMrJjEyZGvJoNRd0PiLIcGdD T X-Received: by 2002:a50:d752:0:b0:572:727f:d0db with SMTP id i18-20020a50d752000000b00572727fd0dbmr2475784edj.15.1714341010733; Sun, 28 Apr 2024 14:50:10 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id i32-20020a0564020f2000b005723bcad44bsm4472844eda.41.2024.04.28.14.50.09 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:50:10 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 09/12] accel/tcg: Restrict cpu_loop_exit_requested() to TCG Date: Sun, 28 Apr 2024 23:49:12 +0200 Message-ID: <20240428214915.10339-10-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::535; envelope-from=philmd@linaro.org; helo=mail-ed1-x535.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org cpu_loop_exit_requested() is specific to TCG, move it to "exec/translate-all.h". Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/exec/exec-all.h | 17 ----------------- include/exec/translate-all.h | 20 ++++++++++++++++++++ target/arm/tcg/helper-a64.c | 1 + target/s390x/tcg/mem_helper.c | 1 + 4 files changed, 22 insertions(+), 17 deletions(-) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 4c5e470581..2be7ef1809 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -29,23 +29,6 @@ #include "exec/translation-block.h" #include "qemu/clang-tsa.h" -/** - * cpu_loop_exit_requested: - * @cpu: The CPU state to be tested - * - * Indicate if somebody asked for a return of the CPU to the main loop - * (e.g., via cpu_exit() or cpu_interrupt()). - * - * This is helpful for architectures that support interruptible - * instructions. After writing back all state to registers/memory, this - * call can be used to check if it makes sense to return to the main loop - * or to continue executing the interruptible instruction. - */ -static inline bool cpu_loop_exit_requested(CPUState *cpu) -{ - return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; -} - #if !defined(CONFIG_USER_ONLY) && defined(CONFIG_TCG) /* cputlb.c */ /** diff --git a/include/exec/translate-all.h b/include/exec/translate-all.h index 85c9460c7c..dd26f70378 100644 --- a/include/exec/translate-all.h +++ b/include/exec/translate-all.h @@ -19,8 +19,28 @@ #ifndef TRANSLATE_ALL_H #define TRANSLATE_ALL_H +#include "qemu/atomic.h" #include "exec/exec-all.h" +#include "hw/core/cpu.h" +#ifdef CONFIG_TCG +/** + * cpu_loop_exit_requested: + * @cpu: The CPU state to be tested + * + * Indicate if somebody asked for a return of the CPU to the main loop + * (e.g., via cpu_exit() or cpu_interrupt()). + * + * This is helpful for architectures that support interruptible + * instructions. After writing back all state to registers/memory, this + * call can be used to check if it makes sense to return to the main loop + * or to continue executing the interruptible instruction. + */ +static inline bool cpu_loop_exit_requested(CPUState *cpu) +{ + return (int32_t)qatomic_read(&cpu->neg.icount_decr.u32) < 0; +} +#endif /* translate-all.c */ void tb_check_watchpoint(CPUState *cpu, uintptr_t retaddr); diff --git a/target/arm/tcg/helper-a64.c b/target/arm/tcg/helper-a64.c index 0ea8668ab4..f78430da0d 100644 --- a/target/arm/tcg/helper-a64.c +++ b/target/arm/tcg/helper-a64.c @@ -29,6 +29,7 @@ #include "internals.h" #include "qemu/crc32c.h" #include "exec/exec-all.h" +#include "exec/translate-all.h" #include "exec/cpu_ldst.h" #include "qemu/int128.h" #include "qemu/atomic128.h" diff --git a/target/s390x/tcg/mem_helper.c b/target/s390x/tcg/mem_helper.c index 6a308c5553..17fab5e8be 100644 --- a/target/s390x/tcg/mem_helper.c +++ b/target/s390x/tcg/mem_helper.c @@ -25,6 +25,7 @@ #include "tcg_s390x.h" #include "exec/helper-proto.h" #include "exec/exec-all.h" +#include "exec/translate-all.h" #include "exec/page-protection.h" #include "exec/cpu_ldst.h" #include "hw/core/tcg-cpu-ops.h" From patchwork Sun Apr 28 21:49:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792908 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417499wrh; Sun, 28 Apr 2024 14:50:43 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVcvwXQ8cz7W89owLkFOa4Utcx7MU7GZ8wAra7g0XyuYSNaPjZDrWIyV7DRN/A7u6YRji6pXxFH4DbfI4nHiV6e X-Google-Smtp-Source: AGHT+IHxgvKJ68mUQXO++MR50Y7p3sH8IISyBsRTj4aAR7BTKzezFTL6+ckNkakmLERCcHwewJZj X-Received: by 2002:a05:6359:5091:b0:187:1dd4:495e with SMTP id on17-20020a056359509100b001871dd4495emr10087881rwb.22.1714341043270; Sun, 28 Apr 2024 14:50:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341043; cv=none; d=google.com; s=arc-20160816; b=ZeZ3yg3i889eQdG6rfE8ZKL2DbyPm1Ldj0AVYw4tMj1EicAViWt0FNvt00LPSDVSgs k1MH/eycuStfINOpxRbLyqOHjzJ7VY3myiioYNcGr0aeqESbBP6G43xQkmobSkpSSvk0 tVzYGnpoPUhMMfuxYu2R/gzotxlFt0Jy9FkRY8vKFurhHprmUG+TXdSMW+QkPAzqo+Ue OYsXBWpXEFb+YwnjvIm73wHTZmuihi0qH/0gRJGqv/gxnCt+O1BWsePavRjJ8fK2gY74 uwDpfwtVhrNxgw3+naeKG82lwnYkE8GrHPss57FYnqzHc0Hb0sc9xdtaOIGmEo1HLH0b d1TQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=PiKDLwE364Pw013trdbS6B+l3BI8G2aZyNTUUJSMStE=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=kMEalmPP/nkzLLEdFjZCuRDZr6vmGmLVwDrXE/gEYijvxD2zJdXYFmhOy9UmTYs9Nx zBT5CQWIICk6n21XkfDEmYmXpNK/Cfss1nxf+Prfcgk+bIiiOj+mtJ1ANF4yNWB+mjHx ayeQRkvSr14zWDir3O2UzicCgYcgx9B/QDavfovHmh1qBrmC5xlNYEOgPfN/a/QahmQa Hl45QvlXlIhm4gzmQyc/dnimXaHkUUbyJW29rgz0pFXLw4mXoPI7KJxfXkpNSFz6WxX2 QNdVAXLYjAyJSBSKu4PF2BTyjciz6Gkyr5FrAu44qmtnKaXG39NrtIq91zDhVOB+/Hld ntJg==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UcCEgzjq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id ke24-20020a056214301800b006a0cac7d82fsi1875259qvb.342.2024.04.28.14.50.43 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:50:43 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UcCEgzjq; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPk-000362-BY; Sun, 28 Apr 2024 17:50:28 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPh-00035I-DT for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:25 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPb-0001Je-Kp for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:24 -0400 Received: by mail-wm1-x330.google.com with SMTP id 5b1f17b1804b1-41c1b75ca31so4419245e9.2 for ; Sun, 28 Apr 2024 14:50:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714341016; x=1714945816; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PiKDLwE364Pw013trdbS6B+l3BI8G2aZyNTUUJSMStE=; b=UcCEgzjqTqWs+LW/8Pp7vqHI9MTjATyg+9KEeyI5SxIwzPXt7jEVHm5sZwrIBEApzF OJJNvhxyu3ysg0P8TlLxY3LX4Po/Vl2yQdAM9GAv1S2FZd1Zm5TvJ/QJoRl7+vtqxmR7 WeKDBclMzLnXvFTcNAqKub+zCERiaWKsWbtT40zkX1aT0YzzNNXqRG+obM+cOoS/f0XH BfoIswGjYi/pHOJTxp237aLqAAYDnub5Zz1IMFg2YZSSGYhVGthfeC+a+IRBhHK2l/Dq R7QXQ7LBow/mCVNz5Dl47cP+klZMLkkFAtF2umGMac+bY5rHBE17ITxvu9dgosSN9mOU 9kpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714341016; x=1714945816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PiKDLwE364Pw013trdbS6B+l3BI8G2aZyNTUUJSMStE=; b=g8xs8s5pc2KOImPDnTXWKVS27l9PNS+pTzq2npsTxcP7nj92ol3IqrvXMOoFKwBaCf kpv+moBtY8Anxha8OQ991d4i2rIyLeuyI2QU2z4jygoGxYwsms2QONOOtzBDwPY1aRTS 803Dm+U+yFGzVAEaIEdTxkqWRgJ/XvLMuYRWqn57plQ2FolI50IaFNyDJQGM674kDK2H 1zmyHQMfLzCxJYxzs6jPZy+OoE/9pf+lBZYXayUNcepn7IF8uYWwuxm+Ry4Se5sYIoXR m7+H2xh/eAyQhKNI9/hLDEP0O5Hl21DVH3l2VI+MgU8GUWCLDyyZptYe3MtrPWSWNSDB Ec2Q== X-Gm-Message-State: AOJu0YyzR6CDTJU3hdQlO+ELyj/Wq5vHTkbgumkLC2c1T3g3yqabVOLp FrqaO2K3680MqsPicCk6//Svl1tOgyA8rS/nhN+GDCp8BcNhJU6sSfZ+4ltO57Zo/8etNf6baC7 z X-Received: by 2002:a05:600c:501f:b0:41b:b07a:c54c with SMTP id n31-20020a05600c501f00b0041bb07ac54cmr5546361wmr.9.1714341016281; Sun, 28 Apr 2024 14:50:16 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id k29-20020a05600c1c9d00b00418948a5eb0sm43150505wms.32.2024.04.28.14.50.15 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:50:15 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 10/12] accel/tcg: Remove pointless initialization of cflags_next_tb Date: Sun, 28 Apr 2024 23:49:13 +0200 Message-ID: <20240428214915.10339-11-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=philmd@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org cflags_next_tb is always re-initialized in the CPU Reset() handler in cpu_common_reset_hold(), no need to initialize it in cpu_common_initfn(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-13-philmd@linaro.org> --- hw/core/cpu-common.c | 1 - 1 file changed, 1 deletion(-) diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index a72d48d9e1..c4175cc4b9 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -255,7 +255,6 @@ static void cpu_common_initfn(Object *obj) /* the default value is changed by qemu_init_vcpu() for system-mode */ cpu->nr_cores = 1; cpu->nr_threads = 1; - cpu->cflags_next_tb = -1; qemu_mutex_init(&cpu->work_mutex); qemu_lockcnt_init(&cpu->in_ioctl_lock); From patchwork Sun Apr 28 21:49:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792912 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417603wrh; Sun, 28 Apr 2024 14:51:22 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVzg7YhCc7ew7/cs1H1t/2u8AC1u11FAVvBKXM0b7xSMiQC2sbeKVujNoKif0h3z8DiUpsmg2w9MC9kdBiyo5pY X-Google-Smtp-Source: AGHT+IFtT6U/amxWpBXq2HixNyu3+861Icqb9CDdQ7lKetcQI/QyO2AA3i1/oOMPMyYvp2aKkIft X-Received: by 2002:a25:dc8e:0:b0:dcc:588f:1523 with SMTP id y136-20020a25dc8e000000b00dcc588f1523mr8470599ybe.49.1714341082066; Sun, 28 Apr 2024 14:51:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341082; cv=none; d=google.com; s=arc-20160816; b=s97MgsUj+r+HVFXNV17bq64mVJzqBhLzC7d8VYgcl3krRd3Xc6KacoFFkIPCWZAS6A DsMqAZ1qZIFPdml2OqbpMs/pBEv395ArxvFRskru/I1kdOUaa+j74/yW3IvEXx0XXJdU NRteXy1HF5wXx+3yfskzav+abvylYb76sQ7F7U4FJWXAF7haJ6igFSL44fyQVs9taMno SXs7IbKEY5ZaWucZZquvFtlhVvu9Ily2wZElwdXSdm/YsEgJ2KdPsZVQP/xSSR1I7GSZ Unh55BKPDwfEnfMVZnlNKUyFkqHuVfZA/fSfrac0W2ZfAGHCRgQVLAqnA7v/b+PyGaWM xARQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=aIL7R4VGtGNdBMyw/v1blPKio2LEB3YtucwdrTq80BM=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=lNwWPZDUUB23JehL1VJ3MY23BCRM88eKjAcuN2ynrOoYpKHZUTdVX7H3cqiZeogBDe +d6Oy8qTgOJ0+iIZn7KBW0xlBKUHjJ69c054jF9uQpLN/Eg2Ecphz3efj1QXBkcSte3r K/zCJ6UlCtjtZ91EZMT3sW0XAUcHOjPWWNmQ3VY9X16JFi2dwl2iF07qTvsa2lZMqloL fFIGrTaYaBcYgyjHKIOBW7HVJQg1ZCuB/wGtLU/WiYpmEQJzWUyIUz9Q3KOD+zd3CGxG PYUVrJdxhLvZPch6EEsMZosIRnW+lLUEO/ADqMhK19267eiXl1/TiUdAB7jKAiI5J1c6 7V8A==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HQcjzlnY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z17-20020a05620a08d100b0079070165f85si17769928qkz.184.2024.04.28.14.51.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:51:22 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HQcjzlnY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPm-0003JF-Ql; Sun, 28 Apr 2024 17:50:30 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPi-00035W-PB for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:27 -0400 Received: from mail-wm1-x332.google.com ([2a00:1450:4864:20::332]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPh-0001LN-65 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:26 -0400 Received: by mail-wm1-x332.google.com with SMTP id 5b1f17b1804b1-41b79451145so20747665e9.3 for ; Sun, 28 Apr 2024 14:50:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714341022; x=1714945822; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=aIL7R4VGtGNdBMyw/v1blPKio2LEB3YtucwdrTq80BM=; b=HQcjzlnYXIoeQuq/qWlDatlGX5cdNEA7nTjv9+xJx8Q+5d1BE0Q2ezZhNemUhvEBZB g90hJg7bzgWX63ifZ2QJ048FipQOPZ4gD0ntktjhgMMPEoB7hTSgMia/WbiXrCqEw+o6 5jB8+FgFY0midSVQjVeZwSES/fMIwFCk4lwCvCI8gNxG1YhGM2LbbBpaKXSAWA+7SXHz OJVq13iHAx85tWr5m+xY36lHWB00VyjIpDeM0fwlW5KX505NKxLzopQEgis5bpAJHM47 hm3iGtSI7p279nmdtuMW+VNwt17Km0h9bp95nqG58LsAotbNLmUAmVPC8spxMGejCqnT PdGQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714341022; x=1714945822; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=aIL7R4VGtGNdBMyw/v1blPKio2LEB3YtucwdrTq80BM=; b=qo+756e65GNIftMJFwb/ekUMc6Eojp7IW/QOflMwmg2LZ4RSa8uQ7jE3WsfwUwC2Yw 4/PXogT5AVwdLmjDQ/N3LpyhKeB8JNvCEQo9YU7tmQuvlk6FLRAvp9JvLQyn3EMGtnet UJMGhl3HAnOa3r8u3Xqhf1lCUHX2ACq6mL1pc5nBY1WYtNJ6j1aPMIVhM6RVU46OWteu Bv42JsK5dAk+y0eq++6eND5Tkax5T+vYZe1VgKHKe1Yny9MZD+f8NMZHoK5TtG4R9P+N gIBr1ZLi175dcCKYBtHRKaJU2hS1DAaKNCiOE37vUr/O9nQy6uq3YrdiUIYgTDyTBABM BAeg== X-Gm-Message-State: AOJu0YyeL66YBCZ78HU9azKwxE/MGJ6NCw1+vAtAuaLODAF3n4qZ5n7g a4tlSimtwV0w5CCpL19tHA/Jp3sQcI0AIXIvDz4J11mHaBv9VjTDRtsge0TcfGR/oDBvD9frw2r v X-Received: by 2002:a05:600c:1d90:b0:41b:e55c:8e14 with SMTP id p16-20020a05600c1d9000b0041be55c8e14mr3589908wms.14.1714341021962; Sun, 28 Apr 2024 14:50:21 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id n18-20020a05600c4f9200b004169836bf9asm42844248wmq.23.2024.04.28.14.50.20 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:50:21 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 11/12] accel/tcg: Reset TCG specific fields in tcg_cpu_reset_hold() Date: Sun, 28 Apr 2024 23:49:14 +0200 Message-ID: <20240428214915.10339-12-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::332; envelope-from=philmd@linaro.org; helo=mail-wm1-x332.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rather than resetting TCG specific fields in the common cpu_common_reset_hold(), do it in tcg_cpu_reset_hold(). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-14-philmd@linaro.org> --- accel/tcg/tcg-accel-ops.c | 3 +++ hw/core/cpu-common.c | 2 -- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index 2c7b0cc09e..be99105ac5 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -85,6 +85,9 @@ static void tcg_cpu_reset_hold(CPUState *cpu) tcg_flush_jmp_cache(cpu); tlb_flush(cpu); + + qatomic_set(&cpu->neg.icount_decr.u32, 0); + cpu->neg.can_do_io = true; } /* mask must never be zero, except for A20 change call */ diff --git a/hw/core/cpu-common.c b/hw/core/cpu-common.c index c4175cc4b9..9b3efba82f 100644 --- a/hw/core/cpu-common.c +++ b/hw/core/cpu-common.c @@ -127,8 +127,6 @@ static void cpu_common_reset_hold(Object *obj, ResetType type) cpu->halted = cpu->start_powered_off; cpu->mem_io_pc = 0; cpu->icount_extra = 0; - qatomic_set(&cpu->neg.icount_decr.u32, 0); - cpu->neg.can_do_io = true; cpu->exception_index = -1; cpu->crash_occurred = false; cpu->cflags_next_tb = -1; From patchwork Sun Apr 28 21:49:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 792910 Delivered-To: patch@linaro.org Received: by 2002:adf:cc13:0:b0:346:15ad:a2a with SMTP id x19csp1417527wrh; Sun, 28 Apr 2024 14:50:53 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCULFOr8sBS0gVGDFo28+ZI/eArv1C21x8xWTs3CM+HHRrrna1ln3x+tV8fyzsnoD+o+pl+qnASn9eGJrIIxtjL8 X-Google-Smtp-Source: AGHT+IF39pNpBohBCy18w7ynQPeg5EQTWonwiCjDfTr5OKJoe3FtSzsANPfQrWmsGpsafetgTOQI X-Received: by 2002:a05:622a:289:b0:43a:dede:73b8 with SMTP id z9-20020a05622a028900b0043adede73b8mr2010007qtw.57.1714341053710; Sun, 28 Apr 2024 14:50:53 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1714341053; cv=none; d=google.com; s=arc-20160816; b=J4Lq84Vm4pYJzL+DZD52r9GvL9OANcPGd5HWUhU8KJipGnLM1vh/ssM0oWMV2ZOp2Q i2/iaCzinJpv+HKsts9BLaNRZ+GFXOsfBUsCa5Od5/YFyEX/siu5tqqYIcT/HYb6P/uq u67xnLdoTSO73Ni5yftReJ+3rxhj1wdkGU06I+/8ejN/z8ZU/GmeRQPWhgo0WBkk9OZ9 Wb4ky85aEsS/4BA42cRvysLkELnXjdwuiH8M3OD778kWIgp63sXnsM15COWZw1bUVAOt C6dPwZPCz8oJiF1zwMspK+u43j5iBuvxU4N/vXWvcaRqbpjDVZOkQiaXSq4QcOJ8P4H+ jWQw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=Cy4x2n18i3bqUd4YD4FYKJfvup24tYBl+4quvrnQ+Eg=; fh=ZXDWg7hKG7Hj19AbRuutTLw+Zvn/B9RsGUUw/YagpFI=; b=HHgnbKw2Ov/GfN16nlnRR+D+Fx6vseShUH1xbBPBmNG/2sNgdHFTEdeiE3gVCeztu7 SGFAGkylmC3YEuGTge7L4DX6QiUnAiRR+Mk3ZvhZH8Os5rq1ZSHLV7Iuv7/8h1exH22p NA8mA91VGTEqsVB1dMRQA5iogb3NHRNa1IQDLAHSkCEmzZ9Al+BnK7jt1PA2tzFmW2rm fzgJwZM+b43qgeTzYfpjuK8hN8SkQiRvWExBZA8uHy1FKJJZEz+UgG+/O/IVEW2NdAz+ r+DA11S+iIzhvKKv/7cuyLgqADiHxmERqdv+QR/ug0KoNyxP4dJef3H6M524q4xxtkD3 ExFw==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xOn9afGA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id c18-20020a05622a025200b0043aa99996aasi3896438qtx.354.2024.04.28.14.50.53 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 28 Apr 2024 14:50:53 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xOn9afGA; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1s1CPq-0003Ya-0y; Sun, 28 Apr 2024 17:50:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1s1CPo-0003Sg-6D for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:32 -0400 Received: from mail-wr1-x42c.google.com ([2a00:1450:4864:20::42c]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1s1CPl-0001NT-H5 for qemu-devel@nongnu.org; Sun, 28 Apr 2024 17:50:31 -0400 Received: by mail-wr1-x42c.google.com with SMTP id ffacd0b85a97d-34d1ede7e51so146178f8f.1 for ; Sun, 28 Apr 2024 14:50:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1714341027; x=1714945827; darn=nongnu.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Cy4x2n18i3bqUd4YD4FYKJfvup24tYBl+4quvrnQ+Eg=; b=xOn9afGAywmTu0P++cspWD6tqGLvXnz8zXTrgbmyC0cM4wRRv77y5FFGFd5chPNzfC 5acyWL1QGgP6c50dcj9S1zhbXF7y2EYHqvWCMDze479E9IrrRt9dNXFNml4aLqMxz0u7 rtUiZ4JoToOJMtKdI2++/BsaJN/BnDLOFLYO+WgqTe5aVWPAA2LctvApkk0olokh4egF tCN8T61X1KydKkCZ0Pl1yPb4pFrDnUjFW2DT9/1SSxk5zMyBEM5QXjZ47krTFjrHkLGo SVWQlMBypoD6eAe20Mu5nZE1069f0llm/UDUf5WtPNllx0+a8SOeNauQaT+U3YzxFUix Sr0w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1714341027; x=1714945827; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Cy4x2n18i3bqUd4YD4FYKJfvup24tYBl+4quvrnQ+Eg=; b=eY7YbSTnVdECweRf5Yo2x8mSKG9KXPuJDGWQ5fFSuHhsDo+ArSvIZjp5h3fsS93G85 N1cqndCwrgAQSHwYBAer3ke41bIOGfADdiCEcTEPRFy04xRu4Lwm2+rzfsiQTKek5z6a JfCBB5YnoLKHS9Uen2R0QyQxiS+9bNxEvuPG9r529YotyZ2E6HiaHvGaNYjZZmKVtWg+ s4HKrIWxDncTrhol0v/WfceeE+FZNa6z8DWiYuLmQ1WAOMi2x5nzTgPVPdWVxileRD3v V7Jjdfvai7B1RWJqPrhE82TTpxgGxRq9gmxTYya3EEYFF+tkV7yjNn0ZJ/DlCaT+qtLq /qwA== X-Gm-Message-State: AOJu0Ywqw+JsbCD9tNVG9WJDbYHv9yG23zX4fM8dasBl4/TBXyPNZK7/ P3zatHGVCe8p4ZsMQnRxbWzKCRW6hXmIgGHFoGZntXB5xN2oei8M//iY+KCJ3dcyVIHBrzE20Zi k X-Received: by 2002:a5d:6108:0:b0:34c:719e:67a5 with SMTP id v8-20020a5d6108000000b0034c719e67a5mr4400233wrt.9.1714341027525; Sun, 28 Apr 2024 14:50:27 -0700 (PDT) Received: from m1x-phil.lan ([176.176.142.130]) by smtp.gmail.com with ESMTPSA id t15-20020adfeb8f000000b00349ff2e0345sm28058576wrn.70.2024.04.28.14.50.26 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 28 Apr 2024 14:50:26 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Subject: [PATCH v2 12/12] accel/tcg: Access tcg_cflags with getter / setter Date: Sun, 28 Apr 2024 23:49:15 +0200 Message-ID: <20240428214915.10339-13-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240428214915.10339-1-philmd@linaro.org> References: <20240428214915.10339-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42c; envelope-from=philmd@linaro.org; helo=mail-wr1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Access the CPUState::tcg_cflags via tcg_cflags_has() and tcg_cflags_set() helpers. Mechanical change using the following Coccinelle spatch script: @@ expression cpu; expression flags; @@ - cpu->tcg_cflags & flags + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - (tcg_cflags_has(cpu, flags)) + tcg_cflags_has(cpu, flags) @@ expression cpu; expression flags; @@ - cpu->tcg_cflags |= flags; + tcg_cflags_set(cpu, flags); Then manually moving the declarations, and adding both tcg_cflags_has() and tcg_cflags_set() definitions. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20240427155714.53669-15-philmd@linaro.org> --- accel/tcg/internal-common.h | 3 ++- include/exec/cpu-common.h | 7 +++++++ include/exec/exec-all.h | 3 --- accel/tcg/cpu-exec.c | 10 ++++++++++ accel/tcg/tcg-accel-ops.c | 2 +- linux-user/mmap.c | 8 ++++---- linux-user/syscall.c | 4 ++-- target/arm/cpu.c | 2 +- target/avr/cpu.c | 2 +- target/hexagon/cpu.c | 2 +- target/hppa/cpu.c | 2 +- target/i386/cpu.c | 2 +- target/i386/helper.c | 2 +- target/loongarch/cpu.c | 2 +- target/microblaze/cpu.c | 2 +- target/mips/tcg/exception.c | 2 +- target/mips/tcg/sysemu/special_helper.c | 2 +- target/openrisc/cpu.c | 2 +- target/riscv/tcg/tcg-cpu.c | 4 ++-- target/rx/cpu.c | 2 +- target/sh4/cpu.c | 4 ++-- target/sparc/cpu.c | 2 +- target/tricore/cpu.c | 2 +- 23 files changed, 44 insertions(+), 29 deletions(-) diff --git a/accel/tcg/internal-common.h b/accel/tcg/internal-common.h index edefd0dcb7..ead53cb8a5 100644 --- a/accel/tcg/internal-common.h +++ b/accel/tcg/internal-common.h @@ -9,6 +9,7 @@ #ifndef ACCEL_TCG_INTERNAL_COMMON_H #define ACCEL_TCG_INTERNAL_COMMON_H +#include "exec/cpu-common.h" #include "exec/translation-block.h" extern int64_t max_delay; @@ -20,7 +21,7 @@ extern int64_t max_advance; */ static inline bool cpu_in_serial_context(CPUState *cs) { - return !(cs->tcg_cflags & CF_PARALLEL) || cpu_in_exclusive_context(cs); + return !tcg_cflags_has(cs, CF_PARALLEL) || cpu_in_exclusive_context(cs); } #endif diff --git a/include/exec/cpu-common.h b/include/exec/cpu-common.h index 78f2c381b1..8bc397e251 100644 --- a/include/exec/cpu-common.h +++ b/include/exec/cpu-common.h @@ -178,6 +178,13 @@ int cpu_memory_rw_debug(CPUState *cpu, vaddr addr, void list_cpus(void); #ifdef CONFIG_TCG + +bool tcg_cflags_has(CPUState *cpu, uint32_t flags); +void tcg_cflags_set(CPUState *cpu, uint32_t flags); + +/* current cflags for hashing/comparison */ +uint32_t curr_cflags(CPUState *cpu); + /** * cpu_unwind_state_data: * @cpu: the cpu context diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 2be7ef1809..544e35dd24 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -493,9 +493,6 @@ static inline void tb_set_page_addr1(TranslationBlock *tb, #endif } -/* current cflags for hashing/comparison */ -uint32_t curr_cflags(CPUState *cpu); - /* TranslationBlock invalidate API */ void tb_phys_invalidate(TranslationBlock *tb, tb_page_addr_t page_addr); void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t last); diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index c18a7e2b85..9af66bc191 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -147,6 +147,16 @@ static void init_delay_params(SyncClocks *sc, const CPUState *cpu) } #endif /* CONFIG USER ONLY */ +bool tcg_cflags_has(CPUState *cpu, uint32_t flags) +{ + return cpu->tcg_cflags & flags; +} + +void tcg_cflags_set(CPUState *cpu, uint32_t flags) +{ + cpu->tcg_cflags |= flags; +} + uint32_t curr_cflags(CPUState *cpu) { uint32_t cflags = cpu->tcg_cflags; diff --git a/accel/tcg/tcg-accel-ops.c b/accel/tcg/tcg-accel-ops.c index be99105ac5..7ac5f0c974 100644 --- a/accel/tcg/tcg-accel-ops.c +++ b/accel/tcg/tcg-accel-ops.c @@ -62,7 +62,7 @@ void tcg_cpu_init_cflags(CPUState *cpu, bool parallel) cflags |= parallel ? CF_PARALLEL : 0; cflags |= icount_enabled() ? CF_USE_ICOUNT : 0; - cpu->tcg_cflags |= cflags; + tcg_cflags_set(cpu, cflags); } void tcg_cpu_destroy(CPUState *cpu) diff --git a/linux-user/mmap.c b/linux-user/mmap.c index d9e6c51af4..004979d8bc 100644 --- a/linux-user/mmap.c +++ b/linux-user/mmap.c @@ -960,8 +960,8 @@ abi_long target_mmap(abi_ulong start, abi_ulong len, int target_prot, */ if (ret != -1 && (flags & MAP_TYPE) != MAP_PRIVATE) { CPUState *cpu = thread_cpu; - if (!(cpu->tcg_cflags & CF_PARALLEL)) { - cpu->tcg_cflags |= CF_PARALLEL; + if (!tcg_cflags_has(cpu, CF_PARALLEL)) { + tcg_cflags_set(cpu, CF_PARALLEL); tb_flush(cpu); } } @@ -1400,8 +1400,8 @@ abi_ulong target_shmat(CPUArchState *cpu_env, int shmid, * supported by the host -- anything that requires EXCP_ATOMIC will not * be atomic with respect to an external process. */ - if (!(cpu->tcg_cflags & CF_PARALLEL)) { - cpu->tcg_cflags |= CF_PARALLEL; + if (!tcg_cflags_has(cpu, CF_PARALLEL)) { + tcg_cflags_set(cpu, CF_PARALLEL); tb_flush(cpu); } diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 6a492c9d35..1b42e80f9a 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -6583,8 +6583,8 @@ static int do_fork(CPUArchState *env, unsigned int flags, abi_ulong newsp, * generate code for parallel execution and flush old translations. * Do this now so that the copy gets CF_PARALLEL too. */ - if (!(cpu->tcg_cflags & CF_PARALLEL)) { - cpu->tcg_cflags |= CF_PARALLEL; + if (!tcg_cflags_has(cpu, CF_PARALLEL)) { + tcg_cflags_set(cpu, CF_PARALLEL); tb_flush(cpu); } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index a152def241..b9cff9043b 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1938,7 +1938,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) /* Use pc-relative instructions in system-mode */ - cs->tcg_cflags |= CF_PCREL; + tcg_cflags_set(cs, CF_PCREL); #endif /* If we needed to query the host kernel for the CPU features diff --git a/target/avr/cpu.c b/target/avr/cpu.c index 71ce62a4c2..f53e1192b1 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -55,7 +55,7 @@ static int avr_cpu_mmu_index(CPUState *cs, bool ifetch) static void avr_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu_env(cs)->pc_w = tb->pc / 2; /* internally PC points to words */ } diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index a56bb4b075..64cc05cca7 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -257,7 +257,7 @@ static vaddr hexagon_cpu_get_pc(CPUState *cs) static void hexagon_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu_env(cs)->gpr[HEX_REG_PC] = tb->pc; } diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 3831cb6db2..393a81988d 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -48,7 +48,7 @@ static void hppa_cpu_synchronize_from_tb(CPUState *cs, { HPPACPU *cpu = HPPA_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); #ifdef CONFIG_USER_ONLY cpu->env.iaoq_f = tb->pc; diff --git a/target/i386/cpu.c b/target/i386/cpu.c index fa1ea3735d..5ff3f92fe4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7371,7 +7371,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) #if defined(CONFIG_TCG) && !defined(CONFIG_USER_ONLY) /* Use pc-relative instructions in system-mode */ - cs->tcg_cflags |= CF_PCREL; + tcg_cflags_set(cs, CF_PCREL); #endif if (cpu->apic_id == UNASSIGNED_APIC_ID) { diff --git a/target/i386/helper.c b/target/i386/helper.c index 23ccb23a5b..48d1513a35 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -523,7 +523,7 @@ static inline target_ulong get_memio_eip(CPUX86State *env) } /* Per x86_restore_state_to_opc. */ - if (cs->tcg_cflags & CF_PCREL) { + if (tcg_cflags_has(cs, CF_PCREL)) { return (env->eip & TARGET_PAGE_MASK) | data[0]; } else { return data[0] - env->segs[R_CS].base; diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c index bac84dca7a..e488a8fa9c 100644 --- a/target/loongarch/cpu.c +++ b/target/loongarch/cpu.c @@ -336,7 +336,7 @@ static bool loongarch_cpu_exec_interrupt(CPUState *cs, int interrupt_request) static void loongarch_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); set_pc(cpu_env(cs), tb->pc); } diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index 9eb7374ccd..41ad47d04c 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -99,7 +99,7 @@ static void mb_cpu_synchronize_from_tb(CPUState *cs, { MicroBlazeCPU *cpu = MICROBLAZE_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; cpu->env.iflags = tb->flags & IFLAGS_TB_MASK; } diff --git a/target/mips/tcg/exception.c b/target/mips/tcg/exception.c index 13275d1ded..4886d087b2 100644 --- a/target/mips/tcg/exception.c +++ b/target/mips/tcg/exception.c @@ -81,7 +81,7 @@ void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { CPUMIPSState *env = cpu_env(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); env->active_tc.PC = tb->pc; env->hflags &= ~MIPS_HFLAG_BMASK; env->hflags |= tb->flags & MIPS_HFLAG_BMASK; diff --git a/target/mips/tcg/sysemu/special_helper.c b/target/mips/tcg/sysemu/special_helper.c index 5baa25348e..9ce5e2ceac 100644 --- a/target/mips/tcg/sysemu/special_helper.c +++ b/target/mips/tcg/sysemu/special_helper.c @@ -93,7 +93,7 @@ bool mips_io_recompile_replay_branch(CPUState *cs, const TranslationBlock *tb) CPUMIPSState *env = cpu_env(cs); if ((env->hflags & MIPS_HFLAG_BMASK) != 0 - && !(cs->tcg_cflags & CF_PCREL) && env->active_tc.PC != tb->pc) { + && !tcg_cflags_has(cs, CF_PCREL) && env->active_tc.PC != tb->pc) { env->active_tc.PC -= (env->hflags & MIPS_HFLAG_B16 ? 2 : 4); env->hflags &= ~MIPS_HFLAG_BMASK; return true; diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index d711035cf5..fdaaa09fc8 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -45,7 +45,7 @@ static void openrisc_cpu_synchronize_from_tb(CPUState *cs, { OpenRISCCPU *cpu = OPENRISC_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; } diff --git a/target/riscv/tcg/tcg-cpu.c b/target/riscv/tcg/tcg-cpu.c index b5b95e052d..40054a391a 100644 --- a/target/riscv/tcg/tcg-cpu.c +++ b/target/riscv/tcg/tcg-cpu.c @@ -96,7 +96,7 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, CPURISCVState *env = &cpu->env; RISCVMXL xl = FIELD_EX32(tb->flags, TB_FLAGS, XL); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); if (xl == MXL_RV32) { env->pc = (int32_t) tb->pc; @@ -890,7 +890,7 @@ static bool riscv_tcg_cpu_realize(CPUState *cs, Error **errp) CPURISCVState *env = &cpu->env; Error *local_err = NULL; - CPU(cs)->tcg_cflags |= CF_PCREL; + tcg_cflags_set(CPU(cs), CF_PCREL); if (cpu->cfg.ext_sstc) { riscv_timer_init(cpu); diff --git a/target/rx/cpu.c b/target/rx/cpu.c index c1a592e893..8a584f0a11 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -46,7 +46,7 @@ static void rx_cpu_synchronize_from_tb(CPUState *cs, { RXCPU *cpu = RX_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; } diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 43e35ec2ca..618aa7154e 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -47,7 +47,7 @@ static void superh_cpu_synchronize_from_tb(CPUState *cs, { SuperHCPU *cpu = SUPERH_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; cpu->env.flags = tb->flags & TB_FLAG_ENVFLAGS_MASK; } @@ -74,7 +74,7 @@ static bool superh_io_recompile_replay_branch(CPUState *cs, CPUSH4State *env = cpu_env(cs); if ((env->flags & (TB_FLAG_DELAY_SLOT | TB_FLAG_DELAY_SLOT_COND)) - && !(cs->tcg_cflags & CF_PCREL) && env->pc != tb->pc) { + && !tcg_cflags_has(cs, CF_PCREL) && env->pc != tb->pc) { env->pc -= 2; env->flags &= ~(TB_FLAG_DELAY_SLOT | TB_FLAG_DELAY_SLOT_COND); return true; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 485d416925..685485c654 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -702,7 +702,7 @@ static void sparc_cpu_synchronize_from_tb(CPUState *cs, { SPARCCPU *cpu = SPARC_CPU(cs); - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu->env.pc = tb->pc; cpu->env.npc = tb->cs_base; } diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index 8f9b72c3a0..bdefb84511 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -47,7 +47,7 @@ static vaddr tricore_cpu_get_pc(CPUState *cs) static void tricore_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { - tcg_debug_assert(!(cs->tcg_cflags & CF_PCREL)); + tcg_debug_assert(!tcg_cflags_has(cs, CF_PCREL)); cpu_env(cs)->PC = tb->pc; }