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Tsirkin" , Peter Maydell , qemu-arm@nongnu.org (open list:ARM TCG CPUs) Subject: [PULL 01/11] tests/tcg: don't append QEMU_OPTS for armv6m-undef test Date: Wed, 15 May 2024 21:23:24 +0100 Message-Id: <20240515202334.710324-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12f; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x12f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org We don't want to build on the default machine setup here but define a custom one for the microbit. Reviewed-by: Pierrick Bouvier Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-2-alex.bennee@linaro.org> diff --git a/tests/tcg/arm/Makefile.softmmu-target b/tests/tcg/arm/Makefile.softmmu-target index 4c9264057f..39e01ce49d 100644 --- a/tests/tcg/arm/Makefile.softmmu-target +++ b/tests/tcg/arm/Makefile.softmmu-target @@ -16,7 +16,7 @@ test-armv6m-undef: test-armv6m-undef.S $< -o $@ -nostdlib -N -static \ -T $(ARM_SRC)/$@.ld -run-test-armv6m-undef: QEMU_OPTS+=-semihosting -M microbit -kernel +run-test-armv6m-undef: QEMU_OPTS=-semihosting-config enable=on,target=native,chardev=output -M microbit -kernel ARM_TESTS+=test-armv6m-undef From patchwork Wed May 15 20:23:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796994 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3163965wra; Wed, 15 May 2024 13:24:15 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXQFfQLzY5aAe0TMrv4RgZRNSP3u2mkWswRvmnyoJRGcsxCJ3WDBS/miRFxnKRNV5eUd823/IGx4Er3gg7gFldA X-Google-Smtp-Source: AGHT+IEWwBR41n8Au8lbSr2iRUIQarlU2XJ4g9V9aNQ184t+AA6/rwtoMf3FY0tLH//yFjAGEfiO X-Received: by 2002:a05:6214:5d0c:b0:6a0:b3d5:c21a with SMTP id 6a1803df08f44-6a16825d773mr186390396d6.59.1715804655480; Wed, 15 May 2024 13:24:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715804655; cv=none; d=google.com; s=arc-20160816; b=mCXnzAFa745aCik/o3MHyM5fbPkk3nBT99KB8w8bHkZtXL7UiAJ1tSxfEqFDxarZbb +BvO+4TFYf7Ic8GOVRZuT4uSPGh20Ah5MVaO44nl1BNJQ2oTAKkcFnt3eo4jTMIBHilk pIjI2Q/qIQR0DT97zjzsu4SqjXLMFInMFP3vlzhc/Uqy0+gFjxRtHNoVh3b67M4Odlzc eDR9I4ipomm9FRDYcvYOFKPuz8jcSPx1yIVAmqA/ZeQy+5IPmng+YbvJlcS15hPLt3il Kkcw4sIdO3Q0lLziFGRaIOJ6bL8eUYc5EPv8j9936WZsw4Hx0o3H99+A/nN8Km4Bgadh Mpjw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=R1E2ktoxkcgN3p1HKHsTBPKrhmDDFh6CEjoDvoJe/mc=; fh=IECzyO3QAuAP9GXyv8J87Df7KMw5bMibFTserNmXDr4=; b=cJ/vG5ENuq1S/Jz+k/9TYsdR3xsHTd7kdW9PvlsJtlz0XaQ1S+Da0KSpITXjmyKO2Z WDNMoOWQsgi39dmwGj9QH3LAaBeJo+QYjkcfWi6FfIdokwQrBB/ghbeH7HnvbHeBxlzz XOToWhy8sDu/iLgoGDnPKUTkFjeMNRgi0x5aElW+AWohkxmTx+jCavio8LxqTXBRl1Ph 13cL68hcxS1sfpK5kiJVD+u3TwA18Fk7EActGtrG7FvFt3r9nBOI+qR8QwiDyDvXnVVk kMMpCVnBBouXni68xyXX1vR/Kpc9NXc5jYD2I6E/ofFc6KueTRU1hQJ0JHibKiw4KJlj 1EQQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PFPXZve0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , Cornelia Huck , Paolo Bonzini Subject: [PULL 02/11] scripts/update-linux-header.sh: be more src tree friendly Date: Wed, 15 May 2024 21:23:25 +0100 Message-Id: <20240515202334.710324-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12b; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x12b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Running "install_headers" in the Linux source tree is fairly unfriendly as out-of-tree builds will start complaining about the kernel source being non-pristine. As we have a temporary directory for the install we should also do the build step here. So now we have: $tmpdir/ $blddir/ $hdrdir/ Reviewed-by: Pierrick Bouvier Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-3-alex.bennee@linaro.org> diff --git a/scripts/update-linux-headers.sh b/scripts/update-linux-headers.sh index 36f3e91fe4..8963c39189 100755 --- a/scripts/update-linux-headers.sh +++ b/scripts/update-linux-headers.sh @@ -27,6 +27,8 @@ # types like "__u64". This work is done in the cp_portable function. tmpdir=$(mktemp -d) +hdrdir="$tmpdir/headers" +blddir="$tmpdir/build" linux="$1" output="$2" @@ -110,56 +112,56 @@ for arch in $ARCHLIST; do arch_var=ARCH fi - make -C "$linux" INSTALL_HDR_PATH="$tmpdir" $arch_var=$arch headers_install + make -C "$linux" O="$blddir" INSTALL_HDR_PATH="$hdrdir" $arch_var=$arch headers_install rm -rf "$output/linux-headers/asm-$arch" mkdir -p "$output/linux-headers/asm-$arch" for header in kvm.h unistd.h bitsperlong.h mman.h; do - cp "$tmpdir/include/asm/$header" "$output/linux-headers/asm-$arch" + cp "$hdrdir/include/asm/$header" "$output/linux-headers/asm-$arch" done if [ $arch = mips ]; then - cp "$tmpdir/include/asm/sgidefs.h" "$output/linux-headers/asm-mips/" - cp "$tmpdir/include/asm/unistd_o32.h" "$output/linux-headers/asm-mips/" - cp "$tmpdir/include/asm/unistd_n32.h" "$output/linux-headers/asm-mips/" - cp "$tmpdir/include/asm/unistd_n64.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/sgidefs.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/unistd_o32.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/unistd_n32.h" "$output/linux-headers/asm-mips/" + cp "$hdrdir/include/asm/unistd_n64.h" "$output/linux-headers/asm-mips/" fi if [ $arch = powerpc ]; then - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-powerpc/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-powerpc/" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-powerpc/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-powerpc/" fi rm -rf "$output/include/standard-headers/asm-$arch" mkdir -p "$output/include/standard-headers/asm-$arch" if [ $arch = s390 ]; then - cp_portable "$tmpdir/include/asm/virtio-ccw.h" "$output/include/standard-headers/asm-s390/" - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-s390/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-s390/" + cp_portable "$hdrdir/include/asm/virtio-ccw.h" "$output/include/standard-headers/asm-s390/" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-s390/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-s390/" fi if [ $arch = arm ]; then - cp "$tmpdir/include/asm/unistd-eabi.h" "$output/linux-headers/asm-arm/" - cp "$tmpdir/include/asm/unistd-oabi.h" "$output/linux-headers/asm-arm/" - cp "$tmpdir/include/asm/unistd-common.h" "$output/linux-headers/asm-arm/" + cp "$hdrdir/include/asm/unistd-eabi.h" "$output/linux-headers/asm-arm/" + cp "$hdrdir/include/asm/unistd-oabi.h" "$output/linux-headers/asm-arm/" + cp "$hdrdir/include/asm/unistd-common.h" "$output/linux-headers/asm-arm/" fi if [ $arch = arm64 ]; then - cp "$tmpdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/" + cp "$hdrdir/include/asm/sve_context.h" "$output/linux-headers/asm-arm64/" fi if [ $arch = x86 ]; then - cp "$tmpdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/" - cp "$tmpdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x86/" - cp "$tmpdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x86/" - cp_portable "$tmpdir/include/asm/kvm_para.h" "$output/include/standard-headers/asm-$arch" + cp "$hdrdir/include/asm/unistd_32.h" "$output/linux-headers/asm-x86/" + cp "$hdrdir/include/asm/unistd_x32.h" "$output/linux-headers/asm-x86/" + cp "$hdrdir/include/asm/unistd_64.h" "$output/linux-headers/asm-x86/" + cp_portable "$hdrdir/include/asm/kvm_para.h" "$output/include/standard-headers/asm-$arch" # Remove everything except the macros from bootparam.h avoiding the # unnecessary import of several video/ist/etc headers sed -e '/__ASSEMBLY__/,/__ASSEMBLY__/d' \ - "$tmpdir/include/asm/bootparam.h" > "$tmpdir/bootparam.h" - cp_portable "$tmpdir/bootparam.h" \ + "$hdrdir/include/asm/bootparam.h" > "$hdrdir/bootparam.h" + cp_portable "$hdrdir/bootparam.h" \ "$output/include/standard-headers/asm-$arch" - cp_portable "$tmpdir/include/asm/setup_data.h" \ + cp_portable "$hdrdir/include/asm/setup_data.h" \ "$output/standard-headers/asm-x86" fi if [ $arch = riscv ]; then - cp "$tmpdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/" + cp "$hdrdir/include/asm/ptrace.h" "$output/linux-headers/asm-riscv/" fi done arch= @@ -169,13 +171,13 @@ mkdir -p "$output/linux-headers/linux" for header in const.h stddef.h kvm.h vfio.h vfio_ccw.h vfio_zdev.h vhost.h \ psci.h psp-sev.h userfaultfd.h memfd.h mman.h nvme_ioctl.h \ vduse.h iommufd.h bits.h; do - cp "$tmpdir/include/linux/$header" "$output/linux-headers/linux" + cp "$hdrdir/include/linux/$header" "$output/linux-headers/linux" done rm -rf "$output/linux-headers/asm-generic" mkdir -p "$output/linux-headers/asm-generic" for header in unistd.h bitsperlong.h mman-common.h mman.h hugetlb_encode.h; do - cp "$tmpdir/include/asm-generic/$header" "$output/linux-headers/asm-generic" + cp "$hdrdir/include/asm-generic/$header" "$output/linux-headers/asm-generic" done if [ -L "$linux/source" ]; then @@ -210,23 +212,23 @@ EOF rm -rf "$output/include/standard-headers/linux" mkdir -p "$output/include/standard-headers/linux" -for i in "$tmpdir"/include/linux/*virtio*.h \ - "$tmpdir/include/linux/qemu_fw_cfg.h" \ - "$tmpdir/include/linux/fuse.h" \ - "$tmpdir/include/linux/input.h" \ - "$tmpdir/include/linux/input-event-codes.h" \ - "$tmpdir/include/linux/udmabuf.h" \ - "$tmpdir/include/linux/pci_regs.h" \ - "$tmpdir/include/linux/ethtool.h" \ - "$tmpdir/include/linux/const.h" \ - "$tmpdir/include/linux/kernel.h" \ - "$tmpdir/include/linux/vhost_types.h" \ - "$tmpdir/include/linux/sysinfo.h" \ - "$tmpdir/include/misc/pvpanic.h"; do +for i in "$hdrdir"/include/linux/*virtio*.h \ + "$hdrdir/include/linux/qemu_fw_cfg.h" \ + "$hdrdir/include/linux/fuse.h" \ + "$hdrdir/include/linux/input.h" \ + "$hdrdir/include/linux/input-event-codes.h" \ + "$hdrdir/include/linux/udmabuf.h" \ + "$hdrdir/include/linux/pci_regs.h" \ + "$hdrdir/include/linux/ethtool.h" \ + "$hdrdir/include/linux/const.h" \ + "$hdrdir/include/linux/kernel.h" \ + "$hdrdir/include/linux/vhost_types.h" \ + "$hdrdir/include/linux/sysinfo.h" \ + "$hdrdir/include/misc/pvpanic.h"; do cp_portable "$i" "$output/include/standard-headers/linux" done mkdir -p "$output/include/standard-headers/drm" -cp_portable "$tmpdir/include/drm/drm_fourcc.h" \ +cp_portable "$hdrdir/include/drm/drm_fourcc.h" \ "$output/include/standard-headers/drm" cat <$output/include/standard-headers/linux/types.h From patchwork Wed May 15 20:23:26 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 797000 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3164217wra; 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 03/11] plugins: prepare introduction of new inline ops Date: Wed, 15 May 2024 21:23:26 +0100 Message-Id: <20240515202334.710324-4-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22c; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x22c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Until now, only add_u64 was available, and all functions assumed this or were named uniquely. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-4-alex.bennee@linaro.org> diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index b535bfd5de..93da98b76c 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -69,7 +69,7 @@ union qemu_plugin_cb_sig { enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, PLUGIN_CB_MEM_REGULAR, - PLUGIN_CB_INLINE, + PLUGIN_CB_INLINE_ADD_U64, }; /* diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 49f5d1c2e4..4069d51daf 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -113,7 +113,7 @@ static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_i32(cpu_index); } -static void gen_inline_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) { GArray *arr = cb->inline_insn.entry.score->data; size_t offset = cb->inline_insn.entry.offset; @@ -158,8 +158,8 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_REGULAR: gen_udata_cb(cb); break; - case PLUGIN_CB_INLINE: - gen_inline_cb(cb); + case PLUGIN_CB_INLINE_ADD_U64: + gen_inline_add_u64_cb(cb); break; default: g_assert_not_reached(); diff --git a/plugins/core.c b/plugins/core.c index 1e58a57bf1..59771eda8f 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -316,6 +316,16 @@ static struct qemu_plugin_dyn_cb *plugin_get_dyn_cb(GArray **arr) return &g_array_index(cbs, struct qemu_plugin_dyn_cb, cbs->len - 1); } +static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_plugin_op op) +{ + switch (op) { + case QEMU_PLUGIN_INLINE_ADD_U64: + return PLUGIN_CB_INLINE_ADD_U64; + default: + g_assert_not_reached(); + } +} + void plugin_register_inline_op_on_entry(GArray **arr, enum qemu_plugin_mem_rw rw, enum qemu_plugin_op op, @@ -326,7 +336,7 @@ void plugin_register_inline_op_on_entry(GArray **arr, dyn_cb = plugin_get_dyn_cb(arr); dyn_cb->userp = NULL; - dyn_cb->type = PLUGIN_CB_INLINE; + dyn_cb->type = op_to_cb_type(op); dyn_cb->rw = rw; dyn_cb->inline_insn.entry = entry; dyn_cb->inline_insn.op = op; @@ -551,7 +561,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi, rw), vaddr, cb->userp); break; - case PLUGIN_CB_INLINE: + case PLUGIN_CB_INLINE_ADD_U64: exec_inline_op(cb, cpu->cpu_index); break; default: From patchwork Wed May 15 20:23:27 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796998 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3164112wra; Wed, 15 May 2024 13:24:48 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVnQP9XL1exNkB7UlrVKeKrlxkcYDmBqp4PntICr9jvxcLcoTA3gMWVtEEdang1qLYT9F3QbspXE3ZhHEGwCxIE X-Google-Smtp-Source: AGHT+IE/OUQcbDL68tjLnSFfpFEBxfPEDlifPXqoGagc787sB7IMVyyKn65/P12rv1Rnaaajfezy X-Received: by 2002:a05:622a:24d:b0:43a:8353:775c with SMTP id d75a77b69052e-43dfdb0706fmr187877021cf.2.1715804687892; Wed, 15 May 2024 13:24:47 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715804687; cv=none; d=google.com; s=arc-20160816; b=FFVew70XZNPl7i9P6rUCxmAorTqrMN8CTh5beuZlBaoPh9iqIUYhBk/toHuCeZxnIX PF/khSYsuMMBnCyPPX08o01fMcRkQfigESLJmJdwwquHMQg4XS2nEpQTV6t4NP40hNVY ic4i2ok14B52+q/844bsrvsEXEpNalzb5MhdLNiu6Id23sMr8Ls0o4x8fAipYZDfSBhl clM/PKKLUjjMs+9JrYFazqiaVQNzu68fdPCoW7AVbtNsr3iQIvST7vmG/rtm+ist62wC ZRfyvhelNqRxaHVGLoj6SQ3lEQGSu2BcftNQjQT91YbcgKpnSQM3dOKLyr9kKJ/orV3D lgiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=V17NPaQQwwHMnN3X6cxvn5az3/KcYU/7IcYrIEVuRSU=; fh=yDxfNhc8BtztgaqLxt926N+a7HyqjTE3aLn3d46icR0=; b=hxBauaW8MKBo/lY6jXNinHgvEkQosaW862fQcfkZiV85PyDB3Wt22Iq5/aI7bpSMd3 Fe268JlmTkSRwLpIWQxEJS1slcH4l3Zc8FHULA/W9B74gRAI5jGMy5mu2xfClRY3f0yc e/XGRrUmz+OvDgFCowYWT5Mb71JzrrGjxXlisMud3BsCRfiIuRq8hPHUHi9T6eDGIuv9 BvFZHFhwrP/L6TOriA46k/2Q0LRqOJ2Lde4aYTkuOGIZpXPyNmv/Cie5fxQ8tlBV7zU0 P4ZkEmTANcyOZI75yvfSxlg7appVbK+ceYKBbepjRa1wXF4/HtkhROo/wq06zBh4roXh hClQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=J27kGr3N; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini Subject: [PULL 04/11] plugins: extract generate ptr for qemu_plugin_u64 Date: Wed, 15 May 2024 21:23:27 +0100 Message-Id: <20240515202334.710324-5-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::636; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x636.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Plugin operations can access a scoreboard. This function factorizes code generation for accessing entry associated to a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-3-pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-5-alex.bennee@linaro.org> diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 4069d51daf..97868781fe 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -113,24 +113,33 @@ static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_i32(cpu_index); } -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) { - GArray *arr = cb->inline_insn.entry.score->data; - size_t offset = cb->inline_insn.entry.offset; - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGv_ptr ptr = tcg_temp_ebb_new_ptr(); + GArray *arr = entry.score->data; + char *base_ptr = arr->data + entry.offset; + size_t entry_size = g_array_get_element_size(arr); + + TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_muli_i32(cpu_index, cpu_index, g_array_get_element_size(arr)); + tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); + tcg_gen_addi_ptr(ptr, ptr, (intptr_t) base_ptr); + + return ptr; +} + +static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_i64 val = tcg_temp_ebb_new_i64(); - tcg_gen_addi_ptr(ptr, ptr, (intptr_t)arr->data); - tcg_gen_ld_i64(val, ptr, offset); + tcg_gen_ld_i64(val, ptr, 0); tcg_gen_addi_i64(val, val, cb->inline_insn.imm); - tcg_gen_st_i64(val, ptr, offset); + tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); From patchwork Wed May 15 20:23:28 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796997 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3164085wra; Wed, 15 May 2024 13:24:41 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCWPId/05Zf4vX9+cwfICwk0mYwobGP5AmymP6L8k4EgH605lV4Z46VVU/BY5+ykJ6Dzs827C72nykOCprMTaUVs X-Google-Smtp-Source: AGHT+IHgcP0VVpGfHu+shjXwgESgCu4jnPxlVfl4k0iYWam79X7ay/f2uUdWneAEIxF3fZEhj6Wq X-Received: by 2002:a05:620a:a14:b0:792:c0af:dda1 with SMTP id af79cd13be357-792c75abf30mr1759715885a.32.1715804680883; Wed, 15 May 2024 13:24:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1715804680; cv=none; d=google.com; s=arc-20160816; b=VhmpdE1ghFDpn4WlGIz+LbKwXE9dUz8mhqKIukJORHfp8PzQCqUKVijb0JLEWtisyb vgsUvjLdey55fCkJVS58K3JQ8u8mbiqE86d4/9XYfW9GvxZPcxJKk8tGitqxSw9rXAzY DkUuml/hY1Q99pOKH3m0rMfOUNqgV3hOq6uihFYACt7rV1bVgXSQmC3krbkBTXqIa6mz VNpSSbNbxnA4tfZlFdgdwxVF+QRljiFlMQi4Zuz5IxjQu0bNVwONGXj6RqBWwyg9l6qG 903hJDHUr5qjbYabtmb3AG7Co4XMpPM/N7xVGublQJ8TXUPJqbxEBWjnVVpYi6gu48c8 cMqw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=EdBn9/w6xK9M1sFB0icOMFme4YLRx+rfsRWreCCtfys=; fh=xnIIRjmiYFskABYN8uqYal56jW7e82oywCnOYcHDvpE=; b=KtBbowmELDIAdl1f0SCvDO2EXEQzEE/Hd5kBkgXNtmRRT4sK5116QstWLEHIdsReNT ce2bf880znzCGbM+/RYP4ALXB96UiCqYLanX/b2f58ZdzaYScy5okW0gUGhjOyWJrchP nZTWMQsAivxDXAlI8DtSvThHWyNWrFI7w/ksqQktNTcKVs4ZcWD/LDCOlPoWDwlTBRUR JbfuxS8AG3NS9lB0rTRQfk3jJmT/wVpXhTCh8vu2WJcpNupymM7uKz/h3WWLuNOXMKrZ rOTcuujXnEn4gH9gBx6YuV46UBF39l5HOe8YyeDYPJFERDo5E5Yo0fqUilpzjVYiD9iI Vv6Q==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rYPeUeMx; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 05/11] plugins: add new inline op STORE_U64 Date: Wed, 15 May 2024 21:23:28 +0100 Message-Id: <20240515202334.710324-6-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier This new operation can store an immediate u64 value to a given scoreboard. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-4-pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-6-alex.bennee@linaro.org> diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 93da98b76c..6c21a30105 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -70,6 +70,7 @@ enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, PLUGIN_CB_MEM_REGULAR, PLUGIN_CB_INLINE_ADD_U64, + PLUGIN_CB_INLINE_STORE_U64, }; /* diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index 4fc6c3739b..c5cac897a0 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -305,12 +305,12 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, * enum qemu_plugin_op - describes an inline op * * @QEMU_PLUGIN_INLINE_ADD_U64: add an immediate value uint64_t - * - * Note: currently only a single inline op is supported. + * @QEMU_PLUGIN_INLINE_STORE_U64: store an immediate value uint64_t */ enum qemu_plugin_op { QEMU_PLUGIN_INLINE_ADD_U64, + QEMU_PLUGIN_INLINE_STORE_U64, }; /** diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 97868781fe..88976289eb 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -145,6 +145,16 @@ static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_ptr(ptr); } +static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_i64 val = tcg_constant_i64(cb->inline_insn.imm); + + tcg_gen_st_i64(val, ptr, 0); + + tcg_temp_free_ptr(ptr); +} + static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { @@ -170,6 +180,9 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_INLINE_ADD_U64: gen_inline_add_u64_cb(cb); break; + case PLUGIN_CB_INLINE_STORE_U64: + gen_inline_store_u64_cb(cb); + break; default: g_assert_not_reached(); } diff --git a/plugins/core.c b/plugins/core.c index 59771eda8f..848d482fc4 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -321,6 +321,8 @@ static enum plugin_dyn_cb_type op_to_cb_type(enum qemu_plugin_op op) switch (op) { case QEMU_PLUGIN_INLINE_ADD_U64: return PLUGIN_CB_INLINE_ADD_U64; + case QEMU_PLUGIN_INLINE_STORE_U64: + return PLUGIN_CB_INLINE_STORE_U64; default: g_assert_not_reached(); } @@ -535,6 +537,9 @@ void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) case QEMU_PLUGIN_INLINE_ADD_U64: *val += cb->inline_insn.imm; break; + case QEMU_PLUGIN_INLINE_STORE_U64: + *val = cb->inline_insn.imm; + break; default: g_assert_not_reached(); } @@ -562,6 +567,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, vaddr, cb->userp); break; case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: exec_inline_op(cb, cpu->cpu_index); break; default: From patchwork Wed May 15 20:23:29 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796996 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3164039wra; Wed, 15 May 2024 13:24:32 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCXhJoDxAJGNwWrBIEmTo87D1ms23FW3pqy0NDsUelGWmhZRNBnEnJUTocyvflov0ClIrOnVuNAk1v0rLXjON3rU X-Google-Smtp-Source: AGHT+IEewETRekKGxJr7Sn7Rv1hm14L1Z4WWoDh4hGJ05hBYbwKGHjbTN19ZAh34ElMgYz1Peq3f X-Received: by 2002:a81:6cd0:0:b0:627:5e68:69e3 with SMTP id 00721157ae682-62760bb9639mr14939987b3.33.1715804671921; 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 06/11] tests/plugin/inline: add test for STORE_U64 inline op Date: Wed, 15 May 2024 21:23:29 +0100 Message-Id: <20240515202334.710324-7-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-5-pierrick.bouvier@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-7-alex.bennee@linaro.org> diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 0163e9b51c..103c3a22f6 100644 --- a/tests/plugin/inline.c +++ b/tests/plugin/inline.c @@ -22,6 +22,12 @@ typedef struct { uint64_t count_mem_inline; } CPUCount; +typedef struct { + uint64_t data_insn; + uint64_t data_tb; + uint64_t data_mem; +} CPUData; + static struct qemu_plugin_scoreboard *counts; static qemu_plugin_u64 count_tb; static qemu_plugin_u64 count_tb_inline; @@ -29,6 +35,10 @@ static qemu_plugin_u64 count_insn; static qemu_plugin_u64 count_insn_inline; static qemu_plugin_u64 count_mem; static qemu_plugin_u64 count_mem_inline; +static struct qemu_plugin_scoreboard *data; +static qemu_plugin_u64 data_insn; +static qemu_plugin_u64 data_tb; +static qemu_plugin_u64 data_mem; static uint64_t global_count_tb; static uint64_t global_count_insn; @@ -109,11 +119,13 @@ static void plugin_exit(qemu_plugin_id_t id, void *udata) stats_mem(); qemu_plugin_scoreboard_free(counts); + qemu_plugin_scoreboard_free(data); } static void vcpu_tb_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_tb, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_tb, cpu_index) == (uintptr_t) udata); g_mutex_lock(&tb_lock); max_cpu_index = MAX(max_cpu_index, cpu_index); global_count_tb++; @@ -123,6 +135,7 @@ static void vcpu_tb_exec(unsigned int cpu_index, void *udata) static void vcpu_insn_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_insn, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_insn, cpu_index) == (uintptr_t) udata); g_mutex_lock(&insn_lock); global_count_insn++; g_mutex_unlock(&insn_lock); @@ -131,9 +144,10 @@ static void vcpu_insn_exec(unsigned int cpu_index, void *udata) static void vcpu_mem_access(unsigned int cpu_index, qemu_plugin_meminfo_t info, uint64_t vaddr, - void *userdata) + void *udata) { qemu_plugin_u64_add(count_mem, cpu_index, 1); + g_assert(qemu_plugin_u64_get(data_mem, cpu_index) == (uintptr_t) udata); g_mutex_lock(&mem_lock); global_count_mem++; g_mutex_unlock(&mem_lock); @@ -141,20 +155,34 @@ static void vcpu_mem_access(unsigned int cpu_index, static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) { + void *tb_store = tb; + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + tb, QEMU_PLUGIN_INLINE_STORE_U64, data_tb, (uintptr_t) tb_store); qemu_plugin_register_vcpu_tb_exec_cb( - tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, 0); + tb, vcpu_tb_exec, QEMU_PLUGIN_CB_NO_REGS, tb_store); qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( tb, QEMU_PLUGIN_INLINE_ADD_U64, count_tb_inline, 1); for (int idx = 0; idx < qemu_plugin_tb_n_insns(tb); ++idx) { struct qemu_plugin_insn *insn = qemu_plugin_tb_get_insn(tb, idx); + void *insn_store = insn; + void *mem_store = (char *)insn_store + 0xff; + + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + insn, QEMU_PLUGIN_INLINE_STORE_U64, data_insn, + (uintptr_t) insn_store); qemu_plugin_register_vcpu_insn_exec_cb( - insn, vcpu_insn_exec, QEMU_PLUGIN_CB_NO_REGS, 0); + insn, vcpu_insn_exec, QEMU_PLUGIN_CB_NO_REGS, insn_store); qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( insn, QEMU_PLUGIN_INLINE_ADD_U64, count_insn_inline, 1); + + qemu_plugin_register_vcpu_mem_inline_per_vcpu( + insn, QEMU_PLUGIN_MEM_RW, + QEMU_PLUGIN_INLINE_STORE_U64, + data_mem, (uintptr_t) mem_store); qemu_plugin_register_vcpu_mem_cb(insn, &vcpu_mem_access, QEMU_PLUGIN_CB_NO_REGS, - QEMU_PLUGIN_MEM_RW, 0); + QEMU_PLUGIN_MEM_RW, mem_store); qemu_plugin_register_vcpu_mem_inline_per_vcpu( insn, QEMU_PLUGIN_MEM_RW, QEMU_PLUGIN_INLINE_ADD_U64, @@ -179,6 +207,11 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, counts, CPUCount, count_insn_inline); count_mem_inline = qemu_plugin_scoreboard_u64_in_struct( counts, CPUCount, count_mem_inline); + data = qemu_plugin_scoreboard_new(sizeof(CPUData)); + data_insn = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_insn); + data_tb = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_tb); + data_mem = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_mem); 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 07/11] plugins: conditional callbacks Date: Wed, 15 May 2024 21:23:30 +0100 Message-Id: <20240515202334.710324-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::12e; envelope-from=alex.bennee@linaro.org; helo=mail-lf1-x12e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Extend plugins API to support callback called with a given criteria (evaluated inline). Added functions: - qemu_plugin_register_vcpu_tb_exec_cond_cb - qemu_plugin_register_vcpu_insn_exec_cond_cb They expect as parameter a condition, a qemu_plugin_u64_t (op1) and an immediate (op2). Callback is called if op1 |cond| op2 is true. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-6-pierrick.bouvier@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-8-alex.bennee@linaro.org> diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 6c21a30105..c7b3b1cd66 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -68,6 +68,7 @@ union qemu_plugin_cb_sig { enum plugin_dyn_cb_type { PLUGIN_CB_REGULAR, + PLUGIN_CB_COND, PLUGIN_CB_MEM_REGULAR, PLUGIN_CB_INLINE_ADD_U64, PLUGIN_CB_INLINE_STORE_U64, @@ -89,6 +90,13 @@ struct qemu_plugin_dyn_cb { union qemu_plugin_cb_sig f; TCGHelperInfo *info; } regular; + struct { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; + } cond; struct { qemu_plugin_u64 entry; enum qemu_plugin_op op; diff --git a/include/qemu/qemu-plugin.h b/include/qemu/qemu-plugin.h index c5cac897a0..337de25ece 100644 --- a/include/qemu/qemu-plugin.h +++ b/include/qemu/qemu-plugin.h @@ -262,6 +262,29 @@ enum qemu_plugin_mem_rw { QEMU_PLUGIN_MEM_RW, }; +/** + * enum qemu_plugin_cond - condition to enable callback + * + * @QEMU_PLUGIN_COND_NEVER: false + * @QEMU_PLUGIN_COND_ALWAYS: true + * @QEMU_PLUGIN_COND_EQ: is equal? + * @QEMU_PLUGIN_COND_NE: is not equal? + * @QEMU_PLUGIN_COND_LT: is less than? + * @QEMU_PLUGIN_COND_LE: is less than or equal? + * @QEMU_PLUGIN_COND_GT: is greater than? + * @QEMU_PLUGIN_COND_GE: is greater than or equal? + */ +enum qemu_plugin_cond { + QEMU_PLUGIN_COND_NEVER, + QEMU_PLUGIN_COND_ALWAYS, + QEMU_PLUGIN_COND_EQ, + QEMU_PLUGIN_COND_NE, + QEMU_PLUGIN_COND_LT, + QEMU_PLUGIN_COND_LE, + QEMU_PLUGIN_COND_GT, + QEMU_PLUGIN_COND_GE, +}; + /** * typedef qemu_plugin_vcpu_tb_trans_cb_t - translation callback * @id: unique plugin id @@ -301,6 +324,32 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, enum qemu_plugin_cb_flags flags, void *userdata); +/** + * qemu_plugin_register_vcpu_tb_exec_cond_cb() - register conditional callback + * @tb: the opaque qemu_plugin_tb handle for the translation + * @cb: callback function + * @cond: condition to enable callback + * @entry: first operand for condition + * @imm: second operand for condition + * @flags: does the plugin read or write the CPU's registers? + * @userdata: any plugin data to pass to the @cb? + * + * The @cb function is called when a translated unit executes if + * entry @cond imm is true. + * If condition is QEMU_PLUGIN_COND_ALWAYS, condition is never interpreted and + * this function is equivalent to qemu_plugin_register_vcpu_tb_exec_cb. + * If condition QEMU_PLUGIN_COND_NEVER, condition is never interpreted and + * callback is never installed. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_tb_exec_cond_cb(struct qemu_plugin_tb *tb, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *userdata); + /** * enum qemu_plugin_op - describes an inline op * @@ -344,6 +393,33 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn, enum qemu_plugin_cb_flags flags, void *userdata); +/** + * qemu_plugin_register_vcpu_insn_exec_cond_cb() - conditional insn execution cb + * @insn: the opaque qemu_plugin_insn handle for an instruction + * @cb: callback function + * @flags: does the plugin read or write the CPU's registers? + * @cond: condition to enable callback + * @entry: first operand for condition + * @imm: second operand for condition + * @userdata: any plugin data to pass to the @cb? + * + * The @cb function is called when an instruction executes if + * entry @cond imm is true. + * If condition is QEMU_PLUGIN_COND_ALWAYS, condition is never interpreted and + * this function is equivalent to qemu_plugin_register_vcpu_insn_exec_cb. + * If condition QEMU_PLUGIN_COND_NEVER, condition is never interpreted and + * callback is never installed. + */ +QEMU_PLUGIN_API +void qemu_plugin_register_vcpu_insn_exec_cond_cb( + struct qemu_plugin_insn *insn, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *userdata); + /** * qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu() - insn exec inline op * @insn: the opaque qemu_plugin_insn handle for an instruction diff --git a/plugins/plugin.h b/plugins/plugin.h index 7c34f23cfc..7d4b4e21f7 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -93,6 +93,14 @@ plugin_register_dyn_cb__udata(GArray **arr, qemu_plugin_vcpu_udata_cb_t cb, enum qemu_plugin_cb_flags flags, void *udata); +void +plugin_register_dyn_cond_cb__udata(GArray **arr, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata); void plugin_register_vcpu_mem_cb(GArray **arr, void *cb, diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index 88976289eb..f2190f3511 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -132,6 +132,51 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) return ptr; } +static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) +{ + switch (cond) { + case QEMU_PLUGIN_COND_EQ: + return TCG_COND_EQ; + case QEMU_PLUGIN_COND_NE: + return TCG_COND_NE; + case QEMU_PLUGIN_COND_LT: + return TCG_COND_LTU; + case QEMU_PLUGIN_COND_LE: + return TCG_COND_LEU; + case QEMU_PLUGIN_COND_GT: + return TCG_COND_GTU; + case QEMU_PLUGIN_COND_GE: + return TCG_COND_GEU; + default: + /* ALWAYS and NEVER conditions should never reach */ + g_assert_not_reached(); + } +} + +static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +{ + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->cond.entry); + TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); + TCGv_i64 val = tcg_temp_ebb_new_i64(); + TCGLabel *after_cb = gen_new_label(); + + /* Condition should be negated, as calling the cb is the "else" path */ + TCGCond cond = tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)); + + tcg_gen_ld_i64(val, ptr, 0); + tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_ld_i32(cpu_index, tcg_env, + -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcgv_i32_temp(cpu_index), + tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + gen_set_label(after_cb); + + tcg_temp_free_i64(val); + tcg_temp_free_i32(cpu_index); + tcg_temp_free_ptr(ptr); +} + static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) { TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); @@ -177,6 +222,9 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) case PLUGIN_CB_REGULAR: gen_udata_cb(cb); break; + case PLUGIN_CB_COND: + gen_udata_cond_cb(cb); + break; case PLUGIN_CB_INLINE_ADD_U64: gen_inline_add_u64_cb(cb); break; diff --git a/plugins/api.c b/plugins/api.c index 2144da1fe8..bfab72610c 100644 --- a/plugins/api.c +++ b/plugins/api.c @@ -96,6 +96,25 @@ void qemu_plugin_register_vcpu_tb_exec_cb(struct qemu_plugin_tb *tb, } } +void qemu_plugin_register_vcpu_tb_exec_cond_cb(struct qemu_plugin_tb *tb, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + if (cond == QEMU_PLUGIN_COND_NEVER || tb->mem_only) { + return; + } + if (cond == QEMU_PLUGIN_COND_ALWAYS) { + qemu_plugin_register_vcpu_tb_exec_cb(tb, cb, flags, udata); + return; + } + plugin_register_dyn_cond_cb__udata(&tb->cbs, cb, flags, + cond, entry, imm, udata); +} + void qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( struct qemu_plugin_tb *tb, enum qemu_plugin_op op, @@ -117,6 +136,26 @@ void qemu_plugin_register_vcpu_insn_exec_cb(struct qemu_plugin_insn *insn, } } +void qemu_plugin_register_vcpu_insn_exec_cond_cb( + struct qemu_plugin_insn *insn, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + if (cond == QEMU_PLUGIN_COND_NEVER || insn->mem_only) { + return; + } + if (cond == QEMU_PLUGIN_COND_ALWAYS) { + qemu_plugin_register_vcpu_insn_exec_cb(insn, cb, flags, udata); + return; + } + plugin_register_dyn_cond_cb__udata(&insn->insn_cbs, cb, flags, + cond, entry, imm, udata); +} + void qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( struct qemu_plugin_insn *insn, enum qemu_plugin_op op, diff --git a/plugins/core.c b/plugins/core.c index 848d482fc4..332474a5bc 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -371,6 +371,38 @@ void plugin_register_dyn_cb__udata(GArray **arr, dyn_cb->regular.info = &info[flags]; } +void plugin_register_dyn_cond_cb__udata(GArray **arr, + qemu_plugin_vcpu_udata_cb_t cb, + enum qemu_plugin_cb_flags flags, + enum qemu_plugin_cond cond, + qemu_plugin_u64 entry, + uint64_t imm, + void *udata) +{ + static TCGHelperInfo info[3] = { + [QEMU_PLUGIN_CB_NO_REGS].flags = TCG_CALL_NO_RWG, + [QEMU_PLUGIN_CB_R_REGS].flags = TCG_CALL_NO_WG, + /* + * Match qemu_plugin_vcpu_udata_cb_t: + * void (*)(uint32_t, void *) + */ + [0 ... 2].typemask = (dh_typemask(void, 0) | + dh_typemask(i32, 1) | + dh_typemask(ptr, 2)) + }; + + struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); + dyn_cb->userp = udata; + dyn_cb->type = PLUGIN_CB_COND; + dyn_cb->cond.f.vcpu_udata = cb; + dyn_cb->cond.cond = cond; + dyn_cb->cond.entry = entry; + dyn_cb->cond.imm = imm; + + assert((unsigned)flags < ARRAY_SIZE(info)); + dyn_cb->cond.info = &info[flags]; +} + void plugin_register_vcpu_mem_cb(GArray **arr, void *cb, enum qemu_plugin_cb_flags flags, diff --git a/plugins/qemu-plugins.symbols b/plugins/qemu-plugins.symbols index a9fac056c7..aa0a77a319 100644 --- a/plugins/qemu-plugins.symbols +++ b/plugins/qemu-plugins.symbols @@ -27,6 +27,7 @@ qemu_plugin_register_vcpu_idle_cb; qemu_plugin_register_vcpu_init_cb; qemu_plugin_register_vcpu_insn_exec_cb; + qemu_plugin_register_vcpu_insn_exec_cond_cb; qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu; qemu_plugin_register_vcpu_mem_cb; qemu_plugin_register_vcpu_mem_inline_per_vcpu; @@ -34,6 +35,7 @@ qemu_plugin_register_vcpu_syscall_cb; qemu_plugin_register_vcpu_syscall_ret_cb; qemu_plugin_register_vcpu_tb_exec_cb; + qemu_plugin_register_vcpu_tb_exec_cond_cb; qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu; qemu_plugin_register_vcpu_tb_trans_cb; qemu_plugin_reset; From patchwork Wed May 15 20:23:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796999 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3164124wra; Wed, 15 May 2024 13:24:50 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVzlbaWMtYxlDyxcd9v2Brg4p+0+WFqcmYG2iMe0fR7Bujw8XsfcllIQmfg5g/Pr+bdpwsLce/WHyw8pqxRKMRq X-Google-Smtp-Source: AGHT+IGwivjicJ32iQb348AumZADBe3WRhPVstM4M6dyPJJPH9WD8rO5xVuID/7ZlMofIT/AdvVk X-Received: by 2002:a25:bd5:0:b0:df4:2bed:b0bb with SMTP id 3f1490d57ef6-df42bedb373mr1581787276.7.1715804690212; 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 08/11] tests/plugin/inline: add test for conditional callback Date: Wed, 15 May 2024 21:23:31 +0100 Message-Id: <20240515202334.710324-9-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=alex.bennee@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Count number of tb and insn executed using a conditional callback. We ensure the callback has been called expected number of time (per vcpu). Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-7-pierrick.bouvier@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-9-alex.bennee@linaro.org> diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c index 103c3a22f6..cd63827b7d 100644 --- a/tests/plugin/inline.c +++ b/tests/plugin/inline.c @@ -20,8 +20,14 @@ typedef struct { uint64_t count_insn_inline; uint64_t count_mem; uint64_t count_mem_inline; + uint64_t tb_cond_num_trigger; + uint64_t tb_cond_track_count; + uint64_t insn_cond_num_trigger; + uint64_t insn_cond_track_count; } CPUCount; +static const uint64_t cond_trigger_limit = 100; + typedef struct { uint64_t data_insn; uint64_t data_tb; @@ -35,6 +41,10 @@ static qemu_plugin_u64 count_insn; static qemu_plugin_u64 count_insn_inline; static qemu_plugin_u64 count_mem; static qemu_plugin_u64 count_mem_inline; +static qemu_plugin_u64 tb_cond_num_trigger; +static qemu_plugin_u64 tb_cond_track_count; +static qemu_plugin_u64 insn_cond_num_trigger; +static qemu_plugin_u64 insn_cond_track_count; static struct qemu_plugin_scoreboard *data; static qemu_plugin_u64 data_insn; static qemu_plugin_u64 data_tb; @@ -56,12 +66,19 @@ static void stats_insn(void) const uint64_t per_vcpu = qemu_plugin_u64_sum(count_insn); const uint64_t inl_per_vcpu = qemu_plugin_u64_sum(count_insn_inline); + const uint64_t cond_num_trigger = + qemu_plugin_u64_sum(insn_cond_num_trigger); + const uint64_t cond_track_left = qemu_plugin_u64_sum(insn_cond_track_count); + const uint64_t conditional = + cond_num_trigger * cond_trigger_limit + cond_track_left; printf("insn: %" PRIu64 "\n", expected); printf("insn: %" PRIu64 " (per vcpu)\n", per_vcpu); printf("insn: %" PRIu64 " (per vcpu inline)\n", inl_per_vcpu); + printf("insn: %" PRIu64 " (cond cb)\n", conditional); g_assert(expected > 0); g_assert(per_vcpu == expected); g_assert(inl_per_vcpu == expected); + g_assert(conditional == expected); } static void stats_tb(void) @@ -70,12 +87,18 @@ static void stats_tb(void) const uint64_t per_vcpu = qemu_plugin_u64_sum(count_tb); const uint64_t inl_per_vcpu = qemu_plugin_u64_sum(count_tb_inline); + const uint64_t cond_num_trigger = qemu_plugin_u64_sum(tb_cond_num_trigger); + const uint64_t cond_track_left = qemu_plugin_u64_sum(tb_cond_track_count); + const uint64_t conditional = + cond_num_trigger * cond_trigger_limit + cond_track_left; printf("tb: %" PRIu64 "\n", expected); printf("tb: %" PRIu64 " (per vcpu)\n", per_vcpu); printf("tb: %" PRIu64 " (per vcpu inline)\n", inl_per_vcpu); + printf("tb: %" PRIu64 " (conditional cb)\n", conditional); g_assert(expected > 0); g_assert(per_vcpu == expected); g_assert(inl_per_vcpu == expected); + g_assert(conditional == expected); } static void stats_mem(void) @@ -104,14 +127,35 @@ static void plugin_exit(qemu_plugin_id_t id, void *udata) const uint64_t insn_inline = qemu_plugin_u64_get(count_insn_inline, i); const uint64_t mem = qemu_plugin_u64_get(count_mem, i); const uint64_t mem_inline = qemu_plugin_u64_get(count_mem_inline, i); - printf("cpu %d: tb (%" PRIu64 ", %" PRIu64 ") | " - "insn (%" PRIu64 ", %" PRIu64 ") | " + const uint64_t tb_cond_trigger = + qemu_plugin_u64_get(tb_cond_num_trigger, i); + const uint64_t tb_cond_left = + qemu_plugin_u64_get(tb_cond_track_count, i); + const uint64_t insn_cond_trigger = + qemu_plugin_u64_get(insn_cond_num_trigger, i); + const uint64_t insn_cond_left = + qemu_plugin_u64_get(insn_cond_track_count, i); + printf("cpu %d: tb (%" PRIu64 ", %" PRIu64 + ", %" PRIu64 " * %" PRIu64 " + %" PRIu64 + ") | " + "insn (%" PRIu64 ", %" PRIu64 + ", %" PRIu64 " * %" PRIu64 " + %" PRIu64 + ") | " "mem (%" PRIu64 ", %" PRIu64 ")" "\n", - i, tb, tb_inline, insn, insn_inline, mem, mem_inline); + i, + tb, tb_inline, + tb_cond_trigger, cond_trigger_limit, tb_cond_left, + insn, insn_inline, + insn_cond_trigger, cond_trigger_limit, insn_cond_left, + mem, mem_inline); g_assert(tb == tb_inline); g_assert(insn == insn_inline); g_assert(mem == mem_inline); + g_assert(tb_cond_trigger == tb / cond_trigger_limit); + g_assert(tb_cond_left == tb % cond_trigger_limit); + g_assert(insn_cond_trigger == insn / cond_trigger_limit); + g_assert(insn_cond_left == insn % cond_trigger_limit); } stats_tb(); @@ -132,6 +176,24 @@ static void vcpu_tb_exec(unsigned int cpu_index, void *udata) g_mutex_unlock(&tb_lock); } +static void vcpu_tb_cond_exec(unsigned int cpu_index, void *udata) +{ + g_assert(qemu_plugin_u64_get(tb_cond_track_count, cpu_index) == + cond_trigger_limit); + g_assert(qemu_plugin_u64_get(data_tb, cpu_index) == (uintptr_t) udata); + qemu_plugin_u64_set(tb_cond_track_count, cpu_index, 0); + qemu_plugin_u64_add(tb_cond_num_trigger, cpu_index, 1); +} + +static void vcpu_insn_cond_exec(unsigned int cpu_index, void *udata) +{ + g_assert(qemu_plugin_u64_get(insn_cond_track_count, cpu_index) == + cond_trigger_limit); + g_assert(qemu_plugin_u64_get(data_insn, cpu_index) == (uintptr_t) udata); + qemu_plugin_u64_set(insn_cond_track_count, cpu_index, 0); + qemu_plugin_u64_add(insn_cond_num_trigger, cpu_index, 1); +} + static void vcpu_insn_exec(unsigned int cpu_index, void *udata) { qemu_plugin_u64_add(count_insn, cpu_index, 1); @@ -163,6 +225,12 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( tb, QEMU_PLUGIN_INLINE_ADD_U64, count_tb_inline, 1); + qemu_plugin_register_vcpu_tb_exec_inline_per_vcpu( + tb, QEMU_PLUGIN_INLINE_ADD_U64, tb_cond_track_count, 1); + qemu_plugin_register_vcpu_tb_exec_cond_cb( + tb, vcpu_tb_cond_exec, QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_COND_EQ, tb_cond_track_count, cond_trigger_limit, tb_store); + for (int idx = 0; idx < qemu_plugin_tb_n_insns(tb); ++idx) { struct qemu_plugin_insn *insn = qemu_plugin_tb_get_insn(tb, idx); void *insn_store = insn; @@ -176,6 +244,13 @@ static void vcpu_tb_trans(qemu_plugin_id_t id, struct qemu_plugin_tb *tb) qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( insn, QEMU_PLUGIN_INLINE_ADD_U64, count_insn_inline, 1); + qemu_plugin_register_vcpu_insn_exec_inline_per_vcpu( + insn, QEMU_PLUGIN_INLINE_ADD_U64, insn_cond_track_count, 1); + qemu_plugin_register_vcpu_insn_exec_cond_cb( + insn, vcpu_insn_cond_exec, QEMU_PLUGIN_CB_NO_REGS, + QEMU_PLUGIN_COND_EQ, insn_cond_track_count, cond_trigger_limit, + insn_store); + qemu_plugin_register_vcpu_mem_inline_per_vcpu( insn, QEMU_PLUGIN_MEM_RW, QEMU_PLUGIN_INLINE_STORE_U64, @@ -207,6 +282,14 @@ int qemu_plugin_install(qemu_plugin_id_t id, const qemu_info_t *info, counts, CPUCount, count_insn_inline); count_mem_inline = qemu_plugin_scoreboard_u64_in_struct( counts, CPUCount, count_mem_inline); + tb_cond_num_trigger = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, tb_cond_num_trigger); + tb_cond_track_count = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, tb_cond_track_count); + insn_cond_num_trigger = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, insn_cond_num_trigger); + insn_cond_track_count = qemu_plugin_scoreboard_u64_in_struct( + counts, CPUCount, insn_cond_track_count); data = qemu_plugin_scoreboard_new(sizeof(CPUData)); data_insn = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_insn); data_tb = qemu_plugin_scoreboard_u64_in_struct(data, CPUData, data_tb); From patchwork Wed May 15 20:23:32 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796995 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3163966wra; 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 09/11] plugins: distinct types for callbacks Date: Wed, 15 May 2024 21:23:32 +0100 Message-Id: <20240515202334.710324-10-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::534; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x534.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier To prevent errors when writing new types of callbacks or inline operations, we split callbacks data to distinct types. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-8-pierrick.bouvier@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-10-alex.bennee@linaro.org> diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index c7b3b1cd66..98d27dded9 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -74,34 +74,40 @@ enum plugin_dyn_cb_type { PLUGIN_CB_INLINE_STORE_U64, }; +struct qemu_plugin_regular_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_inline_cb { + qemu_plugin_u64 entry; + enum qemu_plugin_op op; + uint64_t imm; + enum qemu_plugin_mem_rw rw; +}; + +struct qemu_plugin_conditional_cb { + union qemu_plugin_cb_sig f; + TCGHelperInfo *info; + void *userp; + qemu_plugin_u64 entry; + enum qemu_plugin_cond cond; + uint64_t imm; +}; + /* * A dynamic callback has an insertion point that is determined at run-time. * Usually the insertion point is somewhere in the code cache; think for * instance of a callback to be called upon the execution of a particular TB. */ struct qemu_plugin_dyn_cb { - void *userp; enum plugin_dyn_cb_type type; - /* @rw applies to mem callbacks only (both regular and inline) */ - enum qemu_plugin_mem_rw rw; - /* fields specific to each dyn_cb type go here */ union { - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - } regular; - struct { - union qemu_plugin_cb_sig f; - TCGHelperInfo *info; - qemu_plugin_u64 entry; - enum qemu_plugin_cond cond; - uint64_t imm; - } cond; - struct { - qemu_plugin_u64 entry; - enum qemu_plugin_op op; - uint64_t imm; - } inline_insn; + struct qemu_plugin_regular_cb regular; + struct qemu_plugin_conditional_cb cond; + struct qemu_plugin_inline_cb inline_insn; }; }; diff --git a/plugins/plugin.h b/plugins/plugin.h index 7d4b4e21f7..80d5daa917 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,7 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index); +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); int plugin_num_vcpus(void); diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index f2190f3511..e018728573 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,13 +101,13 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } -static void gen_udata_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_call2(cb->regular.f.vcpu_udata, cb->regular.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); tcg_temp_free_i32(cpu_index); @@ -153,21 +153,21 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) } } -static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { - TCGv_ptr ptr = gen_plugin_u64_ptr(cb->cond.entry); + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGLabel *after_cb = gen_new_label(); /* Condition should be negated, as calling the cb is the "else" path */ - TCGCond cond = tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond.cond)); + TCGCond cond = tcg_invert_cond(plugin_cond_to_tcgcond(cb->cond)); tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_brcondi_i64(cond, val, cb->cond.imm, after_cb); + tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_call2(cb->cond.f.vcpu_udata, cb->cond.info, NULL, + tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); gen_set_label(after_cb); @@ -177,37 +177,37 @@ static void gen_udata_cond_cb(struct qemu_plugin_dyn_cb *cb) tcg_temp_free_ptr(ptr); } -static void gen_inline_add_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_add_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); TCGv_i64 val = tcg_temp_ebb_new_i64(); tcg_gen_ld_i64(val, ptr, 0); - tcg_gen_addi_i64(val, val, cb->inline_insn.imm); + tcg_gen_addi_i64(val, val, cb->imm); tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_i64(val); tcg_temp_free_ptr(ptr); } -static void gen_inline_store_u64_cb(struct qemu_plugin_dyn_cb *cb) +static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) { - TCGv_ptr ptr = gen_plugin_u64_ptr(cb->inline_insn.entry); - TCGv_i64 val = tcg_constant_i64(cb->inline_insn.imm); + TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); + TCGv_i64 val = tcg_constant_i64(cb->imm); tcg_gen_st_i64(val, ptr, 0); tcg_temp_free_ptr(ptr); } -static void gen_mem_cb(struct qemu_plugin_dyn_cb *cb, +static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); - tcg_gen_call4(cb->regular.f.vcpu_mem, cb->regular.info, NULL, + tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), tcgv_i64_temp(addr), @@ -220,16 +220,16 @@ static void inject_cb(struct qemu_plugin_dyn_cb *cb) { switch (cb->type) { case PLUGIN_CB_REGULAR: - gen_udata_cb(cb); + gen_udata_cb(&cb->regular); break; case PLUGIN_CB_COND: - gen_udata_cond_cb(cb); + gen_udata_cond_cb(&cb->cond); break; case PLUGIN_CB_INLINE_ADD_U64: - gen_inline_add_u64_cb(cb); + gen_inline_add_u64_cb(&cb->inline_insn); break; case PLUGIN_CB_INLINE_STORE_U64: - gen_inline_store_u64_cb(cb); + gen_inline_store_u64_cb(&cb->inline_insn); break; default: g_assert_not_reached(); @@ -240,15 +240,21 @@ static void inject_mem_cb(struct qemu_plugin_dyn_cb *cb, enum qemu_plugin_mem_rw rw, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - if (cb->rw & rw) { - switch (cb->type) { - case PLUGIN_CB_MEM_REGULAR: - gen_mem_cb(cb, meminfo, addr); - break; - default: + switch (cb->type) { + case PLUGIN_CB_MEM_REGULAR: + if (rw && cb->regular.rw) { + gen_mem_cb(&cb->regular, meminfo, addr); + } + break; + case PLUGIN_CB_INLINE_ADD_U64: + case PLUGIN_CB_INLINE_STORE_U64: + if (rw && cb->inline_insn.rw) { inject_cb(cb); - break; } + break; + default: + g_assert_not_reached(); + break; } } diff --git a/plugins/core.c b/plugins/core.c index 332474a5bc..1c85edc5e5 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -336,13 +336,13 @@ void plugin_register_inline_op_on_entry(GArray **arr, { struct qemu_plugin_dyn_cb *dyn_cb; + struct qemu_plugin_inline_cb inline_cb = { .rw = rw, + .entry = entry, + .op = op, + .imm = imm }; dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = NULL; dyn_cb->type = op_to_cb_type(op); - dyn_cb->rw = rw; - dyn_cb->inline_insn.entry = entry; - dyn_cb->inline_insn.op = op; - dyn_cb->inline_insn.imm = imm; + dyn_cb->inline_insn = inline_cb; } void plugin_register_dyn_cb__udata(GArray **arr, @@ -361,14 +361,14 @@ void plugin_register_dyn_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = udata; + struct qemu_plugin_regular_cb regular_cb = { .f.vcpu_udata = cb, + .userp = udata, + .info = &info[flags] }; dyn_cb->type = PLUGIN_CB_REGULAR; - dyn_cb->regular.f.vcpu_udata = cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info = &info[flags]; + dyn_cb->regular = regular_cb; } void plugin_register_dyn_cond_cb__udata(GArray **arr, @@ -390,17 +390,17 @@ void plugin_register_dyn_cond_cb__udata(GArray **arr, dh_typemask(i32, 1) | dh_typemask(ptr, 2)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = udata; + struct qemu_plugin_conditional_cb cond_cb = { .userp = udata, + .f.vcpu_udata = cb, + .cond = cond, + .entry = entry, + .imm = imm, + .info = &info[flags] }; dyn_cb->type = PLUGIN_CB_COND; - dyn_cb->cond.f.vcpu_udata = cb; - dyn_cb->cond.cond = cond; - dyn_cb->cond.entry = entry; - dyn_cb->cond.imm = imm; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->cond.info = &info[flags]; + dyn_cb->cond = cond_cb; } void plugin_register_vcpu_mem_cb(GArray **arr, @@ -432,15 +432,15 @@ void plugin_register_vcpu_mem_cb(GArray **arr, dh_typemask(i64, 3) | dh_typemask(ptr, 4)) }; + assert((unsigned)flags < ARRAY_SIZE(info)); struct qemu_plugin_dyn_cb *dyn_cb = plugin_get_dyn_cb(arr); - dyn_cb->userp = udata; + struct qemu_plugin_regular_cb regular_cb = { .userp = udata, + .rw = rw, + .f.vcpu_mem = cb, + .info = &info[flags] }; dyn_cb->type = PLUGIN_CB_MEM_REGULAR; - dyn_cb->rw = rw; - dyn_cb->regular.f.vcpu_mem = cb; - - assert((unsigned)flags < ARRAY_SIZE(info)); - dyn_cb->regular.info = &info[flags]; + dyn_cb->regular = regular_cb; } /* @@ -557,20 +557,20 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } -void exec_inline_op(struct qemu_plugin_dyn_cb *cb, int cpu_index) +void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) { - char *ptr = cb->inline_insn.entry.score->data->data; + char *ptr = cb->entry.score->data->data; size_t elem_size = g_array_get_element_size( - cb->inline_insn.entry.score->data); - size_t offset = cb->inline_insn.entry.offset; + cb->entry.score->data); + size_t offset = cb->entry.offset; uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size); - switch (cb->inline_insn.op) { + switch (cb->op) { case QEMU_PLUGIN_INLINE_ADD_U64: - *val += cb->inline_insn.imm; + *val += cb->imm; break; case QEMU_PLUGIN_INLINE_STORE_U64: - *val = cb->inline_insn.imm; + *val = cb->imm; break; default: g_assert_not_reached(); @@ -590,17 +590,19 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, struct qemu_plugin_dyn_cb *cb = &g_array_index(arr, struct qemu_plugin_dyn_cb, i); - if (!(rw & cb->rw)) { - break; - } switch (cb->type) { case PLUGIN_CB_MEM_REGULAR: - cb->regular.f.vcpu_mem(cpu->cpu_index, make_plugin_meminfo(oi, rw), - vaddr, cb->userp); + if (rw && cb->regular.rw) { + cb->regular.f.vcpu_mem(cpu->cpu_index, + make_plugin_meminfo(oi, rw), + vaddr, cb->regular.userp); + } break; case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: - exec_inline_op(cb, cpu->cpu_index); + if (rw && cb->inline_insn.rw) { + exec_inline_op(&cb->inline_insn, cpu->cpu_index); + } break; default: g_assert_not_reached(); From patchwork Wed May 15 20:23:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 796993 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3163967wra; 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Paolo Bonzini Subject: [PULL 10/11] plugins: extract cpu_index generate Date: Wed, 15 May 2024 21:23:33 +0100 Message-Id: <20240515202334.710324-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::630; envelope-from=alex.bennee@linaro.org; helo=mail-ej1-x630.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier Factorizes function to access current cpu index for a given vcpu. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-9-pierrick.bouvier@linaro.org> Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-11-alex.bennee@linaro.org> diff --git a/accel/tcg/plugin-gen.c b/accel/tcg/plugin-gen.c index e018728573..c9b298667f 100644 --- a/accel/tcg/plugin-gen.c +++ b/accel/tcg/plugin-gen.c @@ -101,12 +101,17 @@ static void gen_disable_mem_helper(void) offsetof(ArchCPU, env)); } -static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) +static TCGv_i32 gen_cpu_index(void) { TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + return cpu_index; +} + +static void gen_udata_cb(struct qemu_plugin_regular_cb *cb) +{ + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); @@ -121,9 +126,7 @@ static TCGv_ptr gen_plugin_u64_ptr(qemu_plugin_u64 entry) char *base_ptr = arr->data + entry.offset; size_t entry_size = g_array_get_element_size(arr); - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_muli_i32(cpu_index, cpu_index, entry_size); tcg_gen_ext_i32_ptr(ptr, cpu_index); tcg_temp_free_i32(cpu_index); @@ -156,7 +159,6 @@ static TCGCond plugin_cond_to_tcgcond(enum qemu_plugin_cond cond) static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) { TCGv_ptr ptr = gen_plugin_u64_ptr(cb->entry); - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); TCGv_i64 val = tcg_temp_ebb_new_i64(); TCGLabel *after_cb = gen_new_label(); @@ -165,15 +167,14 @@ static void gen_udata_cond_cb(struct qemu_plugin_conditional_cb *cb) tcg_gen_ld_i64(val, ptr, 0); tcg_gen_brcondi_i64(cond, val, cb->imm, after_cb); - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call2(cb->f.vcpu_udata, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_ptr_temp(tcg_constant_ptr(cb->userp))); + tcg_temp_free_i32(cpu_index); gen_set_label(after_cb); tcg_temp_free_i64(val); - tcg_temp_free_i32(cpu_index); tcg_temp_free_ptr(ptr); } @@ -203,10 +204,7 @@ static void gen_inline_store_u64_cb(struct qemu_plugin_inline_cb *cb) static void gen_mem_cb(struct qemu_plugin_regular_cb *cb, qemu_plugin_meminfo_t meminfo, TCGv_i64 addr) { - TCGv_i32 cpu_index = tcg_temp_ebb_new_i32(); - - tcg_gen_ld_i32(cpu_index, tcg_env, - -offsetof(ArchCPU, env) + offsetof(CPUState, cpu_index)); + TCGv_i32 cpu_index = gen_cpu_index(); tcg_gen_call4(cb->f.vcpu_mem, cb->info, NULL, tcgv_i32_temp(cpu_index), tcgv_i32_temp(tcg_constant_i32(meminfo)), From patchwork Wed May 15 20:23:34 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 797002 Delivered-To: patch@linaro.org Received: by 2002:a5d:452e:0:b0:34e:ceec:bfcd with SMTP id j14csp3164281wra; Wed, 15 May 2024 13:25:25 -0700 (PDT) X-Forwarded-Encrypted: i=2; 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Tsirkin" , =?utf-8?q?Alex_Benn=C3=A9e?= , Alexandre Iooss , Mahmoud Mandour Subject: [PULL 11/11] plugins: remove op from qemu_plugin_inline_cb Date: Wed, 15 May 2024 21:23:34 +0100 Message-Id: <20240515202334.710324-12-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20240515202334.710324-1-alex.bennee@linaro.org> References: <20240515202334.710324-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::530; envelope-from=alex.bennee@linaro.org; helo=mail-ed1-x530.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Pierrick Bouvier This field is not needed as the callback type already holds this information. Reviewed-by: Richard Henderson Signed-off-by: Pierrick Bouvier Message-Id: <20240502211522.346467-10-pierrick.bouvier@linaro.org> Reviewed-by: Michael S. Tsirkin Signed-off-by: Alex Bennée Message-Id: <20240514174253.694591-12-alex.bennee@linaro.org> diff --git a/include/qemu/plugin.h b/include/qemu/plugin.h index 98d27dded9..796fc13706 100644 --- a/include/qemu/plugin.h +++ b/include/qemu/plugin.h @@ -83,7 +83,6 @@ struct qemu_plugin_regular_cb { struct qemu_plugin_inline_cb { qemu_plugin_u64 entry; - enum qemu_plugin_op op; uint64_t imm; enum qemu_plugin_mem_rw rw; }; diff --git a/plugins/plugin.h b/plugins/plugin.h index 80d5daa917..30e2299a54 100644 --- a/plugins/plugin.h +++ b/plugins/plugin.h @@ -108,7 +108,9 @@ void plugin_register_vcpu_mem_cb(GArray **arr, enum qemu_plugin_mem_rw rw, void *udata); -void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index); +void exec_inline_op(enum plugin_dyn_cb_type type, + struct qemu_plugin_inline_cb *cb, + int cpu_index); int plugin_num_vcpus(void); diff --git a/plugins/core.c b/plugins/core.c index 1c85edc5e5..0726bc7f25 100644 --- a/plugins/core.c +++ b/plugins/core.c @@ -338,7 +338,6 @@ void plugin_register_inline_op_on_entry(GArray **arr, struct qemu_plugin_inline_cb inline_cb = { .rw = rw, .entry = entry, - .op = op, .imm = imm }; dyn_cb = plugin_get_dyn_cb(arr); dyn_cb->type = op_to_cb_type(op); @@ -557,7 +556,9 @@ void qemu_plugin_flush_cb(void) plugin_cb__simple(QEMU_PLUGIN_EV_FLUSH); } -void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) +void exec_inline_op(enum plugin_dyn_cb_type type, + struct qemu_plugin_inline_cb *cb, + int cpu_index) { char *ptr = cb->entry.score->data->data; size_t elem_size = g_array_get_element_size( @@ -565,11 +566,11 @@ void exec_inline_op(struct qemu_plugin_inline_cb *cb, int cpu_index) size_t offset = cb->entry.offset; uint64_t *val = (uint64_t *)(ptr + offset + cpu_index * elem_size); - switch (cb->op) { - case QEMU_PLUGIN_INLINE_ADD_U64: + switch (type) { + case PLUGIN_CB_INLINE_ADD_U64: *val += cb->imm; break; - case QEMU_PLUGIN_INLINE_STORE_U64: + case PLUGIN_CB_INLINE_STORE_U64: *val = cb->imm; break; default: @@ -601,7 +602,7 @@ void qemu_plugin_vcpu_mem_cb(CPUState *cpu, uint64_t vaddr, case PLUGIN_CB_INLINE_ADD_U64: case PLUGIN_CB_INLINE_STORE_U64: if (rw && cb->inline_insn.rw) { - exec_inline_op(&cb->inline_insn, cpu->cpu_index); + exec_inline_op(cb->type, &cb->inline_insn, cpu->cpu_index); } break; default: