From patchwork Wed May 29 08:00:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800149 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1978317BB37; Wed, 29 May 2024 08:07:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716970054; cv=none; b=rhuczeuyS4REpVT0839DHmiiQYLw7C+Q9XFJ2iLVIs7diH+8uexWwYifTpEF5dqrEYjUOVLvMXUYul6pn8Pi1Ern3dzrJpd3F1quYRNLa3BwuJK0sRHFkw301MoxK0LJ88Wiocw6QnZCNG6VyW4qEQU7FsqQFwUlaYrRAKyo6Os= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716970054; c=relaxed/simple; bh=X5xhUmYdUi/YHxJqfjY+z9LAkIgLaCslllhJ8YzjKP4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Vg/D+iTrrbCFPb+dM55r1dySD5/1uG3G/8hwwVZieHgLyIDC+Jl8zNIOSnHKABjNyDAauI5OiPGDS2j4PGu6S4AL8SqJo0SQ5leYqL5W+IgYPlxiXigYMcc4Ci0z5bvE/RXCWmsOgfiYy4kb6WVDTGIzX82ZbmLqCwvK6rhPFJo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id AFD791C00A2; Wed, 29 May 2024 17:01:29 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 01/36] sh: passing FDT address to kernel startup. Date: Wed, 29 May 2024 17:00:47 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 R4 is caller saved in SH ABI. Save it so it doesn't get corrupted until it's needed for initialization. Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven --- arch/sh/boot/compressed/head_32.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/sh/boot/compressed/head_32.S b/arch/sh/boot/compressed/head_32.S index 7bb168133dbb..6be59851122e 100644 --- a/arch/sh/boot/compressed/head_32.S +++ b/arch/sh/boot/compressed/head_32.S @@ -15,7 +15,8 @@ startup: /* Load initial status register */ mov.l init_sr, r1 ldc r1, sr - + /* Save FDT address */ + mov r4, r13 /* Move myself to proper location if necessary */ mova 1f, r0 mov.l 1f, r2 @@ -84,7 +85,7 @@ l1: /* Jump to the start of the decompressed kernel */ mov.l kernel_start_addr, r0 jmp @r0 - nop + mov r13, r4 .align 2 bss_start_addr: From patchwork Wed May 29 08:00:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800148 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E0B9C17BB2A; Wed, 29 May 2024 08:07:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716970055; cv=none; b=HXwA1wLEjo0gGY6EoTJevIcOC5EVt37UGATxrdFXebW5CSVkTcIGnBAemmBnccB+31eTNJ9akCEQUZMOl9BC7SAvQqB7S2QP6Ne5xttK3t4IPHEfJjaaydeF+i5eDfp/uk7Npnns5hIRDYOw0IeNQbhHb1Jqkic/0NHSgJNinNc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716970055; c=relaxed/simple; bh=ZOXJqoNpfJi51Vl3FuxgTIPEhYkHwt3DigpPUVNGTDo=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=BCWCHRJTCG4lSLGzxeCVJBNz6fJ51QT5IeMhHE2ltLOMfvK/rGyklXpgWSio9Szv8dWujwEnrQkPgSWZMXt+qzZBf0iofkj5dmD4D1EPky9eBD/QEwjxZflYWNykycHDQMlh7t/k/Bwpyyh3Tbf0dzuOggcabt2NCOiS/zpTLS4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 85A111C032B; Wed, 29 May 2024 17:01:31 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 02/36] sh: Kconfig unified OF supported targets. Date: Wed, 29 May 2024 17:00:48 +0900 Message-Id: <5226282870c6ea790cc4af2c723bae46658d4611.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Targets that support OF should be treated as one board. Signed-off-by: Yoshinori Sato --- arch/sh/Kconfig | 1 + arch/sh/boards/Kconfig | 23 +++++++++++++---------- 2 files changed, 14 insertions(+), 10 deletions(-) diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 5e6a3ead51fb..d6704c57f9dc 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -711,6 +711,7 @@ config ROMIMAGE_MMCIF choice prompt "Kernel command line" default CMDLINE_OVERWRITE + depends on !OF || USE_BUILTIN_DTB help Setting this option allows the kernel command line arguments to be set. diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig index 109bec4dad94..46387fd040ad 100644 --- a/arch/sh/boards/Kconfig +++ b/arch/sh/boards/Kconfig @@ -19,16 +19,9 @@ config SH_DEVICE_TREE select TIMER_OF select COMMON_CLK select GENERIC_CALIBRATE_DELAY - -config SH_JCORE_SOC - bool "J-Core SoC" - select SH_DEVICE_TREE - select CLKSRC_JCORE_PIT - select JCORE_AIC - depends on CPU_J2 - help - Select this option to include drivers core components of the - J-Core SoC, including interrupt controllers and timers. + select GENERIC_IRQ_CHIP + select SYS_SUPPORTS_PCI + select GENERIC_PCI_IOMAP if PCI config SH_SOLUTION_ENGINE bool "SolutionEngine" @@ -293,6 +286,7 @@ config SH_LANDISK bool "LANDISK" depends on CPU_SUBTYPE_SH7751R select HAVE_PCI + select SYS_SUPPORTS_PCI help I-O DATA DEVICE, INC. "LANDISK Series" support. @@ -369,6 +363,15 @@ config SH_APSH4AD0A help Select AP-SH4AD-0A if configuring for an ALPHAPROJECT AP-SH4AD-0A. +config SH_OF_BOARD + bool "General Open Firmware boards" + select SH_DEVICE_TREE + select CLKSRC_JCORE_PIT if CPU_J2 + select JCORE_AIC if CPU_J2 + select HAVE_PCI if CPU_SUBTYPE_SH7751R + help + This board means general OF supported targets. + source "arch/sh/boards/mach-r2d/Kconfig" source "arch/sh/boards/mach-highlander/Kconfig" source "arch/sh/boards/mach-sdk7780/Kconfig" From patchwork Wed May 29 08:00:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800150 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CBCD216936A; Wed, 29 May 2024 08:07:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716970054; cv=none; b=tFA95Iw9togmxA76vLNF+dD94Z5oO+W6GoJrmLkbdWBdY1kEsPilQx1spAkcZz6/cZ7taJ4EbzkJAQZ569EnS9wzR3hWlD0otRRZFYiLROHenAv/E5a0NUIh13qvRyBi+h+zE011GQ9QNnmECtBPItfjczkx6UCIFk0NdDFrafA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716970054; c=relaxed/simple; bh=+jChVBe98OHShkl2slecq/QYxzAwUnQ28RTjjeoxIWQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lVzGVNRtsvLQQ34U4pD+YqWIiAaA00Wl9TQsmDnOkpozskswslfORoPFvGCrgfDvnORC55b+wd+EGyvvzDAqkpjoeTt423cgTeFenyc1l4uQSlSbyhOWnQ+VGkx2JFsskiY79e2XtZlsw3Nnx+hwKwZ+Pa1NsTlj8EHvkDYS9rc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 4961B1C03C6; Wed, 29 May 2024 17:01:33 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 03/36] sh: Enable OF support for build and configuration. Date: Wed, 29 May 2024 17:00:49 +0900 Message-Id: <8249ec600f70f80c5a755a9e1d233af21907d7f9.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 IRQ, CLK and PCI will be migrated to a common driver framework. So if OF, disable the SH specific drivers. Signed-off-by: Yoshinori Sato --- arch/sh/Kconfig | 11 ++++++----- arch/sh/drivers/Makefile | 2 ++ arch/sh/kernel/cpu/Makefile | 9 +++++++-- arch/sh/kernel/cpu/sh4/Makefile | 3 +++ 4 files changed, 18 insertions(+), 7 deletions(-) diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index d6704c57f9dc..91c7c72bc0db 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -66,10 +66,10 @@ config SUPERH select MODULES_USE_ELF_RELA select NEED_SG_DMA_LENGTH select NO_DMA if !MMU && !DMA_COHERENT - select NO_GENERIC_PCI_IOPORT_MAP if PCI + select NO_GENERIC_PCI_IOPORT_MAP if !SH_DEVICE_TREE select OLD_SIGACTION select OLD_SIGSUSPEND - select PCI_DOMAINS if PCI + select PCI_DOMAINS if PCI && !SH_DEVICE_TREE select PERF_EVENTS select PERF_USE_VMALLOC select RTC_LIB @@ -154,7 +154,7 @@ menu "System type" # config CPU_SH2 bool - select SH_INTC + select SH_INTC if !SH_DEVICE_TREE config CPU_SH2A bool @@ -180,7 +180,7 @@ config CPU_SH4 select CPU_HAS_INTEVT select CPU_HAS_SR_RB select CPU_HAS_FPU if !CPU_SH4AL_DSP - select SH_INTC + select SH_INTC if !SH_DEVICE_TREE select SYS_SUPPORTS_SH_TMU config CPU_SH4A @@ -523,6 +523,7 @@ config SH_PCLK_FREQ config SH_CLK_CPG def_bool y + depends on !COMMON_CLK config SH_CLK_CPG_LEGACY depends on SH_CLK_CPG @@ -667,7 +668,7 @@ config BUILTIN_DTB_SOURCE kernel. config ZERO_PAGE_OFFSET - hex + hex "Zero page offset" default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ SH_7751_SOLUTION_ENGINE default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 diff --git a/arch/sh/drivers/Makefile b/arch/sh/drivers/Makefile index 8bd10b904bf9..83f609ca1eb4 100644 --- a/arch/sh/drivers/Makefile +++ b/arch/sh/drivers/Makefile @@ -5,6 +5,8 @@ obj-y += dma/ platform_early.o +ifndef CONFIG_SH_DEVICE_TREE obj-$(CONFIG_PCI) += pci/ +endif obj-$(CONFIG_PUSH_SWITCH) += push-switch.o obj-$(CONFIG_HEARTBEAT) += heartbeat.o diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index 46118236bf04..e00ebf134985 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -16,6 +16,11 @@ obj-$(CONFIG_ARCH_SHMOBILE) += shmobile/ # Common interfaces. obj-$(CONFIG_SH_ADC) += adc.o +ifndef CONFIG_COMMON_CLK +obj-y += clock.o obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o - -obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o +endif +ifndef CONFIG_GENERIC_IRQ_CHIP +obj-y += irq/ +endif +obj-y += init.o fpu.o pfc.o proc.o diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile index 02e3ee16e15c..33da4c86feff 100644 --- a/arch/sh/kernel/cpu/sh4/Makefile +++ b/arch/sh/kernel/cpu/sh4/Makefile @@ -15,6 +15,7 @@ perf-$(CONFIG_CPU_SUBTYPE_SH7750) := perf_event.o perf-$(CONFIG_CPU_SUBTYPE_SH7750S) := perf_event.o perf-$(CONFIG_CPU_SUBTYPE_SH7091) := perf_event.o +ifndef CONFIG_SH_DEVICE_TREE # CPU subtype setup obj-$(CONFIG_CPU_SUBTYPE_SH7750) += setup-sh7750.o obj-$(CONFIG_CPU_SUBTYPE_SH7750R) += setup-sh7750.o @@ -29,5 +30,7 @@ ifndef CONFIG_CPU_SH4A clock-$(CONFIG_CPU_SH4) := clock-sh4.o endif +endif # CONFIG_SH_DEVICE_TREE + obj-y += $(clock-y) obj-$(CONFIG_PERF_EVENTS) += $(perf-y) From patchwork Wed May 29 08:00:50 2024 Content-Type: text/plain; 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smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 2DD6D1C0554; Wed, 29 May 2024 17:01:35 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 04/36] dt-bindings: interrupt-controller: Add header for Renesas SH3/4 INTC. Date: Wed, 29 May 2024 17:00:50 +0900 Message-Id: <98a4466e189f5f0358b0525d96d0207398907009.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH7751 Interrupt controller priority register define. Signed-off-by: Yoshinori Sato --- .../renesas,sh7751-intc.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h diff --git a/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h new file mode 100644 index 000000000000..0543bd1b895e --- /dev/null +++ b/include/dt-bindings/interrupt-controller/renesas,sh7751-intc.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * SH3/4 INTC IPR register offsets (Address / bits) + */ + +#ifndef __DT_BINDINGS_RENESAS_SH7751_INTC +#define __DT_BINDINGS_RENESAS_SH7751_INTC + +#define IPRA 0 +#define IPRB 4 +#define IPRC 8 +#define IPRD 12 +#define INTPRI00 256 +#define IPR_B12 12 +#define IPR_B8 8 +#define IPR_B4 4 +#define IPR_B0 0 + +#endif From patchwork Wed May 29 08:00:51 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800166 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CABBF374F6; Wed, 29 May 2024 08:01:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969701; cv=none; b=nnyVuGIDE9LNde5NqknEGwX3kGujWiAUTN+3OcQsb6scS9YkqEPxL3yL3OCDfcYzNgvSt6Cejjg814JBDHeQg1likKpzx94QFZCdGIYd0+7Lhuh27Eg9/JsL75oedwf/eWUvUTrez8b6gYXQl9xw8KB1GOWZ6mdPQ579ZTKU9Tk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969701; c=relaxed/simple; bh=2Ln8/beSX9+5TT32ruO4321U5//ekhXDgwV6jyytobg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Iei59jqm7V6rhSxh0TT/MQd8/w0ZRxhxFb5jEhsqAMnadWCZJdVymprPKhbKrCeOEwfw8Efxa0QNcSDLChxxhAej6LtokPfvJNC3wIjO7ETvPkTcGbGd0z7QAo/BZzmvDrFg6o2vPWLzXIpeP0PsU+L74M0SsnPlGLcdoZVAcMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id EC6C11C0594; Wed, 29 May 2024 17:01:36 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 05/36] sh: GENERIC_IRQ_CHIP support for CONFIG_OF=y Date: Wed, 29 May 2024 17:00:51 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Remove unused function prototype. Add helper update_sr_imask. use for SH7751 irq driver. Add stub intc_finalize. Signed-off-by: Yoshinori Sato --- arch/sh/include/asm/io.h | 2 ++ arch/sh/include/asm/irq.h | 10 ++++++++-- arch/sh/kernel/cpu/Makefile | 5 +---- arch/sh/kernel/cpu/irq/imask.c | 17 +++++++++++++++++ include/linux/sh_intc.h | 7 ++++++- 5 files changed, 34 insertions(+), 7 deletions(-) diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index cf5eab840d57..5c544cf5201b 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -121,7 +121,9 @@ __BUILD_MEMORY_STRING(__raw_, q, u64) #define ioport_map ioport_map #define ioport_unmap ioport_unmap +#ifndef CONFIG_SH_DEVICE_TREE #define pci_iounmap pci_iounmap +#endif #define ioread8 ioread8 #define ioread16 ioread16 diff --git a/arch/sh/include/asm/irq.h b/arch/sh/include/asm/irq.h index 0f384b1f45ca..3d897229dcc4 100644 --- a/arch/sh/include/asm/irq.h +++ b/arch/sh/include/asm/irq.h @@ -16,8 +16,8 @@ /* * Simple Mask Register Support */ -extern void make_maskreg_irq(unsigned int irq); -extern unsigned short *irq_mask_register; + +void update_sr_imask(unsigned int irq, bool enable); /* * PINT IRQs @@ -54,4 +54,10 @@ extern void irq_finish(unsigned int irq); #include +/* SH3/4 INTC stuff */ +/* IRL level 0 - 15 */ +#define NR_IRL 15 +/* IRL0 -> IRQ16 */ +#define IRL_BASE_IRQ 16 + #endif /* __ASM_SH_IRQ_H */ diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index e00ebf134985..ad12807fae9c 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile @@ -20,7 +20,4 @@ ifndef CONFIG_COMMON_CLK obj-y += clock.o obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o endif -ifndef CONFIG_GENERIC_IRQ_CHIP -obj-y += irq/ -endif -obj-y += init.o fpu.o pfc.o proc.o +obj-y += init.o fpu.o pfc.o proc.o irq/ diff --git a/arch/sh/kernel/cpu/irq/imask.c b/arch/sh/kernel/cpu/irq/imask.c index 572585c3f2fd..7589ca7c506c 100644 --- a/arch/sh/kernel/cpu/irq/imask.c +++ b/arch/sh/kernel/cpu/irq/imask.c @@ -51,6 +51,7 @@ static inline void set_interrupt_registers(int ip) : "t"); } +#ifndef CONFIG_GENERIC_IRQ_CHIP static void mask_imask_irq(struct irq_data *data) { unsigned int irq = data->irq; @@ -83,3 +84,19 @@ void make_imask_irq(unsigned int irq) irq_set_chip_and_handler_name(irq, &imask_irq_chip, handle_level_irq, "level"); } +#else +void update_sr_imask(unsigned int irq, bool enable) +{ + if (enable) { + set_bit(irq, imask_mask); + interrupt_priority = IMASK_PRIORITY - + find_first_bit(imask_mask, IMASK_PRIORITY); + } else { + clear_bit(irq, imask_mask); + if (interrupt_priority < IMASK_PRIORITY - irq) + interrupt_priority = IMASK_PRIORITY - irq; + } + set_interrupt_registers(interrupt_priority); +} +EXPORT_SYMBOL(update_sr_imask); +#endif diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h index 27ae79191bdc..994b5b05a0d7 100644 --- a/include/linux/sh_intc.h +++ b/include/linux/sh_intc.h @@ -139,8 +139,13 @@ struct intc_desc symbol __initdata = { \ int register_intc_controller(struct intc_desc *desc); int intc_set_priority(unsigned int irq, unsigned int prio); int intc_irq_lookup(const char *chipname, intc_enum enum_id); +#ifndef CONFIG_SH_DEVICE_TREE void intc_finalize(void); - +#else +static inline void intc_finalize(void) +{ +} +#endif #ifdef CONFIG_INTC_USERIMASK int register_intc_userimask(unsigned long addr); #else From patchwork Wed May 29 08:00:52 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800473 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5C6562F37; Wed, 29 May 2024 08:01:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969703; cv=none; b=g87uWSnns+reruLL2xkPnoz/mvVqOBEfXvSWE/M0l8hjQcmN1D4dbwte7uDwDZ41nS8KtlPbYl+Fc9Xb9X6ot7fmaK5Rn7X5bqjn+62F+R1iq0OE4ggnL3iE0bysDp+dSZu3ttyGkXcrSFXvGDyVBFmUH3V98asjM6oY74oYZ4Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969703; c=relaxed/simple; bh=LQRqo2R5KpFisxDuNYQDVzcbcyFMytNT9GqRgFmxwEg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=SORMFTgm3eLi5COPV7efIJx1GZcjc7teO3o9thmgG/sGRiRwGmysA+ho6VBNW8Q+mpQuHA0K2HKMkH8k1olcg6o5kK+7cmG97Hglurfwh2Zdf/UO5b9yxI5gXdStoix7cXSXP/kW1Fvb/eEVsbGWPIH5uCxertTBSfwxylx0hF4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id B1C6F1C05A7; Wed, 29 May 2024 17:01:38 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 06/36] sh: kernel/setup Update DT support. Date: Wed, 29 May 2024 17:00:52 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Fix extrnal fdt initialize and bootargs. Signed-off-by: Yoshinori Sato --- arch/sh/Kconfig | 1 - arch/sh/kernel/setup.c | 31 ++++++++++++++++++++----------- 2 files changed, 20 insertions(+), 12 deletions(-) diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig index 91c7c72bc0db..5c9b50884995 100644 --- a/arch/sh/Kconfig +++ b/arch/sh/Kconfig @@ -712,7 +712,6 @@ config ROMIMAGE_MMCIF choice prompt "Kernel command line" default CMDLINE_OVERWRITE - depends on !OF || USE_BUILTIN_DTB help Setting this option allows the kernel command line arguments to be set. diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c index 620e5cf8ae1e..03ec6f7a1153 100644 --- a/arch/sh/kernel/setup.c +++ b/arch/sh/kernel/setup.c @@ -30,6 +30,7 @@ #include #include #include +#include #include #include #include @@ -269,8 +270,22 @@ void __ref sh_fdt_init(phys_addr_t dt_phys) void __init setup_arch(char **cmdline_p) { +#if defined(CONFIG_OF) && defined(CONFIG_OF_EARLY_FLATTREE) + if (IS_ENABLED(CONFIG_USE_BUILTIN_DTB)) { + /* Relocate Embedded DTB */ + unflatten_and_copy_device_tree(); + } else if (initial_boot_params) { + /* Reserve external DTB area */ + memblock_reserve(__pa(initial_boot_params), + fdt_totalsize(initial_boot_params)); + unflatten_device_tree(); + } + /* copy from /chosen/bootargs */ + strscpy(command_line, boot_command_line, COMMAND_LINE_SIZE); +#endif enable_mmu(); +#ifndef CONFIG_OF ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV); printk(KERN_NOTICE "Boot params:\n" @@ -299,14 +314,16 @@ void __init setup_arch(char **cmdline_p) bss_resource.start = virt_to_phys(__bss_start); bss_resource.end = virt_to_phys(__bss_stop)-1; +#endif #ifdef CONFIG_CMDLINE_OVERWRITE strscpy(command_line, CONFIG_CMDLINE, sizeof(command_line)); -#else - strscpy(command_line, COMMAND_LINE, sizeof(command_line)); +#elif !defined(CONFIG_OF) || defined(CONFIG_USE_BUILTIN_DTB) + if (*COMMAND_LINE) + strscpy(command_line, COMMAND_LINE, sizeof(command_line)); +#endif #ifdef CONFIG_CMDLINE_EXTEND strlcat(command_line, " ", sizeof(command_line)); strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line)); -#endif #endif /* Save unparsed command line copy for /proc/cmdline */ @@ -322,14 +339,6 @@ void __init setup_arch(char **cmdline_p) /* Let earlyprintk output early console messages */ sh_early_platform_driver_probe("earlyprintk", 1, 1); -#ifdef CONFIG_OF_EARLY_FLATTREE -#ifdef CONFIG_USE_BUILTIN_DTB - unflatten_and_copy_device_tree(); -#else - unflatten_device_tree(); -#endif -#endif - paging_init(); /* Perform the machine specific initialisation */ From patchwork Wed May 29 08:00:53 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800165 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 9A33F16938E; Wed, 29 May 2024 08:01:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969704; 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Wed, 29 May 2024 17:01:40 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 07/36] sh: Fix COMMON_CLK support in CONFIG_OF=y. Date: Wed, 29 May 2024 17:00:53 +0900 Message-Id: <4433650694e36ab9fb7748904c5e424865edece6.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Initialize the clock and timer using the COMMON_CLK procedure. sh's earlytimer mechanism doesn't work properly in OF, so timer initialization is delayed. If CONFIG_OF=y, perform the general timer initialization procedure. Signed-off-by: Yoshinori Sato --- arch/sh/boards/of-generic.c | 28 ++++------------------------ arch/sh/kernel/time.c | 12 ++++++++++++ 2 files changed, 16 insertions(+), 24 deletions(-) diff --git a/arch/sh/boards/of-generic.c b/arch/sh/boards/of-generic.c index cc88cb8908cc..64f80d2878b1 100644 --- a/arch/sh/boards/of-generic.c +++ b/arch/sh/boards/of-generic.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include @@ -100,16 +101,7 @@ static void sh_of_smp_probe(void) #endif -static void noop(void) -{ -} - -static int noopi(void) -{ - return 0; -} - -static void __init sh_of_mem_reserve(void) +static void __init sh_of_mem_init(void) { early_init_fdt_reserve_self(); early_init_fdt_scan_reserved_mem(); @@ -142,25 +134,13 @@ static void __init sh_of_init_irq(void) irqchip_init(); } -static int __init sh_of_clk_init(void) -{ -#ifdef CONFIG_COMMON_CLK - /* Disabled pending move to COMMON_CLK framework. */ - pr_info("SH generic board support: scanning for clk providers\n"); - of_clk_init(NULL); -#endif - return 0; -} - static struct sh_machine_vector __initmv sh_of_generic_mv = { .mv_setup = sh_of_setup, .mv_name = "devicetree", /* replaced by DT root's model */ .mv_irq_demux = sh_of_irq_demux, .mv_init_irq = sh_of_init_irq, - .mv_clk_init = sh_of_clk_init, - .mv_mode_pins = noopi, - .mv_mem_init = noop, - .mv_mem_reserve = sh_of_mem_reserve, + .mv_mode_pins = generic_mode_pins, + .mv_mem_init = sh_of_mem_init, }; struct sh_clk_ops; diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time.c index 821a09cbd605..ce5b7c2f8628 100644 --- a/arch/sh/kernel/time.c +++ b/arch/sh/kernel/time.c @@ -19,7 +19,9 @@ #include #include #include +#include +#ifndef CONFIG_SH_DEVICE_TREE static void __init sh_late_time_init(void) { /* @@ -43,3 +45,13 @@ void __init time_init(void) late_time_init = sh_late_time_init; } +#else +/* CONFIG_SH_DEVICE_TREE */ +void __init time_init(void) +{ + pr_info("SH generic board support: scanning for clk providers\n"); + + of_clk_init(NULL); + timer_probe(); +} +#endif From patchwork Wed May 29 08:00:54 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800472 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 4B42E169AF0; Wed, 29 May 2024 08:01:44 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969706; cv=none; b=ku72at6te3OpeVwiOI5MGaJd6QGstMuLedF0C0HwbZncTzLFu5+Qzj3ULxs9zfRYT+Z3Ipcyo1mfmy3EuNgr9kyd6QLKLziIwwyTiQd5DXpRuKNXcf76m8Z3L89HFpLbt3erqUmKbxfdadZR8Nrc/VpcCdDA5vjQg/8CZg3OaiQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969706; c=relaxed/simple; bh=iMBrZpOu9yUG+iDc33xgYv2Kqd5WhU8tNgZ7/X7ZzJ4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hPduGRK/sMh/TgwnP+qCNGt/NYw9f2WGfFAFVIYWT88H2qmGRXMFAsANCN7Nk/25j/RoPdCGAgQvQczIeJ7g08PTOcMxwdcS17dqRTkrnyf6ia5fso4TRGpNwnrQIeGwiyp3czUAKnn09zRcHd4M/BGpyaDE2lAjkIGKxqR7tPQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 642931C06B7; Wed, 29 May 2024 17:01:42 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 08/36] clocksource: sh_tmu: CLOCKSOURCE support. Date: Wed, 29 May 2024 17:00:54 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Allows initialization as CLOCKSOURCE. Signed-off-by: Yoshinori Sato --- drivers/clocksource/sh_tmu.c | 198 +++++++++++++++++++++++------------ 1 file changed, 132 insertions(+), 66 deletions(-) diff --git a/drivers/clocksource/sh_tmu.c b/drivers/clocksource/sh_tmu.c index beffff81c00f..ce3004a73dcb 100644 --- a/drivers/clocksource/sh_tmu.c +++ b/drivers/clocksource/sh_tmu.c @@ -17,6 +17,8 @@ #include #include #include +#include +#include #include #include #include @@ -51,6 +53,7 @@ struct sh_tmu_channel { struct sh_tmu_device { struct platform_device *pdev; + struct device_node *np; void __iomem *mapbase; struct clk *clk; @@ -65,6 +68,7 @@ struct sh_tmu_device { bool has_clockevent; bool has_clocksource; + const char *name; }; #define TSTR -1 /* shared register */ @@ -148,8 +152,8 @@ static int __sh_tmu_enable(struct sh_tmu_channel *ch) /* enable clock */ ret = clk_enable(ch->tmu->clk); if (ret) { - dev_err(&ch->tmu->pdev->dev, "ch%u: cannot enable clock\n", - ch->index); + pr_err("%s ch%u: cannot enable clock\n", + ch->tmu->name, ch->index); return ret; } @@ -174,9 +178,10 @@ static int sh_tmu_enable(struct sh_tmu_channel *ch) if (ch->enable_count++ > 0) return 0; - pm_runtime_get_sync(&ch->tmu->pdev->dev); - dev_pm_syscore_device(&ch->tmu->pdev->dev, true); - + if (ch->tmu->pdev) { + pm_runtime_get_sync(&ch->tmu->pdev->dev); + dev_pm_syscore_device(&ch->tmu->pdev->dev, true); + } return __sh_tmu_enable(ch); } @@ -202,8 +207,10 @@ static void sh_tmu_disable(struct sh_tmu_channel *ch) __sh_tmu_disable(ch); - dev_pm_syscore_device(&ch->tmu->pdev->dev, false); - pm_runtime_put(&ch->tmu->pdev->dev); + if (ch->tmu->pdev) { + dev_pm_syscore_device(&ch->tmu->pdev->dev, false); + pm_runtime_put(&ch->tmu->pdev->dev); + } } static void sh_tmu_set_next(struct sh_tmu_channel *ch, unsigned long delta, @@ -245,7 +252,7 @@ static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) +static inline struct sh_tmu_channel *cs_to_sh_tmu(struct clocksource *cs) { return container_of(cs, struct sh_tmu_channel, cs); } @@ -292,7 +299,8 @@ static void sh_tmu_clocksource_suspend(struct clocksource *cs) if (--ch->enable_count == 0) { __sh_tmu_disable(ch); - dev_pm_genpd_suspend(&ch->tmu->pdev->dev); + if (ch->tmu->pdev) + dev_pm_genpd_suspend(&ch->tmu->pdev->dev); } } @@ -304,7 +312,8 @@ static void sh_tmu_clocksource_resume(struct clocksource *cs) return; if (ch->enable_count++ == 0) { - dev_pm_genpd_resume(&ch->tmu->pdev->dev); + if (ch->tmu->pdev) + dev_pm_genpd_resume(&ch->tmu->pdev->dev); __sh_tmu_enable(ch); } } @@ -324,14 +333,14 @@ static int sh_tmu_register_clocksource(struct sh_tmu_channel *ch, cs->mask = CLOCKSOURCE_MASK(32); cs->flags = CLOCK_SOURCE_IS_CONTINUOUS; - dev_info(&ch->tmu->pdev->dev, "ch%u: used as clock source\n", - ch->index); + pr_info("%s ch%u: used as clock source\n", + ch->tmu->name, ch->index); clocksource_register_hz(cs, ch->tmu->rate); return 0; } -static struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) +static inline struct sh_tmu_channel *ced_to_sh_tmu(struct clock_event_device *ced) { return container_of(ced, struct sh_tmu_channel, ced); } @@ -364,8 +373,8 @@ static int sh_tmu_clock_event_set_state(struct clock_event_device *ced, if (clockevent_state_oneshot(ced) || clockevent_state_periodic(ced)) sh_tmu_disable(ch); - dev_info(&ch->tmu->pdev->dev, "ch%u: used for %s clock events\n", - ch->index, periodic ? "periodic" : "oneshot"); + pr_info("%s ch%u: used for %s clock events\n", + ch->tmu->name, ch->index, periodic ? "periodic" : "oneshot"); sh_tmu_clock_event_start(ch, periodic); return 0; } @@ -417,20 +426,22 @@ static void sh_tmu_register_clockevent(struct sh_tmu_channel *ch, ced->set_state_shutdown = sh_tmu_clock_event_shutdown; ced->set_state_periodic = sh_tmu_clock_event_set_periodic; ced->set_state_oneshot = sh_tmu_clock_event_set_oneshot; - ced->suspend = sh_tmu_clock_event_suspend; - ced->resume = sh_tmu_clock_event_resume; + if (ch->tmu->pdev) { + ced->suspend = sh_tmu_clock_event_suspend; + ced->resume = sh_tmu_clock_event_resume; + } - dev_info(&ch->tmu->pdev->dev, "ch%u: used for clock events\n", - ch->index); + pr_info("%s ch%u: used for clock events\n", + ch->tmu->name, ch->index); clockevents_config_and_register(ced, ch->tmu->rate, 0x300, 0xffffffff); ret = request_irq(ch->irq, sh_tmu_interrupt, IRQF_TIMER | IRQF_IRQPOLL | IRQF_NOBALANCING, - dev_name(&ch->tmu->pdev->dev), ch); + ch->tmu->name, ch); if (ret) { - dev_err(&ch->tmu->pdev->dev, "ch%u: failed to request irq %d\n", - ch->index, ch->irq); + pr_err("%s ch%u: failed to request irq %d\n", + ch->tmu->name, ch->index, ch->irq); return; } } @@ -465,28 +476,36 @@ static int sh_tmu_channel_setup(struct sh_tmu_channel *ch, unsigned int index, else ch->base = tmu->mapbase + 8 + ch->index * 12; - ch->irq = platform_get_irq(tmu->pdev, index); + if (tmu->np) + ch->irq = of_irq_get(tmu->np, index); + else if (tmu->pdev) + ch->irq = platform_get_irq(tmu->pdev, index); + if (ch->irq < 0) return ch->irq; ch->cs_enabled = false; ch->enable_count = 0; - return sh_tmu_register(ch, dev_name(&tmu->pdev->dev), - clockevent, clocksource); + return sh_tmu_register(ch, tmu->name, clockevent, clocksource); } static int sh_tmu_map_memory(struct sh_tmu_device *tmu) { struct resource *res; - res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); - if (!res) { - dev_err(&tmu->pdev->dev, "failed to get I/O memory\n"); - return -ENXIO; + if (tmu->pdev) { + res = platform_get_resource(tmu->pdev, IORESOURCE_MEM, 0); + if (!res) { + pr_err("sh_tmu failed to get I/O memory\n"); + return -ENXIO; + } + + tmu->mapbase = ioremap(res->start, resource_size(res)); } + if (tmu->np) + tmu->mapbase = of_iomap(tmu->np, 0); - tmu->mapbase = ioremap(res->start, resource_size(res)); if (tmu->mapbase == NULL) return -ENXIO; @@ -495,53 +514,25 @@ static int sh_tmu_map_memory(struct sh_tmu_device *tmu) static int sh_tmu_parse_dt(struct sh_tmu_device *tmu) { - struct device_node *np = tmu->pdev->dev.of_node; - tmu->model = SH_TMU; tmu->num_channels = 3; - of_property_read_u32(np, "#renesas,channels", &tmu->num_channels); + of_property_read_u32(tmu->np, "#renesas,channels", &tmu->num_channels); if (tmu->num_channels != 2 && tmu->num_channels != 3) { - dev_err(&tmu->pdev->dev, "invalid number of channels %u\n", - tmu->num_channels); + pr_err("%s: invalid number of channels %u\n", + tmu->name, tmu->num_channels); return -EINVAL; } return 0; } -static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) +static int sh_tmu_setup(struct sh_tmu_device *tmu) { unsigned int i; int ret; - tmu->pdev = pdev; - - raw_spin_lock_init(&tmu->lock); - - if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { - ret = sh_tmu_parse_dt(tmu); - if (ret < 0) - return ret; - } else if (pdev->dev.platform_data) { - const struct platform_device_id *id = pdev->id_entry; - struct sh_timer_config *cfg = pdev->dev.platform_data; - - tmu->model = id->driver_data; - tmu->num_channels = hweight8(cfg->channels_mask); - } else { - dev_err(&tmu->pdev->dev, "missing platform data\n"); - return -ENXIO; - } - - /* Get hold of clock. */ - tmu->clk = clk_get(&tmu->pdev->dev, "fck"); - if (IS_ERR(tmu->clk)) { - dev_err(&tmu->pdev->dev, "cannot get clock\n"); - return PTR_ERR(tmu->clk); - } - ret = clk_prepare(tmu->clk); if (ret < 0) goto err_clk_put; @@ -557,7 +548,7 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) /* Map the memory resource. */ ret = sh_tmu_map_memory(tmu); if (ret < 0) { - dev_err(&tmu->pdev->dev, "failed to remap I/O memory\n"); + pr_err("%s: failed to remap I/O memory\n", tmu->name); goto err_clk_unprepare; } @@ -580,8 +571,6 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) goto err_unmap; } - platform_set_drvdata(pdev, tmu); - return 0; err_unmap: @@ -594,6 +583,40 @@ static int sh_tmu_setup(struct sh_tmu_device *tmu, struct platform_device *pdev) return ret; } +static int sh_tmu_setup_pdev(struct sh_tmu_device *tmu, struct platform_device *pdev) +{ + int ret; + + tmu->pdev = pdev; + + raw_spin_lock_init(&tmu->lock); + + if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node) { + tmu->np = pdev->dev.of_node; + ret = sh_tmu_parse_dt(tmu); + if (ret < 0) + return ret; + } else if (pdev->dev.platform_data) { + const struct platform_device_id *id = pdev->id_entry; + struct sh_timer_config *cfg = pdev->dev.platform_data; + + tmu->model = id->driver_data; + tmu->num_channels = hweight8(cfg->channels_mask); + } else { + dev_err(&tmu->pdev->dev, "missing platform data\n"); + return -ENXIO; + } + + tmu->name = dev_name(&pdev->dev); + tmu->clk = clk_get(&tmu->pdev->dev, "fck"); + if (IS_ERR(tmu->clk)) { + dev_err(&tmu->pdev->dev, "cannot get clock\n"); + return PTR_ERR(tmu->clk); + } + + return sh_tmu_setup(tmu); +} + static int sh_tmu_probe(struct platform_device *pdev) { struct sh_tmu_device *tmu = platform_get_drvdata(pdev); @@ -613,12 +636,13 @@ static int sh_tmu_probe(struct platform_device *pdev) if (tmu == NULL) return -ENOMEM; - ret = sh_tmu_setup(tmu, pdev); + ret = sh_tmu_setup_pdev(tmu, pdev); if (ret) { kfree(tmu); pm_runtime_idle(&pdev->dev); return ret; } + platform_set_drvdata(pdev, tmu); if (is_sh_early_platform_device(pdev)) return 0; @@ -632,6 +656,47 @@ static int sh_tmu_probe(struct platform_device *pdev) return 0; } +static int sh_tmu_setup_of(struct sh_tmu_device *tmu, struct device_node *np) +{ + int ret; + + tmu->np = np; + raw_spin_lock_init(&tmu->lock); + + ret = sh_tmu_parse_dt(tmu); + if (ret < 0) + return ret; + + tmu->clk = of_clk_get(np, 0); + tmu->name = of_node_full_name(np); + + if (IS_ERR(tmu->clk)) { + pr_err("%pOF: cannot get clock\n", np); + return PTR_ERR(tmu->clk); + } + + return sh_tmu_setup(tmu); +} + +static int __init sh_tmu_of_register(struct device_node *np) +{ + struct sh_tmu_device *tmu; + int ret; + + tmu = kzalloc(sizeof(*tmu), GFP_KERNEL); + if (tmu == NULL) + return -ENOMEM; + + ret = sh_tmu_setup_of(tmu, np); + if (ret) { + kfree(tmu); + pr_warn("%pOF: Timer register failed (%d)", np, ret); + } else + of_node_set_flag(np, OF_POPULATED); + + return ret; +} + static const struct platform_device_id sh_tmu_id_table[] = { { "sh-tmu", SH_TMU }, { "sh-tmu-sh3", SH_TMU_SH3 }, @@ -665,6 +730,7 @@ static void __exit sh_tmu_exit(void) platform_driver_unregister(&sh_tmu_device_driver); } +TIMER_OF_DECLARE(sh_tmu, "renesas,tmu", sh_tmu_of_register); #ifdef CONFIG_SUPERH sh_early_platform_init("earlytimer", &sh_tmu_device_driver); #endif From patchwork Wed May 29 08:00:55 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800164 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 388EE16ABEB; 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dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 279A41C08FD; Wed, 29 May 2024 17:01:44 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 09/36] dt-binding: Add compatible SH7750 SoC Date: Wed, 29 May 2024 17:00:55 +0900 Message-Id: <3b3f41148158aa146f06a40aeb5b23c8611b1895.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring --- Documentation/devicetree/bindings/timer/renesas,tmu.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml index 360a5cf1ae9c..4864fcd66bfd 100644 --- a/Documentation/devicetree/bindings/timer/renesas,tmu.yaml +++ b/Documentation/devicetree/bindings/timer/renesas,tmu.yaml @@ -40,6 +40,7 @@ properties: - renesas,tmu-r8a779f0 # R-Car S4-8 - renesas,tmu-r8a779g0 # R-Car V4H - renesas,tmu-r8a779h0 # R-Car V4M + - renesas,tmu-sh7750 # SH7750 - const: renesas,tmu reg: @@ -97,6 +98,7 @@ if: - renesas,tmu-r8a7740 - renesas,tmu-r8a7778 - renesas,tmu-r8a7779 + - renesas,tmu-sh7750 then: required: - resets From patchwork Wed May 29 08:00:56 2024 Content-Type: text/plain; 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smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id EFE401C0940; Wed, 29 May 2024 17:01:45 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 10/36] sh: Common PCI Framework driver support. Date: Wed, 29 May 2024 17:00:56 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add New OF based PCI Host driver. This driver conflicts some point in legacy PCI driver. To resolve the conflict, I made some changes to the legacy driver. Signed-off-by: Yoshinori Sato --- arch/sh/include/asm/io.h | 6 ++++++ arch/sh/include/asm/pci.h | 4 ++++ arch/sh/kernel/iomap.c | 18 ++++++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/arch/sh/include/asm/io.h b/arch/sh/include/asm/io.h index 5c544cf5201b..29b5f996cde3 100644 --- a/arch/sh/include/asm/io.h +++ b/arch/sh/include/asm/io.h @@ -20,6 +20,7 @@ #include #include #include +#include #define __IO_PREFIX generic #include @@ -310,4 +311,9 @@ unsigned long long poke_real_address_q(unsigned long long addr, int valid_phys_addr_range(phys_addr_t addr, size_t size); int valid_mmap_phys_addr_range(unsigned long pfn, size_t size); +#if defined(CONFIG_PCI) && !defined(CONFIG_GENERIC_IOMAP) +#define pci_remap_iospace pci_remap_iospace +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr); +#endif + #endif /* __ASM_SH_IO_H */ diff --git a/arch/sh/include/asm/pci.h b/arch/sh/include/asm/pci.h index 54c30126ea17..92b3bd604319 100644 --- a/arch/sh/include/asm/pci.h +++ b/arch/sh/include/asm/pci.h @@ -2,6 +2,7 @@ #ifndef __ASM_SH_PCI_H #define __ASM_SH_PCI_H +#ifndef CONFIG_SH_DEVICE_TREE /* Can be used to override the logic in pci_scan_bus for skipping already-configured bus numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the loader */ @@ -88,4 +89,7 @@ static inline int pci_proc_domain(struct pci_bus *bus) return hose->need_domain_info; } +#else /* CONFIG_SH_DEVICE_TREE */ +#include +#endif #endif /* __ASM_SH_PCI_H */ diff --git a/arch/sh/kernel/iomap.c b/arch/sh/kernel/iomap.c index 0a0dff4e66de..d1b8e496ca23 100644 --- a/arch/sh/kernel/iomap.c +++ b/arch/sh/kernel/iomap.c @@ -160,3 +160,21 @@ void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count) mmio_outsl(addr, src, count); } EXPORT_SYMBOL(iowrite32_rep); + +#if defined(pci_remap_iospace) +int pci_remap_iospace(const struct resource *res, phys_addr_t phys_addr) +{ + unsigned long vaddr = res->start; + + if (!(res->flags & IORESOURCE_IO)) + return -EINVAL; + + if (res->end > IO_SPACE_LIMIT) + return -EINVAL; + + __set_io_port_base(phys_addr); + return vmap_page_range(vaddr, vaddr + resource_size(res), phys_addr, + pgprot_device(PAGE_KERNEL)); +} +EXPORT_SYMBOL(pci_remap_iospace); +#endif From patchwork Wed May 29 08:00:57 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800163 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B0561168C19; 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dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id B37D71C09E7; Wed, 29 May 2024 17:01:47 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 11/36] pci: pci-sh7751: Add SH7751 PCI driver Date: Wed, 29 May 2024 17:00:57 +0900 Message-Id: <1f1420a50fbdee5f5e07a3345a6dd6b921c78969.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH7751 CPU Internal PCI Controller driver. Signed-off-by: Yoshinori Sato --- drivers/pci/controller/Kconfig | 9 + drivers/pci/controller/Makefile | 1 + drivers/pci/controller/pci-sh7751.c | 335 ++++++++++++++++++++++++++++ 3 files changed, 345 insertions(+) create mode 100644 drivers/pci/controller/pci-sh7751.c diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index e534c02ee34f..a2fd917a2e03 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -353,6 +353,15 @@ config PCIE_XILINX_CPM Say 'Y' here if you want kernel support for the Xilinx Versal CPM host bridge. +config PCI_SH7751 + bool "Renesas SH7751 PCI controller" + depends on OF + depends on CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R || COMPILE_TEST + select PCI_HOST_COMMON + help + Say 'Y' here if you want kernel to support the Renesas SH7751 PCI + Host Bridge driver. + source "drivers/pci/controller/cadence/Kconfig" source "drivers/pci/controller/dwc/Kconfig" source "drivers/pci/controller/mobiveil/Kconfig" diff --git a/drivers/pci/controller/Makefile b/drivers/pci/controller/Makefile index f2b19e6174af..aa97e5d74e58 100644 --- a/drivers/pci/controller/Makefile +++ b/drivers/pci/controller/Makefile @@ -40,6 +40,7 @@ obj-$(CONFIG_PCI_LOONGSON) += pci-loongson.o obj-$(CONFIG_PCIE_HISI_ERR) += pcie-hisi-error.o obj-$(CONFIG_PCIE_APPLE) += pcie-apple.o obj-$(CONFIG_PCIE_MT7621) += pcie-mt7621.o +obj-$(CONFIG_PCI_SH7751) += pci-sh7751.o # pcie-hisi.o quirks are needed even without CONFIG_PCIE_DW obj-y += dwc/ diff --git a/drivers/pci/controller/pci-sh7751.c b/drivers/pci/controller/pci-sh7751.c new file mode 100644 index 000000000000..73ccc14800f7 --- /dev/null +++ b/drivers/pci/controller/pci-sh7751.c @@ -0,0 +1,335 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SH7751 PCI driver + * Copyright (C) 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* PCICR and PCICLKCR write enable magic key */ +#define PCIC_WE_KEY (0xa5 << 24) + +/* PCIC registers */ +/* 0x0000 - 0x00ff mapped to PCI device configuration space */ +#define PCIC_PCICR 0x100 /* PCI Control Register */ +#define PCIC_PCICR_TRSB BIT(9) /* Target Read Single */ +#define PCIC_PCICR_BSWP BIT(8) /* Target Byte Swap */ +#define PCIC_PCICR_PLUP BIT(7) /* Enable PCI Pullup */ +#define PCIC_PCICR_ARBM BIT(6) /* PCI Arbitration Mode */ +#define PCIC_PCICR_MD10 BIT(5) /* MD10 status */ +#define PCIC_PCICR_MD9 BIT(4) /* MD9 status */ +#define PCIC_PCICR_SERR BIT(3) /* SERR output assert */ +#define PCIC_PCICR_INTA BIT(2) /* INTA output assert */ +#define PCIC_PCICR_PRST BIT(1) /* PCI Reset Assert */ +#define PCIC_PCICR_CFIN BIT(0) /* Central Fun. Init Done */ + +#define PCIC_PCILSR0 0x104 /* PCI Local Space Register0 */ +#define PCIC_PCILSR1 0x108 /* PCI Local Space Register1 */ +#define PCIC_PCILAR0 0x10c /* PCI Local Addr Register1 */ +#define PCIC_PCILAR1 0x110 /* PCI Local Addr Register1 */ +#define PCIC_PCIINT 0x114 /* PCI Interrupt Register */ +#define PCIC_PCIINTM 0x118 /* PCI Interrupt Mask */ +#define PCIC_PCIALR 0x11c /* Error Address Register */ +#define PCIC_PCICLR 0x120 /* Error Command/Data */ +#define PCIC_PCIAINT 0x130 /* Arbiter Interrupt Register */ +#define PCIC_PCIAINTM 0x134 /* Arbiter Int. Mask Register */ +#define PCIC_PCIBMLR 0x138 /* Error Bus Master Register */ +#define PCIC_PCIDMABT 0x140 /* DMA Transfer Arb. Register */ +#define PCIC_PCIPAR 0x1c0 /* PIO Address Register */ +#define PCIC_PCIMBR 0x1c4 /* Memory Base Address */ +#define PCIC_PCIIOBR 0x1c8 /* I/O Base Address Register */ + +#define PCIC_PCIPINT 0x1cc /* Power Mgmnt Int. Register */ +#define PCIC_PCIPINT_D3 BIT(1) /* D3 Pwr Mgmt. Interrupt */ +#define PCIC_PCIPINT_D0 BIT(0) /* D0 Pwr Mgmt. Interrupt */ + +#define PCIC_PCIPINTM 0x1d0 /* Power Mgmnt Mask Register */ +#define PCIC_PCICLKR 0x1d4 /* Clock Ctrl. Register */ +#define PCIC_PCIBCR1 0x1e0 /* Memory BCR1 Register */ +#define PCIC_PCIBCR2 0x1e4 /* Memory BCR2 Register */ +#define PCIC_PCIWCR1 0x1e8 /* Wait Control 1 Register */ +#define PCIC_PCIWCR2 0x1ec /* Wait Control 2 Register */ +#define PCIC_PCIWCR3 0x1f0 /* Wait Control 3 Register */ +#define PCIC_PCIMCR 0x1f4 /* Memory Control Register */ +#define PCIC_PCIBCR3 0x1f8 /* Memory BCR3 Register */ +#define PCIC_PCIPDR 0x220 /* Port IO Data Register */ + +/* PCI IDs */ +/* + * Hitachi is the company that led to Renesas. + * The SH7751 was designed by Hitachi, so it has a Hitachi ID. + */ +#define PCI_VENDOR_ID_HITACHI 0x1054 +#define PCI_DEVICE_ID_SH7751 0x3505 +#define PCI_DEVICE_ID_SH7751R 0x350e + +/* BSC registers */ +/* Copy BSC setting to PCI BSC */ +#define BSC_BCR1 0x0000 +#define BSC_BCR1_SLAVE BIT(30) +#define BSC_BCR1_BRQEN BIT(19) +#define BSC_BCR2 0x0004 +#define BSC_BCR3 0x0050 +#define BSC_WCR1 0x0008 +#define BSC_WCR2 0x000c +#define BSC_WCR3 0x0010 +#define BSC_MCR 0x0014 +#define BSC_MCR_MRSET BIT(30) +#define BSC_MCR_RFSH BIT(2) + +/* + * We need to avoid collisions with `mirrored' VGA ports + * and other strange ISA hardware, so we always want the + * addresses to be allocated in the 0x000-0x0ff region + * modulo 0x400. + */ +#define IO_REGION_BASE 0x1000 +resource_size_t pcibios_align_resource(void *data, const struct resource *res, + resource_size_t size, resource_size_t align) +{ + resource_size_t start = res->start; + + if (res->flags & IORESOURCE_IO) { + if (start < PCIBIOS_MIN_IO + IO_REGION_BASE) + start = PCIBIOS_MIN_IO + IO_REGION_BASE; + + /* + * Put everything into 0x00-0xff region modulo 0x400. + */ + if (start & 0x300) + start = (start + 0x3ff) & ~0x3ff; + } + + return start; +} + +static int setup_pci_bsc(struct device *dev, void __iomem *pcic, + void __iomem *bsc, unsigned int area, bool bcr3) +{ + u32 word; + + word = __raw_readl(bsc + BSC_BCR1); + /* check BCR for SDRAM in area */ + if (((word >> area) & 1) == 0) { + dev_err(dev, "Area %u is not configured for SDRAM. BCR1=0x%x\n", + area, word); + return -EINVAL; + } + word |= BSC_BCR1_SLAVE; /* PCIC BSC is slave only */ + writel(word, pcic + PCIC_PCIBCR1); + + word = __raw_readw(bsc + BSC_BCR2); + /* check BCR2 for 32bit SDRAM interface*/ + if (((word >> (area << 1)) & 0x3) != 0x3) { + dev_err(dev, "Area %u is not 32 bit SDRAM. BCR2=0x%x\n", + area, word); + return -EINVAL; + } + writel(word, pcic + PCIC_PCIBCR2); + + if (bcr3) { + /* BCR3 have only SH7751R */ + word = __raw_readw(bsc + BSC_BCR3); + writel(word, pcic + PCIC_PCIBCR3); + } + + /* configure the wait control registers */ + word = __raw_readl(bsc + BSC_WCR1); + writel(word, pcic + PCIC_PCIWCR1); + word = __raw_readl(bsc + BSC_WCR2); + writel(word, pcic + PCIC_PCIWCR2); + word = __raw_readl(bsc + BSC_WCR3); + writel(word, pcic + PCIC_PCIWCR3); + word = __raw_readl(bsc + BSC_MCR); + /* Clear MRSET and RFSH bit */ + word &= ~(BSC_MCR_MRSET | BSC_MCR_RFSH); + writel(word, pcic + PCIC_PCIMCR); + + return 0; +} + +#define NUM_AREA 7 +static int set_pci_ranges(struct device *dev, + void __iomem *pcic, void __iomem *bsc, bool bcr3) +{ + struct resource_entry *dma, *tmp; + struct pci_host_bridge *bridge; + u32 bsc_done[NUM_AREA]; + unsigned int la; + + bridge = dev_get_drvdata(dev); + writel(0, pcic + PCIC_PCILAR0); + writel(0, pcic + PCIC_PCILAR1); + la = 0; + memset(&bsc_done, 0, sizeof(bsc_done)); + resource_list_for_each_entry_safe(dma, tmp, &bridge->dma_ranges) { + struct resource *res = dma->res; + unsigned int area; + u32 word; + + switch (resource_type(res)) { + case IORESOURCE_REG: + word = res->start | 1; + writel(word, pcic + PCI_BASE_ADDRESS_0); + word = readl(pcic + PCI_COMMAND); + word |= PCI_COMMAND_IO; + writel(word, pcic + PCI_COMMAND); + break; + case IORESOURCE_MEM: + if (la > 4) { + dev_err(dev, "Invalid range definition.\n"); + return -EINVAL; + } + area = (res->start >> 26) & 0x07; + if (area >= NUM_AREA) { + /* Area 7 is reserved. */ + dev_info(dev, "Invalid local address 0x%08x. Ignore it.\n", + res->start); + break; + } + writel(res->start, pcic + PCI_BASE_ADDRESS_1 + la); + word = res->end - res->start; + /* if dummy entry, skip BSC setup */ + if (word <= 4) + break; + /* BAR1 is local area 0, BAR2 is local area 1 */ + writel(word, pcic + PCIC_PCILSR0 + la); + word = P2SEGADDR(res->start); + writel(word, pcic + PCIC_PCILAR0 + la); + la += 4; + if (!bsc_done[area]) { + /* check BCR for SDRAM in specified area. And setup PCI BSC. */ + if (setup_pci_bsc(dev, pcic, bsc, area, bcr3)) + return -EINVAL; + bsc_done[area] = 1; + } + break; + } + } + return 0; +} + +static int sh7751_pci_probe(struct platform_device *pdev) +{ + struct resource *res, *bscres; + void __iomem *pcic; + void __iomem *bsc; + u16 vid, did; + u32 word; + int ret; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (IS_ERR(res)) + return PTR_ERR(res); + pcic = ioremap(res->start, res->end - res->start + 1); + + bscres = platform_get_resource(pdev, IORESOURCE_MEM, 1); + bsc = devm_ioremap_resource(&pdev->dev, bscres); + if (IS_ERR(bsc)) + return PTR_ERR(bsc); + + /* check for SH7751/SH7751R hardware */ + word = readl(pcic + PCI_VENDOR_ID); + vid = word & 0xffff; + did = word >> 16; + if ((vid != PCI_VENDOR_ID_HITACHI) || + ((did != PCI_DEVICE_ID_SH7751) && + (did != PCI_DEVICE_ID_SH7751R))) { + dev_err(&pdev->dev, "This is not an SH7751(R)\n"); + return -ENODEV; + } + dev_info(&pdev->dev, "PCI core found at %pR\n", res); + + /* Set the BCR's to enable PCI access */ + word = __raw_readl(bsc + BSC_BCR1); + word |= BSC_BCR1_BRQEN; + __raw_writel(word, bsc + BSC_BCR1); + + /* Turn the clocks back on (not done in reset)*/ + writel(PCIC_WE_KEY | 0, pcic + PCIC_PCICLKR); + /* Clear Powerdown IRQ's (not done in reset) */ + writel(PCIC_PCIPINT_D3 | PCIC_PCIPINT_D0, pcic + PCIC_PCIPINT); + /* set the command/status */ + word = PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | + PCI_COMMAND_PARITY | PCI_COMMAND_WAIT; + writel(word, pcic + PCI_COMMAND); + + /* define this host as the host bridge */ + writel(PCI_BASE_CLASS_BRIDGE << 24, pcic + PCI_CLASS_REVISION); + + ret = pci_host_common_probe(pdev); + if (ret) { + dev_err(&pdev->dev, "Initialize failed (%d)\n", ret); + return ret; + } + + /* Set IO and Mem windows to local address */ + if (set_pci_ranges(&pdev->dev, pcic, bsc, + did == PCI_DEVICE_ID_SH7751R)) + return -EINVAL; + writel(0, pcic + PCIC_PCIIOBR); + + if (of_property_read_bool(pdev->dev.of_node, "renesas,bus-arbit-round-robin")) + word = BIT(0); + else + word = 0; + writel(word, pcic + PCIC_PCIDMABT); + + /* SH7751 init done, set central function init complete */ + /* use round robin mode to stop a device starving/overrunning */ + writel(PCIC_WE_KEY | PCIC_PCICR_CFIN | PCIC_PCICR_ARBM, pcic + PCIC_PCICR); + + return 0; +} + +/* + * Direct access to PCI hardware... + */ +#define CONFIG_CMD(bus, devfn, where) \ + (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) + +static void __iomem *sh4_pci_map_bus(struct pci_bus *bus, + unsigned int devfn, int where) +{ + struct pci_config_window *cfg = bus->sysdata; + void __iomem *pcic = (void __iomem *)cfg->res.start; + + writel(CONFIG_CMD(bus, devfn, where), pcic + PCIC_PCIPAR); + return pcic + PCIC_PCIPDR; +} + +static const struct pci_ecam_ops pci_sh7751_bus_ops = { + .pci_ops = { + .map_bus = sh4_pci_map_bus, + .read = pci_generic_config_read32, + .write = pci_generic_config_write32, + } +}; + +static const struct of_device_id sh7751_pci_of_match[] = { + { .compatible = "renesas,sh7751-pci", + .data = &pci_sh7751_bus_ops }, + { } +}; +MODULE_DEVICE_TABLE(of, sh7751_pci_of_match); + +static struct platform_driver sh7751_pci_driver = { + .driver = { + .name = "sh7751-pci", + .of_match_table = sh7751_pci_of_match, + }, + .probe = sh7751_pci_probe, +}; +module_platform_driver(sh7751_pci_driver); + +MODULE_DESCRIPTION("SH7751 PCI driver"); From patchwork Wed May 29 08:00:58 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800470 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 57CB416F0E8; Wed, 29 May 2024 08:01:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969714; cv=none; b=fP0PQqnh4NgiXtg0mj7pjvNady2R8fG0NksG21pSdqa1QiHw2jCj2+rxBSXozxv4OPzAkgPqEvMKIn0YglLUogzD7eK/Sf0AYNyv4rpjXL0NkMKpqkVqYsWSF1wC2lMdFfCP4vf0RVgir2mpoR8UsO12NRxRsFZxSM4EYelAr94= ARC-Message-Signature: i=1; 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Signed-off-by: Yoshinori Sato --- .../bindings/pci/renesas,sh7751-pci.yaml | 75 +++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml diff --git a/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml b/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml new file mode 100644 index 000000000000..3c3e8f9253c3 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/renesas,sh7751-pci.yaml @@ -0,0 +1,75 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/renesas,sh7751-pci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 PCI Host controller + +maintainers: + - Yoshinori Sato + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + +properties: + compatible: + const: renesas,sh7751-pci + + reg: + minItems: 2 + maxItems: 2 + + reg-names: + items: + - const: PCI Controller + - const: Bus State Controller + + interrupt-controller: true + + renesas,bus-arbit-round-robin: + $ref: /schemas/types.yaml#/definitions/flag + description: + Set DMA bus arbitration to round robin. + +required: + - compatible + - reg + - "#interrupt-cells" + - interrupt-map + - interrupt-map-mask + +unevaluatedProperties: false + +examples: + - | + #include + pci@fe200000 { + compatible = "renesas,sh7751-pci"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + interrupt-controller; + device_type = "pci"; + bus-range = <0 0>; + ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>, + <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>; + dma-ranges = <0x03000000 0 0xab000000 0xab000000 0 0x00000001>, + <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>, + <0x02000000 0 0xd0000000 0xd0000000 0 0x00000001>; + reg = <0xfe200000 0x0400>, + <0xff800000 0x0100>; + interrupt-map = <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 2 &julianintc 6 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 3 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 4 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 1 &julianintc 6 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 2 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 3 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 4 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 1 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 2 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 3 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 4 &julianintc 6 IRQ_TYPE_LEVEL_LOW>; + interrupt-map-mask = <0x1800 0 0 7>; + }; From patchwork Wed May 29 08:00:59 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800162 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 662F7167DBA; Wed, 29 May 2024 08:01:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969715; cv=none; b=VBgbgPL+4XEYh4ZiZPt38GG5gUJsYLg6hyOcQczaeSynUoca9pOpiUOGu9TrTfoSjujs7QzeLrn6TEPZlu7TC/md+le+3NYK4D6o7uUdlglCj2B61zYydlOX12dpqHL5Dvj/gQSs9nB2+eAqyaF5Cc532cBfAJ/Rxl7YLalendk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969715; c=relaxed/simple; bh=OX6WPfvRbxJ4483lBOVKEIaW/Ue8Sm+2/1Ot/oI7vsQ=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rkcoueQK6RMIiMilKsK/RAiX6m4FTtd0P8iC5Ikyh49wT7tpu+8HFy7b9ShJU1Opn6EVQHnhvIs+PXLf91NATB24jAfH7iYNuzGAiYh+a/F5Ptc1s6VLYe+CvB8YdaXQHMR3ejvtNGZDW/2QhI+ERj6Qkxitt94D0H75g3LTsQ4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 5AC691C03A3; Wed, 29 May 2024 17:01:51 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 13/36] dt-bindings: clock: sh7750-cpg: Add renesas,sh7750-cpg header. Date: Wed, 29 May 2024 17:00:59 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SH7750 CPG Clock output define. Signed-off-by: Yoshinori Sato --- .../bindings/clock/renesas,sh7750-cpg.yaml | 107 ++++++++++++++++++ include/dt-bindings/clock/sh7750-cpg.h | 26 +++++ 2 files changed, 133 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml create mode 100644 include/dt-bindings/clock/sh7750-cpg.h diff --git a/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml new file mode 100644 index 000000000000..0cdcab6fb4bc --- /dev/null +++ b/Documentation/devicetree/bindings/clock/renesas,sh7750-cpg.yaml @@ -0,0 +1,107 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/renesas,sh7750-cpg.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7750/7751 Clock Pulse Generator (CPG) + +maintainers: + - Yoshinori Sato + +description: + The Clock Pulse Generator (CPG) generates core clocks for the SoC. It + includes PLLs, and variable ratio dividers. + + The CPG may also provide a Clock Domain for SoC devices, in combination with + the CPG Module Stop (MSTP) Clocks. + +properties: + compatible: + enum: + - renesas,sh7750-cpg # SH7750 + - renesas,sh7750s-cpg # SH775S + - renesas,sh7750r-cpg # SH7750R + - renesas,sh7751-cpg # SH7751 + - renesas,sh7751r-cpg # SH7751R + + reg: + minItems: 1 + maxItems: 2 + + reg-names: true + + clocks: + maxItems: 1 + + clock-names: + const: extal + + '#clock-cells': + const: 1 + + renesas,mode: + description: Board-specific settings of the MD[0-2] pins on SoC + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + + '#power-domain-cells': + const: 0 + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - '#clock-cells' + +allOf: + - if: + properties: + compatible: + contains: + enum: + - renesas,sh7750-cpg + - renesas,sh7750s-cpg + then: + properties: + reg: + maxItems: 1 + reg-names: + items: + - const: FRQCR + + - if: + properties: + compatible: + contains: + enum: + - renesas,sh7750r-cpg + - renesas,sh7751-cpg + - renesas,sh7751r-cpg + then: + properties: + reg: + minItems: 2 + reg-names: + items: + - const: FRQCR + - const: CLKSTP00 + +additionalProperties: false + +examples: + - | + #include + cpg: clock-controller@ffc00000 { + compatible = "renesas,sh7751r-cpg"; + reg = <0xffc00000 20>, <0xfe0a0000 16>; + reg-names = "FRQCR", "CLKSTP00"; + clocks = <&extal>; + clock-names = "extal"; + renesas,mode = <0>; + #clock-cells = <1>; + #power-domain-cells = <0>; + }; diff --git a/include/dt-bindings/clock/sh7750-cpg.h b/include/dt-bindings/clock/sh7750-cpg.h new file mode 100644 index 000000000000..ec267be91adf --- /dev/null +++ b/include/dt-bindings/clock/sh7750-cpg.h @@ -0,0 +1,26 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * Copyright 2023 Yoshinori Sato + */ + +#ifndef __DT_BINDINGS_CLOCK_SH7750_H__ +#define __DT_BINDINGS_CLOCK_SH7750_H__ + +#define SH7750_CPG_PLLOUT 0 + +#define SH7750_CPG_PCK 1 +#define SH7750_CPG_BCK 2 +#define SH7750_CPG_ICK 3 + +#define SH7750_MSTP_SCI 4 +#define SH7750_MSTP_RTC 5 +#define SH7750_MSTP_TMU012 6 +#define SH7750_MSTP_SCIF 7 +#define SH7750_MSTP_DMAC 8 +#define SH7750_MSTP_UBC 9 +#define SH7750_MSTP_SQ 10 +#define SH7750_CSTP_INTC 11 +#define SH7750_CSTP_TMU34 12 +#define SH7750_CSTP_PCIC 13 + +#endif From patchwork Wed May 29 08:01:00 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800469 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3E90F171E69; Wed, 29 May 2024 08:01:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969717; cv=none; b=YnuAilvmLjfNQF3dPEaxm3hWm0/Ml4ZLwDH2BZhF5KDGqvU4iyoGfYFL4Yvz7/w9DCtapkrOBL1o1COCp+7GOBdjh88LXYbIKV/vHTngEBvgxrriicJcc69IxdGdUVLFYrgFYo4xh/9jfalXFVW8+baDD1ubDve7VRHoTqYA/jc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969717; c=relaxed/simple; bh=8wuAJgyl9hbSD3Dvnc4iquvn20ExBICiZtptkO8WKeE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=CklCWu/n2gUAN6+cbEK0f0J5bsX4M2oyIVWKpbTtJR/zFSJb6IvYnxZZmWjhGI5Ibjm2ATOYwq+5N0IiDj7bvAy/Mr4z+PhrLjCPYjXbf/KjO4rj9ayzgcsoaljwwWnfpb+ZS3K/vUPRw8vYCecoeWx4NoQRYAXmUju/rR9lg48= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 2BFAF1C0EED; Wed, 29 May 2024 17:01:53 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 14/36] clk: Compatible with narrow registers Date: Wed, 29 May 2024 17:01:00 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 divider and gate only support 32-bit registers. Older hardware uses narrower registers, so I want to be able to handle 8-bit and 16-bit wide registers. Seven clk_divider flags are used, and if I add flags for 8bit access and 16bit access, 8bit will not be enough, so I expanded it to u16. Signed-off-by: Yoshinori Sato --- drivers/clk/clk-divider.c | 41 +++++++++++++++++++++--------- drivers/clk/clk-gate.c | 49 ++++++++++++++++++++++++++++++++---- include/linux/clk-provider.h | 20 ++++++++++++--- 3 files changed, 89 insertions(+), 21 deletions(-) diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index a2c2b5203b0a..abafcbbb6578 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -26,17 +26,34 @@ * parent - fixed parent. No clk_set_parent support */ -static inline u32 clk_div_readl(struct clk_divider *divider) -{ +static inline u32 clk_div_read(struct clk_divider *divider) +{ + if (divider->flags & CLK_DIVIDER_REG_8BIT) + return readb(divider->reg); + if (divider->flags & CLK_DIVIDER_REG_16BIT) { + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) { + return ioread16be(divider->reg); + } else { + return readw(divider->reg); + } + } if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) return ioread32be(divider->reg); return readl(divider->reg); } -static inline void clk_div_writel(struct clk_divider *divider, u32 val) +static inline void clk_div_write(struct clk_divider *divider, u32 val) { - if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) + if (divider->flags & CLK_DIVIDER_REG_8BIT) + writeb(val, divider->reg); + else if (divider->flags & CLK_DIVIDER_REG_16BIT) { + if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) { + iowrite16be(val, divider->reg); + } else { + writew(val, divider->reg); + } + } else if (divider->flags & CLK_DIVIDER_BIG_ENDIAN) iowrite32be(val, divider->reg); else writel(val, divider->reg); @@ -152,7 +169,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, struct clk_divider *divider = to_clk_divider(hw); unsigned int val; - val = clk_div_readl(divider) >> divider->shift; + val = clk_div_read(divider) >> divider->shift; val &= clk_div_mask(divider->width); return divider_recalc_rate(hw, parent_rate, val, divider->table, @@ -434,7 +451,7 @@ static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, if (divider->flags & CLK_DIVIDER_READ_ONLY) { u32 val; - val = clk_div_readl(divider) >> divider->shift; + val = clk_div_read(divider) >> divider->shift; val &= clk_div_mask(divider->width); return divider_ro_round_rate(hw, rate, prate, divider->table, @@ -455,7 +472,7 @@ static int clk_divider_determine_rate(struct clk_hw *hw, if (divider->flags & CLK_DIVIDER_READ_ONLY) { u32 val; - val = clk_div_readl(divider) >> divider->shift; + val = clk_div_read(divider) >> divider->shift; val &= clk_div_mask(divider->width); return divider_ro_determine_rate(hw, req, divider->table, @@ -505,11 +522,11 @@ static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { val = clk_div_mask(divider->width) << (divider->shift + 16); } else { - val = clk_div_readl(divider); + val = clk_div_read(divider); val &= ~(clk_div_mask(divider->width) << divider->shift); } val |= (u32)value << divider->shift; - clk_div_writel(divider, val); + clk_div_write(divider, val); if (divider->lock) spin_unlock_irqrestore(divider->lock, flags); @@ -538,7 +555,7 @@ struct clk_hw *__clk_hw_register_divider(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u16 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_divider *div; @@ -610,7 +627,7 @@ EXPORT_SYMBOL_GPL(__clk_hw_register_divider); struct clk *clk_register_divider_table(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, + u16 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_hw *hw; @@ -664,7 +681,7 @@ struct clk_hw *__devm_clk_hw_register_divider(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u16 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock) { struct clk_hw **ptr, *hw; diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c index 68e585a02fd9..22425568809e 100644 --- a/drivers/clk/clk-gate.c +++ b/drivers/clk/clk-gate.c @@ -24,16 +24,37 @@ * parent - fixed parent. No clk_set_parent support */ -static inline u32 clk_gate_readl(struct clk_gate *gate) +static inline u32 clk_gate_read(struct clk_gate *gate) { + if (gate->flags & CLK_GATE_REG_8BIT) + return readb(gate->reg); + if (gate->flags & CLK_GATE_REG_16BIT) { + if (gate->flags & CLK_GATE_BIG_ENDIAN) { + return ioread16be(gate->reg); + } else { + return readw(gate->reg); + } + } if (gate->flags & CLK_GATE_BIG_ENDIAN) return ioread32be(gate->reg); return readl(gate->reg); } -static inline void clk_gate_writel(struct clk_gate *gate, u32 val) +static inline void clk_gate_write(struct clk_gate *gate, u32 val) { + if (gate->flags & CLK_GATE_REG_8BIT) { + writeb(val, gate->reg); + return; + } + if (gate->flags & CLK_GATE_REG_16BIT) { + if (gate->flags & CLK_GATE_BIG_ENDIAN) { + iowrite16be(val, gate->reg); + } else { + writew(val, gate->reg); + } + return; + } if (gate->flags & CLK_GATE_BIG_ENDIAN) iowrite32be(val, gate->reg); else @@ -72,7 +93,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable) if (set) reg |= BIT(gate->bit_idx); } else { - reg = clk_gate_readl(gate); + reg = clk_gate_read(gate); if (set) reg |= BIT(gate->bit_idx); @@ -80,7 +101,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable) reg &= ~BIT(gate->bit_idx); } - clk_gate_writel(gate, reg); + clk_gate_write(gate, reg); if (gate->lock) spin_unlock_irqrestore(gate->lock, flags); @@ -105,7 +126,7 @@ int clk_gate_is_enabled(struct clk_hw *hw) u32 reg; struct clk_gate *gate = to_clk_gate(hw); - reg = clk_gate_readl(gate); + reg = clk_gate_read(gate); /* if a set bit disables this clk, flip it before masking */ if (gate->flags & CLK_GATE_SET_TO_DISABLE) @@ -137,12 +158,30 @@ struct clk_hw *__clk_hw_register_gate(struct device *dev, struct clk_init_data init = {}; int ret = -EINVAL; + /* validate register size option and bit_idx */ if (clk_gate_flags & CLK_GATE_HIWORD_MASK) { if (bit_idx > 15) { pr_err("gate bit exceeds LOWORD field\n"); return ERR_PTR(-EINVAL); } } + if (clk_gate_flags & CLK_GATE_REG_16BIT) { + if (bit_idx > 15) { + pr_err("gate bit exceeds 16 bits\n"); + return ERR_PTR(-EINVAL); + } + } + if (clk_gate_flags & CLK_GATE_REG_8BIT) { + if (bit_idx > 7) { + pr_err("gate bit exceeds 8 bits\n"); + return ERR_PTR(-EINVAL); + } + } + if ((clk_gate_flags & CLK_GATE_HIWORD_MASK) && + (clk_gate_flags & (CLK_GATE_REG_8BIT | CLK_GATE_REG_16BIT))) { + pr_err("HIWORD_MASK required 32-bit register\n"); + return ERR_PTR(-EINVAL); + } /* allocate the gate */ gate = kzalloc(sizeof(*gate), GFP_KERNEL); diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h index 4a537260f655..25f61bd5b952 100644 --- a/include/linux/clk-provider.h +++ b/include/linux/clk-provider.h @@ -508,6 +508,10 @@ void of_fixed_clk_setup(struct device_node *np); * CLK_GATE_BIG_ENDIAN - by default little endian register accesses are used for * the gate register. Setting this flag makes the register accesses big * endian. + * CLK_GATE_REG_8BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 8bit. + * CLK_GATE_REG_16BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 16bit. */ struct clk_gate { struct clk_hw hw; @@ -522,6 +526,8 @@ struct clk_gate { #define CLK_GATE_SET_TO_DISABLE BIT(0) #define CLK_GATE_HIWORD_MASK BIT(1) #define CLK_GATE_BIG_ENDIAN BIT(2) +#define CLK_GATE_REG_8BIT BIT(3) +#define CLK_GATE_REG_16BIT BIT(4) extern const struct clk_ops clk_gate_ops; struct clk_hw *__clk_hw_register_gate(struct device *dev, @@ -675,13 +681,17 @@ struct clk_div_table { * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used * for the divider register. Setting this flag makes the register accesses * big endian. + * CLK_DIVIDER_REG_8BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 8bit. + * CLK_DIVIDER_REG_16BIT - by default 32bit register accesses are used for + * the gate register. Setting this flag makes the register accesses 16bit. */ struct clk_divider { struct clk_hw hw; void __iomem *reg; u8 shift; u8 width; - u8 flags; + u16 flags; const struct clk_div_table *table; spinlock_t *lock; }; @@ -697,6 +707,8 @@ struct clk_divider { #define CLK_DIVIDER_READ_ONLY BIT(5) #define CLK_DIVIDER_MAX_AT_ZERO BIT(6) #define CLK_DIVIDER_BIG_ENDIAN BIT(7) +#define CLK_DIVIDER_REG_8BIT BIT(8) +#define CLK_DIVIDER_REG_16BIT BIT(9) extern const struct clk_ops clk_divider_ops; extern const struct clk_ops clk_divider_ro_ops; @@ -726,18 +738,18 @@ struct clk_hw *__clk_hw_register_divider(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u16 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); struct clk_hw *__devm_clk_hw_register_divider(struct device *dev, struct device_node *np, const char *name, const char *parent_name, const struct clk_hw *parent_hw, const struct clk_parent_data *parent_data, unsigned long flags, - void __iomem *reg, u8 shift, u8 width, u8 clk_divider_flags, + void __iomem *reg, u8 shift, u8 width, u16 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); struct clk *clk_register_divider_table(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, - u8 clk_divider_flags, const struct clk_div_table *table, + u16 clk_divider_flags, const struct clk_div_table *table, spinlock_t *lock); /** * clk_register_divider - register a divider clock with the clock framework From patchwork Wed May 29 08:01:01 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800161 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1E77A175549; Wed, 29 May 2024 08:01:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969719; cv=none; b=ECHus+Cn8Qi7tacSN018Jw19YuQaawIbwKN8gPfutB6Mfa/N1/6mEATW8EDc3bOAQIPXkC+Hjv3vafAajriPFZPQN9YbVd/cGowFj0Asb4DBb5XjMy38UTWevKjIDxyJP2l/YT/zsGfaT3tB7iU6x5LHfvbYNPiHT0O9+EOicO0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969719; c=relaxed/simple; bh=5TYIRCdROfZPD6bJqJjCWvlz/HuX0IO4NZXzSUELV/M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WWXjeNDww4hZu8DOqRCp+SREs7OKdyp1xO2rFrLi5TBNcBtcxEM5dk51i2ewDq4LX0scpCvpDMH3LbYScCels0DYmmbXt+KNDiPorUhDXXBAmrRi+IJMnylJji8QDNmp3CYUFQSsWE4JXzmep+IyOqJrH98o7Kva/ovE6O/wEFQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 044571C0F53; Wed, 29 May 2024 17:01:54 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 15/36] clk: renesas: Add SH7750/7751 CPG Driver Date: Wed, 29 May 2024 17:01:01 +0900 Message-Id: <3d4f043db8f4827c6bcf63c23cba00e03a8a2721.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH7750 and SH7751 series CPG driver. This driver supported frequency control and clock gating. Signed-off-by: Yoshinori Sato --- drivers/clk/renesas/Kconfig | 13 +- drivers/clk/renesas/Makefile | 1 + drivers/clk/renesas/clk-sh7750.c | 480 +++++++++++++++++++++++++++++++ 3 files changed, 491 insertions(+), 3 deletions(-) create mode 100644 drivers/clk/renesas/clk-sh7750.c diff --git a/drivers/clk/renesas/Kconfig b/drivers/clk/renesas/Kconfig index d252150402e8..482efcb6e76e 100644 --- a/drivers/clk/renesas/Kconfig +++ b/drivers/clk/renesas/Kconfig @@ -1,8 +1,8 @@ # SPDX-License-Identifier: GPL-2.0 config CLK_RENESAS - bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS - default y if ARCH_RENESAS + bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS && !SUPERH + default y if ARCH_RENESAS || SUPERH select CLK_EMEV2 if ARCH_EMEV2 select CLK_RZA1 if ARCH_R7S72100 select CLK_R7S9210 if ARCH_R7S9210 @@ -41,6 +41,9 @@ config CLK_RENESAS select CLK_R9A08G045 if ARCH_R9A08G045 select CLK_R9A09G011 if ARCH_R9A09G011 select CLK_SH73A0 if ARCH_SH73A0 + select CLK_SH7750 if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7750S || \ + CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751 || \ + CPU_SUBTYPE_SH7751R if CLK_RENESAS @@ -198,7 +201,6 @@ config CLK_SH73A0 select CLK_RENESAS_CPG_MSTP select CLK_RENESAS_DIV6 - # Family config CLK_RCAR_CPG_LIB bool "CPG/MSSR library functions" if COMPILE_TEST @@ -228,6 +230,11 @@ config CLK_RZG2L bool "Renesas RZ/{G2L,G2UL,G3S,V2L} family clock support" if COMPILE_TEST select RESET_CONTROLLER +config CLK_SH7750 + bool "Renesas SH7750/7751 family clock support" if COMPILE_TEST + help + This is a driver for SH7750 / SH7751 CPG. + # Generic config CLK_RENESAS_CPG_MSSR bool "CPG/MSSR clock support" if COMPILE_TEST diff --git a/drivers/clk/renesas/Makefile b/drivers/clk/renesas/Makefile index f7e18679c3b8..ea0ffa8d59c4 100644 --- a/drivers/clk/renesas/Makefile +++ b/drivers/clk/renesas/Makefile @@ -38,6 +38,7 @@ obj-$(CONFIG_CLK_R9A07G054) += r9a07g044-cpg.o obj-$(CONFIG_CLK_R9A08G045) += r9a08g045-cpg.o obj-$(CONFIG_CLK_R9A09G011) += r9a09g011-cpg.o obj-$(CONFIG_CLK_SH73A0) += clk-sh73a0.o +obj-$(CONFIG_CLK_SH7750) += clk-sh7750.o # Family obj-$(CONFIG_CLK_RCAR_CPG_LIB) += rcar-cpg-lib.o diff --git a/drivers/clk/renesas/clk-sh7750.c b/drivers/clk/renesas/clk-sh7750.c new file mode 100644 index 000000000000..6f1580ce96c5 --- /dev/null +++ b/drivers/clk/renesas/clk-sh7750.c @@ -0,0 +1,480 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas SH7750/51 CPG driver + * + * Copyright 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include + +/* PCLK divide rate selector */ +static const struct clk_div_table pdiv_table[] = { + { .val = 0, .div = 2, }, + { .val = 1, .div = 3, }, + { .val = 2, .div = 4, }, + { .val = 3, .div = 6, }, + { .val = 4, .div = 8, }, + { } +}; + +/* ICLK and BCLK divide rate selector */ +static const struct clk_div_table div_table[] = { + { .val = 0, .div = 1, }, + { .val = 1, .div = 2, }, + { .val = 2, .div = 3, }, + { .val = 3, .div = 4, }, + { .val = 4, .div = 6, }, + { .val = 5, .div = 8, }, + { } +}; + +struct cpg_priv { + struct clk_hw hw; + spinlock_t clklock; + void __iomem *frqcr; + void __iomem *clkstp00; + u32 mode; + u32 feat; +}; + +/* CPG feature flag */ +#define CPG_DIV1 BIT(0) /* 7750, 7750S, 7751 */ +#define MSTP_CR2 BIT(1) /* 7750S, 7750R, 7751, 7751R */ +#define MSTP_CLKSTP BIT(2) /* 7750R, 7751, 7751R */ +#define MSTP_CSTP2 BIT(3) /* 7751, 7751R */ + +enum { + CPG_SH7750, + CPG_SH7750S, + CPG_SH7750R, + CPG_SH7751, + CPG_SH7751R, +}; + +static const u32 cpg_feature[] = { + [CPG_SH7750] = CPG_DIV1, + [CPG_SH7750S] = CPG_DIV1 | MSTP_CR2, + [CPG_SH7750R] = MSTP_CR2 | MSTP_CLKSTP, + [CPG_SH7751] = CPG_DIV1 | MSTP_CR2 | MSTP_CLKSTP | MSTP_CSTP2, + [CPG_SH7751R] = MSTP_CR2 | MSTP_CLKSTP | MSTP_CSTP2, +}; + +enum clk_type {CLK_DIV, CLK_STBCR, CLK_STBCR2, CLK_CLKSTP00}; + +enum { + FRQCR = 0, + STBCR = 4, + WTCNT = 8, + WTCSR = 12, + STBCR2 = 16, + CLKSTP00 = 0, + CLKSTPCLR00 = 8, +}; + +static struct cpg_priv *cpg_data; + +#define to_priv(_hw) container_of(_hw, struct cpg_priv, hw) + +#define FRQCR_PLL1EN BIT(10) +static const unsigned int pll1mult[] = { 12, 12, 6, 12, 6, 12, 1}; + +static unsigned long pll_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct cpg_priv *cpg = to_priv(hw); + unsigned long rate = parent_rate; + u16 frqcr; + + frqcr = ioread16(cpg->frqcr); + if (frqcr & FRQCR_PLL1EN) { + rate *= pll1mult[cpg->mode]; + if (cpg->mode < 6 && (cpg->feat & CPG_DIV1)) + rate /= 2; + } + return rate; +} + +static void get_round_rate(struct cpg_priv *cpg, + unsigned long *out, bool *pllen, + unsigned long rate, unsigned long prate) +{ + long pllout, res; + bool pll; + + if (cpg->mode < 6 && (cpg->feat & CPG_DIV1)) + prate /= 2; + + pllout = prate * pll1mult[cpg->mode]; + if (abs(pllout - rate) > abs(prate - rate)) { + res = prate; + pll = false; + } else { + res = pllout; + pll = true; + } + if (out) + *out = res; + if (pllen) + *pllen = pll; +} + +static int pll_determine_rate(struct clk_hw *hw, struct clk_rate_request *req) +{ + struct cpg_priv *cpg = to_priv(hw); + + get_round_rate(cpg, &req->rate, NULL, req->rate, req->best_parent_rate); + return 0; +} + +static int pll_set_rate(struct clk_hw *hw, + unsigned long rate, unsigned long prate) +{ + struct cpg_priv *cpg = to_priv(hw); + bool oldpll, newpll; + u16 frqcr; + + frqcr = ioread16(cpg->frqcr); + get_round_rate(cpg, NULL, &newpll, rate, prate); + oldpll = frqcr & FRQCR_PLL1EN; + frqcr &= ~FRQCR_PLL1EN; + + if (newpll) { + frqcr |= FRQCR_PLL1EN; + if (!oldpll) { + /* set PLL wakeup delay time */ + iowrite16(0xa500, cpg->frqcr + WTCNT); + iowrite16(0xa507, cpg->frqcr + WTCNT); + iowrite16(0x5a00, cpg->frqcr + WTCSR); + } + } + iowrite16(frqcr, cpg->frqcr); + + /* Test for new PLL state */ + frqcr = ioread16(cpg->frqcr); + oldpll = frqcr & FRQCR_PLL1EN; + return !(oldpll == newpll); +} + +static const struct clk_ops pll_ops = { + .recalc_rate = pll_recalc_rate, + .determine_rate = pll_determine_rate, + .set_rate = pll_set_rate, +}; + +#define PLLOUT "pllout" + +static int register_pll(struct device_node *node, struct cpg_priv *cpg) +{ + const char *clk_name = node->name; + const char *parent_name; + struct clk_init_data init = { + .name = PLLOUT, + .ops = &pll_ops, + .flags = 0, + .num_parents = 1, + }; + int ret; + + parent_name = of_clk_get_parent_name(node, 0); + init.parent_names = &parent_name; + cpg->hw.init = &init; + + ret = of_clk_hw_register(node, &cpg->hw); + if (ret < 0) + pr_err("%pOF: failed to register pll clock %s (%d)\n", + node, clk_name, ret); + return ret; +} + +static void clkstp00_sw(struct clk_hw *hw, bool on) +{ + u32 val; + struct clk_gate *gate = to_clk_gate(hw); + + val = BIT(gate->bit_idx); + if (on) + writel(val, gate->reg + CLKSTPCLR00); + else + writel(val, gate->reg); +} + +static int clkstp00_enable(struct clk_hw *hw) +{ + clkstp00_sw(hw, true); + return 0; +} + +static void clkstp00_disable(struct clk_hw *hw) +{ + clkstp00_sw(hw, false); +} + +static int clkstp00_is_enabled(struct clk_hw *hw) +{ + u8 val; + struct clk_gate *gate = to_clk_gate(hw); + + val = readb(gate->reg); + val &= 1 << gate->bit_idx; + return val == 0; +} + +static const struct clk_ops gate_clkstp00_ops = { + .enable = clkstp00_enable, + .disable = clkstp00_disable, + .is_enabled = clkstp00_is_enabled, +}; + +static struct clk_hw *clk_hw_register_clkstp(struct device_node *node, + const char *name, + const char *parent, + void __iomem *reg, int bit, + spinlock_t *lock) +{ + struct clk_gate *gate; + struct clk_init_data init = { + .name = name, + .ops = &gate_clkstp00_ops, + .flags = 0, + .parent_names = &parent, + .num_parents = 1, + }; + struct clk_hw *hw; + int ret; + + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (gate == NULL) + goto error; + gate->reg = reg; + gate->bit_idx = bit; + gate->flags = 0; + gate->lock = lock; + gate->hw.init = &init; + hw = &gate->hw; + ret = of_clk_hw_register(node, hw); + if (ret < 0) + goto error; + return hw; +error: + kfree(gate); + return ERR_PTR(ret); +} + +#define STBCR_BASE 5 +#define CLKSTP_BASE 2 +static int register_div(struct device_node *node, struct cpg_priv *cpg) +{ + static const char * const divout[] = { + "fck", "bck", "ick", + }; + static const char * const stbcrout[] = { + "sci_clk", "rtc_clk", "tmu012_clk", /* STBCR */ + "scif_clk", "dmac_clk", /* STBCR */ + "ubc_clk", "sq_clk", /* STBCR2 */ + }; + static const char * const clkstpout[] = { + "intc_clk", "tmu34_clk", "pcic_clk", /* CLKSTP00 */ + }; + + int num_clk = ARRAY_SIZE(divout) + ARRAY_SIZE(stbcrout) + ARRAY_SIZE(clkstpout); + struct clk_hw_onecell_data *data; + struct clk_hw *reg_hw; + unsigned int i, n; + int ret; + + data = kzalloc(struct_size(data, hws, num_clk + 1), GFP_KERNEL); + if (!data) + return -ENOMEM; + + num_clk = 0; + for (i = 0; i < ARRAY_SIZE(divout); i++) { + reg_hw = __clk_hw_register_divider(NULL, node, divout[i], + PLLOUT, NULL, NULL, + 0, cpg->frqcr, i * 3, 3, + CLK_DIVIDER_REG_16BIT, + (i == 0) ? pdiv_table : div_table, + &cpg->clklock); + if (IS_ERR(reg_hw)) { + ret = PTR_ERR(reg_hw); + goto error; + } + data->hws[num_clk++] = reg_hw; + } + + n = (cpg->feat & MSTP_CR2) ? ARRAY_SIZE(stbcrout) : STBCR_BASE; + for (i = 0; i < n; i++) { + u32 off = (i < (ARRAY_SIZE(stbcrout) - 2)) ? STBCR : STBCR2; + + reg_hw = __clk_hw_register_gate(NULL, node, stbcrout[i], + divout[0], NULL, NULL, + 0, cpg->frqcr + off, i % STBCR_BASE, + CLK_GATE_REG_8BIT | CLK_GATE_SET_TO_DISABLE, + &cpg->clklock); + if (IS_ERR(reg_hw)) { + ret = PTR_ERR(reg_hw); + goto error; + } + data->hws[num_clk++] = reg_hw; + } + + if (cpg->feat & MSTP_CLKSTP) { + n = (cpg->feat & MSTP_CSTP2) ? ARRAY_SIZE(clkstpout) : CLKSTP_BASE; + for (i = 0; i < n; i++) { + reg_hw = clk_hw_register_clkstp(node, clkstpout[i], + divout[0], cpg->clkstp00, + i, &cpg->clklock); + if (IS_ERR(reg_hw)) { + ret = PTR_ERR(reg_hw); + goto error; + } + data->hws[num_clk++] = reg_hw; + } + } + + data->num = num_clk; + ret = of_clk_add_hw_provider(node, of_clk_hw_onecell_get, data); + if (ret < 0) + goto error; + return 0; + +error: + pr_err("%pOF: failed to register clock divider (%d)\n", + node, ret); + for (num_clk--; num_clk >= 0; num_clk--) + kfree(data->hws[num_clk]); + kfree(data); + return ret; +} + +#define NR_CLKMODE 7 +static int sh7750_cpg_setup(struct device_node *node, u32 feat) +{ + struct cpg_priv *cpg; + u32 mode = NR_CLKMODE; + int ret = 0; + + cpg_data = NULL; + + of_property_read_u32_index(node, "renesas,mode", 0, &mode); + if (mode >= NR_CLKMODE) { + pr_err("%s: Invalid clock mode setting (%u)\n", + node->name, mode); + return -EINVAL; + } + + cpg = kzalloc(sizeof(struct cpg_priv), GFP_KERNEL); + if (!cpg) + return -ENOMEM; + + cpg->frqcr = of_iomap(node, 0); + if (cpg->frqcr == NULL) { + pr_err("%pOF: failed to map divide register", node); + ret = -ENODEV; + goto cpg_free; + } + + if (feat & MSTP_CLKSTP) { + cpg->clkstp00 = of_iomap(node, 1); + if (cpg->clkstp00 == NULL) { + pr_err("%pOF: failed to map clkstp00 register", node); + ret = -ENODEV; + goto unmap_frqcr; + } + } + cpg->feat = feat; + cpg->mode = mode; + + ret = register_pll(node, cpg); + if (ret < 0) + goto unmap_clkstp00; + + ret = register_div(node, cpg); + if (ret < 0) + goto unmap_clkstp00; + + cpg_data = cpg; + return 0; + +unmap_clkstp00: + iounmap(cpg->clkstp00); +unmap_frqcr: + iounmap(cpg->frqcr); +cpg_free: + kfree(cpg); + return ret; +} + +static void __init sh7750_cpg_init(struct device_node *node) +{ + sh7750_cpg_setup(node, cpg_feature[CPG_SH7750]); +} + +static void __init sh7750s_cpg_init(struct device_node *node) +{ + sh7750_cpg_setup(node, cpg_feature[CPG_SH7750S]); +} + +static void __init sh7750r_cpg_init(struct device_node *node) +{ + sh7750_cpg_setup(node, cpg_feature[CPG_SH7750R]); +} + +static void __init sh7751_cpg_init(struct device_node *node) +{ + sh7750_cpg_setup(node, cpg_feature[CPG_SH7751]); +} + +static void __init sh7751r_cpg_init(struct device_node *node) +{ + sh7750_cpg_setup(node, cpg_feature[CPG_SH7751R]); +} + +CLK_OF_DECLARE_DRIVER(sh7750_cpg, "renesas,sh7750-cpg", + sh7750_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7750s_cpg, "renesas,sh7750s-cpg", + sh7750s_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7750r_cpg, "renesas,sh7750r-cpg", + sh7750r_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7751_cpg, "renesas,sh7751-cpg", + sh7751_cpg_init); +CLK_OF_DECLARE_DRIVER(sh7751r_cpg, "renesas,sh7751r-cpg", + sh7751r_cpg_init); + +static int sh7750_cpg_probe(struct platform_device *pdev) +{ + u32 feature; + + if (cpg_data) + return 0; + feature = *(u32 *)of_device_get_match_data(&pdev->dev); + return sh7750_cpg_setup(pdev->dev.of_node, feature); +} + +static const struct of_device_id sh7750_cpg_of_match[] = { + { .compatible = "renesas,sh7750-cpg", + .data = &cpg_feature[CPG_SH7750] }, + { .compatible = "renesas,sh7750s-cpg", + .data = &cpg_feature[CPG_SH7750S] }, + { .compatible = "renesas,sh7750r-cpg", + .data = &cpg_feature[CPG_SH7750R] }, + { .compatible = "renesas,sh7751-cpg", + .data = &cpg_feature[CPG_SH7751] }, + { .compatible = "renesas,sh7751r-cpg", + .data = &cpg_feature[CPG_SH7751R] }, + { } +}; + +static struct platform_driver sh7750_cpg_driver = { + .probe = sh7750_cpg_probe, + .driver = { + .name = "sh7750-cpg", + .of_match_table = sh7750_cpg_of_match, + }, +}; +builtin_platform_driver(sh7750_cpg_driver); From patchwork Wed May 29 08:01:02 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800468 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D7B7F177992; Wed, 29 May 2024 08:01:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969720; cv=none; b=Y+uRsw/Ny/z8KHk629Qqrhnqj5mWNzqD8E51FXcjdRyY3fpikCzNAQgxNG7bAZMlLl7Ey4aThQyJISFMp6FKlRjjN/Pz48vrF91oggJBYiJtd2FMppw0hxi/lvk2BeB4DmsxRNcsiXeqEpcosP3E4nabutg76WMeQmTNl1bEM9E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969720; c=relaxed/simple; bh=z1R2WM6+MDn322XDwM0+gJz+HFcml26ExuUqyFGPt6k=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=lMvVsh9I1TNk029rZ4jRC1LteSUs65F+j8NIs9K53+/P0kav8bcWJ9V+4s80JjcSE8s6lKfLaqtyQTrJQa/noaW89c1jTvuy3DH2HtD+SRjusvMXzz7StVcGSxx24SZ5AKr/S0Vw/P9N8Gqz0AItjdicQfTkN4esFoUpgxCx0Ig= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id DA6C21C0F6C; Wed, 29 May 2024 17:01:56 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 16/36] irqchip: Add SH7751 INTC driver Date: Wed, 29 May 2024 17:01:02 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH7751 Internal interrupt controller driver. Signed-off-by: Yoshinori Sato --- drivers/irqchip/Kconfig | 8 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-renesas-sh7751.c | 282 +++++++++++++++++++++++++++ 3 files changed, 291 insertions(+) create mode 100644 drivers/irqchip/irq-renesas-sh7751.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index 14464716bacb..f45a229963d4 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -715,4 +715,12 @@ config SUNPLUS_SP7021_INTC chained controller, routing all interrupt source in P-Chip to the primary controller on C-Chip. +config RENESAS_SH7751_INTC + bool "Renesas SH7751 Interrupt Controller" + depends on SH_DEVICE_TREE || COMPILE_TEST + select IRQ_DOMAIN_HIERARCHY + help + Support for the Renesas SH7751 On-chip interrupt controller. + And external interrupt encoder for some targets. + endmenu diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index d9dc3d99aaa8..7bde45f05a1e 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -124,3 +124,4 @@ obj-$(CONFIG_IRQ_IDT3243X) += irq-idt3243x.o obj-$(CONFIG_APPLE_AIC) += irq-apple-aic.o obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o obj-$(CONFIG_SUNPLUS_SP7021_INTC) += irq-sp7021-intc.o +obj-$(CONFIG_RENESAS_SH7751_INTC) += irq-renesas-sh7751.o diff --git a/drivers/irqchip/irq-renesas-sh7751.c b/drivers/irqchip/irq-renesas-sh7751.c new file mode 100644 index 000000000000..91d6dc3ed04c --- /dev/null +++ b/drivers/irqchip/irq-renesas-sh7751.c @@ -0,0 +1,282 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Renesas SH7751 interrupt controller driver + * + * Copyright 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include + +struct ipr { + u16 off; + u16 idx; +}; + +struct sh7751_intc_priv { + const struct ipr *iprmap; + void __iomem *base; + void __iomem *intpri00; + bool irlm; +}; + +enum { + R_ICR = 0x00, + R_IPR = 0x04, + R_INTPRI00 = 0x00, + R_INTREQ00 = 0x20, + R_INTMSK00 = 0x40, + R_INTMSKCLR00 = 0x60, +}; + +#define ICR_IRLM BIT(7) + +/* + * SH7751 IRQ mapping + * IRQ16 - 63: Group0 - IPRA to IPRD + * IRQ16 - 31: external IRL input (ICR.IRLM is 0) + * IRQ80 - 92: Group1 - INTPRI00 + */ +#define IRQ_START 16 +#define MAX_IRL (IRQ_START + NR_IRL) +#define GRP0_IRQ_END 63 +#define GRP1_IRQ_START 80 +#define IRQ_END 92 + +#define NR_IPRMAP0 (GRP0_IRQ_END - IRQ_START + 1) +#define NR_IPRMAP1 (IRQ_END - GRP1_IRQ_START) +#define IPR_PRI_MASK 0x000f + +#define IPRA 0 +#define IPRB 4 +#define IPRC 8 +#define IPRD 12 +#define INTPRI00 256 +#define IPR_B12 12 +#define IPR_B8 8 +#define IPR_B4 4 +#define IPR_B0 0 + +/* SH7751 EVT to IPR mapping table */ +static const struct ipr sh7751_iprmap[] = { + [evt2irq(0x240)] = {IPRD, IPR_B12}, /* IRL0 (ICR.IRLM=1) */ + [evt2irq(0x2a0)] = {IPRD, IPR_B8}, /* IRL1 (ICR.IRLM=1) */ + [evt2irq(0x300)] = {IPRD, IPR_B4}, /* IRL2 (ICR.IRLM=1) */ + [evt2irq(0x360)] = {IPRD, IPR_B0}, /* IRL3 (ICR.IRLM=1) */ + [evt2irq(0x400)] = {IPRA, IPR_B12}, /* TMU0 */ + [evt2irq(0x420)] = {IPRA, IPR_B8}, /* TMU1 */ + [evt2irq(0x440)] = {IPRA, IPR_B4}, /* TMU2 TNUI */ + [evt2irq(0x460)] = {IPRA, IPR_B4}, /* TMU2 TICPI */ + [evt2irq(0x480)] = {IPRA, IPR_B0}, /* RTC ATI */ + [evt2irq(0x4a0)] = {IPRA, IPR_B0}, /* RTC PRI */ + [evt2irq(0x4c0)] = {IPRA, IPR_B0}, /* RTC CUI */ + [evt2irq(0x4e0)] = {IPRB, IPR_B4}, /* SCI ERI */ + [evt2irq(0x500)] = {IPRB, IPR_B4}, /* SCI RXI */ + [evt2irq(0x520)] = {IPRB, IPR_B4}, /* SCI TXI */ + [evt2irq(0x540)] = {IPRB, IPR_B4}, /* SCI TEI */ + [evt2irq(0x560)] = {IPRB, IPR_B12}, /* WDT */ + [evt2irq(0x580)] = {IPRB, IPR_B8}, /* REF RCMI */ + [evt2irq(0x5a0)] = {IPRB, IPR_B4}, /* REF ROVI */ + [evt2irq(0x600)] = {IPRC, IPR_B0}, /* H-UDI */ + [evt2irq(0x620)] = {IPRC, IPR_B12}, /* GPIO */ + [evt2irq(0x640)] = {IPRC, IPR_B8}, /* DMAC DMTE0 */ + [evt2irq(0x660)] = {IPRC, IPR_B8}, /* DMAC DMTE1 */ + [evt2irq(0x680)] = {IPRC, IPR_B8}, /* DMAC DMTE2 */ + [evt2irq(0x6a0)] = {IPRC, IPR_B8}, /* DMAC DMTE3 */ + [evt2irq(0x6c0)] = {IPRC, IPR_B8}, /* DMAC DMAE */ + [evt2irq(0x700)] = {IPRC, IPR_B4}, /* SCIF ERI */ + [evt2irq(0x720)] = {IPRC, IPR_B4}, /* SCIF RXI */ + [evt2irq(0x740)] = {IPRC, IPR_B4}, /* SCIF BRI */ + [evt2irq(0x760)] = {IPRC, IPR_B4}, /* SCIF TXI */ + [evt2irq(0x780)] = {IPRC, IPR_B8}, /* DMAC DMTE4 */ + [evt2irq(0x7a0)] = {IPRC, IPR_B8}, /* DMAC DMTE5 */ + [evt2irq(0x7c0)] = {IPRC, IPR_B8}, /* DMAC DMTE6 */ + [evt2irq(0x7e0)] = {IPRC, IPR_B8}, /* DMAC DMTE7 */ + [evt2irq(0xa00)] = {INTPRI00, IPR_B0}, /* PCIC PCISERR */ + [evt2irq(0xa20)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA3 */ + [evt2irq(0xa40)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA2 */ + [evt2irq(0xa60)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA1 */ + [evt2irq(0xa80)] = {INTPRI00, IPR_B4}, /* PCIC PCIDMA0 */ + [evt2irq(0xaa0)] = {INTPRI00, IPR_B4}, /* PCIC PCIPWON */ + [evt2irq(0xac0)] = {INTPRI00, IPR_B4}, /* PCIC PCIPWDWN */ + [evt2irq(0xae0)] = {INTPRI00, IPR_B4}, /* PCIC PCIERR */ + [evt2irq(0xb00)] = {INTPRI00, IPR_B8}, /* TMU3 */ + [evt2irq(0xb80)] = {INTPRI00, IPR_B12}, /* TMU4 */ +}; + +/* + * IPR registers have 4bit priority x 4 entry (16bits) + */ +static void update_ipr(struct sh7751_intc_priv *priv, unsigned int irq, u16 pri) +{ + const struct ipr *ipr = NULL; + void __iomem *ipr_base; + unsigned int offset; + u16 mask; + + ipr = priv->iprmap + irq; + if (irq < GRP1_IRQ_START) { + /* Group0 */ + ipr_base = priv->base + R_IPR; + offset = ipr->off; + } else { + /* Group1 */ + ipr_base = priv->intpri00; + offset = ipr->off - INTPRI00; + } + mask = ~(IPR_PRI_MASK << ipr->idx); + pri = (pri & IPR_PRI_MASK) << ipr->idx; + mask &= __raw_readw(ipr_base + offset); + __raw_writew(mask | pri, ipr_base + offset); +} + +static inline bool is_valid_irq(unsigned int irq) +{ + /* IRQ16 - 63 */ + if (irq >= IRQ_START && irq < IRQ_START + NR_IPRMAP0) + return true; + /* IRQ80 - 92 */ + if (irq >= GRP1_IRQ_START && irq <= IRQ_END) + return true; + return false; +} + +static inline struct sh7751_intc_priv *irq_data_to_priv(struct irq_data *data) +{ + return data->domain->host_data; +} + +/* Interrupt unmask priority is 1, mask priority is 0 */ +#define PRI_ENABLE 1 +#define PRI_DISABLE 0 +static void endisable_irq(struct irq_data *data, bool enable) +{ + struct sh7751_intc_priv *priv; + unsigned int irq; + + priv = irq_data_to_priv(data); + + irq = irqd_to_hwirq(data); + if (!is_valid_irq(irq)) { + /* IRQ out of range */ + pr_warn_once("%s: IRQ %u is out of range\n", __FILE__, irq); + return; + } + + if (irq <= MAX_IRL && !priv->irlm) { + /* IRL encoded external interrupt */ + /* enable and disable from SR.IMASK */ + update_sr_imask(irq - IRQ_START, enable); + } else { + /* Internal peripheral interrupt */ + /* enable and disable from interrupt priority */ + update_ipr(priv, irq, enable ? PRI_ENABLE : PRI_DISABLE); + } +} + +static void sh7751_mask_irq(struct irq_data *data) +{ + endisable_irq(data, false); +} + +static void sh7751_unmask_irq(struct irq_data *data) +{ + endisable_irq(data, true); +} + +static const struct irq_chip sh7751_irq_chip = { + .name = "SH7751-INTC", + .irq_unmask = sh7751_unmask_irq, + .irq_mask = sh7751_mask_irq, +}; + +static int irq_sh7751_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw_irq_num) +{ + irq_set_chip_and_handler(virq, &sh7751_irq_chip, handle_level_irq); + irq_get_irq_data(virq)->chip_data = h->host_data; + irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE); + return 0; +} + +static int irq_sh7751_xlate(struct irq_domain *d, struct device_node *ctrlr, + const u32 *intspec, unsigned int intsize, + unsigned long *out_hwirq, unsigned int *out_type) +{ + if (WARN_ON(intsize < 1)) + return -EINVAL; + *out_hwirq = evt2irq(intspec[0]); + *out_type = IRQ_TYPE_NONE; + return 0; +} + +static const struct irq_domain_ops irq_ops = { + .map = irq_sh7751_map, + .xlate = irq_sh7751_xlate, +}; + +static int __init shintc_of_init(struct device_node *intc, struct device_node *parent, + const struct ipr *iprmap) +{ + struct sh7751_intc_priv *priv; + void __iomem *base, *base2; + struct irq_domain *domain; + u16 icr; + int ret; + + priv = kzalloc(sizeof(struct sh7751_intc_priv), GFP_KERNEL); + if (priv == NULL) + return -ENOMEM; + + base = of_iomap(intc, 0); + base2 = of_iomap(intc, 1); + if (!base || !base2) { + pr_err("%pOFP: Invalid register definition\n", intc); + ret = -EINVAL; + goto error; + } + + priv->base = base; + priv->intpri00 = base2; + priv->iprmap = iprmap; + + if (of_property_read_bool(intc, "renesas,irlm")) { + priv->irlm = true; + icr = __raw_readw(priv->base + R_ICR); + icr |= ICR_IRLM; + __raw_writew(icr, priv->base + R_ICR); + } + + domain = irq_domain_add_linear(intc, NR_IRQS, &irq_ops, priv); + if (domain == NULL) { + pr_err("%pOFP: cannot initialize irq domain\n", intc); + ret = -ENOMEM; + goto error; + } + + irq_set_default_host(domain); + pr_info("%pOFP: SH7751 Interrupt controller (%s external IRQ)", + intc, priv->irlm ? "4 lines" : "15 level"); + return 0; + +error: + if (base) + iounmap(base); + if (base2) + iounmap(base); + kfree(priv); + return ret; +} + +static int __init sh7751_intc_of_init(struct device_node *intc, + struct device_node *parent) +{ + return shintc_of_init(intc, parent, sh7751_iprmap); +} + +IRQCHIP_DECLARE(sh_7751_intc, "renesas,sh7751-intc", sh7751_intc_of_init); From patchwork Wed May 29 08:01:03 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800160 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id B8FCD179665; Wed, 29 May 2024 08:02:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969722; cv=none; b=Q15XF3H594hBVXIM2nD8f8VcJbloLc18faVKNYokjAAVh0FWYlL73iVmVhCKu4S5aGBZt1meFocB0q6UrzJWZtpi20BuBLGw0SavT8K9FBcZ/XRw9xM94AJekRoKFi0mpvHsXl1l6vJd976N1Go3wZSsXDzBysoKIgl7wmAj2Do= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969722; c=relaxed/simple; bh=wwp2MnmuQJSQe5ZJ2jN4qr9tgOXWNkQS81AEpMzIIqY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WscGFZw8C6WUBmzzObNgyyfF/FLMx5G0MpeB8eGJ3cLkjNynER/Wseap43OfVOimcguVlHINQ6sRPtlZxWmyMjHt7h8hbVSc3w6Jmts8Xcd/A8pPaCYHvoTJ4CXfrwCxxpApZ6pO6n58w/ZRiVSvHzgsS41rumeF7IOYGATpq8Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 9E0F61C0F75; Wed, 29 May 2024 17:01:58 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 17/36] dt-bindings: interrupt-controller: renesas,sh7751-intc: Add json-schema Date: Wed, 29 May 2024 17:01:03 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH7751 INTC json-schema. Signed-off-by: Yoshinori Sato Reviewed-by: Rob Herring --- .../renesas,sh7751-intc.yaml | 53 +++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml new file mode 100644 index 000000000000..fb924eff465d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-intc.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 Interrupt Controller + +maintainers: + - Yoshinori Sato + +properties: + compatible: + items: + - const: renesas,sh7751-intc + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + reg: + maxItems: 2 + + reg-names: + items: + - const: ICR + - const: INTPRI00 + + renesas,icr-irlm: + $ref: /schemas/types.yaml#/definitions/flag + description: If true four independent interrupt requests mode (ICR.IRLM is 1). + +required: + - compatible + - reg + - reg-names + - '#interrupt-cells' + - interrupt-controller + +additionalProperties: false + +examples: + - | + #include + shintc: interrupt-controller@ffd00000 { + compatible = "renesas,sh7751-intc"; + reg = <0xffd00000 14>, <0xfe080000 128>; + reg-names = "ICR", "INTPRI00"; + #interrupt-cells = <1>; + interrupt-controller; + }; +... From patchwork Wed May 29 08:01:04 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800467 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A94D317B509; Wed, 29 May 2024 08:02:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969724; cv=none; b=G3qUhgAi8bRBJi3Pl5q7vQADxvGo34gLAzD79P9vKvTPLba2rZLJoCZ0LQF4HJvTP7QMfXflPFBA/hH3WMICNOdt7eqzFttLisZ1MPnrxEzYwyOnQ0+TGsjPCF+DdMpGFhItcsOdG+UifUqKYmkFwZZ9D24G4zPcU5FmNjEKAms= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969724; c=relaxed/simple; bh=F3m11lmqUQqt+FK442voAGLAy+pxkLjU/TOQowsPS5I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=O/BB6Tr5yZYXDUau2EQtYJqWD/WJP/InPD5coXSUqTiQpjF7zBmFyDxNwK172ha8DoCP5nboo9jpMr/rlj/c/N0KAXh9fZG6ogvWeuAzdj21vd0RcUOGC0yFSJBKN/+09Bp0SKeISjQit7eJnJCJBmMw2wqTV7bkYTQFCgkt5LU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 8156F1C0F72; Wed, 29 May 2024 17:02:00 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 18/36] irqchip: SH7751 external interrupt encoder with enable gate. Date: Wed, 29 May 2024 17:01:04 +0900 Message-Id: <0038be5713c19072fc83c37fb21a0083013e5f52.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SH7751 have 15 level external interrupt. It is typically connected to the CPU through a priority encoder that can suppress requests. This driver provides a way to control those hardware with irqchip. Signed-off-by: Yoshinori Sato --- drivers/irqchip/Kconfig | 7 + drivers/irqchip/Makefile | 2 + drivers/irqchip/irq-renesas-sh7751irl.c | 221 ++++++++++++++++++++++++ 3 files changed, 230 insertions(+) create mode 100644 drivers/irqchip/irq-renesas-sh7751irl.c diff --git a/drivers/irqchip/Kconfig b/drivers/irqchip/Kconfig index f45a229963d4..50b2bdf157f1 100644 --- a/drivers/irqchip/Kconfig +++ b/drivers/irqchip/Kconfig @@ -723,4 +723,11 @@ config RENESAS_SH7751_INTC Support for the Renesas SH7751 On-chip interrupt controller. And external interrupt encoder for some targets. +config RENESAS_SH7751IRL_INTC + bool "Renesas SH7751 based target IRL encoder support." + depends on RENESAS_SH7751_INTC + help + Support for External Interrupt encoder + on the some Renesas SH7751 based target. + endmenu diff --git a/drivers/irqchip/Makefile b/drivers/irqchip/Makefile index 7bde45f05a1e..f99fa24927bc 100644 --- a/drivers/irqchip/Makefile +++ b/drivers/irqchip/Makefile @@ -125,3 +125,5 @@ obj-$(CONFIG_APPLE_AIC) += irq-apple-aic.o obj-$(CONFIG_MCHP_EIC) += irq-mchp-eic.o obj-$(CONFIG_SUNPLUS_SP7021_INTC) += irq-sp7021-intc.o obj-$(CONFIG_RENESAS_SH7751_INTC) += irq-renesas-sh7751.o +obj-$(CONFIG_RENESAS_SH7751IRL_INTC) += irq-renesas-sh7751irl.o + diff --git a/drivers/irqchip/irq-renesas-sh7751irl.c b/drivers/irqchip/irq-renesas-sh7751irl.c new file mode 100644 index 000000000000..5990f2cd9a3d --- /dev/null +++ b/drivers/irqchip/irq-renesas-sh7751irl.c @@ -0,0 +1,221 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * SH7751 based board external interrupt level encoder driver + * (Renesas RTS7751R2D / IO DATA DEVICE LANDISK, USL-5P) + * + * Copyright (C) 2023 Yoshinori Sato + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct sh7751irl_intc_priv { + struct irq_domain *irq_domain; + void __iomem *base; + unsigned int width; + bool invert; + u32 enable_bit[NR_IRL]; +}; + +static inline unsigned long get_reg(void __iomem *addr, unsigned int w) +{ + switch (w) { + case 8: + return __raw_readb(addr); + case 16: + return __raw_readw(addr); + case 32: + return __raw_readl(addr); + default: + /* The size is checked when reading the properties. */ + pr_err("%s: Invalid width %d", __FILE__, w); + return 0; + } +} + +static inline void set_reg(void __iomem *addr, unsigned int w, unsigned long val) +{ + switch (w) { + case 8: + __raw_writeb(val, addr); + break; + case 16: + __raw_writew(val, addr); + break; + case 32: + __raw_writel(val, addr); + break; + default: + pr_err("%s: Invalid width %d", __FILE__, w); + } +} + +static inline struct sh7751irl_intc_priv *irq_data_to_priv(struct irq_data *data) +{ + return data->domain->host_data; +} + +static void irl_endisable(struct irq_data *data, unsigned int enable) +{ + struct sh7751irl_intc_priv *priv; + unsigned long val; + unsigned int irl; + + priv = irq_data_to_priv(data); + irl = irqd_to_hwirq(data) - IRL_BASE_IRQ; + + if (irl < NR_IRL && priv->enable_bit[irl] < priv->width) { + if (priv->invert) + enable = !enable; + + val = get_reg(priv->base, priv->width); + if (enable) + set_bit(priv->enable_bit[irl], &val); + else + clear_bit(priv->enable_bit[irl], &val); + set_reg(priv->base, priv->width, val); + } else { + pr_err("%s: Invalid register define in IRL %u", __FILE__, irl); + } +} + +static void sh7751irl_intc_disable_irq(struct irq_data *data) +{ + irl_endisable(data, 0); +} + +static void sh7751irl_intc_enable_irq(struct irq_data *data) +{ + irl_endisable(data, 1); +} + +static struct irq_chip sh7751irl_intc_chip = { + .name = "SH7751IRL-INTC", + .irq_enable = sh7751irl_intc_enable_irq, + .irq_disable = sh7751irl_intc_disable_irq, +}; + +static int sh7751irl_intc_map(struct irq_domain *h, unsigned int virq, + irq_hw_number_t hw_irq_num) +{ + irq_set_chip_and_handler(virq, &sh7751irl_intc_chip, handle_level_irq); + irq_get_irq_data(virq)->chip_data = h->host_data; + irq_modify_status(virq, IRQ_NOREQUEST, IRQ_NOPROBE); + return 0; +} + +static int sh7751irl_intc_translate(struct irq_domain *domain, + struct irq_fwspec *fwspec, unsigned long *hwirq, + unsigned int *type) +{ + if (fwspec->param[0] > NR_IRL) + return -EINVAL; + + switch (fwspec->param_count) { + case 2: + *type = fwspec->param[1]; + fallthrough; + case 1: + *hwirq = fwspec->param[0] + IRL_BASE_IRQ; + break; + default: + return -EINVAL; + } + return 0; +} + +static const struct irq_domain_ops sh7751irl_intc_domain_ops = { + .map = sh7751irl_intc_map, + .translate = sh7751irl_intc_translate, +}; + +static int __init load_irl_bit(struct device_node *node, struct sh7751irl_intc_priv *priv) +{ + struct property *enable_map; + const __be32 *p; + u32 nr_bits, bit; + u32 irl; + int ret; + + /* Fill in unused */ + memset(priv->enable_bit, ~0, sizeof(priv->enable_bit)); + + enable_map = of_find_property(node, "renesas,enable-reg", &nr_bits); + if (IS_ERR(enable_map)) + return PTR_ERR(enable_map); + + nr_bits /= sizeof(u32); + if (nr_bits > priv->width) + return -EINVAL; + + ret = nr_bits; + p = NULL; + for (bit = nr_bits; bit > 0; bit--) { + p = of_prop_next_u32(enable_map, p, &irl); + if (p == NULL || irl > NR_IRL) + return -EINVAL; + if (irl == NR_IRL) + /* IRL15 is unassined bit */ + continue; + priv->enable_bit[irl] = bit - 1; + } + return ret; +} + +static int __init sh7751irl_init(struct device_node *node, struct device_node *parent) +{ + struct sh7751irl_intc_priv *priv; + struct resource res; + struct irq_domain *d; + void __iomem *base; + int ret = 0; + + if (of_address_to_resource(node, 0, &res)) + return -EINVAL; + if (resource_size(&res) > 4) + return -EINVAL; + + base = ioremap(res.start, resource_size(&res)); + if (!base) + return -EINVAL; + + priv = kzalloc(sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = base; + priv->width = 8 << resource_size(&res); + + ret = load_irl_bit(node, priv); + if (ret < 0) { + pr_err("%pOFP: Invalid register define.\n", node); + goto error; + } + + d = irq_domain_add_tree(node, &sh7751irl_intc_domain_ops, priv); + if (d == NULL) { + pr_err("%pOFP: cannot initialize irq domain\n", node); + ret = -ENOMEM; + goto error; + } + + priv->irq_domain = d; + irq_domain_update_bus_token(d, DOMAIN_BUS_WIRED); + pr_info("%pOFP: SH7751 External Interrupt encoder (input=%d)", node, ret); + return 0; +error: + kfree(priv); + return ret; +} + +IRQCHIP_DECLARE(renesas_sh7751_irl, "renesas,sh7751-irl-ext", sh7751irl_init); From patchwork Wed May 29 08:01:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800159 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 035B317DE17; Wed, 29 May 2024 08:02:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Wed, 29 May 2024 17:02:02 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 19/36] dt-bindings: interrupt-controller: renesas,sh7751-irl-ext: Add json-schema Date: Wed, 29 May 2024 17:01:05 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH7751 external interrupt encoder json-schema. Signed-off-by: Yoshinori Sato --- .../renesas,sh7751-irl-ext.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml new file mode 100644 index 000000000000..ff70d57b86cd --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/renesas,sh7751-irl-ext.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/renesas,sh7751-irl-ext.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SH7751 external interrupt encoder with enable regs. + +maintainers: + - Yoshinori Sato + +description: + This is the generally used external interrupt encoder on SH7751 based boards. + +properties: + compatible: + items: + - const: renesas,sh7751-irl-ext + + reg: true + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + '#address-cells': + const: 0 + + renesas,set-to-disable: + $ref: /schemas/types.yaml#/definitions/flag + description: Invert enable registers. Setting the bit to 0 enables interrupts. + + renesas,enable-reg: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + IRQ enable register bit mapping + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - renesas,enable-reg + +additionalProperties: false + +examples: + - | + r2dintc: interrupt-controller@a4000000 { + compatible = "renesas,sh7751-irl-ext"; + reg = <0xa4000000 0x02>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>; + }; From patchwork Wed May 29 08:01:06 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800466 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 39DFE17DE24; Wed, 29 May 2024 08:02:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969727; cv=none; b=OIjpj3PxG9rE+cBuTtJKge+sfi7hZzB704jSQBOyMrXuZgyP8JRmq3NFyS9ewceSoYPXPNuRH72Pm2keGqukp55oiE2TJC58y1mt8lbwCWV5dpr8stlnRStz3sUe4u4vsgF5zAq6fw/PeAqgQlkuMJHCRmZrZ+8uGoTY7QN0foo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969727; c=relaxed/simple; bh=c6luz8u71CE/VdNLS8yhPrrY+gC+8ZkQ6lJ/yJUeP7I=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=oeC9SH8+0zZpb6p8GFSQ/5b3ZSr/Tdl9ctVw0dZ4GH8Wy0zEWdHRb3crMq1haRfByNA1F72gYjaZh3+Ix8l4bp5PPL9ty71vbEzrPZZQUZlC2TUV1Pt2Q3Bbg+DS76aSNrDS3YuNrwtZR0yl8hDWc8Mt3Jsr63J/QDhRhyDl8n4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 35E141C0E59; Wed, 29 May 2024 17:02:04 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 20/36] serial: sh-sci: fix SH4 OF support. Date: Wed, 29 May 2024 17:01:06 +0900 Message-Id: <57525900a4876323467612d73eded183315c1680.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 - Separated RZ's earlycon initialization from normal SCIF. - fix earlyprintk hung (NULL pointer reference). - fix SERIAL_SH_SCI_EARLYCON enablement Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven --- drivers/tty/serial/Kconfig | 2 +- drivers/tty/serial/sh-sci.c | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig index 4fdd7857ef4d..eeb22b582470 100644 --- a/drivers/tty/serial/Kconfig +++ b/drivers/tty/serial/Kconfig @@ -664,7 +664,7 @@ config SERIAL_SH_SCI_EARLYCON depends on SERIAL_SH_SCI=y select SERIAL_CORE_CONSOLE select SERIAL_EARLYCON - default ARCH_RENESAS + default ARCH_RENESAS || SUPERH config SERIAL_SH_SCI_DMA bool "DMA support" if EXPERT diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index f738980a8b2c..068f483401e3 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c @@ -2723,7 +2723,7 @@ static int sci_remap_port(struct uart_port *port) if (port->membase) return 0; - if (port->dev->of_node || (port->flags & UPF_IOREMAP)) { + if (dev_of_node(port->dev) || (port->flags & UPF_IOREMAP)) { port->membase = ioremap(port->mapbase, sport->reg_size); if (unlikely(!port->membase)) { dev_err(port->dev, "can't remap port#%d\n", port->line); @@ -3551,8 +3551,8 @@ static int __init hscif_early_console_setup(struct earlycon_device *device, OF_EARLYCON_DECLARE(sci, "renesas,sci", sci_early_console_setup); OF_EARLYCON_DECLARE(scif, "renesas,scif", scif_early_console_setup); -OF_EARLYCON_DECLARE(scif, "renesas,scif-r7s9210", rzscifa_early_console_setup); -OF_EARLYCON_DECLARE(scif, "renesas,scif-r9a07g044", rzscifa_early_console_setup); +OF_EARLYCON_DECLARE(rzscifa, "renesas,scif-r7s9210", rzscifa_early_console_setup); +OF_EARLYCON_DECLARE(rzscifa, "renesas,scif-r9a07g044", rzscifa_early_console_setup); OF_EARLYCON_DECLARE(scifa, "renesas,scifa", scifa_early_console_setup); OF_EARLYCON_DECLARE(scifb, "renesas,scifb", scifb_early_console_setup); OF_EARLYCON_DECLARE(hscif, "renesas,hscif", hscif_early_console_setup); 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smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 002421C0FCE; Wed, 29 May 2024 17:02:05 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 21/36] dt-bindings: serial: renesas,scif: Add scif-sh7751. Date: Wed, 29 May 2024 17:01:07 +0900 Message-Id: <76fffb1383820a701e0c787dcb3a25da52f6e8b7.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add Renesas SH7751 SCIF. Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven Acked-by: Rob Herring (Arm) --- Documentation/devicetree/bindings/serial/renesas,scif.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/serial/renesas,scif.yaml b/Documentation/devicetree/bindings/serial/renesas,scif.yaml index f3a3eb2831e9..7034594751bc 100644 --- a/Documentation/devicetree/bindings/serial/renesas,scif.yaml +++ b/Documentation/devicetree/bindings/serial/renesas,scif.yaml @@ -18,6 +18,7 @@ properties: - items: - enum: - renesas,scif-r7s72100 # RZ/A1H + - renesas,scif-sh7751 # SH7751 - const: renesas,scif # generic SCIF compatible UART - items: From patchwork Wed May 29 08:01:08 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800465 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 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smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id B781C1C0FA0; Wed, 29 May 2024 17:02:07 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 22/36] dt-bindings: display: smi,sm501: SMI SM501 binding json-schema Date: Wed, 29 May 2024 17:01:08 +0900 Message-Id: <2fb214e148e74fb0acc202543dca8dd8a170a6e6.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato --- .../bindings/display/smi,sm501.yaml | 443 ++++++++++++++++++ 1 file changed, 443 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/smi,sm501.yaml diff --git a/Documentation/devicetree/bindings/display/smi,sm501.yaml b/Documentation/devicetree/bindings/display/smi,sm501.yaml new file mode 100644 index 000000000000..c3ab0f08a894 --- /dev/null +++ b/Documentation/devicetree/bindings/display/smi,sm501.yaml @@ -0,0 +1,443 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/smi,sm501.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Motion SM501 Mobile Multimedia Companion Chip + +maintainers: + - Yoshinori Sato + +description: + Silicon Motion Inc, SM501 Companion Chip. + +definitions: + fb-flag: + $ref: /schemas/types.yaml#/definitions/string-array + description: Display initialize flags. + items: + anyOf: + - const: use-init-done + - const: disable-at-exit + - const: use-hwcursor + - const: use-hwaccel + - const: panel-no-fpen + - const: panel-no-vbiasen + - const: panel-inv-fpen + - const: panel-inv-vbiasen + maxItems: 8 + +properties: + compatible: + const: + smi,sm501 + + reg: + maxItems: 2 + description: + First entry - System Configuration registers + Second entry - IO space (Display Controller register) + + interrupts: + description: SM501 interrupt to the cpu should be described here. + + clocks: + minItems: 2 + + clock-names: + items: + - const: mclk + - const: m1xclk + + mode: + $ref: /schemas/types.yaml#/definitions/string + description: Select a video mode + + edid: + $ref: /schemas/types.yaml#/definitions/uint8-array + description: + Verbatim EDID data block describing attached display. + Data from the detailed timing descriptor will be used to + program the display controller. + + smi,little-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: available on big endian systems, to set different foreign endian. + smi,big-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: available on little endian systems, to set different foreign endian. + + smi,swap-fb-endian: + $ref: /schemas/types.yaml#/definitions/flag + description: swap framebuffer byteorder. + + route-crt-panel: + $ref: /schemas/types.yaml#/definitions/flag + description: Panel output merge to CRT. + + crt: + type: object + description: CRT output control + properties: + smi,flags: + $ref: "#/definitions/fb-flag" + + bpp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Color depth + + panel: + type: object + description: Panel output control + properties: + smi,flags: + $ref: "#/definitions/fb-flag" + + bpp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Color depth + + smi,devices: + $ref: /schemas/types.yaml#/definitions/string-array + description: Select SM501 device functions. + items: + anyOf: + - const: usb-host + - const: usb-slave + - const: ssp0 + - const: ssp1 + - const: uart0 + - const: uart1 + - const: fbaccel + - const: ac97 + - const: i2s + minItems: 1 + maxItems: 9 + + smi,misc-timing-ex: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - Extend bus holding time. + enum: + - none + - "16" + - "32" + - "48" + - "64" + - "80" + - "96" + - "112" + - "128" + - "144" + - "160" + - "176" + - "192" + - "208" + - "224" + - "240" + + smi,misc-timing-xc: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - Xscale clock input select. + enum: + - internal-pll + - hclk + - gpio30 + + smi,misc-timing-usb-current: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - USB host current detection. + enum: + - disable + - enable + + smi,misc-timing-ssm1: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - System SDRAM Clock Select for PW Mode 1. + enum: + - "288" + - divider + + smi,misc-timing-sm1: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - SDRAM clock divider for PW mode 1. + enum: + - "1" + - "2" + - "3" + - "4" + - "6" + - "8" + - "12" + - "16" + - "24" + - "32" + - "48" + - "64" + - "96" + - "128" + - "192" + - "384" + + smi,misc-timing-ssm0: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - System SDRAM Clock Select for PW Mode 0. + enum: + - "288" + - divider + + smi,misc-timing-sm0: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - SDRAM clock divider for PW mode 0. + enum: + - "1" + - "2" + - "3" + - "4" + - "6" + - "8" + - "12" + - "16" + - "24" + - "32" + - "48" + - "64" + - "96" + - "128" + - "192" + - "384" + + smi,misc-timing-deb: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - 96MHz PLL debug control + enum: + - input-reference + - output + + smi,misc-timing-a: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - ACPI Control. + enum: + - no-acpi + - acpi + + smi,misc-timing-divider: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - Output Frequency Selection for Second PLL. + enum: + - "336" + - "288" + - "240" + - "192" + + smi,misc-timing-u: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - USB Host mode. + enum: + - normal + - simulation + + smi,misc-timing-delay: + $ref: /schemas/types.yaml#/definitions/string + description: Miscellaneous Timing - Delay time to latch read data for external SDRAM memory controller. + enum: + - none + - "0.5" + - "1.0" + - "1.5" + - "2.0" + - "2.5" + + smi,misc-control-pad: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - PCI Pad drive strength. + enum: + - "24" + - "12" + - "8" + + smi,misc-control-usbclk: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - USB Clcok Select. + enum: + - xtal + - "96" + - "48" + + smi,misc-control-ssp: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - UART1/SSP1 Select. + enum: + - uart1 + - ssp1 + + smi,misc-control-lat: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - 8051 Latch Enable for Address. + enum: + - disable + - enable + + smi,misc-control-fp: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - Flat Panel Data Select. + enum: + - "18" + - "24" + + smi,misc-control-freq: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - Crystal frequency select. + enum: + - "24" + - "12" + + smi,misc-control-refresh: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - Internal memory refresh control + enum: + - "8" + - "16" + - "32" + - "64" + + smi,misc-control-hold: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - BUS Hold time. + enum: + - fifo-empty + - "8" + - "16" + - "24" + - "32" + + smi,misc-control-sh: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - Renesas SuperH ready polarity. + enum: + - active-low + - active-high + + smi,misc-control-ii: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - Interrupt inverting. + enum: + - normal + - inverted + + smi,misc-control-pll: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - PLL clock count. + enum: + - disable + - enable + + smi,misc-control-gap: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - DAC Band Gap Control. + const: "0" + + smi,misc-control-dac: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - DAC Power control. + enum: + - disable + - enable + + smi,misc-control-mc: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - USB slave controller. + enum: + - cpu + - "8051" + + smi,misc-control-bl: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - CPU Master burst length. + enum: + - "1" + - "8" + + smi,misc-control-usb: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - USB port select. + enum: + - master + - slave + + smi,misc-control-vr: + $ref: /schemas/types.yaml#/definitions/string + description: Micellaneous Control - NEC VR Memory map select. + enum: + - "0x1e00000" + - "0x3e00000" + + gpio: + type: object + description: GPIO pin control + additionalProperties: false + patternProperties: + "^pin-[0-9]+$": + $ref: /schemas/types.yaml#/definitions/string + enum: + - ioport + - function + +additionalProperties: false + +required: + - compatible + - reg + - interrupts + + +examples: + - | + display@10000000 { + compatible = "smi,sm501"; + reg = <0x10000000 0x03e00000 + 0x13e00000 0x00200000>; + interrupt-parent = <&r2dintc>; + interrupts = <4 0>; + clocks = <&mclk &m1xclk>; + clock-names = "mclk", "m1xclk"; + mode = "640x480-16@60"; + smi,little-endian; + smi,devices = "usb-host", "uart0"; + smi,swap-fb-endian; + edid = [00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 + 00 00 01 04 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 f0 0a 80 fb 20 e0 25 10 32 60 + 02 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 bd]; + + smi,misc-timing-ex = "16"; + smi,misc-timing-xc = "internal-pll"; + smi,misc-timing-usb-current = "disable"; + smi,misc-control-pad = "24"; + smi,misc-control-usbclk = "xtal"; + smi,misc-control-sh = "active-low"; + + gpio { + pin-0 = "ioport"; + pin-1 = "function"; + }; + + crt { + smi,flags = "use-init-done", + "disable-at-exit", + "use-hwcursor", + "use-hwaccel"; + }; + + panel { + bpp = <16>; + smi,flags = "use-init-done", + "disable-at-exit", + "use-hwcursor", + "use-hwaccel"; + }; + }; From patchwork Wed May 29 08:01:09 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800157 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 2B937180A8A; Wed, 29 May 2024 08:02:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969734; cv=none; b=I6ee1/2Fjippu7I0X27csybvWL6zQ+wsj4pwHym65VJ98lEmTHI4L7DalCN96PCqNsOScawVf1gDrF6myb2X68YDclX72r+KGQT0Br6QYQMI555yPEthqQ9LOZnAT/cBACPbtCz95WLuxQtNShnRzBlYNZD2NvGAMN15g7HrUCU= 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+0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 23/36] mfd: sm501: Convert platform_data to OF property Date: Wed, 29 May 2024 17:01:09 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Various parameters of SM501 can be set using platform_data, so parameters cannot be passed in the DeviceTree target. Expands the parameters set in platform_data so that they can be specified using DeviceTree properties. Signed-off-by: Yoshinori Sato --- drivers/mfd/sm501.c | 238 ++++++++++++++++++++++++++++++++++ drivers/video/fbdev/sm501fb.c | 87 +++++++++++++ 2 files changed, 325 insertions(+) diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index b3592982a83b..d373aded0c3b 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include @@ -82,6 +83,16 @@ struct sm501_devdata { unsigned int rev; }; +struct sm501_config_props_uint { + char *name; + u32 shift; +}; + +struct sm501_config_props_flag { + char *clr_name; + char *set_name; + u32 bit; +}; #define MHZ (1000 * 1000) @@ -1370,6 +1381,227 @@ static int sm501_init_dev(struct sm501_devdata *sm) return 0; } +#define FIELD_WIDTH 4 +struct dt_values { + char *name; + unsigned int offset; + unsigned int width; + char *val[(1 << FIELD_WIDTH) + 1]; +}; + +#define fld(_name, _offset, _width, ...) \ + { \ + .name = _name, \ + .offset = _offset, \ + .width = _width, \ + .val = { __VA_ARGS__, NULL}, \ + } + +static const struct dt_values misc_timing[] = { + fld("ex", 28, 4, + "none", "16", "32", "48", "64", "80", "96", "112", + "128", "144", "160", "176", "192", "208", "224", "240"), + fld("xc", 24, 2, "internal-pll", "hclk", "gpio30"), + fld("us", 23, 1, "disable", "enable"), + fld("ssm1", 20, 1, "288", "divider"), + fld("sm1", 16, 4, + "1", "2", "4", "8", "16", "32", "64", "128", + "3", "6", "12", "24", "48", "96", "192", "384"), + fld("ssm0", 12, 1, "288", "divider"), + fld("sm0", 8, 4, + "1", "2", "4", "8", "16", "32", "64", "128", + "3", "6", "12", "24", "48", "96", "192", "384"), + fld("deb", 7, 1, "input-reference", "output"), + fld("a", 6, 1, "no-acpi", "acpi"), + fld("divider", 4, 2, "336", "288", "240", "192"), + fld("u", 3, 1, "normal", "simulation"), + fld("delay", 0, 3, "none", "0.5", "1.0", "1.5", "2.0", "2.5"), + { .name = NULL }, +}; + +static const struct dt_values misc_control[] = { + fld("pad", 30, 2, "24", "12", "8"), + fld("usbclk", 28, 2, "xtal", "96", "48"), + fld("ssp", 27, 1, "uart1", "ssp1"), + fld("lat", 26, 1, "disable", "enable"), + fld("fp", 25, 1, "18", "24"), + fld("freq", 24, 1, "24", "12"), + fld("refresh", 21, 2, "8", "16", "32", "64"), + fld("hold", 18, 3, "fifo-empty", "8", "16", "24", "32"), + fld("sh", 17, 1, "active-low", "active-high"), + fld("ii", 16, 1, "normal", "inverted"), + fld("pll", 15, 1, "disable", "enable"), + fld("gap", 13, 2, "0"), + fld("dac", 12, 1, "enable", "disable"), + fld("mc", 11, 1, "cpu", "8051"), + fld("bl", 10, 8, "1"), + fld("usb", 9, 1, "master", "slave"), + fld("vr", 4, 1, "0x1e00000", "0x3e00000"), + { .name = NULL }, +}; + +/* Read configuration values */ +static void sm501_of_read_config(struct device *dev, struct device_node *np, + const char *prefix, + const struct dt_values *values, + struct sm501_reg_init *ret) +{ + const char *name; + const char *val; + unsigned int i; + char key[64]; + u32 shift; + u32 width; + u32 mask; + + ret->mask = ~0; + ret->set = 0; + + while (values->name) { + snprintf(key, sizeof(key), "%s-%s", prefix, values->name); + name = values->name; + shift = values->offset; + width = values->width; + + if (of_property_read_string(np, key, &val) == 0) { + mask = (1 << width) - 1; + mask = ~(mask << shift); + ret->mask &= mask; + i = 0; + while (values->val[i]) { + if (strcmp(val, values->val[i]) == 0) { + ret->set |= i << shift; + break; + } + i++; + } + } + values++; + } +} + +static void sm501_of_read_gpio(struct device *dev, struct device_node *np, + struct sm501_reg_init *hi, struct sm501_reg_init *low) +{ + struct device_node *gpio_node; + struct property *prop; + unsigned int pin_no; + const char *s; + int mode; + u64 mask; + u64 set; + + mask = ~0; + set = 0; + gpio_node = of_get_child_by_name(np, "gpio"); + if (gpio_node) { + for (prop = gpio_node->properties; prop; prop = prop->next) { + mode = -1; + if (sscanf(prop->name, "pin-%u", &pin_no) == 1) { + of_property_read_string(gpio_node, prop->name, &s); + if (strcmp(s, "ioport")) { + mode = 0; + } else if (strcmp(s, "function")) { + mode = 1; + } + } + if (mode >= 0) { + mask &= ~(1 << pin_no); + set |= mode << pin_no; + } + } + } + /* Bit48 - 54 is reserved */ + mask &= ~0x007f000000000000UL; + set &= ~0x007f000000000000UL; + + hi->set = set >> 32; + low->set = set & 0xffffffff; + hi->mask = mask >> 32; + low->mask = mask & 0xffffffff; +} + +/* Read device functions */ +static u32 sm501_read_devices(struct device *dev, struct device_node *np) +{ + static const char * const funcname[] = { + "usb-host", "usb-slave", "ssp0", "ssp1", + "uart0", "uart1", "fbaccel", "ac97", + "i2s", + }; + struct property *prop; + unsigned int i; + const char *s; + u32 ret = 0; + + of_property_for_each_string(np, "smi,devices", prop, s) { + for (i = 0; i < ARRAY_SIZE(funcname); i++) { + if (strcmp(s, funcname[i]) == 0) { + ret |= 1 << i; + goto next; + } + } + dev_warn(dev, "Unknown device function '%s'", s); +next: + } + if (!ret) + dev_warn(dev, "devices not defined. disable all functions."); + return ret; +} + +/* Build platform_data from OF property */ +struct plat_dt { + struct sm501_platdata plat; + struct sm501_initdata init; +}; + +static int mclk_get(struct device_node *np, int index, unsigned long *out) +{ + struct clk *clk; + + clk = of_clk_get(np, 0); + if (IS_ERR(clk)) + return PTR_ERR(clk); + *out = clk_get_rate(clk); + clk_put(clk); + return 0; +} + +static int sm501_parse_dt(struct sm501_devdata *sm, struct device_node *np) +{ + struct sm501_platdata *plat; + struct plat_dt *dt_p; + int ret; + + dt_p = devm_kzalloc(sm->dev, sizeof(*dt_p), GFP_KERNEL); + if (!dt_p) + return -ENOMEM; + + plat = &dt_p->plat; + plat->init = &dt_p->init; + + plat->init->devices = sm501_read_devices(sm->dev, np); + + ret = mclk_get(np, 0, &plat->init->mclk); + if (ret && ret != -ENOENT) + return ret; + ret = mclk_get(np, 0, &plat->init->m1xclk); + if (ret && ret != -ENOENT) + return ret; + + sm501_of_read_config(sm->dev, np, "misc-timing", + misc_timing, &plat->init->misc_timing); + sm501_of_read_config(sm->dev, np, "misc-control", + misc_control, &plat->init->misc_control); + if (IS_ENABLED(CONFIG_MFD_SM501_GPIO)) { + sm501_of_read_gpio(sm->dev, np, + &plat->init->gpio_high, + &plat->init->gpio_low); + } + sm->platdata = plat; + return 0; +} + static int sm501_plat_probe(struct platform_device *dev) { struct sm501_devdata *sm; @@ -1406,6 +1638,12 @@ static int sm501_plat_probe(struct platform_device *dev) goto err_res; } + if (IS_ENABLED(CONFIG_OF) && dev->dev.of_node) { + ret = sm501_parse_dt(sm, dev->dev.of_node); + if (ret) + goto err_res; + } + platform_set_drvdata(dev, sm); sm->regs = ioremap(sm->io_res->start, resource_size(sm->io_res)); diff --git a/drivers/video/fbdev/sm501fb.c b/drivers/video/fbdev/sm501fb.c index d6fdc1737cd2..4162e1322dd4 100644 --- a/drivers/video/fbdev/sm501fb.c +++ b/drivers/video/fbdev/sm501fb.c @@ -1932,6 +1932,87 @@ static int sm501fb_start_one(struct sm501fb_info *info, return 0; } +#if defined(CONFIG_OF) +static u32 read_display_flags(struct device_node *np) +{ + static const char * const name[] = { + "use-init-done", "disable-at-exit", "use-hwcursor", "use-hwaccel", + "panel-no-fpen", "panel-no-vbiasen", "panel-inv-fpen", "panel-inv-vbiasen", + }; + + struct property *prop; + unsigned int i; + const char *s; + u32 ret = 0; + + of_property_for_each_string(np, "smi,flags", prop, s) { + for (i = 0; i < ARRAY_SIZE(name); i++) { + if (strcmp(s, name[i]) == 0) { + ret |= 1 << i; + break; + } + } + } + return ret; +} + +/* parse CRT / panel configuration */ +static struct sm501_platdata_fbsub *dt_fbsub(struct device *dev, + struct device_node *np, + const char *name) +{ + struct sm501_platdata_fbsub *fbsub = NULL; + struct device_node *child; + u32 flags = 0; + u32 bpp = 0; + int len; + + child = of_get_child_by_name(np, name); + if (child == NULL) + return NULL; + + of_property_read_u32(child, "bpp", &bpp); + + /* If flags property is obtained, fbsub is returned. */ + flags = read_display_flags(child); + if (flags) { + fbsub = devm_kzalloc(dev, sizeof(*fbsub), GFP_KERNEL); + if (fbsub) { + fbsub->def_bpp = bpp; + fbsub->flags = flags; + } + } + return fbsub; +} + +/* Build platform_data from OF property */ +static struct sm501_platdata_fb *pdata_from_dt(struct device *dev, struct device_node *np) +{ + enum sm501_fb_routing fb_route = SM501_FB_OWN; + struct sm501_platdata_fb *pdata = NULL; + struct sm501_platdata_fbsub *fb_crt; + struct sm501_platdata_fbsub *fb_pnl; + unsigned int flags = 0; + + if (of_property_read_bool(np, "route-crt-panel")) + fb_route = SM501_FB_CRT_PANEL; + if (of_property_read_bool(np, "swap-fb-endian")) + flags = SM501_FBPD_SWAP_FB_ENDIAN; + fb_crt = dt_fbsub(dev, np, "crt"); + fb_pnl = dt_fbsub(dev, np, "panel"); + if (fb_crt || fb_pnl) { + pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); + if (pdata) { + pdata->fb_route = fb_route; + pdata->flags = flags; + pdata->fb_crt = fb_crt; + pdata->fb_pnl = fb_pnl; + } + } + return pdata; +} +#endif + static int sm501fb_probe(struct platform_device *pdev) { struct sm501fb_info *info; @@ -1974,6 +2055,12 @@ static int sm501fb_probe(struct platform_device *pdev) if (info->edid_data) found = 1; } + /* Get platform data compatible configuration */ + if (!found) { + info->pdata = pdata_from_dt(dev, np); + if (info->pdata) + found = 1; + } } #endif if (!found) { From patchwork Wed May 29 08:01:10 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800464 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 5250316936F; Wed, 29 May 2024 08:02:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969735; cv=none; b=uqu+YlHWtfOPxINyqZCip5PXiWnCinjS/10/Pg+o5WZJHcx4S1S1TLbzJ3INZPBV91eDyWXtjoR3a5cVhDmky5kzHgNF1qQ+sjvuF7avHCqQdCoQSLH1VLeVmlfAn51htPkVw+UIW9xQzoEqhuTFiEQZuqX/Sq5Yj+4HsdkiJOs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969735; c=relaxed/simple; bh=80R/ltRudm5eoBviP7xSOoebOAWCzvwYc6/Eti+oCcY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=TI8e44tpGt9JvRMWKF0IyDNyaXsCgsGk/ixwe12nuxFlCUo6emvqBiNiFu1z3Lj9IgMYTgtcitEOuNTRQt5yQGhc9B4ZDewz093UywwfNBQtpOiR9sOuR/rqquDOIsoNNCsXS6dVY5poKT3t8WlF98rRsWXnqXQk99YBKseBpb8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 5613B1C0FF4; Wed, 29 May 2024 17:02:11 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 24/36] dt-binding: sh: cpus: Add SH CPUs json-schema Date: Wed, 29 May 2024 17:01:10 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas SH series and compatible ISA CPUs. Signed-off-by: Yoshinori Sato --- .../devicetree/bindings/sh/cpus.yaml | 63 +++++++++++++++++++ 1 file changed, 63 insertions(+) create mode 100644 Documentation/devicetree/bindings/sh/cpus.yaml diff --git a/Documentation/devicetree/bindings/sh/cpus.yaml b/Documentation/devicetree/bindings/sh/cpus.yaml new file mode 100644 index 000000000000..e652b8414ae8 --- /dev/null +++ b/Documentation/devicetree/bindings/sh/cpus.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sh/cpus.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH CPUs + +maintainers: + - Yoshinori Sato + +description: |+ + Definition of CPU core with Renesas SuperH and compatible instruction set. + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,sh2a + - renesas,sh3 + - renesas,sh4 + - renesas,sh4a + - jcore,j2 + - const: renesas,sh2 + - const: renesas,sh2 + + clocks: + maxItems: 1 + + reg: + maxItems: 1 + + device_type: + const: cpu + +required: + - compatible + - reg + - device_type + +additionalProperties: false + +examples: + - | + #include + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu: cpu@0 { + compatible = "renesas,sh4", "renesas,sh2"; + device_type = "cpu"; + reg = <0>; + clocks = <&cpg SH7750_CPG_ICK>; + clock-names = "ick"; + icache-size = <16384>; + icache-line-size = <32>; + dcache-size = <32768>; + dcache-line-size = <32>; + }; + }; +... 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"^iom,.*": description: Iomega Corporation "^irondevice,.*": From patchwork Wed May 29 08:01:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800463 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 0421C181BBA; Wed, 29 May 2024 08:02:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969738; cv=none; b=UNv2Qbhw833b4T4sGgHeE3OLy+ihie8pMuCdmmyOSRBb2iEtFXfg1PjiBFVHI4pM6tH74WLaAmbw3Y8oHDcFC6puuRZ9HWpOpPjfvBXdvQzSl+YSOmtE61X2UDmvlXH1830OM39nOYYksGL8ngdIG79SlFPPOW7OPIThf+R5GRU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969738; c=relaxed/simple; bh=ujRB9umra6Ow9vggObeyKeVFpIbOKfySaVYNfAnwi94=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DMdYSsgtkN+QbB/qSbdykb/HVGSZjNaLu0KuyoTXXvO28KAn4gX0AgK75qlgdIfEx5J4X15Ol8+OtjSP68yU7/zWE3amVpcAvUe2/CajPwS8NlSbY5WGy/nbYN/fFLj7D1AzTkqaeiphaE6FFH534SsD3TNbtrgh8IPjBFNiXNw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id D3D6E1C1017; Wed, 29 May 2024 17:02:14 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 26/36] dt-bindings: ata: ata-generic: Add new targets Date: Wed, 29 May 2024 17:01:12 +0900 Message-Id: <8ff46a90c7be5eea45984f60b9b0db99219c82e6.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Added new ata-generic target. - iodata,usl-5p-ata - renesas,rts7751r2d-ata Each boards have simple IDE Interface. Use ATA generic driver. Signed-off-by: Yoshinori Sato --- Documentation/devicetree/bindings/ata/ata-generic.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/ata-generic.yaml b/Documentation/devicetree/bindings/ata/ata-generic.yaml index 0697927f3d7e..1025b3b351d0 100644 --- a/Documentation/devicetree/bindings/ata/ata-generic.yaml +++ b/Documentation/devicetree/bindings/ata/ata-generic.yaml @@ -18,6 +18,8 @@ properties: - enum: - arm,vexpress-cf - fsl,mpc8349emitx-pata + - iodata,usl-5p-ata + - renesas,rts7751r2d-ata - const: ata-generic reg: From patchwork Wed May 29 08:01:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800155 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 3EEEA181D17; Wed, 29 May 2024 08:02:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; 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spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id C05391C101A; Wed, 29 May 2024 17:02:16 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 27/36] dt-bindings: soc: renesas: sh: Add SH7751 based target Date: Wed, 29 May 2024 17:01:13 +0900 Message-Id: <11fc72e4417e0cc655153349037dcdeb3e0aea70.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring --- .../devicetree/bindings/soc/renesas/sh.yaml | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/renesas/sh.yaml diff --git a/Documentation/devicetree/bindings/soc/renesas/sh.yaml b/Documentation/devicetree/bindings/soc/renesas/sh.yaml new file mode 100644 index 000000000000..9e0f69a8ee6a --- /dev/null +++ b/Documentation/devicetree/bindings/soc/renesas/sh.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/renesas/sh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas SuperH Platform + +maintainers: + - Yoshinori Sato + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: SH7751R based platform + items: + - enum: + - renesas,rts7751r2d # Renesas SH4 2D graphics board + - iodata,landisk # LANDISK HDL-U + - iodata,usl-5p # USL-5P + - const: renesas,sh7751r + +additionalProperties: true + +... From patchwork Wed May 29 08:01:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800462 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 49AF81836DD; Wed, 29 May 2024 08:02:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969742; cv=none; b=J2ZWz4f4BciHm2x1rbpgDTvd36ipb4ghh6cNtlPs655cRsHOOtjRzl/B+djIvVVEAg7JZirbhw/q+C4ePd6Fs0p7QNtfEtQkapKSpj6l5mAfadOiETNPMWoHK5JZ1vSAY1dolreU1FMOzes8HFCTrrWv/GXUMxIgSNKdqAJGHa8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969742; c=relaxed/simple; bh=PJg4Z83CmeMDocZYEZNk/vAESEkh9fTfxnSUiOQ3tlw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YJDNErdg5nx7tpM1IiGyMRKCeGH5zyU6GbxY6uN8Jv7AaIY33mS8GRc0rED2RNzICUNKONGMIptW1kTycXUpsk9VL04kcfCtHvYntlhYMCgGiWRl20yHGhtVaA0EXaLZDxKCpQctpskIoMNGTe327+ovA/QCrJgvvijzrLwGblU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id A01211C1026; Wed, 29 May 2024 17:02:18 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 28/36] sh: SH7751R SoC Internal peripheral definition dtsi. Date: Wed, 29 May 2024 17:01:14 +0900 Message-Id: <2a51197270763e51ee17a26be927f091ef01db5e.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 SH7751R internal peripherals device tree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/sh7751r.dtsi | 105 ++++++++++++++++++++++++++++++++++ 1 file changed, 105 insertions(+) create mode 100644 arch/sh/boot/dts/sh7751r.dtsi diff --git a/arch/sh/boot/dts/sh7751r.dtsi b/arch/sh/boot/dts/sh7751r.dtsi new file mode 100644 index 000000000000..61b2af5bebde --- /dev/null +++ b/arch/sh/boot/dts/sh7751r.dtsi @@ -0,0 +1,105 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the SH7751R SoC + */ + +#include +#include + +/ { + #address-cells = <1>; + #size-cells = <1>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + compatible = "renesas,sh4", "renesas,sh2"; + device_type = "cpu"; + reg = <0>; + clocks = <&cpg SH7750_CPG_ICK>; + clock-names = "ick"; + icache-size = <16384>; + icache-line-size = <32>; + dcache-size = <32768>; + dcache-line-size = <32>; + }; + }; + + extal: oscillator { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <0>; + clock-output-names = "extal"; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&shintc>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + cpg: clock-controller@ffc00000 { + #clock-cells = <1>; + #power-domain-cells = <0>; + compatible = "renesas,sh7751r-cpg"; + clocks = <&extal>; + clock-names = "extal"; + reg = <0xffc00000 20>, <0xfe0a0000 16>; + reg-names = "FRQCR", "CLKSTP00"; + renesas,mode = <0>; + }; + + shintc: interrupt-controller@ffd00000 { + compatible = "renesas,sh7751-intc"; + #interrupt-cells = <1>; + interrupt-controller; + reg = <0xffd00000 20>, <0xfe080000 128>; + reg-names = "ICR", "INTPRI00"; + }; + + /* sci0 is rarely used, so it is not defined here. */ + scif1: serial@ffe80000 { + compatible = "renesas,scif-sh7751", "renesas,scif"; + reg = <0xffe80000 0x100>; + interrupts = <0x700>, + <0x720>, + <0x760>, + <0x740>; + interrupt-names = "eri", "rxi", "txi", "bri"; + clocks = <&cpg SH7750_MSTP_SCIF>; + clock-names = "fck"; + power-domains = <&cpg>; + status = "disabled"; + }; + + /* Normally ch0 and ch1 are used, so we will define ch0 to ch2 here. */ + tmu0: timer@ffd80000 { + compatible = "renesas,tmu-sh7750", "renesas,tmu"; + reg = <0xffd80000 12>; + interrupts = <0x400>, + <0x420>, + <0x440>, + <0x460>; + interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; + clocks = <&cpg SH7750_MSTP_TMU012>; + clock-names = "fck"; + power-domains = <&cpg>; + #renesas,channels = <3>; + }; + + pcic: pci@fe200000 { + compatible = "renesas,sh7751-pci"; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + device_type = "pci"; + bus-range = <0 0>; + reg = <0xfe200000 0x0400>, + <0xff800000 0x0100>; + status = "disabled"; + }; + }; +}; From patchwork Wed May 29 08:01:15 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800154 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 182CD184107; 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dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 790D21C1018; Wed, 29 May 2024 17:02:20 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 29/36] sh: add RTS7751R2D Plus DTS Date: Wed, 29 May 2024 17:01:15 +0900 Message-Id: <1138980db95fbf8d59540d19428be51df0bd60e0.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Renesas RTS7751R2D Plus devicetree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/rts7751r2dplus.dts | 172 ++++++++++++++++++++++++++++ 1 file changed, 172 insertions(+) create mode 100644 arch/sh/boot/dts/rts7751r2dplus.dts diff --git a/arch/sh/boot/dts/rts7751r2dplus.dts b/arch/sh/boot/dts/rts7751r2dplus.dts new file mode 100644 index 000000000000..a67bd50cc80a --- /dev/null +++ b/arch/sh/boot/dts/rts7751r2dplus.dts @@ -0,0 +1,172 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the Renesas RTS7751R2D Plus + */ + +/dts-v1/; + +#include +#include "sh7751r.dtsi" + +/ { + model = "Renesas RTS7715R2D Plus"; + compatible = "renesas,rts7751r2d", "renesas,sh7751r"; + + aliases { + serial0 = &scif1; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@c000000 { + device_type = "memory"; + reg = <0x0c000000 0x4000000>; + }; + + r2dintc: interrupt-controller@a4000000 { + compatible = "renesas,sh7751-irl-ext"; + reg = <0xa4000000 0x02>; + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <2>; + /* + * b15: 12 - TP + * b14: 9 - PCI INTA + * b13: 10 - PCI INTB + * b12: 3 - PCI INTC + * b11: 0 - PCI INTD + * b10: 4 - SM501 + * b9: 1 - CF IDE + * b8: 2 - CF CD + * b7: 8 - SDCARD + * b6: 5 - KEY + * b5: 6 - RTC ALARM + * b4: 7 - RTC T + * b3: unassigned + * b2: unassigned + * b1: unassigned + * b0: 11 -EXT + */ + renesas,enable-reg = <12 9 10 3 0 4 1 2 8 5 6 7 15 15 15 11>; + }; + + sm501: display@10000000 { + compatible = "smi,sm501"; + reg = <0x10000000 0x03e00000 + 0x13e00000 0x00200000>; + interrupt-parent = <&r2dintc>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + mode = "640x480-16@60"; + smi,little-endian; + smi,devices = "usb-host", "uart0"; + smi,swap-fb-endian; + #gpio-cells = <2>; + edid = [00 ff ff ff ff ff ff 00 00 00 00 00 00 00 00 00 + 00 00 01 04 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 f0 0a 80 fb 20 e0 25 10 32 60 + 02 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 + 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 bd]; + + smi,misc-timing-ex = "16"; + smi,misc-timing-xc = "internal-pll"; + smi,misc-timing-usb-current = "disable"; + smi,misc-control-pad = "24"; + smi,misc-control-usbclk = "xtal"; + smi,misc-control-sh = "active-low"; + + gpio { + pin-0 = "ioport"; + pin-1 = "function"; + }; + + crt { + smi,flags = "use-init-done", + "disable-at-exit", + "use-hwcursor", + "use-hwaccel"; + }; + + panel { + bpp = <16>; + smi,flags = "use-init-done", + "disable-at-exit", + "use-hwcursor", + "use-hwaccel"; + }; + }; + + compact-flash@b4001000 { + compatible = "renesas,rts7751r2d-ata", "ata-generic"; + reg = <0xb4001000 0x0e>, <0xb400080c 2>; + reg-shift = <1>; + interrupt-parent = <&r2dintc>; + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; + }; + + flash@0 { + compatible = "cfi-flash"; + reg = <0x00000000 0x02000000>; + device-width = <2>; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "U-Boot"; + reg = <0x00000000 0x00040000>; + }; + + partition@1 { + label = "Environemt"; + reg = <0x00040000 0x00040000>; + }; + + partition@2 { + label = "Kernel"; + reg = <0x00080000 0x001c0000>; + }; + + partition@3 { + label = "Flash_FS"; + reg = <0x00240000 0x00dc0000>; + }; + }; +}; + +&extal { + clock-frequency = <22222222>; +}; + +&cpg { + renesas,mode = <5>; +}; + +&scif1 { + status = "okay"; +}; + +&pcic { + ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>, + <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>; + dma-ranges = <0x03000000 0 0xab000000 0xab000000 0 0x00000004>, + <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>, + <0x02000000 0 0xd0000000 0xd0000000 0 0x00000004>; + interrupt-map = <0x0000 0 0 1 &r2dintc 9 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 2 &r2dintc 10 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 3 &r2dintc 3 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 4 &r2dintc 0 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 1 &r2dintc 10 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 2 &r2dintc 3 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 3 &r2dintc 0 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 4 &r2dintc 9 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 1 &r2dintc 3 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 2 &r2dintc 0 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 3 &r2dintc 9 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 4 &r2dintc 10 IRQ_TYPE_LEVEL_LOW>; + interrupt-map-mask = <0x1800 0 0 7>; + status = "okay"; +}; From patchwork Wed May 29 08:01:16 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800461 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 828DE184119; Wed, 29 May 2024 08:02:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969746; cv=none; b=Mf6Tpl3doEzBOqeTCFmxVpiXnXkM7nPbHGabRTnE6ZbEbenSc2gwPMG7swOzAeI8Yef4gTjejrImQdPEAk720QD5xiPiOLz313RNY1Hc0yow4ctK4b2DrYMCZHPvCiOxQiTh+JOWhSN0LPcigtJpRRXH6d099ddpsefx2RUfZi0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969746; c=relaxed/simple; bh=kt9MVUVLoRjG4UUyYQiJw6Pi6MQWcJLl9nI+3iP/ezI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IG/bNGUXMEY4zHwRkXMUsre7wP1T7rxXP1xQr+cwcGHhtzfsMe6DRK2DGVuh/WlxRhURA/nBKGK6PD1c33cEbVSuYDdfWg8LPEDYFLPbuNgyEUeX5eBmEkw9YUFBus8G0yXc9ZwyYGh5WLqLza9E+NHCxyelc8s576IjN5bn5lA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 3C24B1C103A; Wed, 29 May 2024 17:02:22 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 30/36] sh: Add IO DATA LANDISK dts Date: Wed, 29 May 2024 17:01:16 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 IO DATA DEVICE Inc. LANDISK HDL-U devicetree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/landisk.dts | 77 ++++++++++++++++++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 arch/sh/boot/dts/landisk.dts diff --git a/arch/sh/boot/dts/landisk.dts b/arch/sh/boot/dts/landisk.dts new file mode 100644 index 000000000000..1ac1f532947b --- /dev/null +++ b/arch/sh/boot/dts/landisk.dts @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the IO DATA DEVICE LANDISK + */ + +/dts-v1/; + +#include "sh7751r.dtsi" + +/ { + model = "IO DATA Device LANDISK"; + compatible = "iodata,landisk", "renesas,sh7751r"; + + aliases { + serial0 = &scif1; + }; + + chosen { + stdout-path = "serial0:9600n8"; + }; + + memory@c000000 { + device_type = "memory"; + reg = <0x0c000000 0x4000000>; + }; + + julianintc: interrupt-controller@b0000005 { + compatible = "renesas,sh7751-irl-ext"; + reg = <0xb0000005 0x01>; + interrupt-controller; + #interrupt-cells = <2>; + /* + * b7: Not assigned + * b6: Power switch + * b5: Not assigned + * b4: Not assigned + * b3: PCI-INTD + * b2: PCI-INTC + * b1: PCI-INTB + * b0: PCI-INTA + */ + renesas,enable-reg = <15 11 15 15 8 7 6 5>; + }; +}; + +&extal { + clock-frequency = <22222222>; +}; + +&cpg { + renesas,mode = <5>; +}; + +&scif1 { + status = "okay"; +}; + +&pcic { + ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>, + <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>; + dma-ranges = <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>, + <0x02000000 0 0xd0000000 0xd0000000 0 0x00000004>; + interrupt-map = <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 2 &julianintc 6 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 3 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 4 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 1 &julianintc 6 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 2 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 3 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 4 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 1 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 2 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 3 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 4 &julianintc 6 IRQ_TYPE_LEVEL_LOW>; + interrupt-map-mask = <0x1800 0 0 7>; + status = "okay"; +}; From patchwork Wed May 29 08:01:17 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800153 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 241E518413F; Wed, 29 May 2024 08:02:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969747; cv=none; b=GT4L3ihDyoAZK64Bmi2qbFbSN/rZfyx8RabQMPaSoYAOL2F+5ULuJgjz1J1Y8IFj4jet5eqRBI4bUfVoNLqriNCyNgxP8FJ5MKaifUGrOm5oPuuxy1oTy6xniux00Kn5+aiuM4FnNzPokgRwxlJAjnzmkZOOu+U92NGzLPJlnAQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969747; c=relaxed/simple; bh=uSDoqCgxRZqsNuZJ625YZzrZavnFqY/+yG4ndxyk4X8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=ft0RhBFG/rUCUoBJcU2cmrtXLeBw1k4Lffmd4Vjd/XjC7ZfolvfADPeb6sYKaE9B0yqYcJdJQNZAEbub3+DrS21EHZCdATir98uKLgUtkoN9wvhEyoBXjO8itW/iD/7oifdGggemphT32pVPy7PJ7B+aSBGdM7J6wa2BgZCBuGQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 0BDF11C1052; Wed, 29 May 2024 17:02:24 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 31/36] sh: Add IO DATA USL-5P dts Date: Wed, 29 May 2024 17:01:17 +0900 Message-Id: <35a1260f8d77ef872da6274c8822ea9574516b9c.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 IO DATA DEVICE Inc. USL-5P devicetree. Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/usl-5p.dts | 85 +++++++++++++++++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 arch/sh/boot/dts/usl-5p.dts diff --git a/arch/sh/boot/dts/usl-5p.dts b/arch/sh/boot/dts/usl-5p.dts new file mode 100644 index 000000000000..bfbcb9e466bc --- /dev/null +++ b/arch/sh/boot/dts/usl-5p.dts @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the IO DATA DEVICE USL-5P + */ + +/dts-v1/; + +#include "sh7751r.dtsi" + +/ { + model = "IO-DATA Device USL-5P"; + compatible = "iodata,usl-5p", "renesas,sh7751r"; + + aliases { + serial0 = &scif1; + }; + + chosen { + stdout-path = "serial0:9600n8"; + }; + + memory@c000000 { + device_type = "memory"; + reg = <0x0c000000 0x4000000>; + }; + + julianintc: interrupt-controller@b0000005 { + compatible = "renesas,sh7751-irl-ext"; + reg = <0xb0000005 0x01>; + interrupt-controller; + #interrupt-cells = <2>; + /* + * b7: Button + * b6: Power switch + * b5: Compact Flash + * b4: ATA + * b3: PCI-INTD + * b2: PCI-INTC + * b1: PCI-INTB + * b0: PCI-INTA + */ + renesas,enable-reg = <12 11 10 9 8 7 6 5>; + }; + + compact-flash@b4000040 { + compatible = "iodata,usl-5p-ata", "ata-generic"; + reg = <0xb4000040 0x0e>, <0xb400002c 2>; + reg-shift = <1>; + interrupt-parent = <&julianintc>; + interrupts = <10 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +&extal { + clock-frequency = <22222222>; +}; + +&cpg { + renesas,mode = <5>; +}; + +&scif1 { + status = "okay"; +}; + +&pcic { + ranges = <0x02000000 0 0xfd000000 0xfd000000 0 0x01000000>, + <0x01000000 0 0x00000000 0xfe240000 0 0x00040000>; + dma-ranges = <0x02000000 0 0x0c000000 0x0c000000 0 0x04000000>, + <0x02000000 0 0xd0000000 0xd0000000 0 0x00000004>; + interrupt-map = <0x0000 0 0 1 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 2 &julianintc 6 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 3 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x0000 0 0 4 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 1 &julianintc 6 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 2 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 3 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x0800 0 0 4 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 1 &julianintc 7 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 2 &julianintc 8 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 3 &julianintc 5 IRQ_TYPE_LEVEL_LOW>, + <0x1000 0 0 4 &julianintc 6 IRQ_TYPE_LEVEL_LOW>; + interrupt-map-mask = <0x1800 0 0 7>; + status = "okay"; +}; From patchwork Wed May 29 08:01:18 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800460 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E156E19066A; Wed, 29 May 2024 08:02:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969749; cv=none; b=oKmVt0txf3oSZSPU+lZojXIKvIWYxlabaT6xgUR1EVxI5HrbnNi8hNlOor1Azsn/ECiolJ+1We5NQiqaOTfAXfN7EwoZjFWdP6Fz+2jSs3q9BhnblIU8BIgVOzL8TsUV6zymPKNcfu/zRvNG34gYIDsGBciNcgQeyzHdWouA47g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969749; c=relaxed/simple; bh=lIQoJuYfvm679uF1lNFyIyCACKNRNlfZEqAQst/OIC0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=udDmsB1F12Wv8cTuRGF0WHmsFZNXEPT4XKqfAFrn2bW0udAvG9hnqOdMXjpj5a3w6huxMB/4TkOPYWqA7BIVSsGXnJpaZ9V8E82+rCdnw0ZyQxGFCJE2S6CuFE57v4VIYw9XxT7c2QyDX2Fep2Ar3CnjMtjVBDkzwB3/WT3cOWs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id DF3A31C102B; Wed, 29 May 2024 17:02:25 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 32/36] sh: j2_mimas_v2.dts update Date: Wed, 29 May 2024 17:01:18 +0900 Message-Id: <82f265311a16717f9f07f69dfa242af7d773b512.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato --- arch/sh/boot/dts/j2_mimas_v2.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts index faf884f53804..b6ee682c5737 100644 --- a/arch/sh/boot/dts/j2_mimas_v2.dts +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -16,7 +16,7 @@ cpus { cpu@0 { device_type = "cpu"; - compatible = "jcore,j2"; + compatible = "jcore,j2", "renesas,sh2"; reg = <0>; clock-frequency = <50000000>; d-cache-size = <8192>; From patchwork Wed May 29 08:01:19 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800152 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 516D6194C6D; Wed, 29 May 2024 08:02:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969751; cv=none; b=kI1m5cuTu1pjIczy8AcZl4y4ONxuro7VTdvqeN6mUO8phcNzk6HZlep656frTZ13qQINftheLcDqyA95K/KxeVv5EGs7tqZ9WgWCyjYtVvp6rMbqIOhl+o7MDCeCLW6Nk5UHnRVENrr0dAM2kmX3nekrK6gA3VkChh5wh2RzB34= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969751; c=relaxed/simple; bh=nytelL/99ibcM5qbvj525iWQpx+Zq9NOxMVc5VPy8J0=; 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Date: Wed, 29 May 2024 17:01:19 +0900 Message-Id: <453720d8182ce94d20dff57ee44b6a2092b3773f.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato Reviewed-by: Geert Uytterhoeven --- arch/sh/boot/dts/Makefile | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/sh/boot/dts/Makefile b/arch/sh/boot/dts/Makefile index 4a6dec9714a9..e6b93360c213 100644 --- a/arch/sh/boot/dts/Makefile +++ b/arch/sh/boot/dts/Makefile @@ -1,2 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only obj-$(CONFIG_USE_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_SOURCE)) + +dtb-$(CONFIG_CPU_J2) += j2_mimas_v2.dtb +dtb-$(CONFIG_CPU_SUBTYPE_SH7751R) += landisk.dtb +dtb-$(CONFIG_CPU_SUBTYPE_SH7751R) += rts7751r2dplus.dtb +dtb-$(CONFIG_CPU_SUBTYPE_SH7751R) += usl-5p.dtb From patchwork Wed May 29 08:01:20 2024 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dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 34/36] sh: RTS7751R2D Plus OF defconfig Date: Wed, 29 May 2024 17:01:20 +0900 Message-Id: X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato --- arch/sh/configs/rts7751r2dplus-of_defconfig | 77 +++++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 arch/sh/configs/rts7751r2dplus-of_defconfig diff --git a/arch/sh/configs/rts7751r2dplus-of_defconfig b/arch/sh/configs/rts7751r2dplus-of_defconfig new file mode 100644 index 000000000000..e85523a3c821 --- /dev/null +++ b/arch/sh/configs/rts7751r2dplus-of_defconfig @@ -0,0 +1,77 @@ +CONFIG_SYSVIPC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_PROFILING=y +CONFIG_CPU_SUBTYPE_SH7751R=y +CONFIG_MEMORY_START=0x0c000000 +CONFIG_SH_OF_BOARD=y +CONFIG_HEARTBEAT=y +CONFIG_ZERO_PAGE_OFFSET=0x00010000 +CONFIG_CMDLINE_BOOTLOADER=y +CONFIG_MODULES=y +CONFIG_FLATMEM_MANUAL=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +# CONFIG_IPV6 is not set +CONFIG_PCI=y +CONFIG_HOTPLUG_PCI=y +CONFIG_PCI_SH7751=y +CONFIG_UEVENT_HELPER=y +CONFIG_MTD=y +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_CFI=y +CONFIG_MTD_CFI_AMDSTD=y +CONFIG_MTD_PHYSMAP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_SD=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ATA=y +CONFIG_PATA_OF_PLATFORM=y +CONFIG_NETDEVICES=y +CONFIG_8139TOO=y +# CONFIG_8139TOO_PIO is not set +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_SERIAL_8250=y +CONFIG_SERIAL_SH_SCI=y +CONFIG_HW_RANDOM=y +CONFIG_SPI=y +CONFIG_SPI_SH_SCI=y +CONFIG_MFD_SM501=y +CONFIG_FB=y +CONFIG_FB_SH_MOBILE_LCDC=m +CONFIG_FB_SM501=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_LOGO=y +# CONFIG_LOGO_LINUX_MONO is not set +# CONFIG_LOGO_LINUX_VGA16 is not set +# CONFIG_LOGO_LINUX_CLUT224 is not set +# CONFIG_LOGO_SUPERH_MONO is not set +# CONFIG_LOGO_SUPERH_VGA16 is not set +CONFIG_SOUND=y +CONFIG_SND=m +CONFIG_SND_YMFPCI=m +CONFIG_HID_GYRATION=y +CONFIG_HID_PANTHERLORD=y +CONFIG_HID_PETALYNX=y +CONFIG_HID_SAMSUNG=y +CONFIG_HID_SUNPLUS=y +CONFIG_USB=y +CONFIG_USB_ANNOUNCE_NEW_DEVICES=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_DRV_R9701=y +CONFIG_RENESAS_SH7751_INTC=y +CONFIG_RENESAS_SH7751IRL_INTC=y +CONFIG_EXT2_FS=y +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_PROC_KCORE=y +CONFIG_TMPFS=y +CONFIG_MINIX_FS=y +CONFIG_NLS_CODEPAGE_932=y +CONFIG_CRC_T10DIF=y +CONFIG_DEBUG_FS=y From patchwork Wed May 29 08:01:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800151 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 933F7199E83; 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smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 62ED41C1072; Wed, 29 May 2024 17:02:31 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 35/36] sh: LANDISK OF defconfig Date: Wed, 29 May 2024 17:01:21 +0900 Message-Id: <30e2315f695880b07192fa6ec5a09f1645d4520f.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Signed-off-by: Yoshinori Sato --- arch/sh/configs/landisk-of_defconfig | 102 +++++++++++++++++++++++++++ 1 file changed, 102 insertions(+) create mode 100644 arch/sh/configs/landisk-of_defconfig diff --git a/arch/sh/configs/landisk-of_defconfig b/arch/sh/configs/landisk-of_defconfig new file mode 100644 index 000000000000..580fbaabc557 --- /dev/null +++ b/arch/sh/configs/landisk-of_defconfig @@ -0,0 +1,102 @@ +CONFIG_SYSVIPC=y +CONFIG_LOG_BUF_SHIFT=14 +CONFIG_KEXEC=y +CONFIG_CPU_SUBTYPE_SH7751R=y +CONFIG_MEMORY_START=0x0c000000 +CONFIG_SH_OF_BOARD=y +CONFIG_HEARTBEAT=y +CONFIG_CMDLINE_BOOTLOADER=y +CONFIG_MODULES=y +CONFIG_MODULE_UNLOAD=y +CONFIG_MODULE_FORCE_UNLOAD=y +CONFIG_FLATMEM_MANUAL=y +CONFIG_NET=y +CONFIG_PACKET=y +CONFIG_UNIX=y +CONFIG_INET=y +CONFIG_IP_ADVANCED_ROUTER=y +CONFIG_IP_PNP=y +# CONFIG_IPV6 is not set +CONFIG_NETFILTER=y +CONFIG_ATALK=m +CONFIG_PCI=y +CONFIG_PCI_SH7751=y +CONFIG_PCCARD=y +CONFIG_YENTA=y +CONFIG_UEVENT_HELPER=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_RAM=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_DEV_SR=y +# CONFIG_BLK_DEV_BSG is not set +CONFIG_ATA=y +CONFIG_PATA_ARTOP=y +CONFIG_PATA_OF_PLATFORM=y +CONFIG_ATA_GENERIC=y +CONFIG_MD=y +CONFIG_BLK_DEV_MD=m +CONFIG_MD_RAID0=m +CONFIG_MD_RAID1=m +CONFIG_NETDEVICES=y +CONFIG_TUN=m +CONFIG_8139CP=y +CONFIG_USB_PEGASUS=m +CONFIG_USB_RTL8150=m +# CONFIG_INPUT_KEYBOARD is not set +# CONFIG_INPUT_MOUSE is not set +# CONFIG_SERIO is not set +CONFIG_SERIAL_SH_SCI=y +CONFIG_HW_RANDOM=y +CONFIG_SOUND=m +CONFIG_HID_A4TECH=m +CONFIG_HID_BELKIN=m +CONFIG_HID_CHERRY=m +CONFIG_HID_CYPRESS=m +CONFIG_HID_EZKEY=m +CONFIG_HID_GYRATION=m +CONFIG_HID_MICROSOFT=m +CONFIG_HID_MONTEREY=m +CONFIG_HID_PANTHERLORD=m +CONFIG_HID_PETALYNX=m +CONFIG_HID_SAMSUNG=m +CONFIG_HID_SUNPLUS=m +CONFIG_USB_HID=m +CONFIG_USB=y +CONFIG_USB_MON=y +CONFIG_USB_EHCI_HCD=y +# CONFIG_USB_EHCI_TT_NEWSCHED is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_PRINTER=m +CONFIG_USB_STORAGE=m +CONFIG_USB_STORAGE_DATAFAB=m +CONFIG_USB_STORAGE_FREECOM=m +CONFIG_USB_STORAGE_ISD200=m +CONFIG_USB_STORAGE_SDDR09=m +CONFIG_USB_STORAGE_SDDR55=m +CONFIG_USB_STORAGE_JUMPSHOT=m +CONFIG_USB_SERIAL=m +CONFIG_USB_SERIAL_FTDI_SIO=m +CONFIG_USB_SERIAL_PL2303=m +CONFIG_USB_EMI62=m +CONFIG_USB_EMI26=m +CONFIG_USB_SISUSBVGA=m +CONFIG_RENESAS_SH7751_INTC=y +CONFIG_RENESAS_SH7751IRL_INTC=y +CONFIG_EXT2_FS=y +CONFIG_EXT3_FS=y +CONFIG_REISERFS_FS=y +CONFIG_ISO9660_FS=m +CONFIG_MSDOS_FS=y +CONFIG_VFAT_FS=y +CONFIG_TMPFS=y +CONFIG_ROMFS_FS=y +CONFIG_UFS_FS=m +CONFIG_NFS_FS=m +CONFIG_NFSD=m +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_CODEPAGE_932=y +CONFIG_INIT_STACK_NONE=y +CONFIG_CRC_T10DIF=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_FTRACE is not set +CONFIG_SH_STANDARD_BIOS=y From patchwork Wed May 29 08:01:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshinori Sato X-Patchwork-Id: 800458 Received: from sakura.ysato.name (ik1-413-38519.vs.sakura.ne.jp [153.127.30.23]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 1AC49199EA5; Wed, 29 May 2024 08:02:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=153.127.30.23 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969756; cv=none; b=SiUMZmgVgDLrMA7NKmoCecQBX1q8q/qdFZcazP+QLj5y2FMQkZVlvuc9NfPrjuSS+VI5E5rf5kzDcm+/b1ULTqb5gLOEcO4YarcfCynKSb7ru2SDEprPqYXVu9wQyajo4Pwai+aB+mAhPy2DOukHYDZdFRo4FxKdSdMXYXtapXA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1716969756; c=relaxed/simple; bh=HfCnaCGFqb9NsLZ2tSL9t0qOwxfZXHeNec47VwxbtkU=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=S6YFfhlc90SFWo0YEcmHD45AKZy+T+cai6K+WFMTtPF6dwHRhsizpU0mact6LjDPg3g8iVcH0j+h6DOeT8XDgddOA4OHmCCRkhn6yDmeL5OFs2JuzoFMupmtgeb8E+/k1La7ejXej5dEy3uJtRJIXMA8y3S0S6b8QQ9MAKaLUfg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp; spf=fail smtp.mailfrom=users.sourceforge.jp; arc=none smtp.client-ip=153.127.30.23 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=users.sourceforge.jp Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=users.sourceforge.jp Received: from SIOS1075.ysato.name (al128006.dynamic.ppp.asahi-net.or.jp [111.234.128.6]) by sakura.ysato.name (Postfix) with ESMTPSA id 278291C1083; Wed, 29 May 2024 17:02:33 +0900 (JST) From: Yoshinori Sato To: linux-sh@vger.kernel.org Cc: Yoshinori Sato , Damien Le Moal , Niklas Cassel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Michael Turquette , Stephen Boyd , David Airlie , Daniel Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Thomas Gleixner , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Greg Kroah-Hartman , Jiri Slaby , Magnus Damm , Daniel Lezcano , Rich Felker , John Paul Adrian Glaubitz , Lee Jones , Helge Deller , Heiko Stuebner , Neil Armstrong , Chris Morgan , Sebastian Reichel , Linus Walleij , Arnd Bergmann , Masahiro Yamada , Baoquan He , Andrew Morton , Guenter Roeck , Kefeng Wang , Stephen Rothwell , Azeem Shaikh , Guo Ren , Max Filippov , Jernej Skrabec , Herve Codina , Andy Shevchenko , Anup Patel , Jacky Huang , Hugo Villeneuve , Jonathan Corbet , Wolfram Sang , =?utf-8?q?Uwe_Kleine-K?= =?utf-8?q?=C3=B6nig?= , Christophe JAILLET , Sam Ravnborg , Javier Martinez Canillas , Sergey Shtylyov , Laurent Pinchart , linux-ide@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, linux-clk@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-pci@vger.kernel.org, linux-serial@vger.kernel.org, linux-fbdev@vger.kernel.org Subject: [DO NOT MERGE v8 36/36] sh: j2_defconfig: update Date: Wed, 29 May 2024 17:01:22 +0900 Message-Id: <60abd745155c465b775c3c876c0b71f0756d25a6.1716965617.git.ysato@users.sourceforge.jp> X-Mailer: git-send-email 2.39.2 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-serial@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 I've changed some symbols related to DeviceTree, so let's take care of those changes. Signed-off-by: Yoshinori Sato --- arch/sh/configs/j2_defconfig | 11 +++-------- 1 file changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/sh/configs/j2_defconfig b/arch/sh/configs/j2_defconfig index 2eb81ebe3888..cdc8ed244618 100644 --- a/arch/sh/configs/j2_defconfig +++ b/arch/sh/configs/j2_defconfig @@ -1,18 +1,15 @@ -CONFIG_SMP=y CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y CONFIG_NO_HZ=y CONFIG_HIGH_RES_TIMERS=y CONFIG_CPU_SUBTYPE_J2=y CONFIG_MEMORY_START=0x10000000 -CONFIG_MEMORY_SIZE=0x04000000 CONFIG_CPU_BIG_ENDIAN=y -CONFIG_SH_DEVICE_TREE=y -CONFIG_SH_JCORE_SOC=y +CONFIG_SH_OF_BOARD=y CONFIG_HZ_100=y +CONFIG_SMP=y CONFIG_CMDLINE_OVERWRITE=y CONFIG_CMDLINE="console=ttyUL0 earlycon" -CONFIG_BINFMT_ELF_FDPIC=y CONFIG_BINFMT_FLAT=y CONFIG_NET=y CONFIG_PACKET=y @@ -21,7 +18,6 @@ CONFIG_INET=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y CONFIG_NETDEVICES=y -CONFIG_SERIAL_EARLYCON=y CONFIG_SERIAL_UARTLITE=y CONFIG_SERIAL_UARTLITE_CONSOLE=y CONFIG_I2C=y @@ -30,8 +26,6 @@ CONFIG_SPI_JCORE=y CONFIG_WATCHDOG=y CONFIG_MMC=y CONFIG_MMC_SPI=y -CONFIG_CLKSRC_JCORE_PIT=y -CONFIG_JCORE_AIC=y CONFIG_EXT4_FS=y CONFIG_VFAT_FS=y CONFIG_FAT_DEFAULT_IOCHARSET="ascii" @@ -40,3 +34,4 @@ CONFIG_NLS_DEFAULT="utf8" CONFIG_NLS_CODEPAGE_437=y CONFIG_NLS_ASCII=y CONFIG_NLS_UTF8=y +CONFIG_INIT_STACK_NONE=y