From patchwork Fri Jun 7 14:12:20 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 802419 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E1DD1957E3; Fri, 7 Jun 2024 14:13:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=45.89.224.132 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717769588; cv=none; b=Dzge54vmJRC6sAPz7wp12D4DYYAykVxDveu6zjFRBGt8fE8DJh3piPhnmZVYRsMtSPmonhSNW6n0daxv45PxCwWJ2Ig8jrceRz4emi3BYeHrONfIUxSqmSgl/ELyoHEFV+XeHUDxC2RWlv0ifKXbt1ottG0pVQU+5wM2WpkQXG0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1717769588; c=relaxed/simple; bh=K7UieHG9RsHgDBpcjxeQWQsIDLszF4my3Mke2V00m8I=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=fB1TFF9RSs08X854z9H2q7LpTBb6HxD2owcGdmiwN5SqPsvcYSnRESUkBqVD+Jt5L1USfwZiQWd1ZGp126Dy8Ncu+htTC4EdtCoPak4Rdm6FGs+m3yWiUqcfYZsVBHa99X6tE3OfEIVJNBiQQ94x+GN6WukL97TpmR9iccNPYrU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com; spf=pass smtp.mailfrom=salutedevices.com; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b=vjGb6nX9; arc=none smtp.client-ip=45.89.224.132 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=salutedevices.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=salutedevices.com header.i=@salutedevices.com header.b="vjGb6nX9" Received: from p-infra-ksmg-sc-msk02.sberdevices.ru (localhost [127.0.0.1]) by mx1.sberdevices.ru (Postfix) with ESMTP id 5D346120002; Fri, 7 Jun 2024 17:12:56 +0300 (MSK) DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.sberdevices.ru 5D346120002 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=salutedevices.com; s=mail; t=1717769576; bh=T4w8YmD8VWdxpwAM+qh0428tx6ubcLSqso0bV80y5tA=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:From; b=vjGb6nX9IuL7hTHgktcHbhNLVUZX4DAjM95drtc86itDZzqHns13avyZWMvnTZdn+ XqabTxzwYlvBDCLhUc0RePHYzBnyc707+dJJKYnFntZJ1MhlPGf3CEqDTBuzeI4Gqo N8b8EnxTuFmhTAgacTN3/f1HH0qCgE8jv8m1oGqdd+lmMSVIQOllzNqK3YrcMP7aAZ LmibhFJhDCpUisFt08A4nVABuOeSltyO79CldTTNJbWctfpldvTvCV9YImkr+HGcrp ioxO1YKyvSeNVc/iou/Qdk5CscrALBeb8ut4JvHMvd6bP+iGrKBuAaT1SjbnT/aGcM EGsGkgUka8vwQ== Received: from smtp.sberdevices.ru (p-i-exch-sc-m02.sberdevices.ru [172.16.192.103]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.sberdevices.ru (Postfix) with ESMTPS; Fri, 7 Jun 2024 17:12:56 +0300 (MSK) Received: from user-A520M-DS3H.sberdevices.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 7 Jun 2024 17:12:55 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 01/23] drivers: crypto: meson: don't hardcode IRQ count Date: Fri, 7 Jun 2024 17:12:20 +0300 Message-ID: <20240607141242.2616580-2-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 100.64.160.123:7.1.2; smtp.sberdevices.ru:7.1.1,5.0.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped IRQ count is no longer hardcoded, and make it part of struct meson_flow. We need this for extend driver support for other Amlogic SoC's. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 2 +- drivers/crypto/amlogic/amlogic-gxl-core.c | 47 ++++++++++++--------- drivers/crypto/amlogic/amlogic-gxl.h | 8 ++-- 3 files changed, 31 insertions(+), 26 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 29048da6f50a..b19032f92415 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -19,7 +19,7 @@ static int get_engine_number(struct meson_dev *mc) { - return atomic_inc_return(&mc->flow) % MAXFLOW; + return atomic_inc_return(&mc->flow) % mc->flow_cnt; } static bool meson_cipher_need_fallback(struct skcipher_request *areq) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index f54ab0d0b1e8..35ec64df5b3a 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -28,8 +28,8 @@ static irqreturn_t meson_irq_handler(int irq, void *data) int flow; u32 p; - for (flow = 0; flow < MAXFLOW; flow++) { - if (mc->irqs[flow] == irq) { + for (flow = 0; flow < mc->flow_cnt; flow++) { + if (mc->chanlist[flow].irq == irq) { p = readl(mc->base + ((0x04 + flow) << 2)); if (p) { writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2)); @@ -110,7 +110,7 @@ static int meson_debugfs_show(struct seq_file *seq, void *v) struct meson_dev *mc __maybe_unused = seq->private; int i; - for (i = 0; i < MAXFLOW; i++) + for (i = 0; i < mc->flow_cnt; i++) seq_printf(seq, "Channel %d: nreq %lu\n", i, #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG mc->chanlist[i].stat_req); @@ -153,14 +153,32 @@ static void meson_free_chanlist(struct meson_dev *mc, int i) */ static int meson_allocate_chanlist(struct meson_dev *mc) { + struct platform_device *pdev = to_platform_device(mc->dev); int i, err; - mc->chanlist = devm_kcalloc(mc->dev, MAXFLOW, + mc->flow_cnt = platform_irq_count(pdev); + if (mc->flow_cnt <= 0) { + dev_err(mc->dev, "No IRQs defined\n"); + return -ENODEV; + } + + mc->chanlist = devm_kcalloc(mc->dev, mc->flow_cnt, sizeof(struct meson_flow), GFP_KERNEL); if (!mc->chanlist) return -ENOMEM; - for (i = 0; i < MAXFLOW; i++) { + for (i = 0; i < mc->flow_cnt; i++) { + mc->chanlist[i].irq = platform_get_irq(pdev, i); + if (mc->chanlist[i].irq < 0) + return mc->chanlist[i].irq; + + err = devm_request_irq(mc->dev, mc->chanlist[i].irq, + meson_irq_handler, 0, "aml-crypto", mc); + if (err < 0) { + dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i); + return err; + } + init_completion(&mc->chanlist[i].complete); mc->chanlist[i].engine = crypto_engine_alloc_init(mc->dev, true); @@ -230,7 +248,7 @@ static void meson_unregister_algs(struct meson_dev *mc) static int meson_crypto_probe(struct platform_device *pdev) { struct meson_dev *mc; - int err, i; + int err; mc = devm_kzalloc(&pdev->dev, sizeof(*mc), GFP_KERNEL); if (!mc) @@ -252,19 +270,6 @@ static int meson_crypto_probe(struct platform_device *pdev) return err; } - for (i = 0; i < MAXFLOW; i++) { - mc->irqs[i] = platform_get_irq(pdev, i); - if (mc->irqs[i] < 0) - return mc->irqs[i]; - - err = devm_request_irq(&pdev->dev, mc->irqs[i], meson_irq_handler, 0, - "gxl-crypto", mc); - if (err < 0) { - dev_err(mc->dev, "Cannot request IRQ for flow %d\n", i); - return err; - } - } - err = clk_prepare_enable(mc->busclk); if (err != 0) { dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); @@ -294,7 +299,7 @@ static int meson_crypto_probe(struct platform_device *pdev) error_alg: meson_unregister_algs(mc); error_flow: - meson_free_chanlist(mc, MAXFLOW - 1); + meson_free_chanlist(mc, mc->flow_cnt - 1); clk_disable_unprepare(mc->busclk); return err; } @@ -309,7 +314,7 @@ static void meson_crypto_remove(struct platform_device *pdev) meson_unregister_algs(mc); - meson_free_chanlist(mc, MAXFLOW - 1); + meson_free_chanlist(mc, mc->flow_cnt - 1); clk_disable_unprepare(mc->busclk); } diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 1013a666c932..79177cfa8b88 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -22,8 +22,6 @@ #define MESON_OPMODE_ECB 0 #define MESON_OPMODE_CBC 1 -#define MAXFLOW 2 - #define MAXDESC 64 #define DESC_LAST BIT(18) @@ -62,6 +60,7 @@ struct meson_desc { * @keylen: keylen for this flow operation * @complete: completion for the current task on this flow * @status: set to 1 by interrupt if task is done + * @irq: IRQ number for amlogic-crypto * @t_phy: Physical address of task * @tl: pointer to the current ce_task for this flow * @stat_req: number of request done by this flow @@ -70,6 +69,7 @@ struct meson_flow { struct crypto_engine *engine; struct completion complete; int status; + int irq; unsigned int keylen; dma_addr_t t_phy; struct meson_desc *tl; @@ -85,7 +85,7 @@ struct meson_flow { * @dev: the platform device * @chanlist: array of all flow * @flow: flow to use in next request - * @irqs: IRQ numbers for amlogic-crypto + * @flow_cnt: flow count for amlogic-crypto * @dbgfs_dir: Debugfs dentry for statistic directory * @dbgfs_stats: Debugfs dentry for statistic counters */ @@ -95,7 +95,7 @@ struct meson_dev { struct device *dev; struct meson_flow *chanlist; atomic_t flow; - int irqs[MAXFLOW]; + int flow_cnt; #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG struct dentry *dbgfs_dir; #endif From patchwork Fri Jun 7 14:12:21 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 803307 Received: from mx1.sberdevices.ru (mx1.sberdevices.ru [37.18.73.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 361DE190688; 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Fri, 7 Jun 2024 17:12:57 +0300 (MSK) Received: from user-A520M-DS3H.sberdevices.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 7 Jun 2024 17:12:56 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 02/23] drviers: crypto: meson: add platform data Date: Fri, 7 Jun 2024 17:12:21 +0300 Message-ID: <20240607141242.2616580-3-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped To support other Amlogic SoC's we have to use platform data: descriptors and status registers offsets are individual for each SoC series. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 2 +- drivers/crypto/amlogic/amlogic-gxl-core.c | 22 +++++++++++++++++---- drivers/crypto/amlogic/amlogic-gxl.h | 11 +++++++++++ 3 files changed, 30 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index b19032f92415..7eff3ae7356f 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -225,7 +225,7 @@ static int meson_cipher(struct skcipher_request *areq) reinit_completion(&mc->chanlist[flow].complete); mc->chanlist[flow].status = 0; - writel(mc->chanlist[flow].t_phy | 2, mc->base + (flow << 2)); + writel(mc->chanlist[flow].t_phy | 2, mc->base + ((mc->pdata->descs_reg + flow) << 2)); wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, msecs_to_jiffies(500)); if (mc->chanlist[flow].status == 0) { diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 35ec64df5b3a..e9e733ed98e0 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include "amlogic-gxl.h" @@ -30,9 +31,10 @@ static irqreturn_t meson_irq_handler(int irq, void *data) for (flow = 0; flow < mc->flow_cnt; flow++) { if (mc->chanlist[flow].irq == irq) { - p = readl(mc->base + ((0x04 + flow) << 2)); + p = readl(mc->base + ((mc->pdata->status_reg + flow) << 2)); if (p) { - writel_relaxed(0xF, mc->base + ((0x4 + flow) << 2)); + writel_relaxed(0xF, mc->base + + ((mc->pdata->status_reg + flow) << 2)); mc->chanlist[flow].status = 1; complete(&mc->chanlist[flow].complete); return IRQ_HANDLED; @@ -254,6 +256,10 @@ static int meson_crypto_probe(struct platform_device *pdev) if (!mc) return -ENOMEM; + mc->pdata = of_device_get_match_data(&pdev->dev); + if (!mc->pdata) + return -EINVAL; + mc->dev = &pdev->dev; platform_set_drvdata(pdev, mc); @@ -319,9 +325,17 @@ static void meson_crypto_remove(struct platform_device *pdev) clk_disable_unprepare(mc->busclk); } +static const struct meson_pdata meson_gxl_pdata = { + .descs_reg = 0x0, + .status_reg = 0x4, +}; + static const struct of_device_id meson_crypto_of_match_table[] = { - { .compatible = "amlogic,gxl-crypto", }, - {} + { + .compatible = "amlogic,gxl-crypto", + .data = &meson_gxl_pdata, + }, + {}, }; MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table); diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 79177cfa8b88..9ad75da214ff 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -78,6 +78,16 @@ struct meson_flow { #endif }; +/* + * struct meson_pdata - SoC series dependent data. + * @reg_descs: offset to descriptors register + * @reg_status: offset to status register + */ +struct meson_pdata { + u32 descs_reg; + u32 status_reg; +}; + /* * struct meson_dev - main container for all this driver information * @base: base address of amlogic-crypto @@ -93,6 +103,7 @@ struct meson_dev { void __iomem *base; struct clk *busclk; struct device *dev; + const struct meson_pdata *pdata; struct meson_flow *chanlist; atomic_t flow; int flow_cnt; From patchwork Fri Jun 7 14:12:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 802420 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 81453DDA3; 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Fixes: 48fe583fe541 ("crypto: amlogic - Add crypto accelerator for amlogic GXL") Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-core.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index e9e733ed98e0..9d92115043c3 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -9,7 +9,6 @@ #include #include -#include #include #include #include @@ -269,18 +268,6 @@ static int meson_crypto_probe(struct platform_device *pdev) dev_err(&pdev->dev, "Cannot request MMIO err=%d\n", err); return err; } - mc->busclk = devm_clk_get(&pdev->dev, "blkmv"); - if (IS_ERR(mc->busclk)) { - err = PTR_ERR(mc->busclk); - dev_err(&pdev->dev, "Cannot get core clock err=%d\n", err); - return err; - } - - err = clk_prepare_enable(mc->busclk); - if (err != 0) { - dev_err(&pdev->dev, "Cannot prepare_enable busclk\n"); - return err; - } err = meson_allocate_chanlist(mc); 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d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped Add MMIO access helpers: meson_dma_start() and meson_dma_ready(). Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 2 +- drivers/crypto/amlogic/amlogic-gxl-core.c | 24 ++++++++++++++++----- drivers/crypto/amlogic/amlogic-gxl.h | 2 ++ 3 files changed, 22 insertions(+), 6 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 7eff3ae7356f..1fe916b0a138 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -225,7 +225,7 @@ static int meson_cipher(struct skcipher_request *areq) reinit_completion(&mc->chanlist[flow].complete); mc->chanlist[flow].status = 0; - writel(mc->chanlist[flow].t_phy | 2, mc->base + ((mc->pdata->descs_reg + flow) << 2)); + meson_dma_start(mc, flow); wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, msecs_to_jiffies(500)); if (mc->chanlist[flow].status == 0) { diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 9d92115043c3..0698ac5e2a6a 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -22,18 +22,32 @@ #include "amlogic-gxl.h" +void meson_dma_start(struct meson_dev *mc, int flow) +{ + u32 offset = (mc->pdata->descs_reg + flow) << 2; + + writel(mc->chanlist[flow].t_phy | 2, mc->base + offset); +} + +static bool meson_dma_ready(struct meson_dev *mc, int flow) +{ + u32 offset = (mc->pdata->status_reg + flow) << 2; + u32 data = readl(mc->base + offset); + + if (data) + writel_relaxed(0xF, mc->base + offset); + + return data; +} + static irqreturn_t meson_irq_handler(int irq, void *data) { struct meson_dev *mc = (struct meson_dev *)data; int flow; - u32 p; for (flow = 0; flow < mc->flow_cnt; flow++) { if (mc->chanlist[flow].irq == irq) { - p = readl(mc->base + ((mc->pdata->status_reg + flow) << 2)); - if (p) { - writel_relaxed(0xF, mc->base + - ((mc->pdata->status_reg + flow) << 2)); + if (meson_dma_ready(mc, flow)) { mc->chanlist[flow].status = 1; complete(&mc->chanlist[flow].complete); return IRQ_HANDLED; diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 9ad75da214ff..8670f7ebcdda 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -161,6 +161,8 @@ struct meson_alg_template { #endif }; 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Fri, 7 Jun 2024 17:12:59 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 05/23] drivers: crypto: meson: move get_engine_number() Date: Fri, 7 Jun 2024 17:12:24 +0300 Message-ID: <20240607141242.2616580-6-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 100.64.160.123:7.1.2; smtp.sberdevices.ru:7.1.1,5.0.1; salutedevices.com:7.1.1; 127.0.0.199:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped Move get_engine_number() function from cipher.c to core.c Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 9 ++------- drivers/crypto/amlogic/amlogic-gxl-core.c | 5 +++++ drivers/crypto/amlogic/amlogic-gxl.h | 2 ++ 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 1fe916b0a138..18e9e2d39b1f 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -17,11 +17,6 @@ #include #include "amlogic-gxl.h" -static int get_engine_number(struct meson_dev *mc) -{ - return atomic_inc_return(&mc->flow) % mc->flow_cnt; -} - static bool meson_cipher_need_fallback(struct skcipher_request *areq) { struct scatterlist *src_sg = areq->src; @@ -282,7 +277,7 @@ int meson_skdecrypt(struct skcipher_request *areq) rctx->op_dir = MESON_DECRYPT; if (meson_cipher_need_fallback(areq)) return meson_cipher_do_fallback(areq); - e = get_engine_number(op->mc); + e = meson_get_engine_number(op->mc); engine = op->mc->chanlist[e].engine; rctx->flow = e; @@ -300,7 +295,7 @@ int meson_skencrypt(struct skcipher_request *areq) rctx->op_dir = MESON_ENCRYPT; if (meson_cipher_need_fallback(areq)) return meson_cipher_do_fallback(areq); - e = get_engine_number(op->mc); + e = meson_get_engine_number(op->mc); engine = op->mc->chanlist[e].engine; rctx->flow = e; diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 0698ac5e2a6a..52317f111c6c 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -22,6 +22,11 @@ #include "amlogic-gxl.h" +int meson_get_engine_number(struct meson_dev *mc) +{ + return atomic_inc_return(&mc->flow) % mc->flow_cnt; +} + void meson_dma_start(struct meson_dev *mc, int flow) { u32 offset = (mc->pdata->descs_reg + flow) << 2; diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 8670f7ebcdda..dc54bd533a2d 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -161,6 +161,8 @@ struct meson_alg_template { #endif }; +int meson_get_engine_number(struct meson_dev *mc); + void meson_dma_start(struct meson_dev *mc, int flow); int meson_enqueue(struct crypto_async_request *areq, u32 type); From patchwork Fri Jun 7 14:12:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 802409 Received: from mx1.sberdevices.ru (mx1.sberdevices.ru [37.18.73.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37FC719752F; Fri, 7 Jun 2024 14:19:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped This field is used only to check for timeout. But there is more convenient way to achive the same goal. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 13 +++++++++---- drivers/crypto/amlogic/amlogic-gxl-core.c | 1 - drivers/crypto/amlogic/amlogic-gxl.h | 2 -- 3 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 18e9e2d39b1f..dc0b100c5de2 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -219,13 +219,18 @@ static int meson_cipher(struct skcipher_request *areq) } reinit_completion(&mc->chanlist[flow].complete); - mc->chanlist[flow].status = 0; meson_dma_start(mc, flow); - wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, - msecs_to_jiffies(500)); - if (mc->chanlist[flow].status == 0) { + + err = wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, + msecs_to_jiffies(500)); + if (err == 0) { dev_err(mc->dev, "DMA timeout for flow %d\n", flow); err = -EINVAL; + } else if (err < 0) { + dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", err); + } else { + /* No error */ + err = 0; } dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE); diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 52317f111c6c..4d04bb0ddc4e 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -53,7 +53,6 @@ static irqreturn_t meson_irq_handler(int irq, void *data) for (flow = 0; flow < mc->flow_cnt; flow++) { if (mc->chanlist[flow].irq == irq) { if (meson_dma_ready(mc, flow)) { - mc->chanlist[flow].status = 1; complete(&mc->chanlist[flow].complete); return IRQ_HANDLED; } diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index dc54bd533a2d..4d60a0cc2dca 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -59,7 +59,6 @@ struct meson_desc { * @engine: ptr to the crypto_engine for this flow * @keylen: keylen for this flow operation * @complete: completion for the current task on this flow - * @status: set to 1 by interrupt if task is done * @irq: IRQ number for amlogic-crypto * @t_phy: Physical address of task * @tl: pointer to the current ce_task for this flow @@ -68,7 +67,6 @@ struct meson_desc { struct meson_flow { struct crypto_engine *engine; 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Fri, 7 Jun 2024 17:13:00 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 07/23] drivers: crypto: meson: move algs definition and cipher API to cipher.c Date: Fri, 7 Jun 2024 17:12:26 +0300 Message-ID: <20240607141242.2616580-8-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped Because that is proper place for them. In particular, it takes less of exported symbol between compiling entities. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 98 +++++++++++++++-- drivers/crypto/amlogic/amlogic-gxl-core.c | 110 ++++---------------- drivers/crypto/amlogic/amlogic-gxl.h | 14 +-- 3 files changed, 119 insertions(+), 103 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index dc0b100c5de2..bc3092a8a2c2 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -271,7 +271,7 @@ int meson_handle_cipher_request(struct crypto_engine *engine, void *areq) return 0; } -int meson_skdecrypt(struct skcipher_request *areq) +static int meson_skdecrypt(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); @@ -289,7 +289,7 @@ int meson_skdecrypt(struct skcipher_request *areq) return crypto_transfer_skcipher_request_to_engine(engine, areq); } -int meson_skencrypt(struct skcipher_request *areq) +static int meson_skencrypt(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); @@ -307,7 +307,7 @@ int meson_skencrypt(struct skcipher_request *areq) return crypto_transfer_skcipher_request_to_engine(engine, areq); } -int meson_cipher_init(struct crypto_tfm *tfm) +static int meson_cipher_init(struct crypto_tfm *tfm) { struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm); struct meson_alg_template *algt; @@ -333,7 +333,7 @@ int meson_cipher_init(struct crypto_tfm *tfm) return 0; } -void meson_cipher_exit(struct crypto_tfm *tfm) +static void meson_cipher_exit(struct crypto_tfm *tfm) { struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm); @@ -341,8 +341,8 @@ void meson_cipher_exit(struct crypto_tfm *tfm) crypto_free_skcipher(op->fallback_tfm); } -int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, - unsigned int keylen) +static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, + unsigned int keylen) { struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); struct meson_dev *mc = op->mc; @@ -369,3 +369,89 @@ int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, return crypto_skcipher_setkey(op->fallback_tfm, key, keylen); } + +static struct meson_alg_template algs[] = { +{ + .type = CRYPTO_ALG_TYPE_SKCIPHER, + .blockmode = MESON_OPMODE_CBC, + .alg.skcipher.base = { + .base = { + .cra_name = "cbc(aes)", + .cra_driver_name = "cbc-aes-gxl", + .cra_priority = 400, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_module = THIS_MODULE, + .cra_alignmask = 0xf, + .cra_init = meson_cipher_init, + .cra_exit = meson_cipher_exit, + }, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = meson_aes_setkey, + .encrypt = meson_skencrypt, + .decrypt = meson_skdecrypt, + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, +}, +{ + .type = CRYPTO_ALG_TYPE_SKCIPHER, + .blockmode = MESON_OPMODE_ECB, + .alg.skcipher.base = { + .base = { + .cra_name = "ecb(aes)", + .cra_driver_name = "ecb-aes-gxl", + .cra_priority = 400, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_module = THIS_MODULE, + .cra_alignmask = 0xf, + .cra_init = meson_cipher_init, + .cra_exit = meson_cipher_exit, + }, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .setkey = meson_aes_setkey, + .encrypt = meson_skencrypt, + .decrypt = meson_skdecrypt, + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, +}, +}; + +int meson_cipher_register(struct meson_dev *mc) +{ + return meson_register_algs(mc, algs, ARRAY_SIZE(algs)); +} + +void meson_cipher_unregister(struct meson_dev *mc) +{ + meson_unregister_algs(mc, algs, ARRAY_SIZE(algs)); +} + +void meson_cipher_debugfs_show(struct seq_file *seq, void *v) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(algs); i++) { + seq_printf(seq, "%s %s %lu %lu\n", + algs[i].alg.skcipher.base.base.cra_driver_name, + algs[i].alg.skcipher.base.base.cra_name, +#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG + algs[i].stat_req, algs[i].stat_fb); +#else + 0ul, 0ul); +#endif + } +} diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 4d04bb0ddc4e..98e63e67aa6e 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -64,66 +64,6 @@ static irqreturn_t meson_irq_handler(int irq, void *data) return IRQ_HANDLED; } -static struct meson_alg_template mc_algs[] = { -{ - .type = CRYPTO_ALG_TYPE_SKCIPHER, - .blockmode = MESON_OPMODE_CBC, - .alg.skcipher.base = { - .base = { - .cra_name = "cbc(aes)", - .cra_driver_name = "cbc-aes-gxl", - .cra_priority = 400, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | - CRYPTO_ALG_NEED_FALLBACK, - .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), - .cra_module = THIS_MODULE, - .cra_alignmask = 0xf, - .cra_init = meson_cipher_init, - .cra_exit = meson_cipher_exit, - }, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .ivsize = AES_BLOCK_SIZE, - .setkey = meson_aes_setkey, - .encrypt = meson_skencrypt, - .decrypt = meson_skdecrypt, - }, - .alg.skcipher.op = { - .do_one_request = meson_handle_cipher_request, - }, -}, -{ - .type = CRYPTO_ALG_TYPE_SKCIPHER, - .blockmode = MESON_OPMODE_ECB, - .alg.skcipher.base = { - .base = { - .cra_name = "ecb(aes)", - .cra_driver_name = "ecb-aes-gxl", - .cra_priority = 400, - .cra_blocksize = AES_BLOCK_SIZE, - .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | - CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | - CRYPTO_ALG_NEED_FALLBACK, - .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), - .cra_module = THIS_MODULE, - .cra_alignmask = 0xf, - .cra_init = meson_cipher_init, - .cra_exit = meson_cipher_exit, - }, - .min_keysize = AES_MIN_KEY_SIZE, - .max_keysize = AES_MAX_KEY_SIZE, - .setkey = meson_aes_setkey, - .encrypt = meson_skencrypt, - .decrypt = meson_skdecrypt, - }, - .alg.skcipher.op = { - .do_one_request = meson_handle_cipher_request, - }, -}, -}; - static int meson_debugfs_show(struct seq_file *seq, void *v) { struct meson_dev *mc __maybe_unused = seq->private; @@ -137,20 +77,8 @@ static int meson_debugfs_show(struct seq_file *seq, void *v) 0ul); #endif - for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { - switch (mc_algs[i].type) { - case CRYPTO_ALG_TYPE_SKCIPHER: - seq_printf(seq, "%s %s %lu %lu\n", - mc_algs[i].alg.skcipher.base.base.cra_driver_name, - mc_algs[i].alg.skcipher.base.base.cra_name, -#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG - mc_algs[i].stat_req, mc_algs[i].stat_fb); -#else - 0ul, 0ul); -#endif - break; - } - } + meson_cipher_debugfs_show(seq, v); + return 0; } DEFINE_SHOW_ATTRIBUTE(meson_debugfs); @@ -227,19 +155,20 @@ static int meson_allocate_chanlist(struct meson_dev *mc) return err; } -static int meson_register_algs(struct meson_dev *mc) +int meson_register_algs(struct meson_dev *mc, struct meson_alg_template *algs, + unsigned int count) { int err, i; - for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { - mc_algs[i].mc = mc; - switch (mc_algs[i].type) { + for (i = 0; i < count; i++) { + algs[i].mc = mc; + switch (algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: - err = crypto_engine_register_skcipher(&mc_algs[i].alg.skcipher); + err = crypto_engine_register_skcipher(&algs[i].alg.skcipher); if (err) { dev_err(mc->dev, "Fail to register %s\n", - mc_algs[i].alg.skcipher.base.base.cra_name); - mc_algs[i].mc = NULL; + algs[i].alg.skcipher.base.base.cra_name); + meson_unregister_algs(mc, algs, count); return err; } break; @@ -249,16 +178,17 @@ static int meson_register_algs(struct meson_dev *mc) return 0; } -static void meson_unregister_algs(struct meson_dev *mc) +void meson_unregister_algs(struct meson_dev *mc, struct meson_alg_template *algs, + unsigned int count) { int i; - for (i = 0; i < ARRAY_SIZE(mc_algs); i++) { - if (!mc_algs[i].mc) + for (i = 0; i < count; i++) { + if (!algs[i].mc) continue; - switch (mc_algs[i].type) { + switch (algs[i].type) { case CRYPTO_ALG_TYPE_SKCIPHER: - crypto_engine_unregister_skcipher(&mc_algs[i].alg.skcipher); + crypto_engine_unregister_skcipher(&algs[i].alg.skcipher); break; } } @@ -291,9 +221,9 @@ static int meson_crypto_probe(struct platform_device *pdev) if (err) goto error_flow; - err = meson_register_algs(mc); + err = meson_cipher_register(mc); if (err) - goto error_alg; + goto error_flow; if (IS_ENABLED(CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG)) { struct dentry *dbgfs_dir; @@ -307,8 +237,6 @@ static int meson_crypto_probe(struct platform_device *pdev) } return 0; -error_alg: - meson_unregister_algs(mc); error_flow: meson_free_chanlist(mc, mc->flow_cnt - 1); return err; @@ -322,7 +250,7 @@ static void meson_crypto_remove(struct platform_device *pdev) debugfs_remove_recursive(mc->dbgfs_dir); #endif - meson_unregister_algs(mc); + meson_cipher_unregister(mc); meson_free_chanlist(mc, mc->flow_cnt - 1); } diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 4d60a0cc2dca..9d66903aa73d 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -165,10 +165,12 @@ void meson_dma_start(struct meson_dev *mc, int flow); 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Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 24 ++++++++++----------- drivers/crypto/amlogic/amlogic-gxl.h | 16 ++++++++------ 2 files changed, 21 insertions(+), 19 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index bc3092a8a2c2..c662c4b86e97 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -141,8 +141,8 @@ static int meson_cipher(struct skcipher_request *areq) ivsize, 0); } } - if (keyivlen == 24) - keyivlen = 32; + if (keyivlen == AES_KEYSIZE_192) + keyivlen = AES_MAX_KEY_SIZE; phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen, DMA_TO_DEVICE); @@ -161,7 +161,7 @@ static int meson_cipher(struct skcipher_request *areq) todo = min(keyivlen - eat, 16u); desc->t_src = cpu_to_le32(phykeyiv + i * 16); desc->t_dst = cpu_to_le32(i * 16); - v = (MODE_KEY << 20) | DESC_OWN | 16; + v = DESC_MODE_KEY | DESC_OWN | 16; desc->t_status = cpu_to_le32(v); eat += todo; @@ -205,7 +205,7 @@ static int meson_cipher(struct skcipher_request *areq) desc->t_src = cpu_to_le32(sg_dma_address(src_sg)); desc->t_dst = cpu_to_le32(sg_dma_address(dst_sg)); todo = min(len, sg_dma_len(src_sg)); - v = (op->keymode << 20) | DESC_OWN | todo | (algt->blockmode << 26); + v = op->keymode | DESC_OWN | todo | algt->blockmode; if (rctx->op_dir) v |= DESC_ENCRYPTION; len -= todo; @@ -348,14 +348,14 @@ static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, struct meson_dev *mc = op->mc; switch (keylen) { - case 128 / 8: - op->keymode = MODE_AES_128; + case AES_KEYSIZE_128: + op->keymode = DESC_MODE_AES_128; break; - case 192 / 8: - op->keymode = MODE_AES_192; + case AES_KEYSIZE_192: + op->keymode = DESC_MODE_AES_192; break; - case 256 / 8: - op->keymode = MODE_AES_256; + case AES_KEYSIZE_256: + op->keymode = DESC_MODE_AES_256; break; default: dev_dbg(mc->dev, "ERROR: Invalid keylen %u\n", keylen); @@ -373,7 +373,7 @@ static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, static struct meson_alg_template algs[] = { { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .blockmode = MESON_OPMODE_CBC, + .blockmode = DESC_OPMODE_CBC, .alg.skcipher.base = { .base = { .cra_name = "cbc(aes)", @@ -402,7 +402,7 @@ static struct meson_alg_template algs[] = { }, { .type = CRYPTO_ALG_TYPE_SKCIPHER, - .blockmode = MESON_OPMODE_ECB, + .blockmode = DESC_OPMODE_ECB, .alg.skcipher.base = { .base = { .cra_name = "ecb(aes)", diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index 9d66903aa73d..1ab3462dea42 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -11,19 +11,21 @@ #include #include -#define MODE_KEY 1 -#define MODE_AES_128 0x8 -#define MODE_AES_192 0x9 -#define MODE_AES_256 0xa - #define MESON_DECRYPT 0 #define MESON_ENCRYPT 1 -#define MESON_OPMODE_ECB 0 -#define MESON_OPMODE_CBC 1 +#define DESC_MODE_KEY (0x1 << 20) +#define DESC_MODE_AES_128 (0x8 << 20) +#define DESC_MODE_AES_192 (0x9 << 20) +#define DESC_MODE_AES_256 (0xa << 20) #define MAXDESC 64 +#define DESC_OPMODE_ECB (0 << 26) +#define DESC_OPMODE_CBC (1 << 26) + +#define DESC_MAXLEN GENMASK(16, 0) + #define DESC_LAST BIT(18) #define DESC_ENCRYPTION BIT(28) #define DESC_OWN BIT(31) From patchwork Fri Jun 7 14:12:28 2024 Content-Type: text/plain; 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Fri, 7 Jun 2024 17:13:02 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 09/23] drivers: crypto: meson: process more than MAXDESCS descriptors Date: Fri, 7 Jun 2024 17:12:28 +0300 Message-ID: <20240607141242.2616580-10-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; 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The old alhorithm was not designed to process a large amount of memory, and therefore gave incorrect results. 2. Not all Amlogic SoC's use 3 KEY/IV descriptors. Add keyiv descriptors count parameter to platform data. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 448 +++++++++++++------- drivers/crypto/amlogic/amlogic-gxl-core.c | 1 + drivers/crypto/amlogic/amlogic-gxl.h | 2 + 3 files changed, 286 insertions(+), 165 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index c662c4b86e97..0d32d2e3ca3b 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -17,35 +17,41 @@ #include #include "amlogic-gxl.h" -static bool meson_cipher_need_fallback(struct skcipher_request *areq) +static bool meson_cipher_need_fallback_sg(struct skcipher_request *areq, + struct scatterlist *sg) { - struct scatterlist *src_sg = areq->src; - struct scatterlist *dst_sg = areq->dst; + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); + unsigned int blocksize = crypto_skcipher_blocksize(tfm); + unsigned int cryptlen = areq->cryptlen; + + while (cryptlen) { + unsigned int len = min(cryptlen, sg->length); + + if (!IS_ALIGNED(sg->offset, sizeof(u32))) + return true; + if (len % blocksize != 0) + return true; + + cryptlen -= len; + sg = sg_next(sg); + } + + return false; +} +static bool meson_cipher_need_fallback(struct skcipher_request *areq) +{ if (areq->cryptlen == 0) return true; - if (sg_nents(src_sg) != sg_nents(dst_sg)) + if (meson_cipher_need_fallback_sg(areq, areq->src)) return true; - /* KEY/IV descriptors use 3 desc */ - if (sg_nents(src_sg) > MAXDESC - 3 || sg_nents(dst_sg) > MAXDESC - 3) - return true; + if (areq->dst == areq->src) + return false; - while (src_sg && dst_sg) { - if ((src_sg->length % 16) != 0) - return true; - if ((dst_sg->length % 16) != 0) - return true; - if (src_sg->length != dst_sg->length) - return true; - if (!IS_ALIGNED(src_sg->offset, sizeof(u32))) - return true; - if (!IS_ALIGNED(dst_sg->offset, sizeof(u32))) - return true; - src_sg = sg_next(src_sg); - dst_sg = sg_next(dst_sg); - } + if (meson_cipher_need_fallback_sg(areq, areq->dst)) + return true; return false; } @@ -76,184 +82,296 @@ static int meson_cipher_do_fallback(struct skcipher_request *areq) return err; } -static int meson_cipher(struct skcipher_request *areq) +struct cipher_ctx { + struct { + dma_addr_t addr; + unsigned int len; + } keyiv; + + struct skcipher_request *areq; + struct scatterlist *src_sg; + struct scatterlist *dst_sg; + void *bkeyiv; + + unsigned int src_offset; + unsigned int dst_offset; + unsigned int cryptlen; + unsigned int tloffset; +}; + +static int meson_map_scatterlist(struct skcipher_request *areq, struct meson_dev *mc) { - struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); - struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); - struct meson_dev *mc = op->mc; - struct skcipher_alg *alg = crypto_skcipher_alg(tfm); - struct meson_alg_template *algt; - int flow = rctx->flow; - unsigned int todo, eat, len; - struct scatterlist *src_sg = areq->src; - struct scatterlist *dst_sg = areq->dst; - struct meson_desc *desc; int nr_sgs, nr_sgd; - int i, err = 0; - unsigned int keyivlen, ivsize, offset, tloffset; - dma_addr_t phykeyiv; - void *backup_iv = NULL, *bkeyiv; - u32 v; - - algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); - - dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u flow=%d\n", __func__, - crypto_tfm_alg_name(areq->base.tfm), - areq->cryptlen, - rctx->op_dir, crypto_skcipher_ivsize(tfm), - op->keylen, flow); - -#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG - algt->stat_req++; - mc->chanlist[flow].stat_req++; -#endif - - /* - * The hardware expect a list of meson_desc structures. - * The 2 first structures store key - * The third stores IV - */ - bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA); - if (!bkeyiv) - return -ENOMEM; - - memcpy(bkeyiv, op->key, op->keylen); - keyivlen = op->keylen; - - ivsize = crypto_skcipher_ivsize(tfm); - if (areq->iv && ivsize > 0) { - if (ivsize > areq->cryptlen) { - dev_err(mc->dev, "invalid ivsize=%d vs len=%d\n", ivsize, areq->cryptlen); - err = -EINVAL; - goto theend; - } - memcpy(bkeyiv + 32, areq->iv, ivsize); - keyivlen = 48; - if (rctx->op_dir == MESON_DECRYPT) { - backup_iv = kzalloc(ivsize, GFP_KERNEL); - if (!backup_iv) { - err = -ENOMEM; - goto theend; - } - offset = areq->cryptlen - ivsize; - scatterwalk_map_and_copy(backup_iv, areq->src, offset, - ivsize, 0); - } - } - if (keyivlen == AES_KEYSIZE_192) - keyivlen = AES_MAX_KEY_SIZE; - - phykeyiv = dma_map_single(mc->dev, bkeyiv, keyivlen, - DMA_TO_DEVICE); - err = dma_mapping_error(mc->dev, phykeyiv); - if (err) { - dev_err(mc->dev, "Cannot DMA MAP KEY IV\n"); - goto theend; - } - - tloffset = 0; - eat = 0; - i = 0; - while (keyivlen > eat) { - desc = &mc->chanlist[flow].tl[tloffset]; - memset(desc, 0, sizeof(struct meson_desc)); - todo = min(keyivlen - eat, 16u); - desc->t_src = cpu_to_le32(phykeyiv + i * 16); - desc->t_dst = cpu_to_le32(i * 16); - v = DESC_MODE_KEY | DESC_OWN | 16; - desc->t_status = cpu_to_le32(v); - - eat += todo; - i++; - tloffset++; - } if (areq->src == areq->dst) { nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL); if (!nr_sgs) { dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs); - err = -EINVAL; - goto theend; + return -EINVAL; } - nr_sgd = nr_sgs; } else { nr_sgs = dma_map_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); - if (!nr_sgs || nr_sgs > MAXDESC - 3) { + if (!nr_sgs) { dev_err(mc->dev, "Invalid SG count %d\n", nr_sgs); - err = -EINVAL; - goto theend; + return -EINVAL; } + nr_sgd = dma_map_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE); - if (!nr_sgd || nr_sgd > MAXDESC - 3) { + if (!nr_sgd) { + dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); dev_err(mc->dev, "Invalid SG count %d\n", nr_sgd); - err = -EINVAL; - goto theend; + return -EINVAL; } } - src_sg = areq->src; - dst_sg = areq->dst; - len = areq->cryptlen; - while (src_sg) { - desc = &mc->chanlist[flow].tl[tloffset]; - memset(desc, 0, sizeof(struct meson_desc)); - - desc->t_src = cpu_to_le32(sg_dma_address(src_sg)); - desc->t_dst = cpu_to_le32(sg_dma_address(dst_sg)); - todo = min(len, sg_dma_len(src_sg)); - v = op->keymode | DESC_OWN | todo | algt->blockmode; - if (rctx->op_dir) - v |= DESC_ENCRYPTION; - len -= todo; - - if (!sg_next(src_sg)) - v |= DESC_LAST; - desc->t_status = cpu_to_le32(v); - tloffset++; - src_sg = sg_next(src_sg); - dst_sg = sg_next(dst_sg); + return 0; +} + +static void meson_unmap_scatterlist(struct skcipher_request *areq, struct meson_dev *mc) +{ + if (areq->src == areq->dst) { + dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL); + } else { + dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); + dma_unmap_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE); } +} - reinit_completion(&mc->chanlist[flow].complete); - meson_dma_start(mc, flow); +static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) +{ + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, alg.skcipher.base); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_dev *mc = op->mc; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); + unsigned int blockmode = algt->blockmode; + int i; + + if (ctx->tloffset) + return; + + if (blockmode == DESC_OPMODE_CBC) { + memcpy(ctx->bkeyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + dma_sync_single_for_device(mc->dev, ctx->keyiv.addr, + ctx->keyiv.len, DMA_TO_DEVICE); + } + + for (i = 0; i < mc->pdata->setup_desc_cnt; i++) { + struct meson_desc *desc = + &mc->chanlist[rctx->flow].tl[ctx->tloffset]; + int offset = i * 16; + + desc->t_src = cpu_to_le32(ctx->keyiv.addr + offset); + desc->t_dst = cpu_to_le32(offset); + desc->t_status = cpu_to_le32(DESC_OWN | DESC_MODE_KEY | ctx->keyiv.len); + + ctx->tloffset++; + } +} - err = wait_for_completion_interruptible_timeout(&mc->chanlist[flow].complete, +static bool meson_setup_data_descs(struct cipher_ctx *ctx) +{ + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, + alg.skcipher.base); + struct meson_dev *mc = op->mc; + struct meson_desc *desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset]; + unsigned int blocksize = crypto_skcipher_blocksize(tfm); + unsigned int blockmode = algt->blockmode; + unsigned int maxlen = rounddown(DESC_MAXLEN, blocksize); + unsigned int todo; + u32 v; + + ctx->tloffset++; + + todo = min(ctx->cryptlen, maxlen); + todo = min(todo, ctx->cryptlen); + todo = min(todo, sg_dma_len(ctx->src_sg) - ctx->src_offset); + todo = min(todo, sg_dma_len(ctx->dst_sg) - ctx->dst_offset); + + desc->t_src = cpu_to_le32(sg_dma_address(ctx->src_sg) + ctx->src_offset); + desc->t_dst = cpu_to_le32(sg_dma_address(ctx->dst_sg) + ctx->dst_offset); + + ctx->cryptlen -= todo; + ctx->src_offset += todo; + ctx->dst_offset += todo; + + v = DESC_OWN | blockmode | op->keymode | todo; + if (rctx->op_dir == MESON_ENCRYPT) + v |= DESC_ENCRYPTION; + + if (!ctx->cryptlen || ctx->tloffset == MAXDESC) + v |= DESC_LAST; + + desc->t_status = cpu_to_le32(v); + + return v & DESC_LAST; +} + +static int meson_kick_hardware(struct cipher_ctx *ctx) +{ + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, + alg.skcipher.base); + struct meson_dev *mc = op->mc; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); + unsigned int blockmode = algt->blockmode; + enum dma_data_direction new_iv_dir; + struct scatterlist *sg_head; + dma_addr_t new_iv_phys; + void *new_iv; + int err; + + if (blockmode == DESC_OPMODE_CBC) { + struct scatterlist *sg_current; + unsigned int offset; + + if (rctx->op_dir == MESON_ENCRYPT) { + sg_current = ctx->dst_sg; + sg_head = ctx->areq->dst; + offset = ctx->dst_offset; + new_iv_dir = DMA_FROM_DEVICE; + } else { + sg_current = ctx->src_sg; + sg_head = ctx->areq->src; + offset = ctx->src_offset; + new_iv_dir = DMA_TO_DEVICE; + } + + if (ctx->areq->src == ctx->areq->dst) + new_iv_dir = DMA_BIDIRECTIONAL; + + offset -= ivsize; + new_iv = sg_virt(sg_current) + offset; + new_iv_phys = sg_dma_address(sg_current) + offset; + } + + if (blockmode == DESC_OPMODE_CBC && + rctx->op_dir == MESON_DECRYPT) { + dma_sync_sg_for_cpu(mc->dev, sg_head, + sg_nents(sg_head), new_iv_dir); + memcpy(ctx->areq->iv, new_iv, ivsize); + } + + reinit_completion(&mc->chanlist[rctx->flow].complete); + meson_dma_start(mc, rctx->flow); + err = wait_for_completion_interruptible_timeout(&mc->chanlist[rctx->flow].complete, msecs_to_jiffies(500)); if (err == 0) { - dev_err(mc->dev, "DMA timeout for flow %d\n", flow); - err = -EINVAL; + dev_err(mc->dev, "DMA timeout for flow %d\n", rctx->flow); + return -EINVAL; } else if (err < 0) { dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", err); - } else { - /* No error */ - err = 0; + return err; } - dma_unmap_single(mc->dev, phykeyiv, keyivlen, DMA_TO_DEVICE); + if (blockmode == DESC_OPMODE_CBC && + rctx->op_dir == MESON_ENCRYPT) { + dma_sync_sg_for_cpu(mc->dev, sg_head, + sg_nents(sg_head), new_iv_dir); + memcpy(ctx->areq->iv, new_iv, ivsize); + } - if (areq->src == areq->dst) { - dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_BIDIRECTIONAL); - } else { - dma_unmap_sg(mc->dev, areq->src, sg_nents(areq->src), DMA_TO_DEVICE); - dma_unmap_sg(mc->dev, areq->dst, sg_nents(areq->dst), DMA_FROM_DEVICE); + ctx->tloffset = 0; + + return 0; +} + +static int meson_cipher(struct skcipher_request *areq) +{ + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); + struct meson_dev *mc = op->mc; + struct skcipher_alg *alg = crypto_skcipher_alg(tfm); + struct meson_alg_template *algt; + struct cipher_ctx ctx = { + .areq = areq, + .src_offset = 0, + .dst_offset = 0, + .src_sg = areq->src, + .dst_sg = areq->dst, + .cryptlen = areq->cryptlen, + }; + int err; + + dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u ctx.flow=%d\n", __func__, + crypto_tfm_alg_name(areq->base.tfm), + areq->cryptlen, + rctx->op_dir, crypto_skcipher_ivsize(tfm), + op->keylen, rctx->flow); + + algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); + +#ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG + algt->stat_req++; + mc->chanlist[rctx->flow].stat_req++; +#endif + + ctx.bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA); + if (!ctx.bkeyiv) + return -ENOMEM; + + memcpy(ctx.bkeyiv, op->key, op->keylen); + ctx.keyiv.len = op->keylen; + if (ctx.keyiv.len == AES_KEYSIZE_192) + ctx.keyiv.len = AES_MAX_KEY_SIZE; + + ctx.keyiv.addr = dma_map_single(mc->dev, ctx.bkeyiv, ctx.keyiv.len, + DMA_TO_DEVICE); + err = dma_mapping_error(mc->dev, ctx.keyiv.addr); + if (err) { + dev_err(mc->dev, "Cannot DMA MAP KEY IV\n"); + goto free_keyiv; } - if (areq->iv && ivsize > 0) { - if (rctx->op_dir == MESON_DECRYPT) { - memcpy(areq->iv, backup_iv, ivsize); - } else { - scatterwalk_map_and_copy(areq->iv, areq->dst, - areq->cryptlen - ivsize, - ivsize, 0); + err = meson_map_scatterlist(areq, mc); + if (err) + goto unmap_keyiv; + + ctx.tloffset = 0; + + while (ctx.cryptlen) { + meson_setup_keyiv_descs(&ctx); + + if (meson_setup_data_descs(&ctx)) { + err = meson_kick_hardware(&ctx); + if (err) + break; + } + + if (ctx.src_offset == sg_dma_len(ctx.src_sg)) { + ctx.src_offset = 0; + ctx.src_sg = sg_next(ctx.src_sg); + } + + if (ctx.dst_offset == sg_dma_len(ctx.dst_sg)) { + ctx.dst_offset = 0; + ctx.dst_sg = sg_next(ctx.dst_sg); } } -theend: - kfree_sensitive(bkeyiv); - kfree_sensitive(backup_iv); + + meson_unmap_scatterlist(areq, mc); + +unmap_keyiv: + dma_unmap_single(mc->dev, ctx.keyiv.addr, ctx.keyiv.len, DMA_TO_DEVICE); + +free_keyiv: + kfree_sensitive(ctx.bkeyiv); return err; } diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 98e63e67aa6e..5fea95e9876b 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -258,6 +258,7 @@ static void meson_crypto_remove(struct platform_device *pdev) static const struct meson_pdata meson_gxl_pdata = { .descs_reg = 0x0, .status_reg = 0x4, + .setup_desc_cnt = 3, }; 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Fri, 7 Jun 2024 17:13:04 +0300 (MSK) Received: from user-A520M-DS3H.sberdevices.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 7 Jun 2024 17:13:02 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 10/23] drivers: crypto: meson: avoid kzalloc in engine thread Date: Fri, 7 Jun 2024 17:12:29 +0300 Message-ID: <20240607141242.2616580-11-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped It makes no sense to allocate memory via kzalloc, we can use static buffer, speedup data processing and don't think about kfree() calls. Signed-off-by: Alexey Romanov Reviewed-by: Neil Armstrong --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 52 +++++++++------------ drivers/crypto/amlogic/amlogic-gxl.h | 6 +-- 2 files changed, 26 insertions(+), 32 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 0d32d2e3ca3b..622e179320ff 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -59,7 +59,7 @@ static bool meson_cipher_need_fallback(struct skcipher_request *areq) static int meson_cipher_do_fallback(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); int err; #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG @@ -91,7 +91,6 @@ struct cipher_ctx { struct skcipher_request *areq; struct scatterlist *src_sg; struct scatterlist *dst_sg; - void *bkeyiv; unsigned int src_offset; unsigned int dst_offset; @@ -147,7 +146,7 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) struct skcipher_alg *alg = crypto_skcipher_alg(tfm); struct meson_alg_template *algt = container_of(alg, struct meson_alg_template, alg.skcipher.base); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct meson_dev *mc = op->mc; unsigned int ivsize = crypto_skcipher_ivsize(tfm); unsigned int blockmode = algt->blockmode; @@ -157,7 +156,7 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) return; if (blockmode == DESC_OPMODE_CBC) { - memcpy(ctx->bkeyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); dma_sync_single_for_device(mc->dev, ctx->keyiv.addr, ctx->keyiv.len, DMA_TO_DEVICE); } @@ -179,7 +178,7 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx) { struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct skcipher_alg *alg = crypto_skcipher_alg(tfm); struct meson_alg_template *algt = container_of(alg, struct meson_alg_template, @@ -222,7 +221,7 @@ static int meson_kick_hardware(struct cipher_ctx *ctx) { struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(ctx->areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct skcipher_alg *alg = crypto_skcipher_alg(tfm); struct meson_alg_template *algt = container_of(alg, struct meson_alg_template, @@ -294,7 +293,7 @@ static int meson_kick_hardware(struct cipher_ctx *ctx) static int meson_cipher(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); struct meson_dev *mc = op->mc; struct skcipher_alg *alg = crypto_skcipher_alg(tfm); @@ -307,6 +306,7 @@ static int meson_cipher(struct skcipher_request *areq) .dst_sg = areq->dst, .cryptlen = areq->cryptlen, }; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); int err; dev_dbg(mc->dev, "%s %s %u %x IV(%u) key=%u ctx.flow=%d\n", __func__, @@ -322,21 +322,21 @@ static int meson_cipher(struct skcipher_request *areq) mc->chanlist[rctx->flow].stat_req++; #endif - ctx.bkeyiv = kzalloc(48, GFP_KERNEL | GFP_DMA); - if (!ctx.bkeyiv) - return -ENOMEM; - - memcpy(ctx.bkeyiv, op->key, op->keylen); ctx.keyiv.len = op->keylen; if (ctx.keyiv.len == AES_KEYSIZE_192) ctx.keyiv.len = AES_MAX_KEY_SIZE; - ctx.keyiv.addr = dma_map_single(mc->dev, ctx.bkeyiv, ctx.keyiv.len, + if (algt->blockmode == DESC_OPMODE_CBC) { + memcpy(op->keyiv + AES_MAX_KEY_SIZE, areq->iv, ivsize); + ctx.keyiv.len = AES_MAX_KEY_SIZE + ivsize; + } + + ctx.keyiv.addr = dma_map_single(mc->dev, op->keyiv, ctx.keyiv.len, DMA_TO_DEVICE); err = dma_mapping_error(mc->dev, ctx.keyiv.addr); if (err) { dev_err(mc->dev, "Cannot DMA MAP KEY IV\n"); - goto free_keyiv; + return err; } err = meson_map_scatterlist(areq, mc); @@ -370,9 +370,6 @@ static int meson_cipher(struct skcipher_request *areq) unmap_keyiv: dma_unmap_single(mc->dev, ctx.keyiv.addr, ctx.keyiv.len, DMA_TO_DEVICE); -free_keyiv: - kfree_sensitive(ctx.bkeyiv); - return err; } @@ -392,7 +389,7 @@ int meson_handle_cipher_request(struct crypto_engine *engine, void *areq) static int meson_skdecrypt(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); struct crypto_engine *engine; int e; @@ -410,7 +407,7 @@ static int meson_skdecrypt(struct skcipher_request *areq) static int meson_skencrypt(struct skcipher_request *areq) { struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(areq); struct crypto_engine *engine; int e; @@ -427,7 +424,7 @@ static int meson_skencrypt(struct skcipher_request *areq) static int meson_cipher_init(struct crypto_tfm *tfm) { - struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx_dma(tfm); struct meson_alg_template *algt; const char *name = crypto_tfm_alg_name(tfm); struct crypto_skcipher *sktfm = __crypto_skcipher_cast(tfm); @@ -453,16 +450,15 @@ static int meson_cipher_init(struct crypto_tfm *tfm) static void meson_cipher_exit(struct crypto_tfm *tfm) { - struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_tfm_ctx_dma(tfm); - kfree_sensitive(op->key); crypto_free_skcipher(op->fallback_tfm); } static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, unsigned int keylen) { - struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx(tfm); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); struct meson_dev *mc = op->mc; switch (keylen) { @@ -479,11 +475,9 @@ static int meson_aes_setkey(struct crypto_skcipher *tfm, const u8 *key, dev_dbg(mc->dev, "ERROR: Invalid keylen %u\n", keylen); return -EINVAL; } - kfree_sensitive(op->key); + + memcpy(op->keyiv, key, keylen); op->keylen = keylen; - op->key = kmemdup(key, keylen, GFP_KERNEL | GFP_DMA); - if (!op->key) - return -ENOMEM; return crypto_skcipher_setkey(op->fallback_tfm, key, keylen); } @@ -501,7 +495,7 @@ static struct meson_alg_template algs[] = { .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_NEED_FALLBACK, - .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx) + CRYPTO_DMA_PADDING, .cra_module = THIS_MODULE, .cra_alignmask = 0xf, .cra_init = meson_cipher_init, @@ -530,7 +524,7 @@ static struct meson_alg_template algs[] = { .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | CRYPTO_ALG_NEED_FALLBACK, - .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx), + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx) + CRYPTO_DMA_PADDING, .cra_module = THIS_MODULE, .cra_alignmask = 0xf, .cra_init = meson_cipher_init, diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index f3455babb52a..dc5218064f99 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -127,15 +127,15 @@ struct meson_cipher_req_ctx { /* * struct meson_cipher_tfm_ctx - context for a skcipher TFM - * @key: pointer to key data + * @keyiv: key data * @keylen: len of the key * @keymode: The keymode(type and size of key) associated with this TFM * @mc: pointer to the private data of driver handling this TFM * @fallback_tfm: pointer to the fallback TFM */ struct meson_cipher_tfm_ctx { - u32 *key; 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Fri, 7 Jun 2024 17:13:03 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 11/23] drivers: crypto: meson: introduce hasher Date: Fri, 7 Jun 2024 17:12:30 +0300 Message-ID: <20240607141242.2616580-12-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped Introduce support for SHA1/SHA224/SHA256 hash algos. Tested via tcrypt and custom tests. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/Makefile | 2 +- drivers/crypto/amlogic/amlogic-gxl-core.c | 25 +- drivers/crypto/amlogic/amlogic-gxl-hasher.c | 507 ++++++++++++++++++++ drivers/crypto/amlogic/amlogic-gxl.h | 51 ++ 4 files changed, 583 insertions(+), 2 deletions(-) create mode 100644 drivers/crypto/amlogic/amlogic-gxl-hasher.c diff --git a/drivers/crypto/amlogic/Makefile b/drivers/crypto/amlogic/Makefile index 39057e62c13e..4b6b388b7880 100644 --- a/drivers/crypto/amlogic/Makefile +++ b/drivers/crypto/amlogic/Makefile @@ -1,2 +1,2 @@ obj-$(CONFIG_CRYPTO_DEV_AMLOGIC_GXL) += amlogic-gxl-crypto.o -amlogic-gxl-crypto-y := amlogic-gxl-core.o amlogic-gxl-cipher.o +amlogic-gxl-crypto-y := amlogic-gxl-core.o amlogic-gxl-cipher.o amlogic-gxl-hasher.o diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 5fea95e9876b..a1aff009f913 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -19,6 +19,9 @@ #include #include #include +#include +#include +#include #include "amlogic-gxl.h" @@ -172,6 +175,15 @@ int meson_register_algs(struct meson_dev *mc, struct meson_alg_template *algs, return err; } break; + case CRYPTO_ALG_TYPE_AHASH: + err = crypto_engine_register_ahash(&algs[i].alg.ahash); + if (err) { + dev_err(mc->dev, "Fail to register %s\n", + algs[i].alg.ahash.base.halg.base.cra_name); + meson_unregister_algs(mc, algs, count); + return err; + } + break; } } @@ -190,6 +202,9 @@ void meson_unregister_algs(struct meson_dev *mc, struct meson_alg_template *algs case CRYPTO_ALG_TYPE_SKCIPHER: crypto_engine_unregister_skcipher(&algs[i].alg.skcipher); break; + case CRYPTO_ALG_TYPE_AHASH: + crypto_engine_unregister_ahash(&algs[i].alg.ahash); + break; } } } @@ -230,13 +245,20 @@ static int meson_crypto_probe(struct platform_device *pdev) dbgfs_dir = debugfs_create_dir("gxl-crypto", NULL); debugfs_create_file("stats", 0444, dbgfs_dir, mc, &meson_debugfs_fops); - #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG mc->dbgfs_dir = dbgfs_dir; #endif } + err = meson_hasher_register(mc); + if (err) + goto error_hasher; + return 0; + +error_hasher: + meson_cipher_unregister(mc); + error_flow: meson_free_chanlist(mc, mc->flow_cnt - 1); return err; @@ -259,6 +281,7 @@ static const struct meson_pdata meson_gxl_pdata = { .descs_reg = 0x0, .status_reg = 0x4, .setup_desc_cnt = 3, + .hasher_supported = false, }; static const struct of_device_id meson_crypto_of_match_table[] = { diff --git a/drivers/crypto/amlogic/amlogic-gxl-hasher.c b/drivers/crypto/amlogic/amlogic-gxl-hasher.c new file mode 100644 index 000000000000..ffc1b23438be --- /dev/null +++ b/drivers/crypto/amlogic/amlogic-gxl-hasher.c @@ -0,0 +1,507 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Hardware asynchronous hasher for Amlogic SoC's. + * + * Copyright (c) 2023, SaluteDevices. All Rights Reserved. + * + * Author: Alexey Romanov + */ + +#include +#include +#include +#include +#include +#include +#include + +#include "amlogic-gxl.h" + +static int meson_sha_init(struct ahash_request *req) +{ + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + + memset(rctx, 0, sizeof(struct meson_hasher_req_ctx)); + + rctx->flow = meson_get_engine_number(tctx->mc); + rctx->begin_req = true; + + return 0; +} + +static int meson_sha_update(struct ahash_request *req) +{ + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct crypto_engine *engine = tctx->mc->chanlist[rctx->flow].engine; + + return crypto_transfer_hash_request_to_engine(engine, req); +} + +static int meson_sha_final(struct ahash_request *req) +{ + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct crypto_engine *engine = tctx->mc->chanlist[rctx->flow].engine; + + rctx->final_req = true; + + return crypto_transfer_hash_request_to_engine(engine, req); +} + +static int meson_sha_digest(struct ahash_request *req) +{ + struct crypto_wait wait; + int ret; + + crypto_init_wait(&wait); + ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_SLEEP | + CRYPTO_TFM_REQ_MAY_BACKLOG, + crypto_req_done, &wait); + + meson_sha_init(req); + + ret = crypto_wait_req(meson_sha_update(req), &wait); + if (ret) + return ret; + + return crypto_wait_req(meson_sha_final(req), &wait); +} + +static int meson_hasher_req_map(struct ahash_request *req) +{ + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_dev *mc = tctx->mc; + int ret; + + if (!req->nbytes) + return 0; + + ret = dma_map_sg(mc->dev, req->src, sg_nents(req->src), DMA_TO_DEVICE); + if (!ret) { + dev_err(mc->dev, "Cannot DMA MAP request data\n"); + return -ENOMEM; + } + + return 0; +} + +static void meson_hasher_req_unmap(struct ahash_request *req) +{ + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_dev *mc = tctx->mc; + + if (!req->nbytes) + return; + + dma_unmap_sg(mc->dev, req->src, sg_nents(req->src), DMA_TO_DEVICE); +} + +struct hasher_ctx { + struct crypto_async_request *areq; + + unsigned int tloffset; + unsigned int nbytes; + unsigned int todo; + + dma_addr_t state_addr; + dma_addr_t src_addr; + unsigned int src_offset; + struct scatterlist *src_sg; +}; + +static bool meson_final(struct hasher_ctx *ctx) +{ + struct ahash_request *req = ahash_request_cast(ctx->areq); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + + return !ctx->nbytes && rctx->final_req; +} + +static int meson_fill_partial_buffer(struct hasher_ctx *ctx, unsigned int len) +{ + struct ahash_request *req = ahash_request_cast(ctx->areq); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct meson_dev *mc = tctx->mc; + unsigned int blocksize = crypto_ahash_blocksize(tfm); + unsigned int copy; + + if (len) { + copy = min(blocksize - rctx->partial_size, len); + memcpy(rctx->partial + rctx->partial_size, + sg_virt(ctx->src_sg) + ctx->src_offset, copy); + + rctx->partial_size += copy; + ctx->nbytes -= copy; + ctx->src_offset += copy; + } + + if (rctx->partial_size == blocksize || meson_final(ctx)) { + rctx->partial_addr = dma_map_single(mc->dev, + rctx->partial, + rctx->partial_size, + DMA_TO_DEVICE); + if (dma_mapping_error(mc->dev, rctx->partial_addr)) { + dev_err(mc->dev, "Cannot DMA MAP SHA partial buffer\n"); + return -ENOMEM; + } + + rctx->partial_mapped = true; + ctx->todo = rctx->partial_size; + ctx->src_addr = rctx->partial_addr; + } + + return 0; +} + +static unsigned int meson_setup_data_descs(struct hasher_ctx *ctx) +{ + struct ahash_request *req = ahash_request_cast(ctx->areq); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_dev *mc = tctx->mc; + struct meson_flow *flow = &mc->chanlist[rctx->flow]; + struct hash_alg_common *alg = crypto_hash_alg_common(tfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, alg.ahash.base.halg); + struct meson_desc *desc = &flow->tl[ctx->tloffset]; + u32 v; + + ctx->tloffset++; + + v = DESC_OWN | DESC_ENCRYPTION | DESC_OPMODE_SHA | + ctx->todo | algt->blockmode; + if (rctx->begin_req) { + rctx->begin_req = false; + v |= DESC_BEGIN; + } + + if (!ctx->nbytes && rctx->final_req) { + rctx->final_req = false; + v |= DESC_END; + } + + if (!ctx->nbytes || ctx->tloffset == MAXDESC || rctx->partial_mapped) + v |= DESC_LAST; + + desc->t_src = cpu_to_le32(ctx->src_addr); + desc->t_dst = cpu_to_le32(ctx->state_addr); + desc->t_status = cpu_to_le32(v); + + return v & DESC_LAST; +} + +static int meson_kick_hardware(struct hasher_ctx *ctx) +{ + struct ahash_request *req = ahash_request_cast(ctx->areq); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_dev *mc = tctx->mc; + struct meson_flow *flow = &mc->chanlist[rctx->flow]; + int ret; + + reinit_completion(&flow->complete); + meson_dma_start(mc, rctx->flow); + + ret = wait_for_completion_timeout(&flow->complete, + msecs_to_jiffies(500)); + if (ret == 0) { + dev_err(mc->dev, "DMA timeout for flow %d\n", rctx->flow); + return -EINVAL; + } else if (ret < 0) { + dev_err(mc->dev, "Waiting for DMA completion is failed (%d)\n", ret); + return ret; + } + + if (rctx->partial_mapped) { + dma_unmap_single(mc->dev, rctx->partial_addr, + rctx->partial_size, + DMA_TO_DEVICE); + rctx->partial_size = 0; + rctx->partial_mapped = false; + } + + ctx->tloffset = 0; + + return 0; +} + +static void meson_setup_state_descs(struct hasher_ctx *ctx) +{ + struct ahash_request *req = ahash_request_cast(ctx->areq); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_dev *mc = tctx->mc; + struct meson_desc *desc; + int i; + + if (ctx->tloffset || rctx->begin_req) + return; + + for (i = 0; i < mc->pdata->setup_desc_cnt; i++) { + int offset = i * 16; + + desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset]; + desc->t_src = cpu_to_le32(ctx->state_addr + offset); + desc->t_dst = cpu_to_le32(offset); + desc->t_status = cpu_to_le32(MESON_SHA_BUFFER_SIZE | + DESC_MODE_KEY | DESC_OWN); + + ctx->tloffset++; + } +} + +static int meson_hasher_do_one_request(struct crypto_engine *engine, void *areq) +{ + struct ahash_request *req = ahash_request_cast(areq); + struct crypto_ahash *tfm = crypto_ahash_reqtfm(req); + struct meson_hasher_tfm_ctx *tctx = crypto_ahash_ctx_dma(tfm); + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + struct meson_dev *mc = tctx->mc; + struct hasher_ctx ctx = { + .tloffset = 0, + .src_offset = 0, + .nbytes = rctx->final_req ? 0 : req->nbytes, + .src_sg = req->src, + .areq = areq, + }; + unsigned int blocksize = crypto_ahash_blocksize(tfm); + unsigned int digest_size = crypto_ahash_digestsize(tfm); + bool final_req = rctx->final_req; + int ret; + + ctx.state_addr = dma_map_single(mc->dev, rctx->state, + sizeof(rctx->state), DMA_BIDIRECTIONAL); + ret = dma_mapping_error(mc->dev, ctx.state_addr); + if (ret) { + dev_err(mc->dev, "Cannot DMA MAP SHA state buffer"); + goto fail_map_single; + } + + ret = meson_hasher_req_map(req); + if (ret) + goto fail_map_req; + + for (;;) { + unsigned int len = ctx.src_sg ? + min(sg_dma_len(ctx.src_sg) - ctx.src_offset, ctx.nbytes) : 0; + + ctx.src_addr = 0; + ctx.todo = 0; + + if (!rctx->final_req && !ctx.nbytes) + break; + + meson_setup_state_descs(&ctx); + + if (rctx->partial_size && rctx->partial_size < blocksize) { + ret = meson_fill_partial_buffer(&ctx, len); + if (ret) + goto fail; + } else if (len && len < blocksize) { + memcpy(rctx->partial, sg_virt(ctx.src_sg) + ctx.src_offset, len); + + rctx->partial_size = len; + ctx.nbytes -= len; + ctx.src_offset += len; + } else if (len) { + ctx.src_addr = sg_dma_address(ctx.src_sg) + ctx.src_offset; + ctx.todo = min(rounddown(DESC_MAXLEN, blocksize), + rounddown(len, blocksize)); + ctx.nbytes -= ctx.todo; + ctx.src_offset += ctx.todo; + } + + if (ctx.src_sg && ctx.src_offset == sg_dma_len(ctx.src_sg)) { + ctx.src_offset = 0; + ctx.src_sg = sg_next(ctx.src_sg); + } + + if (!ctx.todo && ctx.nbytes) + continue; + + if (!ctx.todo && !rctx->final_req && !ctx.tloffset) + continue; + + if (meson_setup_data_descs(&ctx)) { + ret = meson_kick_hardware(&ctx); + if (ret) + goto fail; + } + } + +fail: + meson_hasher_req_unmap(req); + +fail_map_req: + dma_unmap_single(mc->dev, ctx.state_addr, sizeof(rctx->state), + DMA_BIDIRECTIONAL); + +fail_map_single: + if (final_req && ret == 0) + memcpy(req->result, rctx->state, digest_size); + + local_bh_disable(); + crypto_finalize_hash_request(engine, req, ret); + local_bh_enable(); + + return ret; +} + +static int meson_hasher_export(struct ahash_request *req, void *out) +{ + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + + memcpy(out, rctx, sizeof(*rctx)); + return 0; +} + +static int meson_hasher_import(struct ahash_request *req, const void *in) +{ + struct meson_hasher_req_ctx *rctx = ahash_request_ctx(req); + + memcpy(rctx, in, sizeof(*rctx)); + return 0; +} + +static int meson_hasher_init(struct crypto_tfm *tfm) +{ + struct meson_hasher_tfm_ctx *tctx = crypto_tfm_ctx_dma(tfm); + struct crypto_ahash *atfm = __crypto_ahash_cast(tfm); + struct hash_alg_common *alg = crypto_hash_alg_common(atfm); + struct meson_alg_template *algt = container_of(alg, + struct meson_alg_template, alg.ahash.base.halg); + + crypto_ahash_set_reqsize(atfm, crypto_ahash_statesize(atfm)); + + memset(tctx, 0, sizeof(struct meson_hasher_tfm_ctx)); + + tctx->mc = algt->mc; + + return 0; +} + +static struct meson_alg_template mc_algs[] = { +{ + .type = CRYPTO_ALG_TYPE_AHASH, + .blockmode = DESC_MODE_SHA1, + .alg.ahash.base = { + .halg = { + .base = { + .cra_name = "sha1", + .cra_driver_name = "sha1-gxl", + .cra_priority = 400, + .cra_blocksize = SHA1_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_ctxsize = sizeof(struct meson_hasher_tfm_ctx) + + CRYPTO_DMA_PADDING, + .cra_module = THIS_MODULE, + .cra_alignmask = 0, + .cra_init = meson_hasher_init, + }, + .digestsize = SHA1_DIGEST_SIZE, + .statesize = sizeof(struct meson_hasher_req_ctx), + }, + .init = meson_sha_init, + .update = meson_sha_update, + .final = meson_sha_final, + .digest = meson_sha_digest, + .export = meson_hasher_export, + .import = meson_hasher_import, + }, + .alg.ahash.op = { + .do_one_request = meson_hasher_do_one_request, + }, +}, +{ + .type = CRYPTO_ALG_TYPE_AHASH, + .blockmode = DESC_MODE_SHA224, + .alg.ahash.base = { + .halg = { + .base = { + .cra_name = "sha224", + .cra_driver_name = "sha224-gxl", + .cra_priority = 400, + .cra_blocksize = SHA224_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_ctxsize = sizeof(struct meson_hasher_tfm_ctx) + + CRYPTO_DMA_PADDING, + .cra_module = THIS_MODULE, + .cra_alignmask = 0, + .cra_init = meson_hasher_init, + }, + .digestsize = SHA224_DIGEST_SIZE, + .statesize = sizeof(struct meson_hasher_req_ctx), + }, + .init = meson_sha_init, + .update = meson_sha_update, + .final = meson_sha_final, + .digest = meson_sha_digest, + .export = meson_hasher_export, + .import = meson_hasher_import, + }, + .alg.ahash.op = { + .do_one_request = meson_hasher_do_one_request, + }, +}, +{ + .type = CRYPTO_ALG_TYPE_AHASH, + .blockmode = DESC_MODE_SHA256, + .alg.ahash.base = { + .halg = { + .base = { + .cra_name = "sha256", + .cra_driver_name = "sha256-gxl", + .cra_priority = 400, + .cra_blocksize = SHA256_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_ASYNC, + .cra_ctxsize = sizeof(struct meson_hasher_tfm_ctx) + + CRYPTO_DMA_PADDING, + .cra_module = THIS_MODULE, + .cra_alignmask = 0, + .cra_init = meson_hasher_init, + }, + .digestsize = SHA256_DIGEST_SIZE, + .statesize = sizeof(struct meson_hasher_req_ctx), + }, + .init = meson_sha_init, + .update = meson_sha_update, + .final = meson_sha_final, + .digest = meson_sha_digest, + .export = meson_hasher_export, + .import = meson_hasher_import, + }, + .alg.ahash.op = { + .do_one_request = meson_hasher_do_one_request, + }, +}, +}; + +int meson_hasher_register(struct meson_dev *mc) +{ + if (!mc->pdata->hasher_supported) { + pr_info("amlogic-gxl-hasher: hasher not supported at current platform"); + return 0; + } + + return meson_register_algs(mc, mc_algs, ARRAY_SIZE(mc_algs)); +} + +void meson_hasher_unregister(struct meson_dev *mc) +{ + if (!mc->pdata->hasher_supported) + return; + + meson_unregister_algs(mc, mc_algs, ARRAY_SIZE(mc_algs)); +} diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index dc5218064f99..cebdfd81f6e2 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -5,6 +5,7 @@ * Copyright (C) 2018-2019 Corentin LABBE */ #include +#include #include #include #include @@ -23,13 +24,25 @@ #define DESC_OPMODE_ECB (0 << 26) #define DESC_OPMODE_CBC (1 << 26) +#define DESC_OPMODE_SHA (0 << 26) #define DESC_MAXLEN GENMASK(16, 0) +#define DESC_MODE_SHA1 (0x5 << 20) +#define DESC_MODE_SHA224 (0x7 << 20) +#define DESC_MODE_SHA256 (0x6 << 20) + #define DESC_LAST BIT(18) +#define DESC_BEGIN BIT(24) +#define DESC_END BIT(25) #define DESC_ENCRYPTION BIT(28) #define DESC_OWN BIT(31) +#define MESON_SHA_BUFFER_SIZE (SHA256_DIGEST_SIZE + 16) + +#define MESON_SHA_BEGIN BIT(1) +#define MESON_SHA_FINAL BIT(2) + /* * struct meson_desc - Descriptor for DMA operations * Note that without datasheet, some are unknown @@ -83,11 +96,13 @@ struct meson_flow { * @reg_descs: offset to descriptors register * @reg_status: offset to status register * @setup_desc_cnt: number of setup descriptor to configure. + * @hasher_supported: indecates whether hasher is supported. */ struct meson_pdata { u32 descs_reg; u32 status_reg; u32 setup_desc_cnt; + bool hasher_supported; }; /* @@ -141,6 +156,38 @@ struct meson_cipher_tfm_ctx { struct crypto_skcipher *fallback_tfm; }; +/* + * struct meson_hasher_req_ctx - context for a hasher request + * @state: state data + * @partial: partial buffer data. Contains sent data which + * size < blocksize + * @partial_size: size of the partial buffer + * @partial_addr: physical address of partial buffer + * @partial_mapped: indicates is partial buffer currently mapped or not + * @flags: request flags (for example, is this final req or not) + * @flow: the flow to use for this request + */ +struct meson_hasher_req_ctx { + u8 state[SHA256_DIGEST_SIZE + 16] ____cacheline_aligned; + u8 partial[SHA256_BLOCK_SIZE] ____cacheline_aligned; + unsigned int partial_size ____cacheline_aligned; + dma_addr_t partial_addr; + bool partial_mapped; + + bool begin_req; + bool final_req; + int flow; +}; + +/* + * struct meson_hasher_tfm_ctx - context for a hasher TFM + * @enginectx: crypto_engine used by this TFM + * @mc: pointer to the private data of driver handling this TFM + */ +struct meson_hasher_tfm_ctx { + struct meson_dev *mc; +}; + /* * struct meson_alg_template - crypto_alg template * @type: the CRYPTO_ALG_TYPE for this template @@ -155,6 +202,7 @@ struct meson_alg_template { u32 blockmode; union { struct skcipher_engine_alg skcipher; + struct ahash_engine_alg ahash; } alg; struct meson_dev *mc; #ifdef CONFIG_CRYPTO_DEV_AMLOGIC_GXL_DEBUG @@ -178,3 +226,6 @@ int meson_cipher_register(struct meson_dev *mc); void meson_cipher_unregister(struct meson_dev *mc); void meson_cipher_debugfs_show(struct seq_file *seq, void *v); int meson_handle_cipher_request(struct crypto_engine *engine, void *areq); + +int meson_hasher_register(struct meson_dev *mc); +void meson_hasher_unregister(struct meson_dev *mc); From patchwork Fri Jun 7 14:12:31 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 802415 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93A041993A6; Fri, 7 Jun 2024 14:13:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Fri, 7 Jun 2024 17:13:04 +0300 (MSK) Received: from user-A520M-DS3H.sberdevices.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 7 Jun 2024 17:13:04 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 12/23] drivers: crypto: meson: add support for AES-CTR Date: Fri, 7 Jun 2024 17:12:31 +0300 Message-ID: <20240607141242.2616580-13-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds support for AES-CTR algorithm. Tested via tcrypt and custom tests. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 59 +++++++++++++++++++-- drivers/crypto/amlogic/amlogic-gxl-core.c | 1 + drivers/crypto/amlogic/amlogic-gxl.h | 2 + 3 files changed, 58 insertions(+), 4 deletions(-) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 622e179320ff..5c5956a18744 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -139,6 +139,15 @@ static void meson_unmap_scatterlist(struct skcipher_request *areq, struct meson_ } } +static void reverse_keyiv(u32 *keyiv, u32 *iv) +{ + int size = AES_BLOCK_SIZE / sizeof(u32); + int i; + + for (i = 0; i < size; i++) + *(keyiv + size - i - 1) = cpu_to_be32(*(iv + i)); +} + static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) { struct meson_cipher_req_ctx *rctx = skcipher_request_ctx(ctx->areq); @@ -155,8 +164,12 @@ static void meson_setup_keyiv_descs(struct cipher_ctx *ctx) if (ctx->tloffset) return; - if (blockmode == DESC_OPMODE_CBC) { - memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + if (blockmode == DESC_OPMODE_CBC || blockmode == DESC_OPMODE_CTR) { + if (blockmode == DESC_OPMODE_CTR && mc->pdata->reverse_keyiv) + reverse_keyiv((u32 *)(op->keyiv + AES_MAX_KEY_SIZE), (u32 *)ctx->areq->iv); + else + memcpy(op->keyiv + AES_MAX_KEY_SIZE, ctx->areq->iv, ivsize); + dma_sync_single_for_device(mc->dev, ctx->keyiv.addr, ctx->keyiv.len, DMA_TO_DEVICE); } @@ -187,6 +200,7 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx) struct meson_desc *desc = &mc->chanlist[rctx->flow].tl[ctx->tloffset]; unsigned int blocksize = crypto_skcipher_blocksize(tfm); unsigned int blockmode = algt->blockmode; + unsigned int ivsize = crypto_skcipher_ivsize(tfm); unsigned int maxlen = rounddown(DESC_MAXLEN, blocksize); unsigned int todo; u32 v; @@ -205,8 +219,15 @@ static bool meson_setup_data_descs(struct cipher_ctx *ctx) ctx->src_offset += todo; ctx->dst_offset += todo; + if (blockmode == DESC_OPMODE_CTR) { + unsigned int nblocks = todo / blocksize; + + while (nblocks--) + crypto_inc(ctx->areq->iv, ivsize); + } + v = DESC_OWN | blockmode | op->keymode | todo; - if (rctx->op_dir == MESON_ENCRYPT) + if (rctx->op_dir == MESON_ENCRYPT || blockmode == DESC_OPMODE_CTR) v |= DESC_ENCRYPTION; if (!ctx->cryptlen || ctx->tloffset == MAXDESC) @@ -326,7 +347,8 @@ static int meson_cipher(struct skcipher_request *areq) if (ctx.keyiv.len == AES_KEYSIZE_192) ctx.keyiv.len = AES_MAX_KEY_SIZE; - if (algt->blockmode == DESC_OPMODE_CBC) { + if (algt->blockmode == DESC_OPMODE_CBC || + algt->blockmode == DESC_OPMODE_CTR) { memcpy(op->keyiv + AES_MAX_KEY_SIZE, areq->iv, ivsize); ctx.keyiv.len = AES_MAX_KEY_SIZE + ivsize; } @@ -540,6 +562,35 @@ static struct meson_alg_template algs[] = { .do_one_request = meson_handle_cipher_request, }, }, +{ + .type = CRYPTO_ALG_TYPE_SKCIPHER, + .blockmode = DESC_OPMODE_CTR, + .alg.skcipher.base = { + .base = { + .cra_name = "ctr(aes)", + .cra_driver_name = "ctr-aes-gxl", + .cra_priority = 400, + .cra_blocksize = AES_BLOCK_SIZE, + .cra_flags = CRYPTO_ALG_TYPE_SKCIPHER | + CRYPTO_ALG_ASYNC | CRYPTO_ALG_ALLOCATES_MEMORY | + CRYPTO_ALG_NEED_FALLBACK, + .cra_ctxsize = sizeof(struct meson_cipher_tfm_ctx) + CRYPTO_DMA_PADDING, + .cra_module = THIS_MODULE, + .cra_alignmask = 0xf, + .cra_init = meson_cipher_init, + .cra_exit = meson_cipher_exit, + }, + .min_keysize = AES_MIN_KEY_SIZE, + .max_keysize = AES_MAX_KEY_SIZE, + .ivsize = AES_BLOCK_SIZE, + .setkey = meson_aes_setkey, + .encrypt = meson_skencrypt, + .decrypt = meson_skdecrypt, + }, + .alg.skcipher.op = { + .do_one_request = meson_handle_cipher_request, + }, +}, }; int meson_cipher_register(struct meson_dev *mc) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index a1aff009f913..2c8387906655 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -282,6 +282,7 @@ static const struct meson_pdata meson_gxl_pdata = { .status_reg = 0x4, .setup_desc_cnt = 3, .hasher_supported = false, + .reverse_keyiv = true, }; static const struct of_device_id meson_crypto_of_match_table[] = { diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index cebdfd81f6e2..de11e174f03d 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -24,6 +24,7 @@ #define DESC_OPMODE_ECB (0 << 26) #define DESC_OPMODE_CBC (1 << 26) +#define DESC_OPMODE_CTR (2 << 26) #define DESC_OPMODE_SHA (0 << 26) #define DESC_MAXLEN GENMASK(16, 0) @@ -103,6 +104,7 @@ struct meson_pdata { u32 status_reg; u32 setup_desc_cnt; bool hasher_supported; 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Fri, 7 Jun 2024 17:13:04 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 13/23] drivers: crypto: meson: use fallback for 192-bit keys Date: Fri, 7 Jun 2024 17:12:32 +0300 Message-ID: <20240607141242.2616580-14-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped Unforunately, not all Amlogic SoC's have a 192-bit key support for AES algo. In this case, use fallback. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-cipher.c | 7 +++++++ drivers/crypto/amlogic/amlogic-gxl-core.c | 1 + drivers/crypto/amlogic/amlogic-gxl.h | 2 ++ 3 files changed, 10 insertions(+) diff --git a/drivers/crypto/amlogic/amlogic-gxl-cipher.c b/drivers/crypto/amlogic/amlogic-gxl-cipher.c index 5c5956a18744..2c026edb60ed 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-cipher.c +++ b/drivers/crypto/amlogic/amlogic-gxl-cipher.c @@ -41,6 +41,13 @@ static bool meson_cipher_need_fallback_sg(struct skcipher_request *areq, static bool meson_cipher_need_fallback(struct skcipher_request *areq) { + struct crypto_skcipher *tfm = crypto_skcipher_reqtfm(areq); + struct meson_cipher_tfm_ctx *op = crypto_skcipher_ctx_dma(tfm); + struct meson_dev *mc = op->mc; + + if (op->keymode == DESC_MODE_AES_192 && !mc->pdata->support_192bit_key) + return true; + if (areq->cryptlen == 0) return true; diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 2c8387906655..4acacd925a21 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -283,6 +283,7 @@ static const struct meson_pdata meson_gxl_pdata = { .setup_desc_cnt = 3, .hasher_supported = false, .reverse_keyiv = true, + .support_192bit_key = true, }; static const struct of_device_id meson_crypto_of_match_table[] = { diff --git a/drivers/crypto/amlogic/amlogic-gxl.h b/drivers/crypto/amlogic/amlogic-gxl.h index de11e174f03d..01913daf1bf4 100644 --- a/drivers/crypto/amlogic/amlogic-gxl.h +++ b/drivers/crypto/amlogic/amlogic-gxl.h @@ -98,6 +98,7 @@ struct meson_flow { * @reg_status: offset to status register * @setup_desc_cnt: number of setup descriptor to configure. * @hasher_supported: indecates whether hasher is supported. + * @support_192bit_key: indicates whether platform support AES 192-bit key */ struct meson_pdata { u32 descs_reg; @@ -105,6 +106,7 @@ struct meson_pdata { u32 setup_desc_cnt; bool hasher_supported; bool reverse_keyiv; + bool support_192bit_key; }; /* From patchwork Fri Jun 7 14:12:33 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 802414 Received: from mx1.sberdevices.ru (mx2.sberdevices.ru [45.89.224.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EDF44190672; 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Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 4acacd925a21..928751a6fc31 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -286,11 +286,24 @@ static const struct meson_pdata meson_gxl_pdata = { .support_192bit_key = true, }; +static const struct meson_pdata meson_g12a_pdata = { + .descs_reg = 0x0, + .status_reg = 0x8, + .setup_desc_cnt = 1, + .hasher_supported = true, + .reverse_keyiv = true, + .support_192bit_key = false, +}; + static const struct of_device_id meson_crypto_of_match_table[] = { { .compatible = "amlogic,gxl-crypto", .data = &meson_gxl_pdata, }, + { + .compatible = "amlogic,g12a-crypto", + .data = &meson_g12a_pdata, + }, {}, }; MODULE_DEVICE_TABLE(of, meson_crypto_of_match_table); From patchwork Fri Jun 7 14:12:34 2024 Content-Type: text/plain; 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Fri, 7 Jun 2024 17:13:05 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 15/23] drivers: crypto: meson: add support for AXG-series Date: Fri, 7 Jun 2024 17:12:34 +0300 Message-ID: <20240607141242.2616580-16-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2; 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Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-core.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 928751a6fc31..4275f467d1c6 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -295,6 +295,15 @@ static const struct meson_pdata meson_g12a_pdata = { .support_192bit_key = false, }; +static const struct meson_pdata meson_axg_pdata = { + .descs_reg = 0x0, + .status_reg = 0x8, + .setup_desc_cnt = 3, + .hasher_supported = true, + .reverse_keyiv = true, + .support_192bit_key = true, +}; + static const struct of_device_id meson_crypto_of_match_table[] = { { .compatible = "amlogic,gxl-crypto", @@ -304,6 +313,10 @@ static const struct of_device_id meson_crypto_of_match_table[] = { .compatible = "amlogic,g12a-crypto", .data = &meson_g12a_pdata, }, + { + .compatible = "amlogic,axg-crypto", + .data = &meson_axg_pdata, + }, {}, }; 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Fri, 7 Jun 2024 17:13:06 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 16/23] drivers: crypto: meson: add support for A1-series Date: Fri, 7 Jun 2024 17:12:35 +0300 Message-ID: <20240607141242.2616580-17-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; 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Tested via tcrypt module and with custom tests. Signed-off-by: Alexey Romanov --- drivers/crypto/amlogic/amlogic-gxl-core.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/crypto/amlogic/amlogic-gxl-core.c b/drivers/crypto/amlogic/amlogic-gxl-core.c index 4275f467d1c6..43cedc10294f 100644 --- a/drivers/crypto/amlogic/amlogic-gxl-core.c +++ b/drivers/crypto/amlogic/amlogic-gxl-core.c @@ -304,6 +304,15 @@ static const struct meson_pdata meson_axg_pdata = { .support_192bit_key = true, }; +static const struct meson_pdata meson_a1_pdata = { + .descs_reg = 0x0, + .status_reg = 0x8, + .setup_desc_cnt = 1, + .hasher_supported = true, + .reverse_keyiv = false, + .support_192bit_key = false, +}; + static const struct of_device_id meson_crypto_of_match_table[] = { { .compatible = "amlogic,gxl-crypto", @@ -317,6 +326,14 @@ static const struct of_device_id meson_crypto_of_match_table[] = { .compatible = "amlogic,axg-crypto", .data = &meson_axg_pdata, }, + { + .compatible = "amlogic,a1-crypto", + .data = &meson_a1_pdata, + }, + { + .compatible = "amlogic,s4-crypto", + .data = &meson_a1_pdata, + }, {}, }; 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Fri, 7 Jun 2024 17:13:07 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 17/23] dt-bindings: crypto: meson: correct clk and remove second interrupt line Date: Fri, 7 Jun 2024 17:12:36 +0300 Message-ID: <20240607141242.2616580-18-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2; 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Crypto HW doesn't actually use the blkmv clk. At RTL level, crypto engine is hard weired to a clk81 (CLKID_CLK81). Also, GXL crypto IP isn't to seconnd interrput line. So we must remove it from dt-bindings. Fixes: 7f7d115dfb51 ("dt-bindings: crypto: Add DT bindings documentation for amlogic-crypto") Signed-off-by: Alexey Romanov --- .../bindings/crypto/amlogic,gxl-crypto.yaml | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml index 948e11ebe4ee..aff6f3234dc9 100644 --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml @@ -20,13 +20,15 @@ properties: interrupts: items: - description: Interrupt for flow 0 - - description: Interrupt for flow 1 clocks: maxItems: 1 clock-names: - const: blkmv + const: clk81 + + power-domains: + maxItems: 1 required: - compatible @@ -46,7 +48,7 @@ examples: crypto: crypto-engine@c883e000 { compatible = "amlogic,gxl-crypto"; reg = <0xc883e000 0x36>; - interrupts = , ; - clocks = <&clkc CLKID_BLKMV>; - clock-names = "blkmv"; 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Fri, 7 Jun 2024 17:13:08 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 18/23] arch: arm64: dts: meson: gxl: correct crypto node definition Date: Fri, 7 Jun 2024 17:12:37 +0300 Message-ID: <20240607141242.2616580-19-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped GXL and newer SoC's uses the DMA engine (not blkmv) for crypto HW. Crypto HW doesn't actually use the blkmv clk. At RTL level, crypto engine is hard weired to clk81 (CLKID_CLK81). Also, GXL crypto IP isn't to seconnd interrput line. So we must remove it from dt-bindings. Fixes: c4a0457eb858 ("ARM64: dts: amlogic: adds crypto hardware node") Signed-off-by: Alexey Romanov --- arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index 17bcfa4702e1..66d1433765bc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -68,10 +68,9 @@ acodec: audio-controller@c8832000 { crypto: crypto@c883e000 { compatible = "amlogic,gxl-crypto"; reg = <0x0 0xc883e000 0x0 0x36>; - interrupts = , - ; - clocks = <&clkc CLKID_BLKMV>; - clock-names = "blkmv"; + interrupts = ; + clocks = <&clkc CLKID_CLK81>; + clock-names = "clk81"; status = "okay"; }; }; From patchwork Fri Jun 7 14:12:38 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 803312 Received: from mx1.sberdevices.ru (mx1.sberdevices.ru [37.18.73.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8129B199EA0; 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Fri, 7 Jun 2024 17:13:09 +0300 (MSK) Received: from user-A520M-DS3H.sberdevices.ru (100.64.160.123) by p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Fri, 7 Jun 2024 17:13:09 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 19/23] dt-bindings: crypto: meson: support new SoC's Date: Fri, 7 Jun 2024 17:12:38 +0300 Message-ID: <20240607141242.2616580-20-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped Now crypto module available at G12A/G12B/S4/A1/SM1/AXG. 1. Add new compatibles: - amlogic,g12a-crypto - amlogic,axg-crypto - amlogic,a1-crypto - amlogic,s4-crypto (uses a1-crypto as fallback) Difference between this compatibles: * Different registers offset and the number of setup descriptors. * GXL doesn't support hashing like the others. * G12A/B and A1/S4 crypto HW don't support 192 AES key. * GXL, G12A/B and AXG require a reverse IV key before processing. 2. Add power-domains in schema, which is required only for A1. Signed-off-by: Alexey Romanov --- .../bindings/crypto/amlogic,gxl-crypto.yaml | 21 +++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml index aff6f3234dc9..a8344de71b4a 100644 --- a/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/amlogic,gxl-crypto.yaml @@ -11,8 +11,16 @@ maintainers: properties: compatible: - items: - - const: amlogic,gxl-crypto + oneOf: + - items: + - enum: + - amlogic,s4-crypto + - const: amlogic,a1-crypto + - enum: + - amlogic,gxl-crypto + - amlogic,axg-crypto + - amlogic,g12a-crypto + - amlogic,a1-crypto reg: maxItems: 1 @@ -37,6 +45,15 @@ required: - clocks - clock-names +allOf: + - if: + properties: + compatible: + const: amlogic,a1-crypto + then: + required: + - power-domains + additionalProperties: false examples: From patchwork Fri Jun 7 14:12:39 2024 Content-Type: text/plain; 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Fri, 7 Jun 2024 17:13:10 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 20/23] arch: arm64: dts: meson: a1: add crypto node Date: Fri, 7 Jun 2024 17:12:39 +0300 Message-ID: <20240607141242.2616580-21-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds a crypto node declaration. With the Amlogic crypto driver we can use HW implementation of SHA1/224/256 and AES algo. Signed-off-by: Alexey Romanov --- arch/arm64/boot/dts/amlogic/meson-a1.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi index 1520d51d41e0..2853454ae81b 100644 --- a/arch/arm64/boot/dts/amlogic/meson-a1.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-a1.dtsi @@ -162,6 +162,12 @@ spifc: spi@fd000400 { status = "disabled"; }; + clk81: clk81 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <64000000>; + }; + apb: bus@fe000000 { compatible = "simple-bus"; reg = <0x0 0xfe000000 0x0 0x1000000>; @@ -972,6 +978,15 @@ sd_emmc: sd@10000 { status = "disabled"; }; + crypto: crypto@6000 { + compatible = "amlogic,a1-crypto"; + reg = <0x0 0x6000 0x0 0x48>; + interrupts = ; + clocks = <&clk81>; + clock-names = "clk81"; + power-domains = <&pwrc PWRC_DMA_ID>; + }; + acodec: audio-controller@4800 { compatible = "amlogic,t9015-a1"; reg = <0x0 0x4800 0x0 0x14>; From patchwork Fri Jun 7 14:12:40 2024 Content-Type: text/plain; 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Fri, 7 Jun 2024 17:13:11 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 21/23] arch: arm64: dts: meson: s4: add crypto node Date: Fri, 7 Jun 2024 17:12:40 +0300 Message-ID: <20240607141242.2616580-22-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 127.0.0.199:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds a crypto node declaration for Amlogic S4-series. With the Amlogic crypto driver we can use HW implementation of SHA1/224/256 and AES algo. Signed-off-by: Alexey Romanov --- arch/arm64/boot/dts/amlogic/meson-s4.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi index ce90b35686a2..dc3b75700ee6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-s4.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-s4.dtsi @@ -89,6 +89,12 @@ gic: interrupt-controller@fff01000 { interrupts = ; }; + clk81: clk81 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <166000000>; + }; + apb4: bus@fe000000 { compatible = "simple-bus"; reg = <0x0 0xfe000000 0x0 0x480000>; @@ -339,6 +345,14 @@ mux { }; + crypto: crypto@440400 { + compatible = "amlogic,s4-crypto", "amlogic,a1-crypto"; + reg = <0x0 0x440400 0x0 0x48>; + interrupts = ; + clocks = <&clk81>; + clock-names = "clk81"; + }; + gpio_intc: interrupt-controller@4080 { compatible = "amlogic,meson-s4-gpio-intc", "amlogic,meson-gpio-intc"; From patchwork Fri Jun 7 14:12:41 2024 Content-Type: text/plain; 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Fri, 7 Jun 2024 17:13:11 +0300 From: Alexey Romanov To: , , , , , , , , , , CC: , , , , , , Alexey Romanov Subject: [PATCH v8 22/23] arch: arm64: dts: meson: g12: add crypto node Date: Fri, 7 Jun 2024 17:12:41 +0300 Message-ID: <20240607141242.2616580-23-avromanov@salutedevices.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240607141242.2616580-1-avromanov@salutedevices.com> References: <20240607141242.2616580-1-avromanov@salutedevices.com> Precedence: bulk X-Mailing-List: linux-crypto@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: p-i-exch-sc-m01.sberdevices.ru (172.16.192.107) To p-i-exch-sc-m02.sberdevices.ru (172.16.192.103) X-KSMG-Rule-ID: 10 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Lua-Profiles: 185803 [Jun 07 2024] X-KSMG-AntiSpam-Version: 6.1.0.4 X-KSMG-AntiSpam-Envelope-From: avromanov@salutedevices.com X-KSMG-AntiSpam-Rate: 0 X-KSMG-AntiSpam-Status: not_detected X-KSMG-AntiSpam-Method: none X-KSMG-AntiSpam-Auth: dkim=none X-KSMG-AntiSpam-Info: LuaCore: 20 0.3.20 743589a8af6ec90b529f2124c2bbfc3ce1d2f20f, {Tracking_from_domain_doesnt_match_to}, 100.64.160.123:7.1.2; d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; 127.0.0.199:7.1.2; salutedevices.com:7.1.1; smtp.sberdevices.ru:7.1.1,5.0.1, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds a crypto node declaration for Amlogic G12-series. With the Amlogic crypto driver we can use HW implementation of SHA1/224/256 and AES algo. Signed-off-by: Alexey Romanov --- arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 9d5eab6595d0..5265229309ae 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -1709,6 +1709,14 @@ internal_ephy: ethernet-phy@8 { }; }; }; + + crypto: crypto@3e000 { + compatible = "amlogic,g12a-crypto"; + reg = <0x0 0x3e000 0x0 0x48>; + interrupts = ; + clocks = <&clkc CLKID_CLK81>; + clock-names = "clk81"; + }; }; aobus: bus@ff800000 { From patchwork Fri Jun 7 14:12:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Romanov X-Patchwork-Id: 802411 Received: from mx1.sberdevices.ru (mx1.sberdevices.ru [37.18.73.165]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F1A319B3C6; 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d41d8cd98f00b204e9800998ecf8427e.com:7.1.1; salutedevices.com:7.1.1; smtp.sberdevices.ru:5.0.1,7.1.1; 100.64.160.123:7.1.2, FromAlignment: s, ApMailHostAddress: 100.64.160.123 X-MS-Exchange-Organization-SCL: -1 X-KSMG-AntiSpam-Interceptor-Info: scan successful X-KSMG-AntiPhishing: Clean X-KSMG-LinksScanning: Clean X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 2.0.1.6960, bases: 2024/06/07 12:12:00 #25491508 X-KSMG-AntiVirus-Status: Clean, skipped This patch adds a crypto node declaration. With the Amlogic crypto driver we can use HW implementation of SHA1/224/256 and AES algo. Signed-off-by: Alexey Romanov --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 6d12b760b90f..4a3d5c2f823d 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -294,6 +294,14 @@ ethmac: ethernet@ff3f0000 { status = "disabled"; }; + crypto: crypto@ff63e000 { + compatible = "amlogic,axg-crypto"; + reg = <0x0 0xff63e000 0x0 0x48>; + interrupts = ; + clocks = <&clkc CLKID_CLK81>; + clock-names = "clk81"; + }; + pcie_phy: phy@ff644000 { compatible = "amlogic,axg-pcie-phy"; reg = <0x0 0xff644000 0x0 0x1c>;