From patchwork Wed Oct 23 10:13:07 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177254 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp502598ill; Wed, 23 Oct 2019 03:13:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqxsm7z9MsVupYGyr7WaXH9svXaSbverurCbhqfLUWkKwf+oOA2CQnCw8sigAf8PIGFvst2n X-Received: by 2002:a05:6402:1006:: with SMTP id c6mr9199328edu.2.1571825614241; Wed, 23 Oct 2019 03:13:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825614; cv=none; d=google.com; s=arc-20160816; b=Q5jdKFNBzg2Js93+2vHrtQODhMKndy+owmMygWOBL8WHcSl2OIBklvPywI3ZGSvTV1 E0yrnxCdaVCnQ62HApH1ji5uYapW9zJYQ3ZH0zPgGbQDuc7aCjHUYodC1J5YYspX/6c5 /Hbw7AbeBQd5P6hzvndLQwgGfOnawEcBbrfcFigMUVINQRJh9b66jc3KRes4uUJsy6cd wLM6YuYSIr98gWyotJYFKRnhRGBDUe6QqIqCqiLdrzAW262M3OHB7J1sYHh7SGCyucpi gsO/IpCAL2sdxSw91u/1xY2kBjT0Ic1MBWGmBUslpTfbhtoBkqZKX+YRBdvKwrRhsKl9 Ot/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=pBo7lQp7gewTLbfxhhcQHOeUgGcXY0lGllPUdEC6SBQ=; b=J7qLQoFSYF0yXj6h5rSh9Qg+64SPijG5fZmY2RuvOwS3YqRqXs2GTOpv5cgSDOyX8w kqChAlwRS6TC+/Js07EmT+IdM0ajYIJ8arEvZqhgIsB+WJ3JRo64P+uh8q7KZKfRrCYH UHvVoQLY6rEWijmIXxWkg3AfdyyLt87MnDk+VEqEN5uRtdMCAYokDGSpi2mlKfNLfpoZ rGgEAFEoK86Wo0FDYNMmvNWMpuRZfHId/I81k5bRwH4pXdbWb89ikXuS0QGvtynsrjux CTufYelJ5Z4HoN4rWpvHkCjftWfGcIkXyAToHuiO66ApTkDxtdbXPqwVhpDkVAFkWFgm oRFQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q10si13951426eda.293.2019.10.23.03.13.34; Wed, 23 Oct 2019 03:13:34 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404110AbfJWKNa (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:30 -0400 Received: from mx2.suse.de ([195.135.220.15]:53780 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2391001AbfJWKN3 (ORCPT ); Wed, 23 Oct 2019 06:13:29 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id EAECAB4DF; Wed, 23 Oct 2019 10:13:27 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Philipp Zabel , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 01/11] dt-bindings: reset: Add Realtek RTD1295 Date: Wed, 23 Oct 2019 12:13:07 +0200 Message-Id: <20191023101317.26656-2-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a header with symbolic reset indices for Realtek RTD1295 SoC. Naming was derived from reset-names in an OEM's Device Tree. Acked-by: Rob Herring [AF: Dropped RTD1295 specific binding definition, updated SPDX] Signed-off-by: Andreas Färber --- v1 -> v2: * Dropped textual binding with new compatible * Updated SPDX-License-Identifier location * Updated to SPDX 2.0 * Changed from MIT to BSD (Rob) include/dt-bindings/reset/realtek,rtd1295.h | 111 ++++++++++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 include/dt-bindings/reset/realtek,rtd1295.h -- 2.16.4 diff --git a/include/dt-bindings/reset/realtek,rtd1295.h b/include/dt-bindings/reset/realtek,rtd1295.h new file mode 100644 index 000000000000..2c0cb6afe816 --- /dev/null +++ b/include/dt-bindings/reset/realtek,rtd1295.h @@ -0,0 +1,111 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ +/* + * Realtek RTD1295 reset controllers + * + * Copyright (c) 2017 Andreas Färber + */ +#ifndef DT_BINDINGS_RESET_RTD1295_H +#define DT_BINDINGS_RESET_RTD1295_H + +/* soft reset 1 */ +#define RTD1295_RSTN_MISC 0 +#define RTD1295_RSTN_NAT 1 +#define RTD1295_RSTN_USB3_PHY0_POW 2 +#define RTD1295_RSTN_GSPI 3 +#define RTD1295_RSTN_USB3_P0_MDIO 4 +#define RTD1295_RSTN_SATA_0 5 +#define RTD1295_RSTN_USB 6 +#define RTD1295_RSTN_SATA_PHY_0 7 +#define RTD1295_RSTN_USB_PHY0 8 +#define RTD1295_RSTN_USB_PHY1 9 +#define RTD1295_RSTN_SATA_PHY_POW_0 10 +#define RTD1295_RSTN_SATA_FUNC_EXIST_0 11 +#define RTD1295_RSTN_HDMI 12 +#define RTD1295_RSTN_VE1 13 +#define RTD1295_RSTN_VE2 14 +#define RTD1295_RSTN_VE3 15 +#define RTD1295_RSTN_ETN 16 +#define RTD1295_RSTN_AIO 17 +#define RTD1295_RSTN_GPU 18 +#define RTD1295_RSTN_TVE 19 +#define RTD1295_RSTN_VO 20 +#define RTD1295_RSTN_LVDS 21 +#define RTD1295_RSTN_SE 22 +#define RTD1295_RSTN_DCU 23 +#define RTD1295_RSTN_DC_PHY 24 +#define RTD1295_RSTN_CP 25 +#define RTD1295_RSTN_MD 26 +#define RTD1295_RSTN_TP 27 +#define RTD1295_RSTN_AE 28 +#define RTD1295_RSTN_NF 29 +#define RTD1295_RSTN_MIPI 30 +#define RTD1295_RSTN_RSA 31 + +/* soft reset 2 */ +#define RTD1295_RSTN_ACPU 0 +#define RTD1295_RSTN_JPEG 1 +#define RTD1295_RSTN_USB_PHY3 2 +#define RTD1295_RSTN_USB_PHY2 3 +#define RTD1295_RSTN_USB3_PHY1_POW 4 +#define RTD1295_RSTN_USB3_P1_MDIO 5 +#define RTD1295_RSTN_PCIE0_STITCH 6 +#define RTD1295_RSTN_PCIE0_PHY 7 +#define RTD1295_RSTN_PCIE0 8 +#define RTD1295_RSTN_PCR_CNT 9 +#define RTD1295_RSTN_CR 10 +#define RTD1295_RSTN_EMMC 11 +#define RTD1295_RSTN_SDIO 12 +#define RTD1295_RSTN_PCIE0_CORE 13 +#define RTD1295_RSTN_PCIE0_POWER 14 +#define RTD1295_RSTN_PCIE0_NONSTICH 15 +#define RTD1295_RSTN_PCIE1_PHY 16 +#define RTD1295_RSTN_PCIE1 17 +#define RTD1295_RSTN_I2C_5 18 +#define RTD1295_RSTN_PCIE1_STITCH 19 +#define RTD1295_RSTN_PCIE1_CORE 20 +#define RTD1295_RSTN_PCIE1_POWER 21 +#define RTD1295_RSTN_PCIE1_NONSTICH 22 +#define RTD1295_RSTN_I2C_4 23 +#define RTD1295_RSTN_I2C_3 24 +#define RTD1295_RSTN_I2C_2 25 +#define RTD1295_RSTN_I2C_1 26 +#define RTD1295_RSTN_UR2 27 +#define RTD1295_RSTN_UR1 28 +#define RTD1295_RSTN_MISC_SC 29 +#define RTD1295_RSTN_CBUS_TX 30 +#define RTD1295_RSTN_SDS_PHY 31 + +/* soft reset 4 */ +#define RTD1295_RSTN_DCPHY_CRT 0 +#define RTD1295_RSTN_DCPHY_ALERT_RX 1 +#define RTD1295_RSTN_DCPHY_PTR 2 +#define RTD1295_RSTN_DCPHY_LDO 3 +#define RTD1295_RSTN_DCPHY_SSC_DIG 4 +#define RTD1295_RSTN_HDMIRX 5 +#define RTD1295_RSTN_CBUSRX 6 +#define RTD1295_RSTN_SATA_PHY_POW_1 7 +#define RTD1295_RSTN_SATA_FUNC_EXIST_1 8 +#define RTD1295_RSTN_SATA_PHY_1 9 +#define RTD1295_RSTN_SATA_1 10 +#define RTD1295_RSTN_FAN 11 +#define RTD1295_RSTN_HDMIRX_WRAP 12 +#define RTD1295_RSTN_PCIE0_PHY_MDIO 13 +#define RTD1295_RSTN_PCIE1_PHY_MDIO 14 +#define RTD1295_RSTN_DISP 15 + +/* iso reset */ +#define RTD1295_ISO_RSTN_IR 1 +#define RTD1295_ISO_RSTN_CEC0 2 +#define RTD1295_ISO_RSTN_CEC1 3 +#define RTD1295_ISO_RSTN_DP 4 +#define RTD1295_ISO_RSTN_CBUSTX 5 +#define RTD1295_ISO_RSTN_CBUSRX 6 +#define RTD1295_ISO_RSTN_EFUSE 7 +#define RTD1295_ISO_RSTN_UR0 8 +#define RTD1295_ISO_RSTN_GMAC 9 +#define RTD1295_ISO_RSTN_GPHY 10 +#define RTD1295_ISO_RSTN_I2C_0 11 +#define RTD1295_ISO_RSTN_I2C_1 12 +#define RTD1295_ISO_RSTN_CBUS 13 + +#endif From patchwork Wed Oct 23 10:13:08 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177264 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503518ill; Wed, 23 Oct 2019 03:14:21 -0700 (PDT) X-Google-Smtp-Source: APXvYqzN/00Prz1EBG412Yi9O6kDK7hdrWusqSQYAy/Qt8wxkK083LksIzKnF0tYUcQthF2cHQjY X-Received: by 2002:a17:906:4ec2:: with SMTP id i2mr16041829ejv.330.1571825661846; Wed, 23 Oct 2019 03:14:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825661; cv=none; d=google.com; s=arc-20160816; b=GkPTYTi7XPWOmwYvcfW3d0X+LEMqL9OrIQmG78GD20ASHrY0kE+SO0bZO2iSxa8hLE sR8CJqLmvHYWQVFmflmoNH95Sdjfnxm+hqbtaA6Zxv1xeF3kOuuPeJKfG674qNBvQwoO vkmagZMtC8ZizYIwqlO3blXLXBwOvcC9eiNcum/1P9IF4lILzdfoD9APeOVeQE2+tH13 VaycujuB1OEdCp+/or+jTf5Rr9EC18nl3Z+X8h/5Q2G7osKJrGttIsItS70loRXlXdBv jVmsc919/6uHITNqryFZWb7/wXesaj5HWEthtvGEVyOAoghY6c6VTvP+QCpgVnk0b4Fx Cf4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; 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[209.132.180.67]) by mx.google.com with ESMTP id y26si13458681edv.134.2019.10.23.03.14.21; Wed, 23 Oct 2019 03:14:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404360AbfJWKOT (ORCPT + 26 others); Wed, 23 Oct 2019 06:14:19 -0400 Received: from mx2.suse.de ([195.135.220.15]:53804 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2391029AbfJWKNa (ORCPT ); Wed, 23 Oct 2019 06:13:30 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 40CC8B513; Wed, 23 Oct 2019 10:13:28 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Philipp Zabel , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 02/11] dt-bindings: reset: Add Realtek RTD1195 Date: Wed, 23 Oct 2019 12:13:08 +0200 Message-Id: <20191023101317.26656-3-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a header with symbolic reset indices for Realtek RTD1195 SoC. Naming was derived from BSP register description headers. Signed-off-by: Andreas Färber --- v2: New include/dt-bindings/reset/realtek,rtd1195.h | 74 +++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 include/dt-bindings/reset/realtek,rtd1195.h -- 2.16.4 diff --git a/include/dt-bindings/reset/realtek,rtd1195.h b/include/dt-bindings/reset/realtek,rtd1195.h new file mode 100644 index 000000000000..27902abf935b --- /dev/null +++ b/include/dt-bindings/reset/realtek,rtd1195.h @@ -0,0 +1,74 @@ +/* SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) */ +/* + * Realtek RTD1195 reset controllers + * + * Copyright (c) 2017 Andreas Färber + */ +#ifndef DT_BINDINGS_RESET_RTD1195_H +#define DT_BINDINGS_RESET_RTD1195_H + +/* soft reset 1 */ +#define RTD1195_RSTN_MISC 0 +#define RTD1195_RSTN_RNG 1 +#define RTD1195_RSTN_USB3_POW 2 +#define RTD1195_RSTN_GSPI 3 +#define RTD1195_RSTN_USB3_P0_MDIO 4 +#define RTD1195_RSTN_VE_H265 5 +#define RTD1195_RSTN_USB 6 +#define RTD1195_RSTN_USB_PHY0 8 +#define RTD1195_RSTN_USB_PHY1 9 +#define RTD1195_RSTN_HDMIRX 11 +#define RTD1195_RSTN_HDMI 12 +#define RTD1195_RSTN_ETN 14 +#define RTD1195_RSTN_AIO 15 +#define RTD1195_RSTN_GPU 16 +#define RTD1195_RSTN_VE_H264 17 +#define RTD1195_RSTN_VE_JPEG 18 +#define RTD1195_RSTN_TVE 19 +#define RTD1195_RSTN_VO 20 +#define RTD1195_RSTN_LVDS 21 +#define RTD1195_RSTN_SE 22 +#define RTD1195_RSTN_DCU 23 +#define RTD1195_RSTN_DC_PHY 24 +#define RTD1195_RSTN_CP 25 +#define RTD1195_RSTN_MD 26 +#define RTD1195_RSTN_TP 27 +#define RTD1195_RSTN_AE 28 +#define RTD1195_RSTN_NF 29 +#define RTD1195_RSTN_MIPI 30 + +/* soft reset 2 */ +#define RTD1195_RSTN_ACPU 0 +#define RTD1195_RSTN_VCPU 1 +#define RTD1195_RSTN_PCR 9 +#define RTD1195_RSTN_CR 10 +#define RTD1195_RSTN_EMMC 11 +#define RTD1195_RSTN_SDIO 12 +#define RTD1195_RSTN_I2C_5 18 +#define RTD1195_RSTN_RTC 20 +#define RTD1195_RSTN_I2C_4 23 +#define RTD1195_RSTN_I2C_3 24 +#define RTD1195_RSTN_I2C_2 25 +#define RTD1195_RSTN_I2C_1 26 +#define RTD1195_RSTN_UR1 28 + +/* soft reset 3 */ +#define RTD1195_RSTN_SB2 0 + +/* iso soft reset */ +#define RTD1195_ISO_RSTN_VFD 0 +#define RTD1195_ISO_RSTN_IR 1 +#define RTD1195_ISO_RSTN_CEC0 2 +#define RTD1195_ISO_RSTN_CEC1 3 +#define RTD1195_ISO_RSTN_DP 4 +#define RTD1195_ISO_RSTN_CBUSTX 5 +#define RTD1195_ISO_RSTN_CBUSRX 6 +#define RTD1195_ISO_RSTN_EFUSE 7 +#define RTD1195_ISO_RSTN_UR0 8 +#define RTD1195_ISO_RSTN_GMAC 9 +#define RTD1195_ISO_RSTN_GPHY 10 +#define RTD1195_ISO_RSTN_I2C_0 11 +#define RTD1195_ISO_RSTN_I2C_6 12 +#define RTD1195_ISO_RSTN_CBUS 13 + +#endif From patchwork Wed Oct 23 10:13:09 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177261 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503225ill; Wed, 23 Oct 2019 03:14:06 -0700 (PDT) X-Google-Smtp-Source: APXvYqwR1lSkjS17sqp4GdW0LqzUOyGRpDATDXpw9Cm+ZbxphvGdtMpYegPRONB3sQ8SLSTqGoD+ X-Received: by 2002:a50:8871:: with SMTP id c46mr18034504edc.24.1571825646304; Wed, 23 Oct 2019 03:14:06 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825646; cv=none; d=google.com; s=arc-20160816; b=I6Y+AZGcNTZtze7+mYultmLsqYLMqHt//6B2yf6XkLrpdw1ynx/Ne6aQFzZTawhGTO yXt+kCl3SQPz/YK43Y9/yZWIuu9cOSnmA3L5rFiA28MsOL8U+uAl1qT/kYAtjBHRa0uu D/kPOQjbTpnzhDM+Uc1zoO97K2Cn0FNhMVQ6x52DCsjZ3HrWfxmXySSKZW7zgaSrG20o obRMsmDb0bQE9NO5CaQfxjaXH3hbQuBBHS8b+hs7VcWTywg9/9Zi/2AaRVYt/CohQgxE 0I13LyZt1SggomDJo3ATxasMY5c3KpCCgHbmJdGpV/blSwXXP3+CClJNyCkQE24KgzTO Y/fA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=Y+r2uFMDfU8FdCL/EmIrkBKiuKqxircycp1sBM3OUkk=; b=yIJtjHp4mWVdO/NfHE3OirIgczq9su7MEWMA0278nD1MciKp3ccYTOdMDbXSMmACWz sH5GmDbavJ63rA9YqpmSz58rH8R5j0ASPM8SL9ELWbxK8TCBgMGIN7h+gYxf1Z029Ltp S53b+y7YDmroihk/zIeF5TvAOJX6j4E8aP5ajQfSBmYhO45PwJnvMMt91/4MbUZE3UE/ G3kr8NUreYmRMPYViIi6E8Nv/EkGNVPw40EF/daEm/lxCehZCFZa4rJkfgVhDQGpI6f3 WppfU2C5vCp6EZDKhB8BUDxVGi9TIMhfkkKV2clMIBGp9bquegKaR+b6MGA7/yy8hzTd pp+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id sd13si12302963ejb.256.2019.10.23.03.14.06; Wed, 23 Oct 2019 03:14:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404181AbfJWKNd (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:33 -0400 Received: from mx2.suse.de ([195.135.220.15]:53846 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2391093AbfJWKNa (ORCPT ); Wed, 23 Oct 2019 06:13:30 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 3BF2DB506; Wed, 23 Oct 2019 10:13:29 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Philipp Zabel , Manivannan Sadhasivam , Joel Stanley , Dinh Nguyen Subject: [PATCH v2 03/11] reset: simple: Keep alphabetical order Date: Wed, 23 Oct 2019 12:13:09 +0200 Message-Id: <20191023101317.26656-4-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Restore alphabetical order for Kconfig dependencies and help text. Compatibles got out of order too, but no functional change done here. Goal is to make it obvious where to add new platforms. Fixes: 64c47b624f64 ("reset: Add reset controller support for BM1880 SoC") Fixes: 1d7592f84f92 ("reset: simple: Enable for ASPEED systems") Fixes: 96a2f50305d1 ("reset: build simple reset controller driver for Agilex") Cc: Philipp Zabel Signed-off-by: Andreas Färber --- v2: New (prepares for following patch extending it to Realtek) drivers/reset/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.16.4 diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 46f7986c3587..fac356a9b818 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -129,7 +129,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARCH_ASPEED || ARCH_BITMAIN || ARC || ARCH_AGILEX + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, @@ -138,10 +138,10 @@ config RESET_SIMPLE Currently this driver supports: - Altera SoCFPGAs - ASPEED BMC SoCs + - Bitmain BM1880 SoC - RCC reset controller in STM32 MCUs - Allwinner SoCs - ZTE's zx2967 family - - Bitmain BM1880 SoC config RESET_STM32MP157 bool "STM32MP157 Reset Driver" if COMPILE_TEST From patchwork Wed Oct 23 10:13:10 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177259 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503121ill; Wed, 23 Oct 2019 03:14:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqwlNcTi/EBtlIPt4602KNuA4cdy2xLr6n2337cki+9jo+LDavWYVeRJuA7oJ9tK5Vwzqoc8 X-Received: by 2002:a50:8f03:: with SMTP id 3mr37234849edy.195.1571825640647; Wed, 23 Oct 2019 03:14:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825640; cv=none; d=google.com; s=arc-20160816; b=ld+kgZloXRNHuKvFlNrK1jEEVtlw+wyLWcEdHJ5fRXWN8MWm07x2Yo+//WhPVhxTEC OEDjopMjkVNaR1VGVDzyrEJMay7QQm8UZYMQxY8WHyU+0F4FNHfikdsGYuJO0mT+2kIs JC61dApTb4gPPrbXKLTiOdhBsZvR3jDeOVAWUGfgCBvptE9y43yiUkxN3kWZ75JJbIa0 m+jj0kCH/E2L76Ez39jHf83D2JwK3zomV1VSlXrLgl4CRuXhWyC9l0tunSRfBA8VWZeP mUtfqf2Arn3pCt1OtxPgEt6Im0vK7aoCPx6UTlclcDL8BS5sZT7E3/BKSeVFtCVkIlHD R5Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=cAXWIyaERsJVyLCYXp1Dkfqikh9LCIAFak+oSzvp7a8=; b=C9KpOtKFGDM6zi0dH/G8fXl95l0LTw7hjB+Vib9io7mN1HCQM3/LX2OhzFqGV+zKFM hhYrAqm68RuDxdOp1IDB8EiFAnZN0KFlOVUQFpAiXYAkIaGqnIYjb6HXzyhafuDOkM3X EeE/3CGE3lJELabH89gCtdRucAqrzvc+9y2+oXV7bgddw7ZUuPCjrBwLUMwoofYMxVfO Et9hnEMsFlnWs2N1AkcoASNTmpTJzW1wtVDR/iRFQJh/f2AuUO8LUZo0vjzflw/GVlFg mGQyLx4cR0cDUDU/DMSOnzMDLTPBK77g/XIW9/ZLIcgZv4LsDuErAnf+P5yToQiYii7Z g/pg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d1si13502873eds.148.2019.10.23.03.14.00; Wed, 23 Oct 2019 03:14:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404207AbfJWKNe (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:34 -0400 Received: from mx2.suse.de ([195.135.220.15]:53836 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2390935AbfJWKNa (ORCPT ); Wed, 23 Oct 2019 06:13:30 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 1CD3FB514; Wed, 23 Oct 2019 10:13:29 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Philipp Zabel Subject: [PATCH v2 04/11] reset: simple: Add Realtek RTD1195/RTD1295 Date: Wed, 23 Oct 2019 12:13:10 +0200 Message-Id: <20191023101317.26656-5-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable RESET_SIMPLE for ARCH_REALTEK. They can reuse the DesignWare bindings to avoid a new compatible. Signed-off-by: Andreas Färber --- v1 -> v2: * Instead of adding a new driver, reuse reset-simple (Philipp) drivers/reset/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.16.4 diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index fac356a9b818..3ad7817ce1f0 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -129,7 +129,7 @@ config RESET_SCMI config RESET_SIMPLE bool "Simple Reset Controller Driver" if COMPILE_TEST - default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC + default ARCH_AGILEX || ARCH_ASPEED || ARCH_BITMAIN || ARCH_REALTEK || ARCH_STM32 || ARCH_STRATIX10 || ARCH_SUNXI || ARCH_ZX || ARC help This enables a simple reset controller driver for reset lines that that can be asserted and deasserted by toggling bits in a contiguous, @@ -139,6 +139,7 @@ config RESET_SIMPLE - Altera SoCFPGAs - ASPEED BMC SoCs - Bitmain BM1880 SoC + - Realtek SoCs - RCC reset controller in STM32 MCUs - Allwinner SoCs - ZTE's zx2967 family From patchwork Wed Oct 23 10:13:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177262 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503336ill; Wed, 23 Oct 2019 03:14:12 -0700 (PDT) X-Google-Smtp-Source: APXvYqx67ZOdtsjVSG9f7RB0kYBImIgOX3lZrW2FnG1KwfzA1T8gB4wnE+gsXruXxEe97ALDSUS8 X-Received: by 2002:a17:906:3053:: with SMTP id d19mr32658538ejd.109.1571825652432; Wed, 23 Oct 2019 03:14:12 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825652; cv=none; d=google.com; s=arc-20160816; b=bOkqq3R/kHsJ010hsr3PxzvykCPsnP65AGfiWoAzVLlQQs4IFniLaMOtWCgU020asu jce9BzQ06y24gdQWpYZji143Mewm1hv6iWFxXqHoE/xOdeUcZWftSzUylcs6FcTgJZGR suhsMxMJ0+57eKVQnosB2J0o/KpKcfaiFTuBzvh5So+9ThpV0VQ6PSyF/WTg59v/e1H5 I9wuwWiU5jldQsgBTohbLupImVDfy79evDO+ya/CLX1RJkdMhBJC+UdLLElrWezUr8Es H/crfe+IodJ8Zb7r9aFGNlO0jCgc427WZmL9gHy87ptEQdtuEHEc6Rke4PARh0KXZq+N lX+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=lvkkviWUvWjhdWxG9inT+y3h0SMS6wkjvD2FcDJDOh0=; b=jDWstdB2iwAykKM6joJ1D2myAF4YEF0vf2ZEkj0xV8Ve4mJNg9PSm2otIREiqhnL34 IQoInvKmix4SgSHqtWuF3rgAnZNNE6EA0iPjanbmREEeJiI9+Ji2kYUUk7SYrJXLfhpp OqtbEiczq+ZezUUEEmSWzhvjFPP29LmBGfBhmxHRZJwzk2AiWs2yZzdBvcs3ZDpfgZTM m7I+zf0y2gxmyW2n7gG8QdyLFNC1E1IFU+m3VPxx7bqNJgzetk3bCFf/1qQcvlmCPPrN rY12movfnvCOtGCuON5bINhxQRsTXTfZjKXcMp6mXh+Z0zeWIvN3j3HLvzSnvcWP5e+J GoDg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q20si6043240eju.222.2019.10.23.03.14.12; Wed, 23 Oct 2019 03:14:12 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404155AbfJWKNc (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:32 -0400 Received: from mx2.suse.de ([195.135.220.15]:53858 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2403804AbfJWKNb (ORCPT ); Wed, 23 Oct 2019 06:13:31 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 8D85CB54C; Wed, 23 Oct 2019 10:13:29 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Catalin Marinas , Will Deacon Subject: [PATCH v2 05/11] arm64: realtek: Select reset controller Date: Wed, 23 Oct 2019 12:13:11 +0200 Message-Id: <20191023101317.26656-6-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Select RESET_CONTROLLER for ARCH_REALTEK. Signed-off-by: Andreas Färber --- v2: New arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) -- 2.16.4 diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 63b463b88040..90d3c04ebff0 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -189,6 +189,7 @@ config ARCH_QCOM config ARCH_REALTEK bool "Realtek Platforms" + select RESET_CONTROLLER help This enables support for the ARMv8 based Realtek chipsets, like the RTD1295. From patchwork Wed Oct 23 10:13:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177257 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503026ill; Wed, 23 Oct 2019 03:13:55 -0700 (PDT) X-Google-Smtp-Source: APXvYqycqKInaLuRKzhfccxgA5cG8CJGRhRaNp0TaDu8ctIBMUkTlT/alRNRNpgOh6+mfSkinzsV X-Received: by 2002:a05:6402:b02:: with SMTP id bm2mr36212991edb.244.1571825635353; Wed, 23 Oct 2019 03:13:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825635; cv=none; d=google.com; s=arc-20160816; b=SQ3Z8CDhWKV/Bn6AfBsuRziSJo/HPWQHh9WZ1aR7eVJnf9b05FVrHYTu/GTkOhVfCx UELx4r+1B1/RHRRHOMbimYmTMChRwTmmprZV4bWsuyZqumDafwmrvEp5p9/UrL1eT8UD fsZn/WJcgfKYkabZwLgJ1UwGXEtJVWiewrptltMN1+elmmvU/HGa0o5o5mUyj8jNscFO 0XJ4+pcxSroNVBVLHMUQqg4/YUIniv4WZXyC86hwG6g8iqMcjFADfhDNS2YhqrRizr6L P7/yeIyBUIk51UVnZpyaQciujb2KlkXgjnn6yINzI4pqgJ+ib1bDmL3QFGmMDTKfAy6s 2UmQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=xLAErR862RUryMEel4fMFhyTlHz12XdJ2T6/tZuIzms=; b=a3GVjAql+RF0NAWcoFh7PCLHu2wpej1UV3uG79EVSvV8+j3AiYfuiVCQKlDg8WHSE2 depbmPdVKrfKB7TEGpM4Y8ycOiokBqUI1cNWVdENw99B39MUQ6MpkHFgxW6rZ8OTbyAt 6AdIKr2ie9K1HK+T7OTUV4hnDITfeLAKrYjC+81tEV3b3SkIJxMdYbBpilEeFVHEJbIc 6ngMqQMPcrXVHiTxneGzsc3udKtgz37ncXfxn8RZxG+re+GVF+9YczWzL1MVZ6446OiR LY4hStzi+0XeOon0Wk+/qGLAmuqPOfLYCafXRzFyECu33qY7nIXZwpl6Fqp02UKGqrak sEQA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h4si15120905edd.189.2019.10.23.03.13.54; Wed, 23 Oct 2019 03:13:55 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404226AbfJWKNe (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:34 -0400 Received: from mx2.suse.de ([195.135.220.15]:53872 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404104AbfJWKNb (ORCPT ); Wed, 23 Oct 2019 06:13:31 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 062C4B53E; Wed, 23 Oct 2019 10:13:30 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 06/11] arm64: dts: realtek: Add RTD129x reset controller nodes Date: Wed, 23 Oct 2019 12:13:12 +0200 Message-Id: <20191023101317.26656-7-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add nodes for the Realtek RTD1295 reset controllers. Signed-off-by: Andreas Färber --- v1 -> v2: * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi arch/arm64/boot/dts/realtek/rtd129x.dtsi | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 0b2ac0c33b8b..282ab8bfaad1 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -37,6 +37,36 @@ /* Exclude up to 2 GiB of RAM */ ranges = <0x80000000 0x80000000 0x80000000>; + reset1: reset-controller@98000000 { + compatible = "snps,dw-low-reset"; + reg = <0x98000000 0x4>; + #reset-cells = <1>; + }; + + reset2: reset-controller@98000004 { + compatible = "snps,dw-low-reset"; + reg = <0x98000004 0x4>; + #reset-cells = <1>; + }; + + reset3: reset-controller@98000008 { + compatible = "snps,dw-low-reset"; + reg = <0x98000008 0x4>; + #reset-cells = <1>; + }; + + reset4: reset-controller@98000050 { + compatible = "snps,dw-low-reset"; + reg = <0x98000050 0x4>; + #reset-cells = <1>; + }; + + iso_reset: reset-controller@98007088 { + compatible = "snps,dw-low-reset"; + reg = <0x98007088 0x4>; + #reset-cells = <1>; + }; + wdt: watchdog@98007680 { compatible = "realtek,rtd1295-watchdog"; reg = <0x98007680 0x100>; From patchwork Wed Oct 23 10:13:13 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177263 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503403ill; Wed, 23 Oct 2019 03:14:16 -0700 (PDT) X-Google-Smtp-Source: APXvYqyvpNTzAaPY+/bXVIyfE98P4673T/mYxgRIF70+kFpbYqZKPQNuqO7rkoB3bLB+jpPfZgqi X-Received: by 2002:a17:906:7c57:: with SMTP id g23mr31966640ejp.116.1571825656314; Wed, 23 Oct 2019 03:14:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825656; cv=none; d=google.com; s=arc-20160816; b=oaPLGAi+WoAmOuPikqazDQ0BeImGHWGETeJjLWUoarGAC3lksjDBKNf6eYVdeGYGqn rIa5t/Ujol3lwUxVAmuuhrTmiyEKiA+xa0o7YxC5q6KLF+gSMHF0UUgp9VgLejn8i73n HUQcQ3Nn0bupMgmWEEzyA9Mdpb9DIxy5iw450a+y+BghJosuF2FXdBD9DMINkXl8My2W M9sWVej+Tr+eWa3NmRc/JmygDwrNf1Bzax2IIaOXB4DiGq6p8OZUC7deZyBAW0P2H2rB su6e7a/+eGu55vggW9RlgQ3XGCHNY1TrzIMHNf/012l2ZpU6Fh9ZDgJvlRFV9Ul7hymG uXSw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=5iyAWSQYMeVQ+Nk/vNX3Do9v9PLRBSeJa2cloUtIt/g=; b=likjVhjhpS0UNqwzlGc21A4d0qKC8AZSmDbKBslzDoKteL3KoCK2gIf+BgWXP60lmv sq4qolIrBFvL8RAVMAnxBpAMnbDmO9mfIVOr4T+euRemehWSdt3F5WnoJFP9ADp2tZzK XHHtU96J1w5i69DKtLcDbH0vHBSM3sYga9MDMSxsiQfC1oRD5hVaf8ahAECV7jbw8lLj eSAYBimG1LW+CIMnFSDs/qartzHjNldQU9SSjvsVnIqxFFeQfl07LLfqFlq0sBizrxNM bsYL/VpNXAdw/3mQyXqEXG4Iuu6jNDA2qVqDgfsuOo3k4Futxkg7u6avg6kTau13J9dz Jb+Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y26si13458681edv.134.2019.10.23.03.14.16; Wed, 23 Oct 2019 03:14:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404350AbfJWKOM (ORCPT + 26 others); Wed, 23 Oct 2019 06:14:12 -0400 Received: from mx2.suse.de ([195.135.220.15]:53884 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404124AbfJWKNc (ORCPT ); Wed, 23 Oct 2019 06:13:32 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 69B9AB55C; Wed, 23 Oct 2019 10:13:30 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 07/11] arm64: dts: realtek: Add RTD129x UART resets Date: Wed, 23 Oct 2019 12:13:13 +0200 Message-Id: <20191023101317.26656-8-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Associate the UART nodes with the corresponding reset controller bits. Signed-off-by: Andreas Färber --- v1 -> v2: * Rebased, moved from rtd1295.dtsi to rtd129x.dtsi arch/arm64/boot/dts/realtek/rtd129x.dtsi | 3 +++ 1 file changed, 3 insertions(+) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 282ab8bfaad1..15d321d9515c 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -79,6 +79,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; + resets = <&iso_reset 8>; status = "disabled"; }; @@ -88,6 +89,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 28>; status = "disabled"; }; @@ -97,6 +99,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; + resets = <&reset2 27>; status = "disabled"; }; From patchwork Wed Oct 23 10:13:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177255 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp502692ill; Wed, 23 Oct 2019 03:13:39 -0700 (PDT) X-Google-Smtp-Source: APXvYqxoxPnULN/NXNjxW2oggOLPOA1vrukBYX6vHb3ajM6zCoLsg2RGwMEloLI/QRs89aOwIog9 X-Received: by 2002:a17:906:85c5:: with SMTP id i5mr31624419ejy.222.1571825619602; Wed, 23 Oct 2019 03:13:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825619; cv=none; d=google.com; s=arc-20160816; b=k8Ak66WCl1kQ7TqmCj4qrfndnD2wQsr2mGbgeavPdMmp91+d/VqEP4y+h2aivZs8JX 9RCd5S43uCiRVaAEtc+aQUqqVHRNUCS3RoExMSULstKRxvL//CeMSDynCzWLoqBrjaCy Z+Gkjieo2c56Udz7Q+KIBa9rxYVefnEJn9F9xI+isIk7qxfNST6I36K7SCaAQQ1qYIue UIo67TGWXstq3clnM06ChoosCl0wuZkPaXp4iecqOPNvZUkuX5oIqD4gSOBNv8DRRk+p JQ5yem+QBQEIO9NJuQcsozPBD2axSdDOuMMzuY02ruLfUtNx4rK5+u1IGxoYfEoBobH5 j5zA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=p0NwdyeQbAMg8gfv7OCgPqSss3bgmfow5+f/OkApNjg=; b=iwR2yuc8YF90yU8R4LwyClV/LrULcf36c/VFUUcblffdYJONYviOiu2bpBJMVrN+bg cxcBZy94HxeN//Ui5IFa7f1ipNH/HNEchQVQ5SZkrQK9vobxT8hc66bPnm6mUR8UnHU3 LU/+1BNwIJbdrwbcjSBWxA3BsN4QOHrlZq3f80cvvv4GTsdNQSL+997bklTLjR1FQjNm bUiFlwIlxlTCtUaaovT74CIEuFVfrvoMWgcow2mCG8fk/VFE50G6j07xRescUSDQpAVn qsebGisonG5yLDLlZ9+FFFTTPaf6T9P6/VH16NBUznBk1L4S+UlqnH2sSh8EyB0NFDta 8gaw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p22si12011151ejf.278.2019.10.23.03.13.39; Wed, 23 Oct 2019 03:13:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404242AbfJWKNf (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:35 -0400 Received: from mx2.suse.de ([195.135.220.15]:54006 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404135AbfJWKNd (ORCPT ); Wed, 23 Oct 2019 06:13:33 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id E6D88B595; Wed, 23 Oct 2019 10:13:30 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 08/11] ARM: dts: rtd1195: Add reset nodes Date: Wed, 23 Oct 2019 12:13:14 +0200 Message-Id: <20191023101317.26656-9-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add reset controller nodes for Realtek RTD1195 SoC. Signed-off-by: Andreas Färber --- v2: New arch/arm/boot/dts/rtd1195.dtsi | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) -- 2.16.4 diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index 475740c67d26..fdcaf48a26f2 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -93,6 +93,30 @@ #size-cells = <1>; ranges; + reset1: reset-controller@18000000 { + compatible = "snps,dw-low-reset"; + reg = <0x18000000 0x4>; + #reset-cells = <1>; + }; + + reset2: reset-controller@18000004 { + compatible = "snps,dw-low-reset"; + reg = <0x18000004 0x4>; + #reset-cells = <1>; + }; + + reset3: reset-controller@18000008 { + compatible = "snps,dw-low-reset"; + reg = <0x18000008 0x4>; + #reset-cells = <1>; + }; + + iso_reset: reset-controller@18007088 { + compatible = "snps,dw-low-reset"; + reg = <0x18007088 0x4>; + #reset-cells = <1>; + }; + wdt: watchdog@18007680 { compatible = "realtek,rtd1295-watchdog"; reg = <0x18007680 0x100>; From patchwork Wed Oct 23 10:13:16 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177258 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp503105ill; Wed, 23 Oct 2019 03:14:00 -0700 (PDT) X-Google-Smtp-Source: APXvYqx2PJHF6SCcRc4BQO5y1Iq2O3P28IwU22gGxTCKpx/qUUorpiQuenxCN+F1DZcypm7Lf2Xt X-Received: by 2002:a17:906:4448:: with SMTP id i8mr30961940ejp.298.1571825639912; Wed, 23 Oct 2019 03:13:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825639; cv=none; d=google.com; s=arc-20160816; b=Qs7scfs68GwL8uk87v1kfIyJ9zMM+Jhx/+r7qK6c2MJZxGaVwowrTiP7NRNCWDwF7i ZOGmRegL/zwk8E1BL8NbrvkYgoBCTMwQhGRtstZe/t8+4U5pnaZVH0iVXJ1erRObgiRv bXd4TAmv5S4+LQrjkibSissYHXyp/TtCQXUKkOG3gGn+05Tu7mqr2sOpm2SFCLZrt0P/ /b3EldGYKxgwZFo5xYX7VmnJB8/ZSnz/lnyCFvAP3Pt0H3fctnkunJFlqAcAFR3BJZjO uUNhAfsexZb3mIGGAAb/DDKwNwZmFc498lXlDQ1SaFu4AJ1U9fxLZ6c9qcba4owo7LNw Eeaw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=N59UmSjMAxn0VcmS+V7AdDHwjapZikmzMPV2SOm/FMg=; b=lJwChyshexT2BvJxOIWMfWK6wplPaRFsAVhdjQZ5uROvkccvA2Ev1xDYGFpqaF6TB+ zuJbfquu1vT2TwtnQxlrPi+EkwdUEwvFDhI9jmTzgNICPOc3x7R2lPBQ26SwkHVUTOr8 Po9Q/wcVX0x6UjeOEP6sX7TN4aVmGfbO3bNLuwV6fL5Tw3vKyHFgvotsQNBOwKBNu4Xr Cox2qN1rvQLZ8FPLBMaOVoHKaDp1bz9E1a3/psCoXWBTmz4suCFmQFTUgdyS84KPJcEu oHrdDFGyJkgScKfhcVJBYMDp43hBcJnVFKwup4LO/aj6Kr95xSm/png1MObMSrqAIrEz 563A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id d1si13502873eds.148.2019.10.23.03.13.59; Wed, 23 Oct 2019 03:13:59 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404330AbfJWKNz (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:55 -0400 Received: from mx2.suse.de ([195.135.220.15]:53884 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404189AbfJWKNe (ORCPT ); Wed, 23 Oct 2019 06:13:34 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 62114B664; Wed, 23 Oct 2019 10:13:32 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 10/11] arm64: dts: realtek: Adopt RTD129x reset constants Date: Wed, 23 Oct 2019 12:13:16 +0200 Message-Id: <20191023101317.26656-11-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace reset controller indices with constants. Signed-off-by: Andreas Färber --- v1 -> v2: Unchanged arch/arm64/boot/dts/realtek/rtd129x.dtsi | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.16.4 diff --git a/arch/arm64/boot/dts/realtek/rtd129x.dtsi b/arch/arm64/boot/dts/realtek/rtd129x.dtsi index 15d321d9515c..4433114476f5 100644 --- a/arch/arm64/boot/dts/realtek/rtd129x.dtsi +++ b/arch/arm64/boot/dts/realtek/rtd129x.dtsi @@ -12,6 +12,7 @@ /memreserve/ 0x0000000001ffe000 0x0000000000004000; #include +#include / { interrupt-parent = <&gic>; @@ -79,7 +80,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <27000000>; - resets = <&iso_reset 8>; + resets = <&iso_reset RTD1295_ISO_RSTN_UR0>; status = "disabled"; }; @@ -89,7 +90,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; - resets = <&reset2 28>; + resets = <&reset2 RTD1295_RSTN_UR1>; status = "disabled"; }; @@ -99,7 +100,7 @@ reg-shift = <2>; reg-io-width = <4>; clock-frequency = <432000000>; - resets = <&reset2 27>; + resets = <&reset2 RTD1295_RSTN_UR2>; status = "disabled"; }; From patchwork Wed Oct 23 10:13:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Andreas_F=C3=A4rber?= X-Patchwork-Id: 177256 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp502784ill; Wed, 23 Oct 2019 03:13:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqzAFDSuis/83B//erAv52WzIYr62hnsIgftUf8ADv4Oa1Ol/3xYSLbfo8gf+qIAc1XTSYya X-Received: by 2002:a50:e71a:: with SMTP id a26mr36065799edn.265.1571825623859; Wed, 23 Oct 2019 03:13:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571825623; cv=none; d=google.com; s=arc-20160816; b=aAyC3oMCPD/DJY3moVSJFhCnePGXKXvbhwpY15uEE9Qo8YY1BejEveiOztTKjj/cGq k30bcxu/t9UIEKzbS9YeVRB4k9JoT0ClLYl3RR+BXX4xMb1y6+CGSDI7a8U5wA4z9NOZ ChE0/skHUuQop9SpwqnCjmuVsuineglPlN6Es8GCthX2aD4uWccVH7ir0KyE1hakdCIG WCWm0SXj2GH4AN7ZM7zxvf3da1TaeTFzETcfXIJcEPgRvEOubamISbkyggshsnWBivM0 J5+QAOS8Aiv34ar8lIt1fShV1AKW+S2fwPxOgLhCimuYH2AFCA7ao/KGdJGJSJRS1FZE KFGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=tuv+L5RqL/M95xTpGdOwtBkonQCenOnesHedJ3ahSsE=; b=aDdE7tNUDwX9rHlgY3+G9NKltEcf0zv0V6VyQp4VSHkzr5k3+JR9Nz+6m8k7njgBuL 9CSzIzm3u3CQkLqRY/ZHBmbG/5e2pk6KUsrTc+0zuOt0kFn6oDCy2E/cWEL3EsFFsOaH HuYLhy0/cmMXmToTbeLMftrcqUllyvCPX7yhuXCG8L39ed1syNqIzheBXSi8ueVcFVmb oDHGxoI7WrP55W58D3De2QAlscerYIHiw7FWlHhaM76nfaQ0Vkmmls1fmMHU9aQ6mdUq Gl+LFgfiOaXewdS94/2Qd15x1vF6HLzmzhDqurpCCy0ITNhFpMzOzhebW4+lxo27n50U ifHA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p19si4595079ejj.85.2019.10.23.03.13.43; Wed, 23 Oct 2019 03:13:43 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2404271AbfJWKNi (ORCPT + 26 others); Wed, 23 Oct 2019 06:13:38 -0400 Received: from mx2.suse.de ([195.135.220.15]:54006 "EHLO mx1.suse.de" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S2404204AbfJWKNf (ORCPT ); Wed, 23 Oct 2019 06:13:35 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.220.254]) by mx1.suse.de (Postfix) with ESMTP id 3EFF2B67E; Wed, 23 Oct 2019 10:13:33 +0000 (UTC) From: =?utf-8?q?Andreas_F=C3=A4rber?= To: linux-realtek-soc@lists.infradead.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Andreas_F=C3=A4rber?= , Rob Herring , Mark Rutland , devicetree@vger.kernel.org Subject: [PATCH v2 11/11] ARM: dts: rtd1195: Adopt reset constants Date: Wed, 23 Oct 2019 12:13:17 +0200 Message-Id: <20191023101317.26656-12-afaerber@suse.de> X-Mailer: git-send-email 2.16.4 In-Reply-To: <20191023101317.26656-1-afaerber@suse.de> References: <20191023101317.26656-1-afaerber@suse.de> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Replace reset controller indices with constants. Signed-off-by: Andreas Färber --- v2: New arch/arm/boot/dts/rtd1195.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) -- 2.16.4 diff --git a/arch/arm/boot/dts/rtd1195.dtsi b/arch/arm/boot/dts/rtd1195.dtsi index e2cdcbcf70f4..9ccf8fa04718 100644 --- a/arch/arm/boot/dts/rtd1195.dtsi +++ b/arch/arm/boot/dts/rtd1195.dtsi @@ -13,6 +13,7 @@ /memreserve/ 0x18100000 0x01000000; /* nor */ #include +#include / { compatible = "realtek,rtd1195"; @@ -128,7 +129,7 @@ reg = <0x18007800 0x400>; reg-shift = <2>; reg-io-width = <4>; - resets = <&iso_reset 8>; + resets = <&iso_reset RTD1195_ISO_RSTN_UR0>; clock-frequency = <27000000>; status = "disabled"; }; @@ -138,7 +139,7 @@ reg = <0x1801b200 0x100>; reg-shift = <2>; reg-io-width = <4>; - resets = <&reset2 28>; + resets = <&reset2 RTD1195_RSTN_UR1>; clock-frequency = <27000000>; status = "disabled"; };