From patchwork Tue Jun 11 09:30:22 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 803336 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9210117623D for ; Tue, 11 Jun 2024 09:31:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098297; cv=none; b=UDm7P3a+iqGxh9XbJD8OGk9e89CkcUmPKDbCm3ZaiNwLd8YhU+Cg1spmdaSLZASPUbRTen4evK7qBMKvWbjUrMWxrDsmhJISzH0bebIZesgHOAoww4KvPhl9lISlE53SYPIGVEngzF+DPmo68mvdFhgPFZkqnU55ZgJPqqBBfcU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098297; c=relaxed/simple; bh=//KiX0A3+2T6SNbx64RCCt5vplrvtiOsRUETqQE7Uw4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=f8ZzihNeK6wVHE694wDDPphZCAeOMKw3VLqzJ9NnaTc0Y/pzUHhrRrp6uoEgmHkTbhARIlVg0DvCs5rKlAS2smHgslU80KcWam5a/3uU/erSiIAqxKmiexSBNlyKz4PPaCovwVAsPSBrtFYup0bdz8y5eBEswNgLsd39Z/lUPlM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-25-87.elisa-laajakaista.fi [88.113.25.87]) by fgw20.mail.saunalahti.fi (Halon) with ESMTP id 63bf090d-27d5-11ef-8d69-005056bd6ce9; Tue, 11 Jun 2024 12:31:33 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Jacky Huang , Linus Walleij , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v1 1/4] pinctrl: nuvoton: Convert to use struct pingroup and PINCTRL_PINGROUP() Date: Tue, 11 Jun 2024 12:30:22 +0300 Message-ID: <20240611093127.90210-2-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240611093127.90210-1-andy.shevchenko@gmail.com> References: <20240611093127.90210-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko The pin control header provides struct pingroup and PINCTRL_PINGROUP() macro. Utilize them instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 16 ++-------------- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 16 ++-------------- 2 files changed, 4 insertions(+), 28 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 62a46d824b46..2601aacfb976 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -504,17 +504,6 @@ static const int lkgpo2_pins[] = { 9 }; static const int nprd_smi_pins[] = { 190 }; -/* - * pin: name, number - * group: name, npins, pins - * function: name, ngroups, groups - */ -struct npcm7xx_group { - const char *name; - const unsigned int *pins; - int npins; -}; - #define NPCM7XX_GRPS \ NPCM7XX_GRP(smb0), \ NPCM7XX_GRP(smb0b), \ @@ -642,9 +631,8 @@ enum { #undef NPCM7XX_GRP }; -static struct npcm7xx_group npcm7xx_groups[] = { -#define NPCM7XX_GRP(x) { .name = #x, .pins = x ## _pins, \ - .npins = ARRAY_SIZE(x ## _pins) } +static struct pingroup npcm7xx_groups[] = { +#define NPCM7XX_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins)) NPCM7XX_GRPS #undef NPCM7XX_GRP }; diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index a377d36b0eb0..9834a13cf5c9 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -588,17 +588,6 @@ static const int hgpio5_pins[] = { 25 }; static const int hgpio6_pins[] = { 59 }; static const int hgpio7_pins[] = { 60 }; -/* - * pin: name, number - * group: name, npins, pins - * function: name, ngroups, groups - */ -struct npcm8xx_pingroup { - const char *name; - const unsigned int *pins; - int npins; -}; - #define NPCM8XX_GRPS \ NPCM8XX_GRP(gpi36), \ NPCM8XX_GRP(gpi35), \ @@ -832,9 +821,8 @@ enum { #undef NPCM8XX_GRP }; -static struct npcm8xx_pingroup npcm8xx_pingroups[] = { -#define NPCM8XX_GRP(x) { .name = #x, .pins = x ## _pins, \ - .npins = ARRAY_SIZE(x ## _pins) } +static struct pingroup npcm8xx_pingroups[] = { +#define NPCM8XX_GRP(x) PINCTRL_PINGROUP(#x, x ## _pins, ARRAY_SIZE(x ## _pins)) NPCM8XX_GRPS #undef NPCM8XX_GRP }; From patchwork Tue Jun 11 09:30:23 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 803688 Received: from fgw20-7.mail.saunalahti.fi (fgw20-7.mail.saunalahti.fi [62.142.5.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 22A84176AD1 for ; Tue, 11 Jun 2024 09:31:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098297; cv=none; b=Vk3ppQpUckbANrH9dBbYvQ53mBEHZ0ekqzSXBnYl+q9Y88E3JtCBGx3zbq9xovoD2lh6HlKdkAH6755vv/4qnBw4DVJvEutIk0FWiBRv3KdBZtlV46HRzJ3MqVYCtUDqLZz6PpQG/NLnilzhjSpkbl3IQdnO+h2h7Jvy2hR/bj4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098297; c=relaxed/simple; bh=r7doePq86EZ38NE3zkj+NQ9CQBRt4LK5Y61mChfV55o=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lrdH9JBCbgZkEjEqbLx6PmcTkJyjYx8SI56YwvYFPiZPkA+Yq3gYCv+upMj1Hn6CUZ3BVDCHnQpL0rsbCZM04NLVrA4NzA7JkiBBhzpQ74pzQYEddVcpnpIBQhln8ZmRWEBaPXQPh55fmLZjdSBOJc2jI7XQyhQdf571NKpR0vE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-25-87.elisa-laajakaista.fi [88.113.25.87]) by fgw21.mail.saunalahti.fi (Halon) with ESMTP id 646b635b-27d5-11ef-ab0f-005056bdd08f; Tue, 11 Jun 2024 12:31:34 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Jacky Huang , Linus Walleij , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v1 2/4] pinctrl: nuvoton: Make use of struct pinfunction and PINCTRL_PINFUNCTION() Date: Tue, 11 Jun 2024 12:30:23 +0300 Message-ID: <20240611093127.90210-3-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240611093127.90210-1-andy.shevchenko@gmail.com> References: <20240611093127.90210-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko Since pin control provides a generic data type and a macro for the pin function definition, use them in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 19 ++++++++----------- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 11 +++-------- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 11 +++-------- drivers/pinctrl/nuvoton/pinctrl-wpcm450.c | 11 +++-------- 4 files changed, 17 insertions(+), 35 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index fb933cddde91..62e877b76a25 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -98,12 +98,6 @@ static const u32 ds_3300mv_tbl[] = { 17100, 25600, 34100, 42800, 48000, 56000, 77000, 82000, }; -struct ma35_pin_func { - const char *name; - const char **groups; - u32 ngroups; -}; - struct ma35_pin_setting { u32 offset; u32 shift; @@ -149,7 +143,7 @@ struct ma35_pinctrl { struct regmap *regmap; struct ma35_pin_group *groups; unsigned int ngroups; - struct ma35_pin_func *functions; + struct pinfunction *functions; unsigned int nfunctions; }; @@ -1041,9 +1035,10 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc u32 index) { struct device_node *child; - struct ma35_pin_func *func; + struct pinfunction *func; struct ma35_pin_group *grp; static u32 grp_index; + const char **groups; u32 ret, i = 0; dev_dbg(npctl->dev, "parse function(%d): %s\n", index, np->name); @@ -1055,12 +1050,12 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc if (func->ngroups <= 0) return 0; - func->groups = devm_kcalloc(npctl->dev, func->ngroups, sizeof(char *), GFP_KERNEL); - if (!func->groups) + groups = devm_kcalloc(npctl->dev, func->ngroups, sizeof(*groups), GFP_KERNEL); + if (!groups) return -ENOMEM; for_each_child_of_node(np, child) { - func->groups[i] = child->name; + groups[i] = child->name; grp = &npctl->groups[grp_index++]; ret = ma35_pinctrl_parse_groups(child, grp, npctl, i++); if (ret) { @@ -1068,6 +1063,8 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc return ret; } } + + func->groups = groups; return 0; } diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 2601aacfb976..c6b11a198c76 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -639,13 +639,6 @@ static struct pingroup npcm7xx_groups[] = { #define NPCM7XX_SFUNC(a) NPCM7XX_FUNC(a, #a) #define NPCM7XX_FUNC(a, b...) static const char *a ## _grp[] = { b } -#define NPCM7XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ - .groups = nm ## _grp } -struct npcm7xx_func { - const char *name; - const unsigned int ngroups; - const char *const *groups; -}; NPCM7XX_SFUNC(smb0); NPCM7XX_SFUNC(smb0b); @@ -764,7 +757,8 @@ NPCM7XX_SFUNC(lkgpo2); NPCM7XX_SFUNC(nprd_smi); /* Function names */ -static struct npcm7xx_func npcm7xx_funcs[] = { +static struct pinfunction npcm7xx_funcs[] = { +#define NPCM7XX_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp)) NPCM7XX_MKFUNC(smb0), NPCM7XX_MKFUNC(smb0b), NPCM7XX_MKFUNC(smb0c), @@ -880,6 +874,7 @@ static struct npcm7xx_func npcm7xx_funcs[] = { NPCM7XX_MKFUNC(lkgpo1), NPCM7XX_MKFUNC(lkgpo2), NPCM7XX_MKFUNC(nprd_smi), +#undef NPCM7XX_MKFUNC }; #define NPCM7XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k) \ diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 9834a13cf5c9..7c37d2cda9f1 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -829,13 +829,6 @@ static struct pingroup npcm8xx_pingroups[] = { #define NPCM8XX_SFUNC(a) NPCM8XX_FUNC(a, #a) #define NPCM8XX_FUNC(a, b...) static const char *a ## _grp[] = { b } -#define NPCM8XX_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ - .groups = nm ## _grp } -struct npcm8xx_func { - const char *name; - const unsigned int ngroups; - const char *const *groups; -}; NPCM8XX_SFUNC(gpi36); NPCM8XX_SFUNC(gpi35); @@ -1060,7 +1053,8 @@ NPCM8XX_SFUNC(hgpio6); NPCM8XX_SFUNC(hgpio7); /* Function names */ -static struct npcm8xx_func npcm8xx_funcs[] = { +static struct pinfunction npcm8xx_funcs[] = { +#define NPCM8XX_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp)) NPCM8XX_MKFUNC(gpi36), NPCM8XX_MKFUNC(gpi35), NPCM8XX_MKFUNC(tp_jtag3), @@ -1282,6 +1276,7 @@ static struct npcm8xx_func npcm8xx_funcs[] = { NPCM8XX_MKFUNC(hgpio5), NPCM8XX_MKFUNC(hgpio6), NPCM8XX_MKFUNC(hgpio7), +#undef NPCM8XX_MKFUNC }; #define NPCM8XX_PINCFG(a, b, c, d, e, f, g, h, i, j, k, l, m, n, o, p, q) \ diff --git a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c index cdad4ef11a2f..5cf6d555c5a5 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c +++ b/drivers/pinctrl/nuvoton/pinctrl-wpcm450.c @@ -482,13 +482,6 @@ static const struct pingroup wpcm450_groups[] = { #define WPCM450_SFUNC(a) WPCM450_FUNC(a, #a) #define WPCM450_FUNC(a, b...) static const char *a ## _grp[] = { b } -#define WPCM450_MKFUNC(nm) { .name = #nm, .ngroups = ARRAY_SIZE(nm ## _grp), \ - .groups = nm ## _grp } -struct wpcm450_func { - const char *name; - const unsigned int ngroups; - const char *const *groups; -}; WPCM450_SFUNC(smb3); WPCM450_SFUNC(smb4); @@ -555,7 +548,8 @@ WPCM450_FUNC(gpio, WPCM450_GRPS); #undef WPCM450_GRP /* Function names */ -static struct wpcm450_func wpcm450_funcs[] = { +static struct pinfunction wpcm450_funcs[] = { +#define WPCM450_MKFUNC(nm) PINCTRL_PINFUNCTION(#nm, nm ## _grp, ARRAY_SIZE(nm ## _grp)) WPCM450_MKFUNC(smb3), WPCM450_MKFUNC(smb4), WPCM450_MKFUNC(smb5), @@ -616,6 +610,7 @@ static struct wpcm450_func wpcm450_funcs[] = { WPCM450_MKFUNC(hg6), WPCM450_MKFUNC(hg7), WPCM450_MKFUNC(gpio), +#undef WPCM450_MKFUNC }; #define WPCM450_PINCFG(a, b, c, d, e, f, g) \ From patchwork Tue Jun 11 09:30:24 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 803335 Received: from fgw23-7.mail.saunalahti.fi (fgw23-7.mail.saunalahti.fi [62.142.5.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 151B01779AB for ; Tue, 11 Jun 2024 09:31:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098299; cv=none; b=NpceOHrXRogRzf8H4A0jcHFj+sFBlV6xnexAU0rttZ5gAnU1fgv3vDahLGRlcTCqqlLHPiUz1NYmYzuLlsNpHXSwXMoJ97a6BgPNvULVsLstpqXtOvDUv50VQjvy16CBtSm8pxg9HaUX88ZemsSTAh1AGsxs3gS8v5VzsoxZPUY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098299; c=relaxed/simple; bh=FC2Kl+hbpeiZTZFGRoCBKZ3Bw50AAGllg4iHaBq5Tm4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SOhYj19SI7cvDx8ExrDp2UsqpRIkb1S2RjszlPbvrnIypjMhkfhpo2LHTfkOqT+f3SuqTi7JUk3eR69SvSdw+G70OH8wOASkiGuCJRR7x31+yZhesTPi0pqlUjZlAhTE9z5ToSb71pj5+PoYCF/WgZzEn/Y0u2s6dInQCUCCIGU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-25-87.elisa-laajakaista.fi [88.113.25.87]) by fgw20.mail.saunalahti.fi (Halon) with ESMTP id 6519693c-27d5-11ef-8d69-005056bd6ce9; Tue, 11 Jun 2024 12:31:34 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Jacky Huang , Linus Walleij , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Andy Shevchenko Subject: [PATCH v1 3/4] pinctrl: nuvoton: Convert to use struct group_desc Date: Tue, 11 Jun 2024 12:30:24 +0300 Message-ID: <20240611093127.90210-4-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240611093127.90210-1-andy.shevchenko@gmail.com> References: <20240611093127.90210-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 From: Andy Shevchenko The pin control core header provides struct group_desc. Utilize it instead of open coded variants in the driver. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 66 ++++++++++++-------------- 1 file changed, 31 insertions(+), 35 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index 62e877b76a25..7c2b0039d1e4 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -106,13 +106,6 @@ struct ma35_pin_setting { unsigned int nconfigs; }; -struct ma35_pin_group { - const char *name; - unsigned int npins; - unsigned int *pins; - struct ma35_pin_setting *settings; -}; - struct ma35_pin_bank { void __iomem *reg_base; struct clk *clk; @@ -141,7 +134,7 @@ struct ma35_pinctrl { struct pinctrl_dev *pctl; const struct ma35_pinctrl_soc_info *info; struct regmap *regmap; - struct ma35_pin_group *groups; + struct group_desc *groups; unsigned int ngroups; struct pinfunction *functions; unsigned int nfunctions; @@ -160,7 +153,7 @@ static const char *ma35_get_group_name(struct pinctrl_dev *pctldev, unsigned int { struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev); - return npctl->groups[selector].name; + return npctl->groups[selector].grp.name; } static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, @@ -171,19 +164,19 @@ static int ma35_get_group_pins(struct pinctrl_dev *pctldev, unsigned int selecto if (selector >= npctl->ngroups) return -EINVAL; - *pins = npctl->groups[selector].pins; - *npins = npctl->groups[selector].npins; + *pins = npctl->groups[selector].grp.pins; + *npins = npctl->groups[selector].grp.npins; return 0; } -static struct ma35_pin_group *ma35_pinctrl_find_group_by_name( - const struct ma35_pinctrl *npctl, const char *name) +static struct group_desc * +ma35_pinctrl_find_group_by_name(const struct ma35_pinctrl *npctl, const char *name) { int i; for (i = 0; i < npctl->ngroups; i++) { - if (!strcmp(npctl->groups[i].name, name)) + if (!strcmp(npctl->groups[i].grp.name, name)) return &npctl->groups[i]; } return NULL; @@ -195,9 +188,10 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, unsigned int *num_maps) { struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev); - struct ma35_pin_group *grp; + struct ma35_pin_setting *setting; struct pinctrl_map *new_map; struct device_node *parent; + struct group_desc *grp; int map_num = 1; int i; @@ -211,7 +205,7 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, return -EINVAL; } - map_num += grp->npins; + map_num += grp->grp.npins; new_map = devm_kcalloc(pctldev->dev, map_num, sizeof(*new_map), GFP_KERNEL); if (!new_map) return -ENOMEM; @@ -223,6 +217,8 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, if (!parent) return -EINVAL; + setting = grp->data; + new_map[0].type = PIN_MAP_TYPE_MUX_GROUP; new_map[0].data.mux.function = parent->name; new_map[0].data.mux.group = np->name; @@ -231,9 +227,9 @@ static int ma35_pinctrl_dt_node_to_map_func(struct pinctrl_dev *pctldev, new_map++; for (i = 0; i < grp->npins; i++) { new_map[i].type = PIN_MAP_TYPE_CONFIGS_PIN; - new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->pins[i]); - new_map[i].data.configs.configs = grp->settings[i].configs; - new_map[i].data.configs.num_configs = grp->settings[i].nconfigs; + new_map[i].data.configs.group_or_pin = pin_get_name(pctldev, grp->grp.pins[i]); + new_map[i].data.configs.configs = setting[i].configs; + new_map[i].data.configs.num_configs = setting[i].nconfigs; } dev_dbg(pctldev->dev, "maps: function %s group %s num %d\n", (*map)->data.mux.function, (*map)->data.mux.group, map_num); @@ -281,12 +277,12 @@ static int ma35_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int selecto unsigned int group) { struct ma35_pinctrl *npctl = pinctrl_dev_get_drvdata(pctldev); - struct ma35_pin_group *grp = &npctl->groups[group]; - struct ma35_pin_setting *setting = grp->settings; + struct group_desc *grp = &npctl->groups[group]; + struct ma35_pin_setting *setting = grp->data; u32 i, regval; dev_dbg(npctl->dev, "enable function %s group %s\n", - npctl->functions[selector].name, npctl->groups[group].name); + npctl->functions[selector].name, grp->grp.name); for (i = 0; i < grp->npins; i++) { regmap_read(npctl->regmap, setting->offset, ®val); @@ -980,17 +976,16 @@ static const struct pinconf_ops ma35_pinconf_ops = { .is_generic = true, }; -static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_group *grp, +static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc *grp, struct ma35_pinctrl *npctl, u32 index) { struct ma35_pin_setting *pin; unsigned long *configs; unsigned int nconfigs; + unsigned int *pins; int i, j, count, ret; u32 *elems; - grp->name = np->name; - ret = pinconf_generic_parse_dt_config(np, NULL, &configs, &nconfigs); if (ret) return ret; @@ -1003,21 +998,22 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro if (!elems) return -ENOMEM; + grp->grp.name = np->name; + ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count); if (ret) return -EINVAL; + grp->grp.npins = count / 3; - grp->npins = count / 3; - - grp->pins = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->pins), GFP_KERNEL); - if (!grp->pins) + pins = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pins), GFP_KERNEL); + if (!pins) return -ENOMEM; + grp->grp.pins = pins; - grp->settings = devm_kcalloc(npctl->dev, grp->npins, sizeof(*grp->settings), GFP_KERNEL); - if (!grp->settings) + pin = devm_kcalloc(npctl->dev, grp->grp.npins, sizeof(*pin), GFP_KERNEL); + if (!pin) return -ENOMEM; - - pin = grp->settings; + grp->data = pin; for (i = 0, j = 0; i < count; i += 3, j++) { pin->offset = elems[i] * MA35_MFP_REG_SZ_PER_BANK + MA35_MFP_REG_BASE; @@ -1025,7 +1021,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct ma35_pin_gro pin->muxval = elems[i + 2]; pin->configs = configs; pin->nconfigs = nconfigs; - grp->pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift); + pins[j] = npctl->info->get_pin_num(pin->offset, pin->shift); pin++; } return 0; @@ -1036,7 +1032,7 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc { struct device_node *child; struct pinfunction *func; - struct ma35_pin_group *grp; + struct group_desc *grp; static u32 grp_index; const char **groups; u32 ret, i = 0; From patchwork Tue Jun 11 09:30:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 803687 Received: from fgw23-7.mail.saunalahti.fi (fgw23-7.mail.saunalahti.fi [62.142.5.84]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C6A6D1791FC for ; Tue, 11 Jun 2024 09:31:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=62.142.5.84 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098299; cv=none; b=eD1kHDyt8h9piiimQFQBx5jE+b4mwQqdBquCOwZBetdyKeZ1/OuTbP8Tdze4bmdaDF4wc6RYmsHXKq1pJLGU7FATG/9W5b469J3fKzdTvfiWI7j00OdxusQZ5U3Ngnv8auPlCOzvS2QcnYjsZbvum0ZcacbZWjj1lKbjxW994F0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1718098299; c=relaxed/simple; bh=mMVL8afWJZyH/lJQmN80I97zDhgRVPAlN2XpKsFbxs0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Oyc8ASLtdcXW7gXB03R6/FGs8bf//OKlGMKbsQhf2kDnf6sMvQvmz5wMZRoVB7pz5DUsXtq7hruZp9KnA88iYmyFNxuNbOKCI6AYNGLd+O3THd8g7RjlwOAj+TmGdToIdic+cPAT212/QHQKsu62M+wHs2RDk7N5AnQt8e4TicM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com; spf=fail smtp.mailfrom=gmail.com; arc=none smtp.client-ip=62.142.5.84 Authentication-Results: smtp.subspace.kernel.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=gmail.com Received: from localhost (88-113-25-87.elisa-laajakaista.fi [88.113.25.87]) by fgw21.mail.saunalahti.fi (Halon) with ESMTP id 657d3fe3-27d5-11ef-ab0f-005056bdd08f; Tue, 11 Jun 2024 12:31:35 +0300 (EEST) From: Andy Shevchenko To: Andy Shevchenko , Jacky Huang , Linus Walleij , Tomer Maimon , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, openbmc@lists.ozlabs.org Cc: Shan-Chun Hung , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v1 4/4] pinctrl: nuvoton: Reduce use of OF-specific APIs Date: Tue, 11 Jun 2024 12:30:25 +0300 Message-ID: <20240611093127.90210-5-andy.shevchenko@gmail.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20240611093127.90210-1-andy.shevchenko@gmail.com> References: <20240611093127.90210-1-andy.shevchenko@gmail.com> Precedence: bulk X-Mailing-List: linux-gpio@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Some drivers are using device property APIs along with OF-specific ones. At the same time few of the latter can be converted to device property calls. Reduce use of OF-specific APIs in order to bring a bit more consistency into the drivers. Signed-off-by: Andy Shevchenko --- drivers/pinctrl/nuvoton/pinctrl-ma35.c | 35 +++++++++++------------ drivers/pinctrl/nuvoton/pinctrl-ma35d1.c | 1 - drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 16 ++--------- drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 2 +- 4 files changed, 21 insertions(+), 33 deletions(-) diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35.c b/drivers/pinctrl/nuvoton/pinctrl-ma35.c index 7c2b0039d1e4..2bb0bdbc881a 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35.c @@ -519,7 +519,6 @@ static int ma35_gpiolib_register(struct platform_device *pdev, struct ma35_pinct bank->irqtype = 0; bank->irqinten = 0; bank->chip.label = bank->name; - bank->chip.of_gpio_n_cells = 2; bank->chip.parent = &pdev->dev; bank->chip.request = ma35_gpio_core_to_request; bank->chip.direction_input = ma35_gpio_core_direction_in; @@ -976,9 +975,10 @@ static const struct pinconf_ops ma35_pinconf_ops = { .is_generic = true, }; -static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc *grp, +static int ma35_pinctrl_parse_groups(struct fwnode_handle *fwnode, struct group_desc *grp, struct ma35_pinctrl *npctl, u32 index) { + struct device_node *np = to_of_node(fwnode); struct ma35_pin_setting *pin; unsigned long *configs; unsigned int nconfigs; @@ -990,7 +990,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc * if (ret) return ret; - count = of_property_count_elems_of_size(np, "nuvoton,pins", sizeof(u32)); + count = fwnode_property_count_u32(fwnode, "nuvoton,pins"); if (!count || count % 3) return -EINVAL; @@ -1000,7 +1000,7 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc * grp->grp.name = np->name; - ret = of_property_read_u32_array(np, "nuvoton,pins", elems, count); + ret = fwnode_property_read_u32_array(fwnode, "nuvoton,pins", elems, count); if (ret) return -EINVAL; grp->grp.npins = count / 3; @@ -1027,10 +1027,11 @@ static int ma35_pinctrl_parse_groups(struct device_node *np, struct group_desc * return 0; } -static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinctrl *npctl, +static int ma35_pinctrl_parse_functions(struct fwnode_handle *fwnode, struct ma35_pinctrl *npctl, u32 index) { - struct device_node *child; + struct device_node *np = to_of_node(fwnode); + struct fwnode_handle *child; struct pinfunction *func; struct group_desc *grp; static u32 grp_index; @@ -1050,12 +1051,14 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc if (!groups) return -ENOMEM; - for_each_child_of_node(np, child) { - groups[i] = child->name; + fwnode_for_each_child_node(fwnode, child) { + struct device_node *node = to_of_node(child); + + groups[i] = node->name; grp = &npctl->groups[grp_index++]; ret = ma35_pinctrl_parse_groups(child, grp, npctl, i++); if (ret) { - of_node_put(child); + fwnode_handle_put(child); return ret; } } @@ -1066,13 +1069,12 @@ static int ma35_pinctrl_parse_functions(struct device_node *np, struct ma35_pinc static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinctrl *npctl) { + struct device *dev = &pdev->dev; struct fwnode_handle *child; u32 idx = 0; int ret; - device_for_each_child_node(&pdev->dev, child) { - if (fwnode_property_present(child, "gpio-controller")) - continue; + for_each_gpiochip_node(dev, child) { npctl->nfunctions++; npctl->ngroups += of_get_child_count(to_of_node(child)); } @@ -1090,11 +1092,8 @@ static int ma35_pinctrl_probe_dt(struct platform_device *pdev, struct ma35_pinct if (!npctl->groups) return -ENOMEM; - device_for_each_child_node(&pdev->dev, child) { - if (fwnode_property_present(child, "gpio-controller")) - continue; - - ret = ma35_pinctrl_parse_functions(to_of_node(child), npctl, idx++); + for_each_gpiochip_node(dev, child) { + ret = ma35_pinctrl_parse_functions(child, npctl, idx++); if (ret) { fwnode_handle_put(child); dev_err(&pdev->dev, "failed to parse function\n"); @@ -1139,7 +1138,7 @@ int ma35_pinctrl_probe(struct platform_device *pdev, const struct ma35_pinctrl_s npctl->info = info; npctl->dev = &pdev->dev; - npctl->regmap = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "nuvoton,sys"); + npctl->regmap = syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sys"); if (IS_ERR(npctl->regmap)) return dev_err_probe(&pdev->dev, PTR_ERR(npctl->regmap), "No syscfg phandle specified\n"); diff --git a/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c b/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c index 8bb9a5a35954..eafa06ca0879 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c +++ b/drivers/pinctrl/nuvoton/pinctrl-ma35d1.c @@ -9,7 +9,6 @@ #include #include #include -#include #include #include diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index c6b11a198c76..d9245aa55d65 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -7,10 +7,8 @@ #include #include #include +#include #include -#include -#include -#include #include #include #include @@ -1839,15 +1837,7 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) int id = 0; for_each_gpiochip_node(dev, child) { - struct device_node *np = to_of_node(child); - - ret = of_address_to_resource(np, 0, &res); - if (ret < 0) { - dev_err(dev, "Resource fail for GPIO bank %u\n", id); - return ret; - } - - pctrl->gpio_bank[id].base = ioremap(res.start, resource_size(&res)); + pctrl->gpio_bank[id].base = fwnode_iomap(child, 0); if (!pctrl->gpio_bank[id].base) return -EINVAL; @@ -1869,7 +1859,7 @@ static int npcm7xx_gpio_of(struct npcm7xx_pinctrl *pctrl) return ret; } - ret = irq_of_parse_and_map(np, 0); + ret = fwnode_irq_get(child, 0); if (!ret) { dev_err(dev, "No IRQ for GPIO bank %u\n", id); return -EINVAL; diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index 7c37d2cda9f1..4410077615df 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -2421,7 +2421,7 @@ static int npcm8xx_pinctrl_probe(struct platform_device *pdev) platform_set_drvdata(pdev, pctrl); pctrl->gcr_regmap = - syscon_regmap_lookup_by_phandle(dev->of_node, "nuvoton,sysgcr"); + syscon_regmap_lookup_by_phandle(dev_of_node(dev), "nuvoton,sysgcr"); if (IS_ERR(pctrl->gcr_regmap)) return dev_err_probe(dev, PTR_ERR(pctrl->gcr_regmap), "Failed to find nuvoton,sysgcr property\n");