From patchwork Thu Oct 24 15:13:22 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 177531 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2330340ill; Thu, 24 Oct 2019 08:15:15 -0700 (PDT) X-Google-Smtp-Source: APXvYqz7I2zEhgVV+KziMfVUnq43ZDJ2IrGdXcPE0NOjMMCn4xZJxkb/bkY/XXdbSt6nER0J+iEb X-Received: by 2002:a17:906:e57:: with SMTP id q23mr11985623eji.303.1571930115818; Thu, 24 Oct 2019 08:15:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571930115; cv=none; d=google.com; s=arc-20160816; b=RZ0Xf1GEqrRU15ZQjo4EwCuM8CkEW5gBaW8kjA9ghYmYNZDlqEbYbbz9p/+7y08+Pl 7EuwwLXcSbG0YgyxBdQzH42/dkX3ZrocY23Nalkj1BY7X4grjCbW9Hz6SqYi93cOY7mO gWhVWMP84s1tfuvyUy+cVPUm3d5XfNR90Oa2edoEhckgMMc528XlLgQgUMuvnGArrZlo 9MmkieQaQj0MBYBvgBKYeJYUOq9BTR3VdOFqcsiWJGnxzpoZMfas7adJUdWeJfl1sHPc nWQrWpAuSdoju0hrADZ0vugPke8PcKqAQNrWYp/M7gk+TAZKzhv2gVQOKrHBsaDjiGIi Ikqg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=iAgomrDaaw+p9SyPDKe+DIwZEIKyPHeJdp6rMCsSqrc=; b=icqkEWJJbYAXnOVH8WQjSWG+UH6MFanc3KMY/nS/f/2yu7/8eJV5sJ8gCDhov2Wjtm qVkVDiUV6d4WizUCZP6qvHBO2i8cPvuqEFStt4smCaQtjvF2bXsqx47jm/DchdpEsUt3 i+pD034EcuRvDwb9Bls/D4ajBoZ5I2M8CBsUf8lSvY/yDt9rZzxBTiJOQG2pGt2ndmjg vnYKhKFKcL8yXtM73Dt49zk9ymQEWeRG75ztAmhRxYWMzY/D1gHVQKmDNeK7UrCVAhgB Ka1Srsuw7lsR/z3aoNtYl4pPBYkwv59R4r0KgU6Bs1mFParoVk/B2X/3vEQ9j2n5GtG+ Cquw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=P5Z9s7tQ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[45.56.119.157]) by smtp.gmail.com with ESMTPSA id l5sm4346073qtj.52.2019.10.24.08.14.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Oct 2019 08:15:08 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Coresight ML , Robert Walker Cc: Leo Yan Subject: [PATCH v1 1/4] perf cs-etm: Continuously record last branches Date: Thu, 24 Oct 2019 23:13:22 +0800 Message-Id: <20191024151325.28623-2-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024151325.28623-1-leo.yan@linaro.org> References: <20191024151325.28623-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Every time synthesize instruction sample, the last branches recording will be reset. This would be fine if the instruction period is big enough, for example if we use the option '--itrace=i100000', the last branch array is reset for every instruction sample (10000 instructions per period); before generate the next instruction sample, there has the enough packets coming to fill last branch array. On the other hand, if set a very small period, the packets will be significantly reduced between two continuous instruction samples, thus if the last branch array is reset for the previous instruction sample, it's almost empty for the next instruction sample. To allow the last branches to work for any instruction periods, this patch avoids to reset the last branches for every instruction sample and only reset it when flush the trace data. The last branches will be reset only for two cases, one is for trace starting, another case is for discontinuous trace; thus it can continuously record last branches. Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index f5f855fff412..8be6d010ae84 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -1153,9 +1153,6 @@ static int cs_etm__synth_instruction_sample(struct cs_etm_queue *etmq, "CS ETM Trace: failed to deliver instruction event, error %d\n", ret); - if (etm->synth_opts.last_branch) - cs_etm__reset_last_branch_rb(tidq); - return ret; } @@ -1486,6 +1483,10 @@ static int cs_etm__flush(struct cs_etm_queue *etmq, tidq->prev_packet = tmp; } + /* Reset last branches after flush the trace */ + if (etm->synth_opts.last_branch) + cs_etm__reset_last_branch_rb(tidq); + return err; } From patchwork Thu Oct 24 15:13:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 177532 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2330559ill; Thu, 24 Oct 2019 08:15:24 -0700 (PDT) X-Google-Smtp-Source: APXvYqzuLJFX6EocgGWFUL1yeLC7MkhhCYbGIFD8cJUtpKxKnMpQnRpHYFXSGz63IfUAwhP2R/b1 X-Received: by 2002:a05:6402:1212:: with SMTP id c18mr3783205edw.166.1571930124577; Thu, 24 Oct 2019 08:15:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571930124; cv=none; d=google.com; s=arc-20160816; b=fWg87y4uiP8BM6Saa1otDSCZZkZf8fVH+LIoAJ/zIrJAjSF/wMfRYGiBzYAT6raKOY Wl9KAdHJucDgmTOg4Bd4mJ7YCNTFldMd0OOqpwRXUVKskskZXjl+Xx7Lz7m4WXjBxKLw vJuNMBdCrl+XJ5JSViFDldq/EBjFlNgo5/oDNgpQ46k+X//C06cuw3OORuy+IRRTecDt a4Fv2/duEpVqwmW0rp3fZmsegn2eMI0BsdRPegbyH70SRNdBgKll0Zw441ei89oo79Z7 Qd6PaZ9yfA14RJXJdS3Jg7j/OlsNmpKFLf4Vqg4bbk5O5mb46nLWteDTtae/G9uBJtlx V3UA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=gsFY1KIx9iJYif7vQxfbD15FpxrJSPWH13lYc5zzTiA=; b=Bm1Rbd9pLam0IblBToh4Nhtw7RqdX7TVu+VXv6h7Wo1VRhZH9gYQjEErdw8N/ernyL 65bY1f8NwsNDQ8Acf0eJgP95q9tjb4GdRqeEKGSuJ5GWVGeuhhz31JQ27be00C+z0xG6 UV5dJbaf2UCBfUUMXyelVrTdpEVlX38eQw0pM8eIe8am11EZXmA8dSSe05GaiInQEX5l rzae2vTLREZnjzZCJBb5LEbZrb58HNm4JCpcN9nWF3Q3b8F9WGCNdM09cEqFePchZ72q YxpwW9pjh8EHxJF0/xz0J9sPy7EUTxy3yj0WTd0VzWEhgDGwoSLrNB/nLnxY9ljlAUZJ 8rJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=v5d5gNh+; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[45.56.119.157]) by smtp.gmail.com with ESMTPSA id l5sm4346073qtj.52.2019.10.24.08.15.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Oct 2019 08:15:17 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Coresight ML , Robert Walker Cc: Leo Yan Subject: [PATCH v1 2/4] perf cs-etm: Correct synthesizing instruction samples Date: Thu, 24 Oct 2019 23:13:23 +0800 Message-Id: <20191024151325.28623-3-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024151325.28623-1-leo.yan@linaro.org> References: <20191024151325.28623-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org When 'etm->instructions_sample_period' is less than 'tidq->period_instructions', the function cs_etm__sample() cannot handle this case properly with its logic. Let's see below flow as an example: - If we set itrace option '--itrace=i4', then function cs_etm__sample() has variables with initialized values: tidq->period_instructions = 0 etm->instructions_sample_period = 4 - When the first packet is coming: packet->instr_count = 10; the number of instructions executed in this packet is 10, thus update period_instructions as below: tidq->period_instructions = 0 + 10 = 10 instrs_over = 10 - 4 = 6 offset = 10 - 6 - 1 = 3 tidq->period_instructions = instrs_over = 6 - When the second packet is coming: packet->instr_count = 10; in the second pass, assume 10 instructions in the trace sample again: tidq->period_instructions = 6 + 10 = 16 instrs_over = 16 - 4 = 12 offset = 10 - 12 - 1 = -3 -> the negative value tidq->period_instructions = instrs_over = 12 So after handle these two packets, there have below issues: The first issue is that cs_etm__instr_addr() returns the address within the current trace sample of the instruction related to offset, so the offset is supposed to be always unsigned value. But in fact, function cs_etm__sample() might calculate a negative offset value (in handling the second packet, the offset is -3) and pass to cs_etm__instr_addr() with u64 type with a big positive integer. The second issue is it only synthesizes 2 samples for sample period = 4. In theory, every packet has 10 instructions so the two packets have total 20 instructions, 20 instructions should generate 5 samples (4 x 5 = 20). This is because cs_etm__sample() only calls once cs_etm__synth_instruction_sample() to generate instruction sample per range packet. This patch fixes the logic in function cs_etm__sample(); the basic idea is to divide into three parts for handling coming packet: - The first part is for synthesizing the first instruction sample, it combines the instructions from the tail of previous packet and the instructions from the head of the new packet; - The second part is to simply generate samples with sample period aligned; - The third part is the tail of new packet, the rest instructions will be left to next time handling with sequential packet. Suggested-by: Mike Leach Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 106 ++++++++++++++++++++++++++++++++++----- 1 file changed, 93 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 8be6d010ae84..8e9eb7583bcd 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -1360,23 +1360,103 @@ static int cs_etm__sample(struct cs_etm_queue *etmq, * TODO: allow period to be defined in cycles and clock time */ - /* Get number of instructions executed after the sample point */ - u64 instrs_over = tidq->period_instructions - - etm->instructions_sample_period; + /* + * Below diagram is used to demonstrate the instruction samples + * generation flows: + * + * Instrs Instrs Instrs Instrs + * Sample(n) Sample(n+1) Sample(n+2) Sample(n+3) + * | | | | + * V V V V + * -------------------------------------------------- + * ^ ^ + * | | + * Period Period + * instructions(Pi) instructions(Pi') + * + * | | + * \---------------- -----------------/ + * V + * instrs_executed + * + * When the new instruction packet is coming, period + * instructions (Pi) contains the the number of instructions + * executed after the sample point(n). So for the next sample + * point(n+1), it is combined the two parts instructions, one + * is the tail of the old packet and another is the head of + * the new coming packet. So we use 'head' variable to cauclate + * the instruction numbers in the new packet for sample(n+1). + * + * For sample(n+2) and sample(n+3), they consume the instruction + * for sample period, so we directly generate samples based on + * the sampe period. + * + * After sample(n+3), there still leave some instructions which + * will be used by later packet; so we use 'instrs_over' to + * track the rest instruction number and its final value + * presents the tail of the packet, it will be assigned to + * 'tidq->period_instructions' for next round calculation. + */ + u64 head, offset = 0; + u64 addr; /* - * Calculate the address of the sampled instruction (-1 as - * sample is reported as though instruction has just been - * executed, but PC has not advanced to next instruction) + * 'instrs_over' is the number of instructions executed after + * sample points, initialise it to 'instrs_executed' and will + * decrease it for consumed instructions in every synthesized + * instruction sample. */ - u64 offset = (instrs_executed - instrs_over - 1); - u64 addr = cs_etm__instr_addr(etmq, trace_chan_id, - tidq->packet, offset); + u64 instrs_over = instrs_executed; - ret = cs_etm__synth_instruction_sample( - etmq, tidq, addr, etm->instructions_sample_period); - if (ret) - return ret; + /* + * 'head' is the instructions number of the head in the new + * packet, it combines with the tail of previous packet to + * generate a sample. So 'head' uses the sample period to + * decrease the instruction number introduced by the previous + * packet. + */ + head = etm->instructions_sample_period - + (tidq->period_instructions - instrs_executed); + + if (head) { + offset = head; + + /* + * Calculate the address of the sampled instruction (-1 + * as sample is reported as though instruction has just + * been executed, but PC has not advanced to next + * instruction) + */ + addr = cs_etm__instr_addr(etmq, trace_chan_id, + tidq->packet, offset - 1); + ret = cs_etm__synth_instruction_sample( + etmq, tidq, addr, + etm->instructions_sample_period); + if (ret) + return ret; + + instrs_over -= head; + } + + while (instrs_over >= etm->instructions_sample_period) { + offset += etm->instructions_sample_period; + + /* + * Calculate the address of the sampled instruction (-1 + * as sample is reported as though instruction has just + * been executed, but PC has not advanced to next + * instruction) + */ + addr = cs_etm__instr_addr(etmq, trace_chan_id, + tidq->packet, offset - 1); + ret = cs_etm__synth_instruction_sample( + etmq, tidq, addr, + etm->instructions_sample_period); + if (ret) + return ret; + + instrs_over -= etm->instructions_sample_period; + } /* Carry remaining instructions into next sample period */ tidq->period_instructions = instrs_over; From patchwork Thu Oct 24 15:13:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 177533 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2330819ill; Thu, 24 Oct 2019 08:15:34 -0700 (PDT) X-Google-Smtp-Source: APXvYqwfM3eurikNb6g08Wj9ntGiWAy15HmwQWztWWiu3+ihOyIX3QBDwTSMZoNL/F5+DtNpizPH X-Received: by 2002:a50:cc43:: with SMTP id n3mr44860147edi.287.1571930134814; Thu, 24 Oct 2019 08:15:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571930134; cv=none; d=google.com; s=arc-20160816; b=SQlHSz2ZcPtQItmEbsNJQOfD7R1DxgIiTbeaP8t3qWORNdupeZZAcJMtMXTdwriLln gG4aKxjO6boD4pI182HTFRC8NgTM4SepXP0iiPxr0nntXlg3+n/TelsVki7zMDvWdjGi 2AGS02fmfMLPC9ytDQ96upbYBHpGvHupKpQYQUxO8upZfFBk+ruYueINC7h1PRL8ZPYU wIoY/NfFR+VS9qcmgUkPRWPh5qCzVstFA875ts6fKXuDAmaNC9ViG5FnQi0sKh0NqJa7 IyFo0rN4lOz5o9FcMi6UYo/IchCzymAXjADHeRi1q4BA+EunDBVkALoSsybHWwC1lC1i 1plg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=2+8OeCtlRuFQGQZkXW2FoUzBMjUDZlZhy5R5fOMQGeQ=; b=pDYtGbR4FOSEOcqQvn9BNixPIVq0aHqOzMwm4JQzW+mCRkY00qAwOWFPzJHGUPxHTo i0ynpveJNXMr57ND5QNjkmWRXeUAYkDulXKP8Uh3csb8NTH0a07tfdxv90Cq8t1qBj8k xpPldrVvCgwQRHfs02yW+VP6hhBaFb6XSi7YwFv1tDJ1w0kmT4F0vwB7aRhansrR40dt xCXtKscN6xA11OwSaYKyW35TcVFMTIeU3PbuderwiUP5Y8vubKUFJ7icebwVWk+kWKi7 yX0ME1gApScoi2hJ2iE+VHZ7hfLOV60VmHtrXU9IIvbEbTCuwOoLEzpKNuGLdoqhhQcU O+yA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="PSwpr/P5"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[45.56.119.157]) by smtp.gmail.com with ESMTPSA id l5sm4346073qtj.52.2019.10.24.08.15.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Oct 2019 08:15:26 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Coresight ML , Robert Walker Cc: Leo Yan Subject: [PATCH v1 3/4] perf cs-etm: Optimize copying last branches Date: Thu, 24 Oct 2019 23:13:24 +0800 Message-Id: <20191024151325.28623-4-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024151325.28623-1-leo.yan@linaro.org> References: <20191024151325.28623-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org If an instruction range packet can generate multiple instruction samples, these samples share the same last branches; it's not necessary to copy the same last branches repeatedly for these samples within the same packet. This patch moves out the last branches copying from function cs_etm__synth_instruction_sample(), and execute it once prior to generating instruction samples. Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index 8e9eb7583bcd..d9a857abaca8 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -1134,10 +1134,8 @@ static int cs_etm__synth_instruction_sample(struct cs_etm_queue *etmq, cs_etm__copy_insn(etmq, tidq->trace_chan_id, tidq->packet, &sample); - if (etm->synth_opts.last_branch) { - cs_etm__copy_last_branch_rb(etmq, tidq); + if (etm->synth_opts.last_branch) sample.branch_stack = tidq->last_branch; - } if (etm->synth_opts.inject) { ret = cs_etm__inject_event(event, &sample, @@ -1408,6 +1406,10 @@ static int cs_etm__sample(struct cs_etm_queue *etmq, */ u64 instrs_over = instrs_executed; + /* Prepare last branches for instruction sample */ + if (etm->synth_opts.last_branch) + cs_etm__copy_last_branch_rb(etmq, tidq); + /* * 'head' is the instructions number of the head in the new * packet, it combines with the tail of previous packet to @@ -1526,6 +1528,11 @@ static int cs_etm__flush(struct cs_etm_queue *etmq, if (etmq->etm->synth_opts.last_branch && tidq->prev_packet->sample_type == CS_ETM_RANGE) { + u64 addr; + + /* Prepare last branches for instruction sample */ + cs_etm__copy_last_branch_rb(etmq, tidq); + /* * Generate a last branch event for the branches left in the * circular buffer at the end of the trace. @@ -1533,7 +1540,7 @@ static int cs_etm__flush(struct cs_etm_queue *etmq, * Use the address of the end of the last reported execution * range */ - u64 addr = cs_etm__last_executed_instr(tidq->prev_packet); + addr = cs_etm__last_executed_instr(tidq->prev_packet); err = cs_etm__synth_instruction_sample( etmq, tidq, addr, @@ -1586,11 +1593,16 @@ static int cs_etm__end_block(struct cs_etm_queue *etmq, */ if (etmq->etm->synth_opts.last_branch && tidq->prev_packet->sample_type == CS_ETM_RANGE) { + u64 addr; + + /* Prepare last branches for instruction sample */ + cs_etm__copy_last_branch_rb(etmq, tidq); + /* * Use the address of the end of the last reported execution * range. */ - u64 addr = cs_etm__last_executed_instr(tidq->prev_packet); + addr = cs_etm__last_executed_instr(tidq->prev_packet); err = cs_etm__synth_instruction_sample( etmq, tidq, addr, From patchwork Thu Oct 24 15:13:25 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 177534 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp2331047ill; Thu, 24 Oct 2019 08:15:44 -0700 (PDT) X-Google-Smtp-Source: APXvYqx7WnVZaR3U7b+l9dCY5uHR+ZyMmpQKnjwXz2W0o7/D9f5YT6wLawf1bLUSEHSYrnn7HU5d X-Received: by 2002:a17:906:f2d4:: with SMTP id gz20mr4269424ejb.215.1571930144427; Thu, 24 Oct 2019 08:15:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571930144; cv=none; d=google.com; s=arc-20160816; b=l0nLwhjmyeSnSKMMtCqJbpYCHGssUHw2gtL4kFfGwI537bor6iNGG92LAZzt7Fb631 btLsYNN/et9vIm7ZANZl56zCiHhzKsEZTu/nFWztVS3aX3aVVtTyGJf90Rn31gbGLABW GkPcoEhvelkxtAgn6EYX4xKN9NvM9fpjiWMM/Xfc2CfRBC+g74GLmhcIoprGr2mklNbj uShEKZUeQwQ4o+PfN5zmrvBR98n4/f9TOSbHAVS3II0IhmucNXG5uGQRxSg0P3dXx/Aw giehBZwUR4zPOVMWcT2EkpRJJWgKmgGUJMe2FISjVL+sM2WSNGndHOjGNkN+x3kEwQEM 5ksQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=+iIRtubR+3wcJynWU+Kes2QJp/E/y+xxgrhDiusBOkw=; b=StH9LrXFpaE3x5xzB+ijMP+Vq3JcaF7Eh1VyE3aqlpEh2kJQYi1xpuax+K0hON8Zks 3GjzGFcAcsvJVaYDdsfRhc6yekJdLRWdmVJgitTImrHLYcDruIhvVnmwbHmJFh2IvWrQ pg3hAGX9WopDlJ1fc7oaGbuZ53kkLhdzVKGe7lAQpCPEg0sE1wrlMpEWcWwUdJG2lS7r k0D2ec5zFjAp9kPdssTpXcznv5ni0WX1VbooSwnWR2mw63Jc5eksziiTZuXE3e3DcYZF DhjLH5Odq07j71NrHjLKg/Xdhwxe7RvCSqa+Jcv8IPI7v72LpL/I5mJW6ihPF1S7pGBq QvxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KhtIu0dC; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[45.56.119.157]) by smtp.gmail.com with ESMTPSA id l5sm4346073qtj.52.2019.10.24.08.15.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 24 Oct 2019 08:15:37 -0700 (PDT) From: Leo Yan To: Arnaldo Carvalho de Melo , Mathieu Poirier , Suzuki K Poulose , Peter Zijlstra , Ingo Molnar , Mark Rutland , Alexander Shishkin , Jiri Olsa , Namhyung Kim , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Coresight ML , Robert Walker Cc: Leo Yan Subject: [PATCH v1 4/4] perf cs-etm: Fix unsigned variable comparison to zero Date: Thu, 24 Oct 2019 23:13:25 +0800 Message-Id: <20191024151325.28623-5-leo.yan@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191024151325.28623-1-leo.yan@linaro.org> References: <20191024151325.28623-1-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The variable 'offset' in function cs_etm__sample() is u64 type, it's not appropriate to check it with 'while (offset > 0)'; this patch changes to 'while (offset)'. Signed-off-by: Leo Yan --- tools/perf/util/cs-etm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index d9a857abaca8..52fe7d6d4f29 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -945,7 +945,7 @@ static inline u64 cs_etm__instr_addr(struct cs_etm_queue *etmq, if (packet->isa == CS_ETM_ISA_T32) { u64 addr = packet->start_addr; - while (offset > 0) { + while (offset) { addr += cs_etm__t32_instr_size(etmq, trace_chan_id, addr); offset--;