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[209.132.180.67]) by mx.google.com with ESMTP id m9si4055588ejo.46.2019.10.31.11.38.26; Thu, 31 Oct 2019 11:38:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Cx/HLdHQ"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729477AbfJaSiW (ORCPT + 26 others); Thu, 31 Oct 2019 14:38:22 -0400 Received: from mail-pl1-f195.google.com ([209.85.214.195]:39010 "EHLO mail-pl1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729465AbfJaSiV (ORCPT ); Thu, 31 Oct 2019 14:38:21 -0400 Received: by mail-pl1-f195.google.com with SMTP id t12so3069014plo.6 for ; Thu, 31 Oct 2019 11:38:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=o1n3hiXAD5eewTTz2SUMbD7SrZji7TFMiwE3m9ZwcRg=; b=Cx/HLdHQ71EgUyen7jjcTL35DuT+MEdayqwMwbnKEzc8pczQ0bf+EbUJO77lvObl1K O0RCQhGwXm+3v77SLAc/cQEgirwHgV006dJDN4VhQicyTnvB0XFmRURl84/dIvGOObhG eiE9WCAYPRgJjKsOrqd02VkO6DcWk2eI1XABGsf8nMffMMO2cxSuTwWtDpWnkx88HNaj qilbj0fkx4sMBbrwE6Xygy1TD3u6+xj7M3AsIUBGPdzqgTfKQtyOMdNOM4y4dA8dtZiS QIjWF5uReMlWhnY0AQjwct20EZPHBlJKHy1SHASQutNOEJWePzyMdSVhwn6A07r7cUu7 1SJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=o1n3hiXAD5eewTTz2SUMbD7SrZji7TFMiwE3m9ZwcRg=; b=KhX0aO+RHQ7bCgHaSRHTW+XOzXRnuTE8UciDUNwD42uOv7YPJY1geUQKnyx4JaA9om G2xx/PZgBRu3qvffBIwIBXr5Dhy4mCWwiRRbLNv6J/K5ZFjo4ghNXQ7fdrtQECnR0EI7 VzSZhu9fcCHCwsA2VbjVPvUOmz3sZS2vKTpqRU1XlUFDS7v4NgcFCZd/T5sSVDGUFtsZ o/5Qakh/uNJtAZNTym0veurF9FMInVe4nRrg5UyuwITGbf6WLIA1U2tpKZ9lX1c47RMb 5hudPoGBjSWFrtqXySZ6JSJQTZ3gGxj0RXtG8dPSLgy4oUf4TZstXVdy/yG4+9KOATlK pKqQ== X-Gm-Message-State: APjAAAVKZzpTwBLeO/n4feItAvrhv3smzCCNIZopE51D1OWgOUt72mKe yUOMoZ+VJaJ3YdypOOvFFPJHj1BLpkw4aQ== X-Received: by 2002:a17:902:a584:: with SMTP id az4mr7817983plb.74.1572547100293; Thu, 31 Oct 2019 11:38:20 -0700 (PDT) Received: from localhost ([49.248.58.234]) by smtp.gmail.com with ESMTPSA id l93sm7482988pjb.6.2019.10.31.11.38.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 31 Oct 2019 11:38:19 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, agross@kernel.org, masneyb@onstation.org, swboyd@chromium.org, julia.lawall@lip6.fr, Amit Kucheria , Daniel Lezcano , Mark Rutland , Rob Herring , Zhang Rui Cc: linux-pm@vger.kernel.org, devicetree@vger.kernel.org Subject: [PATCH v7 07/15] dt-bindings: thermal: tsens: Convert over to a yaml schema Date: Fri, 1 Nov 2019 00:07:31 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Older IP only supports the 'uplow' interrupt, but newer IP supports 'uplow' and 'critical' interrupts. Document interrupt support in the tsens driver by converting over to a YAML schema. Suggested-by: Stephen Boyd Signed-off-by: Amit Kucheria Reviewed-by: Rob Herring --- .../bindings/thermal/qcom-tsens.txt | 55 ------ .../bindings/thermal/qcom-tsens.yaml | 168 ++++++++++++++++++ MAINTAINERS | 1 + 3 files changed, 169 insertions(+), 55 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/qcom-tsens.txt create mode 100644 Documentation/devicetree/bindings/thermal/qcom-tsens.yaml -- 2.17.1 diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt b/Documentation/devicetree/bindings/thermal/qcom-tsens.txt deleted file mode 100644 index 673cc1831ee9..000000000000 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.txt +++ /dev/null @@ -1,55 +0,0 @@ -* QCOM SoC Temperature Sensor (TSENS) - -Required properties: -- compatible: - Must be one of the following: - - "qcom,msm8916-tsens" (MSM8916) - - "qcom,msm8974-tsens" (MSM8974) - - "qcom,msm8996-tsens" (MSM8996) - - "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404) - - "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998) - - "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845) - The generic "qcom,tsens-v2" property must be used as a fallback for any SoC - with version 2 of the TSENS IP. MSM8996 is the only exception because the - generic property did not exist when support was added. - Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for - any SoC with version 1 of the TSENS IP. - -- reg: Address range of the thermal registers. - New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM - register spaces separately, with order being TM before SROT. - See Example 2, below. - -- #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. -- #qcom,sensors: Number of sensors in tsens block -- Refer to Documentation/devicetree/bindings/nvmem/nvmem.txt to know how to specify -nvmem cells - -Example 1 (legacy support before a fallback tsens-v2 property was introduced): -tsens: thermal-sensor@900000 { - compatible = "qcom,msm8916-tsens"; - reg = <0x4a8000 0x2000>; - nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; - nvmem-cell-names = "caldata", "calsel"; - #thermal-sensor-cells = <1>; - }; - -Example 2 (for any platform containing v2 of the TSENS IP): -tsens0: thermal-sensor@c263000 { - compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; - reg = <0xc263000 0x1ff>, /* TM */ - <0xc222000 0x1ff>; /* SROT */ - #qcom,sensors = <13>; - #thermal-sensor-cells = <1>; - }; - -Example 3 (for any platform containing v1 of the TSENS IP): -tsens: thermal-sensor@4a9000 { - compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; - reg = <0x004a9000 0x1000>, /* TM */ - <0x004a8000 0x1000>; /* SROT */ - nvmem-cells = <&tsens_caldata>; - nvmem-cell-names = "calib"; - #qcom,sensors = <10>; - #thermal-sensor-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml new file mode 100644 index 000000000000..23afc7bf5a44 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml @@ -0,0 +1,168 @@ +# SPDX-License-Identifier: (GPL-2.0 OR MIT) +# Copyright 2019 Linaro Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: QCOM SoC Temperature Sensor (TSENS) + +maintainers: + - Amit Kucheria + +description: | + QCOM SoCs have TSENS IP to allow temperature measurement. There are currently + three distinct major versions of the IP that is supported by a single driver. + The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures + everything before v1 when there was no versioning information. + +properties: + compatible: + oneOf: + - description: v0.1 of TSENS + items: + - enum: + - qcom,msm8916-tsens + - qcom,msm8974-tsens + - const: qcom,tsens-v0_1 + + - description: v1 of TSENS + items: + - enum: + - qcom,qcs404-tsens + - const: qcom,tsens-v1 + + - description: v2 of TSENS + items: + - enum: + - qcom,msm8996-tsens + - qcom,msm8998-tsens + - qcom,sdm845-tsens + - const: qcom,tsens-v2 + + reg: + maxItems: 2 + items: + - description: TM registers + - description: SROT registers + + nvmem-cells: + minItems: 1 + maxItems: 2 + description: + Reference to an nvmem node for the calibration data + + nvmem-cells-names: + minItems: 1 + maxItems: 2 + items: + - enum: + - caldata + - calsel + + "#qcom,sensors": + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - minimum: 1 + - maximum: 16 + description: + Number of sensors enabled on this platform + + "#thermal-sensor-cells": + const: 1 + description: + Number of cells required to uniquely identify the thermal sensors. Since + we have multiple sensors this is set to 1 + +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8916-tsens + - qcom,msm8974-tsens + - qcom,qcs404-tsens + - qcom,tsens-v0_1 + - qcom,tsens-v1 + then: + properties: + interrupts: + items: + - description: Combined interrupt if upper or lower threshold crossed + interrupt-names: + items: + - const: uplow + + else: + properties: + interrupts: + items: + - description: Combined interrupt if upper or lower threshold crossed + - description: Interrupt if critical threshold crossed + interrupt-names: + items: + - const: uplow + - const: critical + +required: + - compatible + - reg + - "#qcom,sensors" + - interrupts + - interrupt-names + - "#thermal-sensor-cells" + +examples: + - | + #include + // Example 1 (legacy: for pre v1 IP): + tsens1: thermal-sensor@900000 { + compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1"; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ + + nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; + nvmem-cell-names = "caldata", "calsel"; + + interrupts = ; + interrupt-names = "uplow"; + + #qcom,sensors = <5>; + #thermal-sensor-cells = <1>; + }; + + - | + #include + // Example 2 (for any platform containing v1 of the TSENS IP): + tsens2: thermal-sensor@4a9000 { + compatible = "qcom,qcs404-tsens", "qcom,tsens-v1"; + reg = <0x004a9000 0x1000>, /* TM */ + <0x004a8000 0x1000>; /* SROT */ + + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "calib"; + + interrupts = ; + interrupt-names = "uplow"; + + #qcom,sensors = <10>; + #thermal-sensor-cells = <1>; + }; + + - | + #include + // Example 3 (for any platform containing v2 of the TSENS IP): + tsens3: thermal-sensor@c263000 { + compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; + reg = <0xc263000 0x1ff>, + <0xc222000 0x1ff>; + + interrupts = , + ; + interrupt-names = "uplow", "critical"; + + #qcom,sensors = <13>; + #thermal-sensor-cells = <1>; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index a69e6db80c79..c4df814b87b0 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13513,6 +13513,7 @@ L: linux-pm@vger.kernel.org L: linux-arm-msm@vger.kernel.org S: Maintained F: drivers/thermal/qcom/ +F: Documentation/devicetree/bindings/thermal/qcom-tsens.yaml QUALCOMM VENUS VIDEO ACCELERATOR DRIVER M: Stanimir Varbanov From patchwork Thu Oct 31 18:37:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 178228 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3243206ill; Thu, 31 Oct 2019 11:38:43 -0700 (PDT) X-Google-Smtp-Source: APXvYqzcOnCH37Uc5S4wjWjHLcVeR9EjmmoOzJzVcky6DTZT1kSG/fLdC6N0u4iYuHzG9BckYtSu X-Received: by 2002:a17:906:4cca:: with SMTP id q10mr5524395ejt.242.1572547123438; Thu, 31 Oct 2019 11:38:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572547123; cv=none; d=google.com; s=arc-20160816; b=amL6zq+NNXg1K9cvl1RdFysqV4XdsDdrHCcrf67JS4Nn6S2IjUn/p4gg3B8GCn6YEa Q3Xi1baTNdIdr6TdTjgDWzC9EoK6saXpIeuDXLcru368Kb9SW65O4lp+1N1emEjp96LJ HNfbW8Rvaar/SPOwKoPjSvVejJt6yQkOfR1UgmIpg2id8ytciiDOOgJHbNpo3/WKJ2rZ zmOdWHqnVIm0mvVDCA0w7wB+Uq10kITbSWmVbF4gcKoUWq5RK9W/rrEqdIXbztph4nS1 zKFxJsl6fhKVXY0pGgwR1lPOI/UO69yf8fd3qfcRr23l8cGNDFp/cWtXUc1kflwhW0TF XaeQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=aMdrJzILxuSr5g6YT+uoh2+W6L6BuGxRIbKk0lFLJqE=; b=oFWZQQYF2iQMTNa82DyJ/AoKbSicCxb8N2q/F6/NTwhXUFINrP6z8DyKDdDSMBdI42 sKeNfIgnxWH04KJC62ggLuw33rVWJ2MOmjTFAbOtDwqzmn+Jdz2nrk3kbuj3tHMjj/Qn 73O9BTa2a5b6G09YkC+TA7tYITD5uEKaC0MGwDbXR7YXbdpl6nOr1kuiXYZpHGxCXqxa iTfVRWnunqZV7o3huY8P952kh1OxTfzufbY8NN6V9EIFFW24WVcft6z7IKWv8u12ixRK SwpVvTB18DY6EEewAWmbPAv+6G9GDEzPKvuMGCOJrF7HR37oqJgX1dQN+s7gJwVFxDp5 yT9A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ky5zw8Br; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Amit Kucheria --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index a97eeb4569c0..b6a4e6073936 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -290,6 +290,8 @@ nvmem-cells = <&tsens_caldata>; nvmem-cell-names = "calib"; #qcom,sensors = <10>; + interrupts = ; + interrupt-names = "uplow"; #thermal-sensor-cells = <1>; }; From patchwork Thu Oct 31 18:37:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 178229 Delivered-To: patch@linaro.org Received: by 2002:a92:409a:0:0:0:0:0 with SMTP id d26csp3243264ill; Thu, 31 Oct 2019 11:38:46 -0700 (PDT) X-Google-Smtp-Source: APXvYqwf2CoJnCB9k3sPYirYFfo7K0YJk+jmOxROaMxSGSNcZiEdCG5rRjPZNkSPvIFg6UXUxgat X-Received: by 2002:a17:906:694e:: with SMTP id c14mr5864558ejs.122.1572547126792; Thu, 31 Oct 2019 11:38:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1572547126; cv=none; d=google.com; s=arc-20160816; b=XvPJj17M1GsMCz33UrZyVqEgBoYC/Raal6Z49QiYv8fHWNcvc3ctuOw60mNTjynYm+ tBdB+nkdBpJx6H0r0oo09iNJcCrjU3IdsjCwdCRVH2zhNPipgTaRJNbMuZOrs1vFEj0T VQZ01CdDVqKaA6XLyIqIioUMRWGHgYanT7nhMEJOERk63rr3LgCW7uEw6QsbS+oQEBUk GKB5mXygiG67gWxrtBb5ulAIlzc5Zl0qtG5QKMabpR1gEYs1Qjp8j4S8n4g/n0HGaad1 UST9YOX/ViwZqd6RJQm6ZZQTJea7alct/AslojXNqW0XhNMUmhww2hNtrHSxK0dM+48h IgOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature; bh=K+JloZswXmm4BpvcNOHfxY9LNAmaq3HM2wD0uVSFvPc=; b=B2HMBAxaPunhFFYSjUu4tAbUZ5pMkT1qL6fCwqkK0/mz11x0ioazDQ5kdrypY3/1y7 NGHILAKGdZlLUGY8uaZomDcqnKkmSuC1Z5bS1nN8gWJUaLsiBNSgDBGXY7nBJjVhvm+4 dhaEJAzSLCM+/KQsQHypsPTdFJi22FSRUPaZ8287da/ltl6juvVGlalS3DGbYIr47H4X hRmYXDlcIsg+OmlyYC+n+5qFIEKyPGzbhYz4bRAMo5ZXITMPUz7LGgyZrtrEfaz0rIWE cow4azpyEgGZn8Jy+QkNY7X+TEBQfOVPOX/sLB4OryJ1PZKHdYxGNWR6Wa6qbAHuZWAG Mjaw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KSZdj1zJ; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Amit Kucheria Tested-by: Brian Masney --- arch/arm/boot/dts/qcom-msm8974.dtsi | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 33c534370fd5..c1a3a7d7161c 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -531,6 +531,8 @@ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; #qcom,sensors = <11>; + interrupts = ; + interrupt-names = "uplow"; #thermal-sensor-cells = <1>; };