From patchwork Fri Jul 19 05:33:11 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricky WU X-Patchwork-Id: 813688 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7288246444; Fri, 19 Jul 2024 05:33:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367230; cv=none; b=ra72rH3pQSVp8y8V1hinu3ts5n1qznb9FlleUToH7bTHmxpzZ20LxRJQpWoILRahkxC9oBjQ4kGAdYR9mUgv1lNF2IxFEyZ1j9RifDWBhLsodOFSUryqBxL4y+Te0GgFWdF6F/2p2MjCMoo9C76OvfCNQluRPOK3yoRrjrafMNQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367230; c=relaxed/simple; bh=Ui4JdZdhYe/R+P21rObK4HF8jfZm3mjt8VmpAS+Cf3k=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=NTl0G1cH3UOvGNbuhnI89NmlLHdaUHikb2YXDJxr3qCTUZjsV4woRxQld53fqv1cfxBxE97//FT6y+fqytEiwmrT3LN7FEuwiGD8wku1cgLmTGovlav27Ify1jCESducFNNCk01/so2+Gxa+LmmdO36t+CMliRS5WI81mOmGm+E= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b=tn5agpD0; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b="tn5agpD0" X-SpamFilter-By: ArmorX SpamTrap 5.78 with qID 46J5XPH30148364, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=realtek.com; s=dkim; t=1721367205; bh=Ui4JdZdhYe/R+P21rObK4HF8jfZm3mjt8VmpAS+Cf3k=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=tn5agpD0oQFDs71XYWaVfQGdXf/Oo5mIi2fkOmvxVR6Ydp3KEQpbhgg8xhrpd3y8J g1ldyuoS3dI2M+pImMsHwjjAcePWPusUWLbMvr/80hv8bUwKqn+hOH9zrvPEAMKkOn FitpKlHj0sWKQhH0KH6Ui/yuEcjE9a8r+bi/bXKGp9BjblP2dUtx6K/x5/SlX0UIvP 4t1JBuNM0waJi4lqMZZZYqpv0CajG3qeeixQqcUYPGUoUqcOiVS3W6JtFje//tlpmB fsyUWlhiOuySxaYtUaZx0anxKSjACkgpkXjCxvIplsUJWmqFK4Lzhm5sOn3UZmTM+N z9Pk0RaBWXPOA== Received: from mail.realtek.com (rtexh36506.realtek.com.tw[172.21.6.27]) by rtits2.realtek.com.tw (8.15.2/3.02/5.92) with ESMTPS id 46J5XPH30148364 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Jul 2024 13:33:25 +0800 Received: from RTEXMBS01.realtek.com.tw (172.21.6.94) by RTEXH36506.realtek.com.tw (172.21.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 19 Jul 2024 13:33:25 +0800 Received: from localhost (172.22.81.102) by RTEXMBS01.realtek.com.tw (172.21.6.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Fri, 19 Jul 2024 13:33:25 +0800 From: Ricky Wu To: , , , , , , Subject: [PATCH 1/4] mmc: core: some definitions and type modifications for SDUC Date: Fri, 19 Jul 2024 13:33:11 +0800 Message-ID: <20240719053314.1636649-2-ricky_wu@realtek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240719053314.1636649-1-ricky_wu@realtek.com> References: <20240719053314.1636649-1-ricky_wu@realtek.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: RTEXH36506.realtek.com.tw (172.21.6.27) To RTEXMBS01.realtek.com.tw (172.21.6.94) X-KSE-ServerInfo: RTEXMBS01.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback Modified some type from "unsigned int" to "unsigned long long" because SDUC need more bits address Add some definitions for support SDUC Add pointer ae(Address extension) to know support SDUC or not Signed-off-by: Ricky Wu --- drivers/mmc/core/card.h | 3 +++ drivers/mmc/core/core.h | 6 +++--- drivers/mmc/core/host.h | 5 +++++ drivers/mmc/core/queue.h | 1 + include/linux/mmc/card.h | 2 +- include/linux/mmc/core.h | 1 + include/linux/mmc/host.h | 1 + include/linux/mmc/sd.h | 5 +++++ 8 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/mmc/core/card.h b/drivers/mmc/core/card.h index b7754a1b8d97..9b7f6804851f 100644 --- a/drivers/mmc/core/card.h +++ b/drivers/mmc/core/card.h @@ -23,11 +23,13 @@ #define MMC_CARD_SDXC (1<<3) /* card is SDXC */ #define MMC_CARD_REMOVED (1<<4) /* card has been removed */ #define MMC_STATE_SUSPENDED (1<<5) /* card is suspended */ +#define MMC_CARD_SDUC (1<<6) /* card is SDUC */ #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) #define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) +#define mmc_card_ultra_capacity(c) ((c)->state & MMC_CARD_SDUC) #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) @@ -35,6 +37,7 @@ #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) #define mmc_card_set_blockaddr(c) ((c)->state |= MMC_STATE_BLOCKADDR) #define mmc_card_set_ext_capacity(c) ((c)->state |= MMC_CARD_SDXC) +#define mmc_card_set_ultra_capacity(c) ((c)->state |= MMC_CARD_SDUC) #define mmc_card_set_removed(c) ((c)->state |= MMC_CARD_REMOVED) #define mmc_card_set_suspended(c) ((c)->state |= MMC_STATE_SUSPENDED) #define mmc_card_clr_suspended(c) ((c)->state &= ~MMC_STATE_SUSPENDED) diff --git a/drivers/mmc/core/core.h b/drivers/mmc/core/core.h index 37091a6589ed..6c927ee60cef 100644 --- a/drivers/mmc/core/core.h +++ b/drivers/mmc/core/core.h @@ -116,15 +116,15 @@ bool mmc_is_req_done(struct mmc_host *host, struct mmc_request *mrq); int mmc_start_request(struct mmc_host *host, struct mmc_request *mrq); -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, unsigned long long from, unsigned long long nr, unsigned int arg); int mmc_can_erase(struct mmc_card *card); int mmc_can_trim(struct mmc_card *card); int mmc_can_discard(struct mmc_card *card); int mmc_can_sanitize(struct mmc_card *card); int mmc_can_secure_erase_trim(struct mmc_card *card); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, - unsigned int nr); +int mmc_erase_group_aligned(struct mmc_card *card, unsigned long long from, + unsigned long long nr); unsigned int mmc_calc_max_discard(struct mmc_card *card); int mmc_set_blocklen(struct mmc_card *card, unsigned int blocklen); diff --git a/drivers/mmc/core/host.h b/drivers/mmc/core/host.h index 48c4952512a5..82381ad76fe0 100644 --- a/drivers/mmc/core/host.h +++ b/drivers/mmc/core/host.h @@ -89,5 +89,10 @@ static inline bool mmc_card_sd_express(struct mmc_host *host) host->ios.timing == MMC_TIMING_SD_EXP_1_2V; } +static inline bool mmc_host_sduc(struct mmc_host *host) +{ + return host->caps2 & MMC_CAP2_SDUC; +} + #endif diff --git a/drivers/mmc/core/queue.h b/drivers/mmc/core/queue.h index 9ade3bcbb714..448caff7eae4 100644 --- a/drivers/mmc/core/queue.h +++ b/drivers/mmc/core/queue.h @@ -40,6 +40,7 @@ struct mmc_blk_ioc_data; struct mmc_blk_request { struct mmc_request mrq; struct mmc_command sbc; + struct mmc_command ae; struct mmc_command cmd; struct mmc_command stop; struct mmc_data data; diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h index f34407cc2788..8943ca0c4991 100644 --- a/include/linux/mmc/card.h +++ b/include/linux/mmc/card.h @@ -35,7 +35,7 @@ struct mmc_csd { unsigned int wp_grp_size; unsigned int read_blkbits; unsigned int write_blkbits; - unsigned int capacity; + unsigned long long capacity; unsigned int read_partial:1, read_misalign:1, write_partial:1, diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h index 2c7928a50907..781999a7a1f2 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h @@ -142,6 +142,7 @@ struct mmc_data { struct mmc_host; struct mmc_request { struct mmc_command *sbc; /* SET_BLOCK_COUNT for multiblock */ + struct mmc_command *ae; /* ADDR_EXT for SDUC */ struct mmc_command *cmd; struct mmc_data *data; struct mmc_command *stop; diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 88c6a76042ee..763fb6771653 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h @@ -427,6 +427,7 @@ struct mmc_host { #define MMC_CAP2_CRYPTO 0 #endif #define MMC_CAP2_ALT_GPT_TEGRA (1 << 28) /* Host with eMMC that has GPT entry at a non-standard location */ +#define MMC_CAP2_SDUC (1 << 29) int fixed_drv_type; /* fixed driver type for non-removable media */ diff --git a/include/linux/mmc/sd.h b/include/linux/mmc/sd.h index 6727576a8755..5173d7d54923 100644 --- a/include/linux/mmc/sd.h +++ b/include/linux/mmc/sd.h @@ -15,6 +15,9 @@ #define SD_SEND_IF_COND 8 /* bcr [11:0] See below R7 */ #define SD_SWITCH_VOLTAGE 11 /* ac R1 */ + /* class 2 */ +#define SD_ADDR_EXT 22 /* ac [5:0] extended addr R1 */ + /* class 10 */ #define SD_SWITCH 6 /* adtc [31:0] See below R1 */ @@ -36,6 +39,8 @@ /* OCR bit definitions */ #define SD_OCR_S18R (1 << 24) /* 1.8V switching request */ #define SD_ROCR_S18A SD_OCR_S18R /* 1.8V switching accepted by card */ +#define SD_OCR_HO2T (1 << 27) /* Over 2TB Supported Host */ +#define SD_ROCR_CO2T SD_OCR_HO2T /* Over 2TB Card */ #define SD_OCR_XPC (1 << 28) /* SDXC power control */ #define SD_OCR_CCS (1 << 30) /* Card Capacity Status */ From patchwork Fri Jul 19 05:33:12 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricky WU X-Patchwork-Id: 813689 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 728AC4776E; Fri, 19 Jul 2024 05:33:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367229; cv=none; b=QKcP/+JvUujCU3QmwJgp/IUXDy+mXK7vIXKtrSq1PjLxQjuA5Nt+BbtvR0tm3fAd0FZxr3zh7wybKHG/VhHFFTWgWbxvMmRexBWjTeTgKVxEwmMNGycapK5vMXvX5fzcYi+nxXwopZmTHW4Rvgc84nYWJESQ+m+1CwgBg5P6BVU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367229; c=relaxed/simple; bh=dl0QUWK3QTDbPixrI8aQO7THm5bx5rlBeqEnBnLZRj0=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=sClSNBxbxlpsXshWraLyb2AGvE5U+v6x0B6kWdKvCil72rH6dxo2KUz7NwuGVEuR1h20cnXbVWu8j1wExBoXChjARoQya2jLCA4psVTxxAF02UWAkPHSVtjCT2cdWXlCbYJdPETTO0fizdHc+X4alxKGFFZvO9DOQ7Bx0RzrTqc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b=nAgy2Wyx; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b="nAgy2Wyx" X-SpamFilter-By: ArmorX SpamTrap 5.78 with qID 46J5XSHw8148394, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=realtek.com; s=dkim; t=1721367208; bh=dl0QUWK3QTDbPixrI8aQO7THm5bx5rlBeqEnBnLZRj0=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=nAgy2Wyxq2SINUZ959x4wPdBbwovwrzknmfEeiY737gdXd2+hHxP5zPHRxe6uRXQb J97cIKKEraLIhMxMNMgUmuGDC8mL4TDRtba0Zc6EhtkcmxtBiF1B3bx1apYFR8Vk8+ ldyy4O9qxPfPfSJji9coKW46XEFKTqpRwfRKameGgghvS7lahWZi1Nj3VaV4X74lfh IG4msc7Tyr+AL5yzCKKj6jDzDPWu3exIxQlVGGGYFz+OA327NFDRYCSzSfxBQ8fZ7n 7jeICMEjOXqlEz6su7L6QaecnUlfVD7PPsqy8oXNSIRLwKkMzXZ98nhXDxAOb5Gnwy rBGlT0vm++J8g== Received: from mail.realtek.com (rtexh36505.realtek.com.tw[172.21.6.25]) by rtits2.realtek.com.tw (8.15.2/3.02/5.92) with ESMTPS id 46J5XSHw8148394 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Jul 2024 13:33:28 +0800 Received: from RTEXMBS01.realtek.com.tw (172.21.6.94) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 19 Jul 2024 13:33:29 +0800 Received: from localhost (172.22.81.102) by RTEXMBS01.realtek.com.tw (172.21.6.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Fri, 19 Jul 2024 13:33:28 +0800 From: Ricky Wu To: , , , , , , Subject: [PATCH 2/4] mmc: core: add SDUC init rw erase flow to mmc Date: Fri, 19 Jul 2024 13:33:12 +0800 Message-ID: <20240719053314.1636649-3-ricky_wu@realtek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240719053314.1636649-1-ricky_wu@realtek.com> References: <20240719053314.1636649-1-ricky_wu@realtek.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: RTEXH36506.realtek.com.tw (172.21.6.27) To RTEXMBS01.realtek.com.tw (172.21.6.94) X-KSE-ServerInfo: RTEXMBS01.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback According SD spec (5.2[2]) to do SDUC support 1)Mutual identification of SDUC in ACMD41 initialization (5.2.1[2]) sd.c mmc_sd_get_cid(): if the host support SDUC set HO2T to ocr mmc_sd_init_card(): if the card rsp support SDUC by CO2T, do mmc_card_set_ultra_capacity() 2)SDUC card user area capacity calculation (5.2.2[2]) sd.c mmc_decode_csd(): Add the SDUC card csd parser 3)Memory read/write commands sequence (5.2.3[2]) block.c mmc_blk_rw_rq_prep(): Prepare CMD22 for the SDUC card R/W 4)Erase Commands Sequence (5.2.4[2]) core.c Add CMD22 to erase flow for the SDUC card 5)Card type bus.c mmc_add_card(): Add SDUC to type if the card is SDUC card Signed-off-by: Ricky Wu --- drivers/mmc/core/block.c | 13 +++++++++-- drivers/mmc/core/bus.c | 4 +++- drivers/mmc/core/core.c | 38 ++++++++++++++++++++++---------- drivers/mmc/core/sd.c | 47 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 88 insertions(+), 14 deletions(-) diff --git a/drivers/mmc/core/block.c b/drivers/mmc/core/block.c index 367509b5b646..45c06055882a 100644 --- a/drivers/mmc/core/block.c +++ b/drivers/mmc/core/block.c @@ -1153,7 +1153,7 @@ static void mmc_blk_issue_erase_rq(struct mmc_queue *mq, struct request *req, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr; + unsigned long long from, nr; int err = 0; blk_status_t status = BLK_STS_OK; @@ -1208,7 +1208,7 @@ static void mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, { struct mmc_blk_data *md = mq->blkdata; struct mmc_card *card = md->queue.card; - unsigned int from, nr, arg; + unsigned long long from, nr, arg; int err = 0, type = MMC_BLK_SECDISCARD; blk_status_t status = BLK_STS_OK; @@ -1713,6 +1713,15 @@ static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq, brq->sbc.flags = MMC_RSP_R1 | MMC_CMD_AC; brq->mrq.sbc = &brq->sbc; } + + if (mmc_card_ultra_capacity(card)) { + brq->ae.opcode = SD_ADDR_EXT; + brq->ae.arg = (blk_rq_pos(req) >> 32) & 0x3F; + brq->ae.flags = MMC_RSP_R1 | MMC_CMD_AC; + brq->mrq.ae = &brq->ae; + } else { + brq->mrq.ae = NULL; + } } #define MMC_MAX_RETRIES 5 diff --git a/drivers/mmc/core/bus.c b/drivers/mmc/core/bus.c index 0ddaee0eae54..2356f404374c 100644 --- a/drivers/mmc/core/bus.c +++ b/drivers/mmc/core/bus.c @@ -321,7 +321,9 @@ int mmc_add_card(struct mmc_card *card) case MMC_TYPE_SD: type = "SD"; if (mmc_card_blockaddr(card)) { - if (mmc_card_ext_capacity(card)) + if (mmc_card_ultra_capacity(card)) + type = "SDUC"; + else if (mmc_card_ext_capacity(card)) type = "SDXC"; else type = "SDHC"; diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index a8c17b4cd737..23effc691833 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c @@ -1598,8 +1598,8 @@ static unsigned int mmc_erase_timeout(struct mmc_card *card, return mmc_mmc_erase_timeout(card, arg, qty); } -static int mmc_do_erase(struct mmc_card *card, unsigned int from, - unsigned int to, unsigned int arg) +static int mmc_do_erase(struct mmc_card *card, unsigned long long from, + unsigned long long to, unsigned int arg) { struct mmc_command cmd = {}; unsigned int qty = 0, busy_timeout = 0; @@ -1638,6 +1638,14 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, to <<= 9; } + if (mmc_card_ultra_capacity(card)) { + cmd.opcode = SD_ADDR_EXT; + cmd.arg = (from >> 32) & 0x3F; + cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; + err = mmc_wait_for_cmd(card->host, &cmd, 0); + } + + memset(&cmd, 0, sizeof(struct mmc_command)); if (mmc_card_sd(card)) cmd.opcode = SD_ERASE_WR_BLK_START; else @@ -1652,6 +1660,14 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, goto out; } + memset(&cmd, 0, sizeof(struct mmc_command)); + if (mmc_card_ultra_capacity(card)) { + cmd.opcode = SD_ADDR_EXT; + cmd.arg = (to >> 32) & 0x3F; + cmd.flags = MMC_RSP_R1 | MMC_CMD_AC; + err = mmc_wait_for_cmd(card->host, &cmd, 0); + } + memset(&cmd, 0, sizeof(struct mmc_command)); if (mmc_card_sd(card)) cmd.opcode = SD_ERASE_WR_BLK_END; @@ -1700,18 +1716,18 @@ static int mmc_do_erase(struct mmc_card *card, unsigned int from, } static unsigned int mmc_align_erase_size(struct mmc_card *card, - unsigned int *from, - unsigned int *to, - unsigned int nr) + unsigned long long *from, + unsigned long long *to, + unsigned long long nr) { - unsigned int from_new = *from, nr_new = nr, rem; + unsigned long long from_new = *from, nr_new = nr, rem; /* * When the 'card->erase_size' is power of 2, we can use round_up/down() * to align the erase size efficiently. */ if (is_power_of_2(card->erase_size)) { - unsigned int temp = from_new; + unsigned long long temp = from_new; from_new = round_up(temp, card->erase_size); rem = from_new - temp; @@ -1756,10 +1772,10 @@ static unsigned int mmc_align_erase_size(struct mmc_card *card, * * Caller must claim host before calling this function. */ -int mmc_erase(struct mmc_card *card, unsigned int from, unsigned int nr, +int mmc_erase(struct mmc_card *card, unsigned long long from, unsigned long long nr, unsigned int arg) { - unsigned int rem, to = from + nr; + unsigned long long rem, to = from + nr; int err; if (!(card->csd.cmdclass & CCC_ERASE)) @@ -1863,8 +1879,8 @@ int mmc_can_secure_erase_trim(struct mmc_card *card) } EXPORT_SYMBOL(mmc_can_secure_erase_trim); -int mmc_erase_group_aligned(struct mmc_card *card, unsigned int from, - unsigned int nr) +int mmc_erase_group_aligned(struct mmc_card *card, unsigned long long from, + unsigned long long nr) { if (!card->erase_size) return 0; diff --git a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c index 1c8148cdda50..7eacfd912dff 100644 --- a/drivers/mmc/core/sd.c +++ b/drivers/mmc/core/sd.c @@ -121,6 +121,12 @@ static int mmc_decode_csd(struct mmc_card *card) csd_struct = UNSTUFF_BITS(resp, 126, 2); + if (csd_struct != 2 && mmc_card_ultra_capacity(card)) { + pr_err("%s: invalid CSD structure version %d on SDUC\n", + mmc_hostname(card->host), csd_struct); + return -EINVAL; + } + switch (csd_struct) { case 0: m = UNSTUFF_BITS(resp, 115, 4); @@ -190,6 +196,35 @@ static int mmc_decode_csd(struct mmc_card *card) csd->write_partial = 0; csd->erase_size = 1; + if (UNSTUFF_BITS(resp, 13, 1)) + mmc_card_set_readonly(card); + break; + case 2: + /* + * This is a block-addressed SDUC card. + */ + mmc_card_set_blockaddr(card); + + csd->taac_ns = 0; /* Unused */ + csd->taac_clks = 0; /* Unused */ + + m = UNSTUFF_BITS(resp, 99, 4); + e = UNSTUFF_BITS(resp, 96, 3); + csd->max_dtr = tran_exp[e] * tran_mant[m]; + csd->cmdclass = UNSTUFF_BITS(resp, 84, 12); + csd->c_size = UNSTUFF_BITS(resp, 48, 28); + m = UNSTUFF_BITS(resp, 48, 28); + csd->capacity = (unsigned long long)(1 + m) << 10; + + csd->read_blkbits = 9; + csd->read_partial = 0; + csd->write_misalign = 0; + csd->read_misalign = 0; + csd->r2w_factor = 4; /* Unused */ + csd->write_blkbits = 9; + csd->write_partial = 0; + csd->erase_size = 1; + if (UNSTUFF_BITS(resp, 13, 1)) mmc_card_set_readonly(card); break; @@ -859,6 +894,14 @@ int mmc_sd_get_cid(struct mmc_host *host, u32 ocr, u32 *cid, u32 *rocr) if (max_current > 150) ocr |= SD_OCR_XPC; + /* + * To avoid data corruption via address space mismatch, mutual + * recognition mechanism is implemented via ACMD41 initialization, + * If the host support SDUC card, HO2T should be set to 1. + */ + if (mmc_host_sduc(host)) + ocr |= SD_OCR_HO2T; + err = mmc_send_app_op_cond(host, ocr, rocr); if (err) return err; @@ -1433,6 +1476,10 @@ static int mmc_sd_init_card(struct mmc_host *host, u32 ocr, card->ocr = ocr; card->type = MMC_TYPE_SD; + + if (!mmc_host_is_spi(host) && (rocr & SD_ROCR_CO2T)) + mmc_card_set_ultra_capacity(card); + memcpy(card->raw_cid, cid, sizeof(card->raw_cid)); } From patchwork Fri Jul 19 05:33:13 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricky WU X-Patchwork-Id: 813505 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1661647A4C; Fri, 19 Jul 2024 05:33:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367231; cv=none; b=WCItxIQ3FShoHlcNsHgd9n0BWQBkfpAwPFP95+WpU473k5u2vZS9XuCFWR9u66ADVWBHYswuSUqNjJT8RXzcv8DVxd3X0WwjnSmeA7QO2wofVt7pgWpVfTUv2BfqpaUTI54HFk3TlgK4WI/PdigxZjEsBfjkDBz58wwEQwmqsU4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367231; c=relaxed/simple; bh=EKC8vxwZdPdFVnf/xaq9SKigBmIV5g23J/ARvrurlpE=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=E8PP5Qywxt2w0abCUuM1qLzc1Rub7zS3sf8XsBypCaFElObEhIfzZNk2MNtFKRdaA5lWxGxypZ4F0vszFZmVSZciqfUic8slTwthKAU1QDTdPtqHVUoc7QUhQzn1Pd7rT8Ty4gXUzE4NQLGXP1BIjWsu+2No9/bq6PnCoscPkIA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b=px0qfYkG; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b="px0qfYkG" X-SpamFilter-By: ArmorX SpamTrap 5.78 with qID 46J5XV5M0148411, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=realtek.com; s=dkim; t=1721367211; bh=EKC8vxwZdPdFVnf/xaq9SKigBmIV5g23J/ARvrurlpE=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=px0qfYkGLokDDTfT6Al7u4JUV21kvnxNZ+klMw/9MJXsCm3s4nkIbFFisZaAk8UFe Ys5GJlUvr98Kti3suJL2072qeC0Sl3FxZvr9Mmr4nkkF/g47MDY1OVXoVPu4B+WFjw tHolYOcycjhLT2kULioN5OBguh0QJOzgufUwxousuoKWeD295cBt3rlWYJ3vP1B3ml cTUJpi1329B+/00N5lXq+QMmmDleU2C+5PzYgjqcAzE0ZkbSnNsLVWdfOHEEDJdlQ1 d4VguPvXzEb9dPuSra3GSuGxBcXrYTb7rtS35V0SmKn2TlSoUWupV6HKOt7mofLRgh PnL6sl96Qi21g== Received: from mail.realtek.com (rtexh36506.realtek.com.tw[172.21.6.27]) by rtits2.realtek.com.tw (8.15.2/3.02/5.92) with ESMTPS id 46J5XV5M0148411 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Jul 2024 13:33:31 +0800 Received: from RTEXMBS01.realtek.com.tw (172.21.6.94) by RTEXH36506.realtek.com.tw (172.21.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 19 Jul 2024 13:33:32 +0800 Received: from localhost (172.22.81.102) by RTEXMBS01.realtek.com.tw (172.21.6.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Fri, 19 Jul 2024 13:33:31 +0800 From: Ricky Wu To: , , , , , , Subject: [PATCH 3/4] mmc: rtsx: make Realtek sdmmc to support SDUC Date: Fri, 19 Jul 2024 13:33:13 +0800 Message-ID: <20240719053314.1636649-4-ricky_wu@realtek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240719053314.1636649-1-ricky_wu@realtek.com> References: <20240719053314.1636649-1-ricky_wu@realtek.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: RTEXH36506.realtek.com.tw (172.21.6.27) To RTEXMBS01.realtek.com.tw (172.21.6.94) X-KSE-ServerInfo: RTEXMBS01.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback Add Realtek sdmmc host to support SDUC Send CMD22 before normal read/write when the card is SDUC card Add MMC_CAP2_SDUC to caps2 Signed-off-by: Ricky Wu --- drivers/mmc/host/rtsx_pci_sdmmc.c | 6 ++++++ include/linux/rtsx_pci.h | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/mmc/host/rtsx_pci_sdmmc.c b/drivers/mmc/host/rtsx_pci_sdmmc.c index 7dfe7c4e0077..919aa0454345 100644 --- a/drivers/mmc/host/rtsx_pci_sdmmc.c +++ b/drivers/mmc/host/rtsx_pci_sdmmc.c @@ -839,6 +839,8 @@ static void sd_request(struct work_struct *work) if (!data_size) { sd_send_cmd_get_rsp(host, cmd); } else if (sd_rw_cmd(cmd) || sdio_extblock_cmd(cmd, data)) { + if (mrq->ae) + sd_send_cmd_get_rsp(host, mrq->ae); cmd->error = sd_rw_multi(host, mrq); if (!host->using_cookie) sdmmc_post_req(host->mmc, host->mrq, 0); @@ -846,6 +848,8 @@ static void sd_request(struct work_struct *work) if (mmc_op_multi(cmd->opcode) && mrq->stop) sd_send_cmd_get_rsp(host, mrq->stop); } else { + if (mrq->ae) + sd_send_cmd_get_rsp(host, mrq->ae); sd_normal_rw(host, mrq); } @@ -1445,6 +1449,8 @@ static void init_extra_caps(struct realtek_pci_sdmmc *host) mmc->caps2 |= MMC_CAP2_NO_MMC; if (pcr->extra_caps & EXTRA_CAPS_SD_EXPRESS) mmc->caps2 |= MMC_CAP2_SD_EXP | MMC_CAP2_SD_EXP_1_2V; + if (pcr->extra_caps & EXTRA_CAPS_SDUC) + mmc->caps2 |= MMC_CAP2_SDUC; } static void realtek_init_host(struct realtek_pci_sdmmc *host) diff --git a/include/linux/rtsx_pci.h b/include/linux/rtsx_pci.h index 4612ef09a0c7..a36c87a52f39 100644 --- a/include/linux/rtsx_pci.h +++ b/include/linux/rtsx_pci.h @@ -1228,6 +1228,7 @@ struct rtsx_pcr { #define EXTRA_CAPS_MMC_8BIT (1 << 5) #define EXTRA_CAPS_NO_MMC (1 << 7) #define EXTRA_CAPS_SD_EXPRESS (1 << 8) +#define EXTRA_CAPS_SDUC (1 << 9) u32 extra_caps; #define IC_VER_A 0 From patchwork Fri Jul 19 05:33:14 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricky WU X-Patchwork-Id: 813506 Received: from rtits2.realtek.com.tw (rtits2.realtek.com [211.75.126.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7281846426; Fri, 19 Jul 2024 05:33:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.75.126.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367230; cv=none; b=mJjc01vmiKKq6xRMXLjTjqEDwHJipwL0gB5bGyJJNpfj7Jkdy5pJbghcvRu6MUAvFfBeSCu55+ktafmhGxAyh15JRu2Xj5+rTI3IRz+haKpoiOpkPp9qGIk6a6z8ZXGPGOr7s7sh2cVZ+kWv9EXAll80KW4pUNWkqJ30ANH6120= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721367230; c=relaxed/simple; bh=IY2J+0vdYsWdvNxxBAMhcfSEOBsFNWQkJPdds8HbbeQ=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=jXeS17vgg4p6qBuw17GVeiiPNPwRi6TT+3A0hYEmweWoBXLnS+3AjgWxKwy4q/adPUHZVAlk1lMtOu2CZI6qfWL7vzYfGAmne6YwdBv8lKPszpgXFPyOG1Y7uMROhEQ/aNw+jCuUK/VyEqPqyk2swz259f3Gzn25Af5yHEg7KEI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com; spf=pass smtp.mailfrom=realtek.com; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b=cltnpI3W; arc=none smtp.client-ip=211.75.126.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=realtek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=realtek.com Authentication-Results: smtp.subspace.kernel.org; dkim=temperror (0-bit key) header.d=realtek.com header.i=@realtek.com header.b="cltnpI3W" X-SpamFilter-By: ArmorX SpamTrap 5.78 with qID 46J5XZHl8148586, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=realtek.com; s=dkim; t=1721367215; bh=IY2J+0vdYsWdvNxxBAMhcfSEOBsFNWQkJPdds8HbbeQ=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=cltnpI3WtBNq3Zp3BnS50K2F+LN2UbVHX6SFCkWIV3EB5LpbbSdY9KgkU0RD6Ql/c L06qXJjg+/njLF0T9lRVzoGMnA8zCP9v++y3ITq0wIAqmSIAJYcqpk3uSe9CJMml2A qqNbK/GyJ8dgd7g1OVW4x2OYHjX6vjg8J1g1ZyNCPqOEmcm2vKAq61S6WkNgsKuMLF Ib0ojFU83qBX4huOq1eEc76+8+x/WRi96zNhdlmw6Ay2WtPkvvHDeIhjU7qhHO07/F gwM5zV+hfTYKMdYClehlZNrjt/1WgTgM0eI18KH3/eL5ghx5iUKaId8I2ZINGxxGfZ 1SpRw0X6qG3Jg== Received: from mail.realtek.com (rtexh36505.realtek.com.tw[172.21.6.25]) by rtits2.realtek.com.tw (8.15.2/3.02/5.92) with ESMTPS id 46J5XZHl8148586 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 19 Jul 2024 13:33:35 +0800 Received: from RTEXMBS01.realtek.com.tw (172.21.6.94) by RTEXH36505.realtek.com.tw (172.21.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.39; Fri, 19 Jul 2024 13:33:35 +0800 Received: from localhost (172.22.81.102) by RTEXMBS01.realtek.com.tw (172.21.6.94) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Fri, 19 Jul 2024 13:33:34 +0800 From: Ricky Wu To: , , , , , , Subject: [PATCH 4/4] misc: rtsx: add Realtek card readers to support SDUC Date: Fri, 19 Jul 2024 13:33:14 +0800 Message-ID: <20240719053314.1636649-5-ricky_wu@realtek.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20240719053314.1636649-1-ricky_wu@realtek.com> References: <20240719053314.1636649-1-ricky_wu@realtek.com> Precedence: bulk X-Mailing-List: linux-mmc@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: RTEXH36506.realtek.com.tw (172.21.6.27) To RTEXMBS01.realtek.com.tw (172.21.6.94) X-KSE-ServerInfo: RTEXMBS01.realtek.com.tw, 9 X-KSE-AntiSpam-Interceptor-Info: fallback X-KSE-Antivirus-Interceptor-Info: fallback X-KSE-AntiSpam-Interceptor-Info: fallback Realtek Card readers to support SDUC RTS5227/RTS522A/RTS5249/RTS524A/RTS525A/ RTS5260/RTS5261/RTS5228/RTS5264 Signed-off-by: Ricky Wu --- drivers/misc/cardreader/rts5227.c | 1 + drivers/misc/cardreader/rts5228.c | 1 + drivers/misc/cardreader/rts5249.c | 1 + drivers/misc/cardreader/rts5260.c | 1 + drivers/misc/cardreader/rts5261.c | 1 + drivers/misc/cardreader/rts5264.c | 2 +- 6 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/misc/cardreader/rts5227.c b/drivers/misc/cardreader/rts5227.c index cd512284bfb3..020cc7f7cdc2 100644 --- a/drivers/misc/cardreader/rts5227.c +++ b/drivers/misc/cardreader/rts5227.c @@ -331,6 +331,7 @@ static const u32 rts5227_ms_pull_ctl_disable_tbl[] = { void rts5227_init_params(struct rtsx_pcr *pcr) { pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; + pcr->extra_caps |= EXTRA_CAPS_SDUC; pcr->num_slots = 2; pcr->ops = &rts5227_pcr_ops; diff --git a/drivers/misc/cardreader/rts5228.c b/drivers/misc/cardreader/rts5228.c index 0c7f10bcf6f1..11598adb03c6 100644 --- a/drivers/misc/cardreader/rts5228.c +++ b/drivers/misc/cardreader/rts5228.c @@ -686,6 +686,7 @@ void rts5228_init_params(struct rtsx_pcr *pcr) struct rtsx_hw_param *hw_param = &pcr->hw_param; pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; + pcr->extra_caps |= EXTRA_CAPS_SDUC; pcr->num_slots = 1; pcr->ops = &rts5228_pcr_ops; diff --git a/drivers/misc/cardreader/rts5249.c b/drivers/misc/cardreader/rts5249.c index 6c81040e18be..10c6b97a41e9 100644 --- a/drivers/misc/cardreader/rts5249.c +++ b/drivers/misc/cardreader/rts5249.c @@ -540,6 +540,7 @@ void rts5249_init_params(struct rtsx_pcr *pcr) struct rtsx_cr_option *option = &(pcr->option); pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; + pcr->extra_caps |= EXTRA_CAPS_SDUC; pcr->num_slots = 2; pcr->ops = &rts5249_pcr_ops; diff --git a/drivers/misc/cardreader/rts5260.c b/drivers/misc/cardreader/rts5260.c index d2d3a6ccb8f7..b35914af593b 100644 --- a/drivers/misc/cardreader/rts5260.c +++ b/drivers/misc/cardreader/rts5260.c @@ -586,6 +586,7 @@ void rts5260_init_params(struct rtsx_pcr *pcr) struct rtsx_hw_param *hw_param = &pcr->hw_param; pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; + pcr->extra_caps |= EXTRA_CAPS_SDUC; pcr->num_slots = 2; pcr->flags = 0; diff --git a/drivers/misc/cardreader/rts5261.c b/drivers/misc/cardreader/rts5261.c index 67252512a132..b4faf831ecbd 100644 --- a/drivers/misc/cardreader/rts5261.c +++ b/drivers/misc/cardreader/rts5261.c @@ -766,6 +766,7 @@ void rts5261_init_params(struct rtsx_pcr *pcr) u8 val; pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; + pcr->extra_caps |= EXTRA_CAPS_SDUC; rtsx_pci_read_register(pcr, RTS5261_FW_STATUS, &val); if (!(val & RTS5261_EXPRESS_LINK_FAIL_MASK)) pcr->extra_caps |= EXTRA_CAPS_SD_EXPRESS; diff --git a/drivers/misc/cardreader/rts5264.c b/drivers/misc/cardreader/rts5264.c index 8be4ed7d9d47..bd2ae5c525fb 100644 --- a/drivers/misc/cardreader/rts5264.c +++ b/drivers/misc/cardreader/rts5264.c @@ -845,7 +845,7 @@ void rts5264_init_params(struct rtsx_pcr *pcr) u8 val; pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; - pcr->extra_caps |= EXTRA_CAPS_NO_MMC; + pcr->extra_caps |= EXTRA_CAPS_NO_MMC | EXTRA_CAPS_SDUC; rtsx_pci_read_register(pcr, RTS5264_FW_STATUS, &val); if (!(val & RTS5264_EXPRESS_LINK_FAIL_MASK)) pcr->extra_caps |= EXTRA_CAPS_SD_EXPRESS;