From patchwork Mon Jul 22 09:42:42 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813818 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB03216D4F3; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; cv=none; b=JdpV33aQReP18iGn2l5D4zlqWQJQGbjFHw1cd0yRQB25g7MGDcLFcIJKPkeSSrXjZzeNz0yl+ysBpfb0oNe9qe9myRTMRCxaba7o62xwloGC70CMU82A8xsb7QsH406XtsGxauHDb+t4YUdz6SmsxRjMjl3BqeyVl10IXfqQPBo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; c=relaxed/simple; bh=0uzVyxrhof8AS7od0ldhgHmxH15tqtHgH1PplGp3Hn4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=lYc4EYt4Rkv86g93aBNalIp4APNIf2ku7mvPVmCFDpIdW3Kk2CxHOLCNbvpdchCHlUs7SygFF4FX5HpT6kuBl47DZwTEq3ZtBkZ6xW+dl3/iRQfOE2+Vz00kJksIZRlKi0KSrDYvRJ5kotdQnHVrK2ZOhSGrCBa5Hsb4oxjkozg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=k65hLwwj; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="k65hLwwj" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 7A5A8C4AF0B; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=0uzVyxrhof8AS7od0ldhgHmxH15tqtHgH1PplGp3Hn4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k65hLwwjaKXfYVM7/K8uVXMSt8NkubYvb3D/U/KajWJTen041FIp6904dZL2Voul6 /y7clOC1vTNAR9v1TkBKB3CRGkhvqkZOof5Vwhpu6SnsdNN7ZwMYbZvkhAd0z3VBvm 0swt+YFtrMo2zaI2NzDEW8Cv8o+DoYbo8ZHas/cNxX3SCCZ+3V7izvd/81hC7AJJ3i n7efcAr7JAv3oo8BHhPcfaykywZpkiUwi7A9vDiDyZWdQXhmpDcjtaWV+tG+ygrGNp 2Zp1KRLm88Z6Lnzyzov5GI8T0tDrdtgHcFOpWXLdaL4SzTPRWIB/7dIt9bwBZsZAUX oJlv93WO6vx1w== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uF-1CJ9; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v2 1/8] arm64: dts: qcom: x1e80100-crd: fix PCIe4 PHY supply Date: Mon, 22 Jul 2024 11:42:42 +0200 Message-ID: <20240722094249.26471-2-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The PCIe4 PHY is powered by vreg_l3i (not vreg_l3j). Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") Cc: stable@vger.kernel.org # 6.9 Signed-off-by: Johan Hovold Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index f97c80b4077c..6aa2ec1e7919 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -788,7 +788,7 @@ &pcie4 { }; &pcie4_phy { - vdda-phy-supply = <&vreg_l3j_0p8>; + vdda-phy-supply = <&vreg_l3i_0p8>; vdda-pll-supply = <&vreg_l3e_1p2>; status = "okay"; From patchwork Mon Jul 22 09:42:43 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 814248 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAEBE16D4EF; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; cv=none; b=snSSY8i+DU5MrIxZ1Na+MI7U6CTjoWjz0lfe6xQs3lWmnuxpw2drmClcrI2VF3Bv4uXOiNMgGNyyZhQ1tiylixTfXyx/R9I7t8JcG4aoOrcUxGh9YrQt3lMNkgVnMdGrgAsw6D50dcbvw2Sm3cD48rwlmZslFzarMvhWwy2+9wI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; c=relaxed/simple; bh=rbCdFrpUVOqWgTpBFACmBQDW9GDjMmTwAnryiL78IxM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iRTOiBByxoEzt10eunpBxNOL3EnPvhh8Oa0X2VFsyP2IzQi5il4oFK6kpGhweIu1uDHZEk24GtUPq2zuwY38J56c4KOBY77tMNHkZiRVDA2T3S6D9LjvxXxN4vcPX6s0kuipuu1Zizs41g3dpqejCiayqDju29i/Q/SYXGjr6DI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=j2hYAFdp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="j2hYAFdp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76091C116B1; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=rbCdFrpUVOqWgTpBFACmBQDW9GDjMmTwAnryiL78IxM=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=j2hYAFdpX9JxPaj6t/4uWqzvhaGEWcTJ0PKcBrKqk/BetW9RzR7lgRbqRLPWyo8+t C2m3nfQv7Dl/GKBFeAl1KyQuX54ba9VqXgaA7oSyED+pxxRcgquVTT3Wf1SlNAoovC UgQHhZ35AHq6tAdqPfoBFkvdkkqvtyQvvtdYNLoHqwVzeEJ/oXAIQVySO26CmG5qpC oP73wtdCdFWedHwf17pb7bdig4kvvs09UwyhhmGlvqO4jhl/L1LDY1E3sd6y+tyYUg rBnKhIt07EHRGHY7OaNzqhjELL5/wRfy/E4veqMymm6OHd5aMXHeaXKvaVID19xfVT zqUMBUT8Jb3kg== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uH-1cIK; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v2 2/8] arm64: dts: qcom: x1e80100: fix PCIe domain numbers Date: Mon, 22 Jul 2024 11:42:43 +0200 Message-ID: <20240722094249.26471-3-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The current PCIe domain numbers are off by one and do not match the numbers that the UEFI firmware (and Windows) uses. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: stable@vger.kernel.org # 6.9 Reviewed-by: Konrad Dybcio Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index c7aec564a318..07e00f1d1768 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2916,7 +2916,7 @@ pcie6a: pci@1bf8000 { dma-coherent; - linux,pci-domain = <7>; + linux,pci-domain = <6>; num-lanes = <2>; interrupts = , @@ -3037,7 +3037,7 @@ pcie4: pci@1c08000 { dma-coherent; - linux,pci-domain = <5>; + linux,pci-domain = <4>; num-lanes = <2>; interrupts = , From patchwork Mon Jul 22 09:42:44 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813816 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DAEE916DC37; Mon, 22 Jul 2024 09:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641427; cv=none; b=j0YeWWt6EoSggODkWG6cHO3NiC5FL2XneI+5aIgfd+o4rk6S2UktSDSKIBvRVNnlU9+uQLLZhWS4SZD34mRVbtb1ebTxqKEcxQmEf6cj4Y5UC7+EvzzUG5Qsz5FKDYj1RgxgYxWRTdfrbPriy440oUuptanMxGPRS67aUf2ZeQ4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641427; c=relaxed/simple; bh=KVd5LJQMkq/MHTfJl/SJvOXz9duIgh/Kzu1vZ1euBWA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IxfsP9bosZL3y4sIJ/o0tTS6qsnyu8vmE++GeBXDpMKc7Avf/Qn8vtWzd5YTME+4aJ3r4W5DkQHR/Cle+jL6Dr5MTR0OxRC2uHTN1Wz1WHEc+loiCPj7xnZ0ST0G95HkAucd8iEdXtNtqb+kAdOMEI7q94oCk1v4/QjBo/DoQaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Rq7zL5XP; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Rq7zL5XP" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 75E09C4AF13; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641426; bh=KVd5LJQMkq/MHTfJl/SJvOXz9duIgh/Kzu1vZ1euBWA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Rq7zL5XP03avtdkiF33ZewzYEGmYf7jI1ESMbG0vqvxI5sOeE3JQpmywxcyQCvj2W cFjQFQrgs5x9gxZTXedSL5Jfo3K2kKX+JG5ufUHW1iWIxTbENxqrm7TLbtOZ2gqTRO cOLqeLmrY/OtV++M3Qi6QS5AIXYThTCcbHq2BF33J1bWQmgkY2ia7ccO7QbqvVyLDn XORl3Rx0imhVoESh4UGOKUABCpSRd2Y/bSrBQBZNFCj+W/PD7DJkVp6IKVMn7iUUnO yYIyJZy7ayAeAXDPSNWA9VdUyDIlcDRNKkZudGHN7RwoQXr3GUpxogD10eK9O9popq AKkZHgrfYLHgQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uJ-22og; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v2 3/8] arm64: dts: qcom: x1e80100: add missing PCIe minimum OPP Date: Mon, 22 Jul 2024 11:42:44 +0200 Message-ID: <20240722094249.26471-4-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing PCIe CX performance level votes to avoid relying on other drivers (e.g. USB) to maintain the nominal performance level required for Gen3 speeds. Fixes: 5eb83fc10289 ("arm64: dts: qcom: x1e80100: Add PCIe nodes") Cc: stable@vger.kernel.org # 6.9 Signed-off-by: Johan Hovold Reviewed-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 07e00f1d1768..2c10532d4f60 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -2974,6 +2974,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, "link_down"; power-domains = <&gcc GCC_PCIE_6A_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie6a_phy>; phy-names = "pciephy"; @@ -3095,6 +3096,7 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, "link_down"; power-domains = <&gcc GCC_PCIE_4_GDSC>; + required-opps = <&rpmhpd_opp_nom>; phys = <&pcie4_phy>; phy-names = "pciephy"; From patchwork Mon Jul 22 09:42:45 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813820 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAF4D16D4F0; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; cv=none; b=kC1T5JanKConTUVOvA6hl/H6TACyCC5F/46TrX8XMeYTIHHlq1ZDZ70Za+1lIF+YyU6BCKjjNe9Ngg6qY1MiIBIc31rjFmaLLsJ9IwEX3pclCrYyfHTz3g94amUSd6bup4C3HK/58/3mbRrVEMv2xJ7RyHaZKkM+suuYZWI5940= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; c=relaxed/simple; bh=vWHDPV7SJDyJi0Bd3AA+J+K1tMnD/Z5Sooa8E16YOG0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uFuQiqZt3xS/RsRqtEBMsYi9gMVztwN14R4t+k1BMBFIDIrcV0mYV9UPWEYC3RvUc8zFnLV7DgDzCV95yOMrPFJjbXzLwJjhdCtZmKwDE5XTYK54sLw7ENMe1lTjHfVBT4I0XqLLj/1Zu6yl3Pyt3u7O2y7BlMD0aG3N9ccn/lo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=bo0oopWe; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="bo0oopWe" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 80006C4AF0D; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=vWHDPV7SJDyJi0Bd3AA+J+K1tMnD/Z5Sooa8E16YOG0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bo0oopWeefyiu72mDi/OAiFB/EyKIPaHhTxhcNur+R9NtJY7Zm2ZDA62+DuFs2yLj RNt5eLtnzpxJdsz2ZeOnLeUyNtMGwjpci4P5llQ44DEuhysqLZ8tnkcJBFQs6QRyC3 aQMJEupbvsbARS9696CHmf3cE2mEdYuBvcYrnBy4uqxMBmzABvozMQr8KFt5tEgKaC j1fvoYXFZ7cVVIYTo3E64PFjJ6OkwNhYE9+MSHQ5bLOLBD59Ct3mqcW2i6N/ZD/ff7 NjQ4bKJPC9p04njykjzE7tyF4SxdX14Jd9+q/tl8ThqaYyOs2mZkzpP7KQlFBck5RZ axzTEAqD0g7wA== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uL-2SjK; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 4/8] arm64: dts: qcom: x1e80100-crd: fix up PCIe6a pinctrl node Date: Mon, 22 Jul 2024 11:42:45 +0200 Message-ID: <20240722094249.26471-5-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 The PCIe6a pinctrl node appears to have been copied from the sc8280xp CRD dts, which has the NVMe on pcie2a and uses some funny indentation. Fix up the node name to match the x1e80100 use and label and use only tabs for indentation. Reviewed-by: Konrad Dybcio Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 6aa2ec1e7919..41d05ce01cbb 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -975,7 +975,7 @@ nvme_reg_en: nvme-reg-en-state { bias-disable; }; - pcie6a_default: pcie2a-default-state { + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; function = "pcie6a_clk"; @@ -991,11 +991,11 @@ perst-n-pins { }; wake-n-pins { - pins = "gpio154"; - function = "gpio"; - drive-strength = <2>; - bias-pull-up; - }; + pins = "gpio154"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; }; tpad_default: tpad-default-state { From patchwork Mon Jul 22 09:42:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 814249 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAFE816D4F2; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; cv=none; b=eMjcJoo1mgheGDWAfpwghgVNvK7Jck2VSgVLgNtwstd4p70fmG+yvbTZWg0yQZpz+ii7B7nkm+0LNdEbqXzxrM5lCVY87UCnIO1+c7dKZcQZdkB0QYnKfFlhnh+i5V/7yQzal6PO8NUlCRf62VKbmIy31R4kb9fTisAUSmNoc1c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641425; c=relaxed/simple; bh=dx9tNBl+UYPCzsKMP/noRajlmX+0BV6jW6rXGXxRDDE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=l6MAeQbs2lmTneRA3/5wp2Khw92ghWz79mr45uXZTzj+3Wb/E1ke5i1rhJZYqTQyN44z3+1MiFyf8ghkqyrQkhP05qlwjlNVE8ZV3+dIUZgA2/FruM3shDeizz/DgTrvXumnlGm4TrO0SPOzM0bVJIoZFLcswLZoObIrnjU5sBU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CIkhZVVC; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CIkhZVVC" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 83D1BC4AF10; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=dx9tNBl+UYPCzsKMP/noRajlmX+0BV6jW6rXGXxRDDE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CIkhZVVCCzchnWlu0Bj98FBvXHVPu5yJQWsRAN4g/8wxY1rzZGxOcSbAPeNIF1l55 Ze40jtjmuw1BX5ZUAnyz+y8vre+WgzuJe4sw/F5CPiW7DMkylOP71kyC1RfVJbidAN xSeLIYKC1PJrHeHu2I6mO/T/p70JXaCtBdvWhYY9Lek0FBfmtS4HM/Y+jM3p7Yh/Wn yPhmoCQ4qmz/xYYIoQXMva+iy0LmRCPrBzKnWRzRp65pm2BFd35Ze1HAP6ZMKT5hnl O6P+Pen28vR6VEgOdwUREuof0lwIHmWqqN1xFiuFxz4eCe29fW76k6PUhmtrg+7wmG 46mak6XkhtCGQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uO-2shO; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 5/8] arm64: dts: qcom: x1e80100-crd: disable PCIe6a perst pull down Date: Mon, 22 Jul 2024 11:42:46 +0200 Message-ID: <20240722094249.26471-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Disable the PCIe6a perst pull-down resistor to save some power. Reviewed-by: Konrad Dybcio Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 41d05ce01cbb..7406f1ad9c55 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -987,7 +987,7 @@ perst-n-pins { pins = "gpio152"; function = "gpio"; drive-strength = <2>; - bias-pull-down; + bias-disable; }; wake-n-pins { From patchwork Mon Jul 22 09:42:47 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 813817 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1078016D9A5; Mon, 22 Jul 2024 09:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641426; cv=none; b=d7YNnKVzd138koGHgP8ecP0I87ysLzmExm6NYfN1T3NRWBcGmuUMMR0ys1Gs2+pjtsaR2TkzZ60QxptIk35twpwLb9gBfDx/vz2LwynpNJfmPb814j/6r+pius614CdzoRjdaOM9SRyabOtJJrJBxZru+oB2vbRIbJY4ChnU3+Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641426; c=relaxed/simple; bh=er2Upk0dY6MDGGuVZ64aChnt3Ks9PNTgqtMxvWEr06I=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PYH2GGw+9DxovShGybGkdVjugouOIJuUniHjD4Tg7oNwr+jf+P6r4ZXTHUHMU6gtHpBrns4x5lLHsPWobcYZfz8eqImrpqPFBiD3hw3oD1CsZ3BmdPWGza0rSzcqtpyKEZ3fsaRBf7LZtwlbH6XGBsmFAgp6ijiMjT9FW+w5AUQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=R3glgT7k; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="R3glgT7k" Received: by smtp.kernel.org (Postfix) with ESMTPSA id BE1DCC4AF62; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=er2Upk0dY6MDGGuVZ64aChnt3Ks9PNTgqtMxvWEr06I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=R3glgT7ky2zZua+lNoS/Wv5LbjEDECJCxGZvDHAvIn62NAkaBPTD3XIyH4FkBQddj iG4QlSgL7dJ8xaO1Y1lj6ZxG/gL8D78Rv1kS9WGFlHJ/HaKRxgi7oYbZGN6aPixkAO g4TcxCCTRwdodMT0rGpwo5rKiLbcTD3QkMZW2v4N3P4wkyESmVaqag01CWHQkpKyXL Af7FPiRNpo3XivZRtz1fA0llpLDbeIm925T3jghMksqG0YXsw8/ZNqB8HzxmaEO81Z 1d6eFHIn9J3Wg1LY86AKwzfm59Pl4EJWtHSKuycTfI6BFcb6wRolIt432Dwj8Kcyim uii24pHyWpi9Q== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uQ-3G38; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold , stable@vger.kernel.org Subject: [PATCH v2 6/8] arm64: dts: qcom: x1e80100-crd: fix missing PCIe4 gpios Date: Mon, 22 Jul 2024 11:42:47 +0200 Message-ID: <20240722094249.26471-7-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Add the missing PCIe4 perst, wake and clkreq GPIOs and pin config. Fixes: d7e03cce0400 ("arm64: dts: qcom: x1e80100-crd: Enable more support") Cc: stable@vger.kernel.org # 6.9 Reviewed-by: Konrad Dybcio Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 29 +++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index 7406f1ad9c55..caae0c3d8c7a 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -784,6 +784,12 @@ &mdss_dp3_phy { }; &pcie4 { + perst-gpios = <&tlmm 146 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 148 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&pcie4_default>; + pinctrl-names = "default"; + status = "okay"; }; @@ -975,6 +981,29 @@ nvme_reg_en: nvme-reg-en-state { bias-disable; }; + pcie4_default: pcie4-default-state { + clkreq-n-pins { + pins = "gpio147"; + function = "pcie4_clk"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio146"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wake-n-pins { + pins = "gpio148"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; From patchwork Mon Jul 22 09:42:48 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 814246 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4655816D9C3; Mon, 22 Jul 2024 09:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641426; cv=none; b=ExQaF5+6PWpm4IDIz/ZaaUNq+wYTLxQw69txyfpPTeRjtt5Tiy50+6ywg3mGhGrSMcXBtT91dkD8jfu/V4Kb9gMHHBX4hCVS9EKFvudKkfYkUcx/bVxbBjJctbNZBBZfZ6unSsI7cWG9shJInDQlZJQP8CRQaqfVkviX87R0JfA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1721641426; c=relaxed/simple; bh=Ug8X4WMtUv8ZNb30dneLhKbZIh5vFqz+F1Skjyn9+x8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Xc8qeqbVyGEj7FMETMRz3z9Snm0NY5Bth2TPhi7bkHyTFzrf1vsmaFU90PrtuTpT60UEVTZhZ045JDDYJ4rbuI+FiIdy546fuXGpZNSzj3s14iPCENeXK1UGy5iwe9rnezbr0CrYNpmzSi+PBBX5ceKfY/JIHjJ31X6vGKAX68g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mxt5l6uD; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mxt5l6uD" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B7005C4AF63; Mon, 22 Jul 2024 09:43:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=Ug8X4WMtUv8ZNb30dneLhKbZIh5vFqz+F1Skjyn9+x8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mxt5l6uDNGDhkQMUy6JRo26HkvjYFf6RU/QewWckcrL88Pg/rLaJjjrRyKQuQlwD9 BpG4l0Uugk0IW8gnbKwq11lVQmios9IbYHBq0zhkvxOmIBou/jx5xFE9Nd6DM7PAi9 UI+52FisxqLoVHYR/PTb1Q2HsSp7XvMF7CIfhCuY4iLxdWgdaa5MTHaeU8KE6ELsYt r7voD05A2GnpjsWNLAcLAJLrokbxNO9sJOblCeWVzM26dAMN94mF3KHFw0jZJp1+pF W4ioJBpre4bGpVsY6834MgwfmIKUHhjRkrOL8KJ9HiLOji1heoOJ52oGyqiTRi/N6L DVJ3wSiTrTJTQ== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uS-3fme; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 7/8] arm64: dts: qcom: x1e80100: add PCIe5 nodes Date: Mon, 22 Jul 2024 11:42:48 +0200 Message-ID: <20240722094249.26471-8-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Describe the fifth PCIe controller and its PHY. Note that using the GIC ITS with PCIe5 does not work currently so the ITS mapping is left unspecified for now. Reviewed-by: Konrad Dybcio Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100.dtsi | 122 ++++++++++++++++++++++++- 1 file changed, 121 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi index 2c10532d4f60..2e2b50acfcca 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi @@ -760,7 +760,7 @@ gcc: clock-controller@100000 { <&sleep_clk>, <0>, <&pcie4_phy>, - <0>, + <&pcie5_phy>, <&pcie6a_phy>, <0>, <&usb_1_ss0_qmpphy QMP_USB43DP_USB3_PIPE_CLK>, @@ -3015,6 +3015,126 @@ pcie6a_phy: phy@1bfc000 { status = "disabled"; }; + pcie5: pci@1c00000 { + device_type = "pci"; + compatible = "qcom,pcie-x1e80100"; + reg = <0 0x01c00000 0 0x3000>, + <0 0x7e000000 0 0xf1d>, + <0 0x7e000f40 0 0xa8>, + <0 0x7e001000 0 0x1000>, + <0 0x7e100000 0 0x100000>, + <0 0x01c03000 0 0x1000>; + reg-names = "parf", + "dbi", + "elbi", + "atu", + "config", + "mhi"; + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x01000000 0x0 0x00000000 0x0 0x7e200000 0x0 0x100000>, + <0x02000000 0x0 0x7e300000 0x0 0x7e300000 0x0 0x1d00000>; + bus-range = <0x00 0xff>; + + dma-coherent; + + linux,pci-domain = <5>; + num-lanes = <2>; + + interrupts = , + , + , + , + , + , + , + ; + interrupt-names = "msi0", + "msi1", + "msi2", + "msi3", + "msi4", + "msi5", + "msi6", + "msi7"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0x7>; + interrupt-map = <0 0 0 1 &intc 0 0 0 70 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 2 &intc 0 0 0 71 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 3 &intc 0 0 0 72 IRQ_TYPE_LEVEL_HIGH>, + <0 0 0 4 &intc 0 0 0 73 IRQ_TYPE_LEVEL_HIGH>; + + clocks = <&gcc GCC_PCIE_5_AUX_CLK>, + <&gcc GCC_PCIE_5_CFG_AHB_CLK>, + <&gcc GCC_PCIE_5_MSTR_AXI_CLK>, + <&gcc GCC_PCIE_5_SLV_AXI_CLK>, + <&gcc GCC_PCIE_5_SLV_Q2A_AXI_CLK>, + <&gcc GCC_CFG_NOC_PCIE_ANOC_NORTH_AHB_CLK>, + <&gcc GCC_CNOC_PCIE_NORTH_SF_AXI_CLK>; + clock-names = "aux", + "cfg", + "bus_master", + "bus_slave", + "slave_q2a", + "noc_aggr", + "cnoc_sf_axi"; + + assigned-clocks = <&gcc GCC_PCIE_5_AUX_CLK>; + assigned-clock-rates = <19200000>; + + interconnects = <&pcie_south_anoc MASTER_PCIE_5 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS + &cnoc_main SLAVE_PCIE_5 QCOM_ICC_TAG_ALWAYS>; + interconnect-names = "pcie-mem", + "cpu-pcie"; + + resets = <&gcc GCC_PCIE_5_BCR>, + <&gcc GCC_PCIE_5_LINK_DOWN_BCR>; + reset-names = "pci", + "link_down"; + + power-domains = <&gcc GCC_PCIE_5_GDSC>; + required-opps = <&rpmhpd_opp_nom>; + + phys = <&pcie5_phy>; + phy-names = "pciephy"; + + status = "disabled"; + }; + + pcie5_phy: phy@1c06000 { + compatible = "qcom,x1e80100-qmp-gen3x2-pcie-phy"; + reg = <0 0x01c06000 0 0x2000>; + + clocks = <&gcc GCC_PCIE_5_AUX_CLK>, + <&gcc GCC_PCIE_5_CFG_AHB_CLK>, + <&rpmhcc RPMH_CXO_CLK>, + <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>, + <&gcc GCC_PCIE_5_PIPE_CLK>; + clock-names = "aux", + "cfg_ahb", + "ref", + "rchng", + "pipe"; + + resets = <&gcc GCC_PCIE_5_PHY_BCR>; + reset-names = "phy"; + + assigned-clocks = <&gcc GCC_PCIE_5_PHY_RCHNG_CLK>; + assigned-clock-rates = <100000000>; + + power-domains = <&gcc GCC_PCIE_5_PHY_GDSC>; + + #clock-cells = <0>; + clock-output-names = "pcie5_pipe_clk"; + + #phy-cells = <0>; + + status = "disabled"; + }; + pcie4: pci@1c08000 { device_type = "pci"; compatible = "qcom,pcie-x1e80100"; From patchwork Mon Jul 22 09:42:49 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 814247 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 441EE16D9C1; Mon, 22 Jul 2024 09:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1721641425; bh=fIjlu9xUUfZ1E4uHJtjwBsMhk2muIRSxZWPDwYXP9JQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EGO5LSEmo9iIfiz/TT9aZh2F0p9G2NCWfGpOoN8hBD8nAkE+ZiyGvzBxextS83H5W cK2TP7ZwYT7/YvPZtz1iYHMl3/o4Ioco+g46KVVfItXD3rVYMH0pyLw6uW4a5uyKG8 eUd0FJXvhELmPYoFKw/AMpEoaAnLWXmZacb7psahBOfm7wydjD+aBLuq7yTX6RCpAg BB2pkV2bdyKgHPx94iBNADxJHqT5gi4HuK1lbEaGT3lDyXhwYSVwVJv12bYVs4WW96 zBqqNExopwv+bkPiUlMkO34LjH2aSqXq6cnAOI2N78SayHZJA9em0fgIbzWL2qCtya 5DEzYNAxhCDxw== Received: from johan by xi.lan with local (Exim 4.97.1) (envelope-from ) id 1sVpa4-000000006uV-40fQ; Mon, 22 Jul 2024 11:43:44 +0200 From: Johan Hovold To: Bjorn Andersson , Konrad Dybcio Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sibi Sankar , Abel Vesa , Rajendra Nayak , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH v2 8/8] arm64: dts: qcom: x1e80100-crd: enable SDX65 modem Date: Mon, 22 Jul 2024 11:42:49 +0200 Message-ID: <20240722094249.26471-9-johan+linaro@kernel.org> X-Mailer: git-send-email 2.44.2 In-Reply-To: <20240722094249.26471-1-johan+linaro@kernel.org> References: <20240722094249.26471-1-johan+linaro@kernel.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Enable PCIe5 and the SDX65 modem. Note that the modem may need to be flashed with firmware before use. Reviewed-by: Konrad Dybcio Signed-off-by: Johan Hovold --- arch/arm64/boot/dts/qcom/x1e80100-crd.dts | 65 +++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts index caae0c3d8c7a..767118831551 100644 --- a/arch/arm64/boot/dts/qcom/x1e80100-crd.dts +++ b/arch/arm64/boot/dts/qcom/x1e80100-crd.dts @@ -301,6 +301,22 @@ vreg_nvme: regulator-nvme { pinctrl-names = "default"; pinctrl-0 = <&nvme_reg_en>; }; + + vreg_wwan: regulator-wwan { + compatible = "regulator-fixed"; + + regulator-name = "SDX_VPH_PWR"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + gpio = <&tlmm 221 GPIO_ACTIVE_HIGH>; + enable-active-high; + + pinctrl-0 = <&wwan_sw_en>; + pinctrl-names = "default"; + + regulator-boot-on; + }; }; &apps_rsc { @@ -800,6 +816,25 @@ &pcie4_phy { status = "okay"; }; +&pcie5 { + perst-gpios = <&tlmm 149 GPIO_ACTIVE_LOW>; + wake-gpios = <&tlmm 151 GPIO_ACTIVE_LOW>; + + vddpe-3v3-supply = <&vreg_wwan>; + + pinctrl-0 = <&pcie5_default>; + pinctrl-names = "default"; + + status = "okay"; +}; + +&pcie5_phy { + vdda-phy-supply = <&vreg_l3i_0p8>; + vdda-pll-supply = <&vreg_l3e_1p2>; + + status = "okay"; +}; + &pcie6a { perst-gpios = <&tlmm 152 GPIO_ACTIVE_LOW>; wake-gpios = <&tlmm 154 GPIO_ACTIVE_LOW>; @@ -1004,6 +1039,29 @@ wake-n-pins { }; }; + pcie5_default: pcie5-default-state { + clkreq-n-pins { + pins = "gpio150"; + function = "pcie5_clk"; + drive-strength = <2>; + bias-pull-up; + }; + + perst-n-pins { + pins = "gpio149"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + }; + + wake-n-pins { + pins = "gpio151"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + pcie6a_default: pcie6a-default-state { clkreq-n-pins { pins = "gpio153"; @@ -1055,6 +1113,13 @@ wcd_default: wcd-reset-n-active-state { bias-disable; output-low; }; + + wwan_sw_en: wwan-sw-en-state { + pins = "gpio221"; + function = "gpio"; + drive-strength = <4>; + bias-disable; + }; }; &uart21 {