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[95.127.46.5]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-427d69073d5sm169054185e9.25.2024.07.23.04.14.12 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 23 Jul 2024 04:14:13 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Huacai Chen , Song Gao , Jiaxun Yang , Bibo Mao , qemu-stable@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Richard Henderson Subject: [PATCH 1/2] hw/intc/loongson_ipi: Access memory in little endian Date: Tue, 23 Jul 2024 13:14:04 +0200 Message-ID: <20240723111405.14208-2-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240723111405.14208-1-philmd@linaro.org> References: <20240723111405.14208-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::22e; envelope-from=philmd@linaro.org; helo=mail-lj1-x22e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bibo Mao Loongson IPI is only available in little-endian, so use that to access the guest memory (in case we run on a big-endian host). Cc: qemu-stable@nongnu.org Signed-off-by: Bibo Mao Fixes: f6783e3438 ("hw/loongarch: Add LoongArch ipi interrupt support") [PMD: Extracted from bigger commit, added commit description] Co-Developed-by: Philippe Mathieu-Daudé Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bibo Mao Tested-by: Bibo Mao Acked-by: Song Gao Reviewed-by: Richard Henderson Reviewed-by: Jiaxun Yang Tested-by: Jiaxun Yang --- hw/intc/loongson_ipi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index e6a7142480c..e7979dbdd8b 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -14,6 +14,7 @@ #include "qapi/error.h" #include "qemu/log.h" #include "exec/address-spaces.h" +#include "exec/memory.h" #include "migration/vmstate.h" #ifdef TARGET_LOONGARCH64 #include "target/loongarch/cpu.h" @@ -102,7 +103,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, * if the mask is 0, we need not to do anything. */ if ((val >> 27) & 0xf) { - data = address_space_ldl(iocsr_as, addr, attrs, NULL); + data = address_space_ldl_le(iocsr_as, addr, attrs, NULL); for (i = 0; i < 4; i++) { /* get mask for byte writing */ if (val & (0x1 << (27 + i))) { @@ -113,7 +114,7 @@ static MemTxResult send_ipi_data(CPUState *cpu, uint64_t val, hwaddr addr, data &= mask; data |= (val >> 32) & ~mask; - address_space_stl(iocsr_as, addr, data, attrs, NULL); + address_space_stl_le(iocsr_as, addr, data, attrs, NULL); return MEMTX_OK; } From patchwork Tue Jul 23 11:14:05 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= X-Patchwork-Id: 813945 Delivered-To: patch@linaro.org Received: by 2002:adf:f288:0:b0:367:895a:4699 with SMTP id k8csp2263479wro; Tue, 23 Jul 2024 04:15:28 -0700 (PDT) X-Forwarded-Encrypted: i=2; AJvYcCVTiCkFPGZQfMEvG8b+/HTZIKQeFCACVjNSZ3rjNQZr0ANqbRUykG+ncCVXWTme+Q6b0jcXxcsQEAOZ68bO5CSW X-Google-Smtp-Source: AGHT+IHQjFQyRY6xWvEPGvnGUOoXiKSwzdWgdVBzcySYbapIgS6x/J2vqlGpvFY6j6S8Hs7pcZ/s X-Received: by 2002:a05:6870:171e:b0:260:eb3a:1b2 with SMTP id 586e51a60fabf-26121303088mr10953876fac.7.1721733327871; Tue, 23 Jul 2024 04:15:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1721733327; cv=none; d=google.com; s=arc-20160816; b=goaZTst33Wps4Y/g5HzdezqggGRO2Q0sUg9vd7kUfhX7UQOmQoWLMixkm5EfNYefz/ Y1oPRV9OmDhECziC3WbW6f661v/XO22DjFdmFzmShD0YGenGqENTGYRCyL9Wp0lnw0z2 Ar5fIrvaDRmUCLq+52PTbXsQDgtesVbrQYPwFCrwUq+V2eLxWqzykdHOMJGgHyaH5rGN OYM13o5idlRah1/BGHjRhWEvCivZsF7JkLrNki+RqhF2KLgzK0kLQPQ0Rofotb/I1ngl vyrToeB1BFhJkWbvIyJ7562Zuz8cJ6GpDwLo1VaZheUDmpZQfBV2YpeKeSj+5BtgY2WO 91YQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=mzdAeTmVzX5BA7pT+fF+VfrDZygQBDin0XNPxTXT+RQ=; fh=abakntdugFPuhbWJ9/EnKBdPV4c/ayiJkRu5jFQcj3o=; b=aRpLAGoRW7bD+ysn2BniUcccEcSbrv+jDPpAUxxw9icUoJIJL0uWg5kNT6w8gCtCeV eYDv+tJFrpAnhtAyzd9yVHT36Yz0sfuI99LlsEymcjmOr0RN1sWKHQVXeNAxFjZYOntE Vs8bJ61lHiN4bwr2foaZvAbAbqwBLxtLcAVHgveF0ghctW1v46EEA9Mz6MdQwavcdGiE /rx4fkuYqibN3QnX7UwpK2NnCl0LjHzzmuNFCUyyICVRJKE+Y5l9sn48QLnUakeJCFLM XB0yZ0OAqdwPGij7Q0huoQayTmSeP+QViCeuJBESQ+XxJUB3nCBDEIvHhFIm1tL6C+zk I9YQ==; dara=google.com ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=rOPMod1u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org; dara=neutral header.i=@linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[95.127.46.5]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-368787eced0sm11128295f8f.98.2024.07.23.04.14.18 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 23 Jul 2024 04:14:19 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Huacai Chen , Song Gao , Jiaxun Yang , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , qemu-stable@nongnu.org Subject: [PATCH 2/2] hw/intc/loongson_ipi: Fix resource leak Date: Tue, 23 Jul 2024 13:14:05 +0200 Message-ID: <20240723111405.14208-3-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240723111405.14208-1-philmd@linaro.org> References: <20240723111405.14208-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=philmd@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Once initialised, QOM objects can be realized and unrealized multiple times before being finalized. Resources allocated in REALIZE must be deallocated in an equivalent UNREALIZE handler. Free the CPU array in loongson_ipi_unrealize() instead of loongson_ipi_finalize(). Cc: qemu-stable@nongnu.org Fixes: 5e90b8db382 ("hw/loongarch: Set iocsr address space per-board rather than percpu") Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Song Gao --- hw/intc/loongson_ipi.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/intc/loongson_ipi.c b/hw/intc/loongson_ipi.c index e7979dbdd8b..4013f81745e 100644 --- a/hw/intc/loongson_ipi.c +++ b/hw/intc/loongson_ipi.c @@ -318,6 +318,13 @@ static void loongson_ipi_realize(DeviceState *dev, Error **errp) } } +static void loongson_ipi_unrealize(DeviceState *dev) +{ + LoongsonIPI *s = LOONGSON_IPI(dev); + + g_free(s->cpu); +} + static const VMStateDescription vmstate_ipi_core = { .name = "ipi-single", .version_id = 2, @@ -353,23 +360,16 @@ static void loongson_ipi_class_init(ObjectClass *klass, void *data) DeviceClass *dc = DEVICE_CLASS(klass); dc->realize = loongson_ipi_realize; + dc->unrealize = loongson_ipi_unrealize; device_class_set_props(dc, ipi_properties); dc->vmsd = &vmstate_loongson_ipi; } -static void loongson_ipi_finalize(Object *obj) -{ - LoongsonIPI *s = LOONGSON_IPI(obj); - - g_free(s->cpu); -} - static const TypeInfo loongson_ipi_info = { .name = TYPE_LOONGSON_IPI, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(LoongsonIPI), .class_init = loongson_ipi_class_init, - .instance_finalize = loongson_ipi_finalize, }; static void loongson_ipi_register_types(void)